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2/7,. ' LEERARY '
Michigan State
Umversity

This is to certify that the
thesis entitled

ZERO CURRENT SWITCHING SWITCHED-CAPACITOR DC-DC
CONVERTERS FOR THERMOELECTRIC GENERATION
APPLICATIONS

presented by

Dong Cao

has been accepted towards fulfillment
of the requirements for the

MS. degree in Electrical figineering

 

 

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Date

 

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ZERO CURRENT SWITCHING SWITCHED-CAPACITOR DC-DC
CONVERTERS FOR THERMOELECTRIC GENERATION APPLICATIONS

By

Doug Cao

A THESIS

Submitted to
Michigan State University
in partial fitlfillment of the requirements
for the degree of

MASTER OF SCIENCE
Electrical Engineering

2009

ABSTRACT

ZERO CURRENT SWITCHING SWITCHED-CAPACITOR DC-DC CONVERTERS
FOR THERMOELECTRIC GENERATION APPLICATIONS

By
Dong Cao

Thermoelectric generation (TEG) module as a renewable energy source for
automotive industry is becoming more and more popular recently. Because of the
inherent characteristics of TEG modules, a low input voltage, high input current and high
voltage gain dc-dc converters are needed for the automotive load. Traditional high
voltage gain dc-dc converters are not suitable for automotive application in terms of size
and high temperature operation. Switched-capacitor dc-dc converters have to be used for
this application.

However, high voltage spike and EMI problems exist in traditional switched-
capacitor dc-dc converters. Huge capacitor banks have to be utilized to reduce the voltage
ripple and achieve high efficiency.

A series of zero current switching (ZCS) switched-capacitor dc-dc converters have
been proposed to overcome the aforementioned problems of the traditional switched-
capacitor dc-dc converters. By using the proposed ZCS strategy, high voltage spike is
reduced, high EMI noise is restricted, and the huge capacitor bank is eliminated. High
efficiency, high power density and high temperature ZCS switched-capacitor dc-dc
converters could be made for the TEG interface in automotive applications. Several
prototypes have been made to validate the proposed circuit and confirm the circuit

operation.

Dedicated to:

my wife, Ying Ding

iii

ACKNOWLEDGEMENTS

First of all, I would like to thank my advisor Prof. Fang Z. Peng for his insightful
comments, strict requirements, and continuous support during my graduate studies. There
is a Chinese proverb: “Good pupils are to be brought up by strict teachers”. Thanks to his
high standard requirements, I have the chance to reinvestigate the familiar circuits and
propose all these new circuits.

I would like to express my appreciation to my committee members, Dr. Elias
Strangas, and Dr. Joydeep Mitra for their enlightening class, valuable suggestions and
serving on my M.S. committee.

I would also like to thank Dr. Zhaoming Qian, my first mentor in power electronics.
His guidance and encouragement are always so valuable in the past and in the future. And
I also thank so much to my colleagues working at Dr. Qian’s lab in Zhejiang University
in China, Fan Zhang, Xinping Ding, Xinke Wu, Liqing Tong, Shuitao Yang Chen Zhao,
Huijie Zhao, Naixin Kuang, Lingxiao Xue, for their valuable discussions and helps in
both study and life.

I thank so much all the PELab colleagues, especially to Dr. Lihua Chen for his help
on understanding IGBT gate drive, Dr. Honnyong Cha, Dr. Yi Huang, Dr. Baoming Ge,
Dr. Dan Wang, Dr. Yuan Li, Wei Qian, Xi Lu, Qingsong Tang, for their valuable
discussions and priceless help in both study and life.

Finally I would like to especially appreciate my wife _Ying Ding for her unconditional
love and support, my parents and grandparents for their care and support. There is no

word can express my appreciation to them.

iv

TABLE OF CONTENTS

 

 

 

 

LIST OF TABLES - vii
LIST OF FIGURES viii
CHAPTER 1 Introduction and Motivation 1
1.1 Background .......................................................................................................... 2
1.1.1 TEG Modules Basic Structures and Potential Automotive Applications ..... 2
1.1.2 TEG Modules Electrical Characteristics ....................................................... 5
1.2 Power Electronic Challenges for TEG ............................................................... 10
1.3 Summary of Previous Works ............................................................................. 12
1.3.1 Traditional Step-up DC-DC Converter ....................................................... 12
1.3.2 Switched-Capacitor DC-DC Converter ...................................................... 30
1.4 Outline of Thesis ................................................................................................ 36
CHAPTER 2 Zero Current Switching Multilevel Modular Switched-Capacitor
DC-DC Converter for TEG Applications 38
2.1 Introduction ........................................................................................................ 39
2.2 Proposed Circuit Topology ................................................................................ 42
2.3 Operation Principle ............................................................................................ 45
2.3.1 State I .......................................................................................................... 47
2.3.2 State 11 ......................................................................................................... 50
2.4 Design Guidelines .............................................................................................. 53
2.4.1 Capacitance ................................................................................................. 53
2.4.2 Stray inductance .......................................................................................... 54
2.4.3 Switching frequency ................................................................................... 56
2.5 Power Loss Analysis .......................................................................................... 56
2.5.1 Power device loss ........................................................................................ 56
2.5.2 Capacitor conduction loss ........................................................................... 57
2.5.3 Total power loss .......................................................................................... 58
2.6 Simulation and Experiment Results ................................................................... 59
2.6.1 A 150 W four-level ZCS-MMSCC prototype ............................................ 59
2.6.2 A 630 W twelve-level ZCS-MMSCC prototype ........................................ 63
2.7 Conclusion .......................................................................................................... 65
CHAPTER 3 A Family of ZCS Switched-Capacitor DC-DC Converters ........... 67
3.1 Introduction ........................................................................................................ 67
3.2 Proposed ZCS Switched-Capacitor DC-DC Converter Family ......................... 71
3.3 Operation Principle ............................................................................................ 73
3.3.1 ZCS voltage multiplier ................................................................................ 73
3.3.2 ZCS voltage doubler ................................................................................... 80
3.4 Design Considerations ........................................................................................ 88
3.4.1 ZCS voltage multiplier ................................................................................ 88
3.4.2 ZCS voltage doubler ................................................................................... 90
3.5 Simulation and Experiment Results ................................................................... 91

3.5.1 ZCS voltage multiplier ................................................................................ 91

 

 

3.5.2 ZCS voltage doubler ................................................................................... 92
3.6 Conclusion .......................................................................................................... 98
CHAPTER 4 Improved ZCS Switched-Capacitor DC-DC Converters with
Continuous Input Current for High Power Application 99
4.1 Introduction ...................................................................................................... 100
4.2 Proposed Improved ZCS Switched-Capacitor DC-DC Converters with
Continuous Input Current ............................................................................................ 102
4.2.1 Improved ZCS-MMSCC with continuous input current .......................... 102
4.2.2 Improved ZCS voltage multiplier with continuous input current ............. 104
4.3 Operation Principles ......................................................................................... 106
4.3.1 Improved ZCS-MMSCC with continuous input current .......................... 106
4.3.2 Improved ZCS voltage multiplier with continuous input current ............. 118
4.4 Analysis of Input Current Ripple Reduction .................................................... 129
4.4.1 ZCS-MMSCC type ................................................................................... 129
4.4.2 ZCS voltage multiplier type ...................................................................... 130
4.5 Simulation and Experiment Results ................................................................. 131
4.5.1 Improved ZCS-MMSCC with continuous input current .......................... 131
4.5.2 Improved ZCS voltage multiplier with continuous input current ............. 135
4.6 Conclusion ........................................................................................................ 137
CHAPTER 5 Conclusion and Future works 138
5.1 Contributions .................................................................................................... 138
5.2 Recommendations for Future Works ............................................................... 139
REFERENCE 140

 

vi

LIST OF TABLES

Table 2.1 Required stray inductance according to switching frequency .......................... 55

vii

LIST OF FIGURES

Figure 1.1 PN Thermoelectric modules. (a) Cooling applications. (b) Power generation. 3

Figure 1.2 TEG module configuration. ............................................................................... 4
Figure 1.3 Typical TEG module assembly. ........................................................................ 4
Figure 1.4 TEG modules around the exhausting pipe ......................................................... 5
Figure 1.5 Heat exchanger configurations .......................................................................... 6
Figure 1.6 One TEG module G1-1.4-219-1 .14 from Tellurex® Corp ............................... 6
Figure 1.7 TEG module heating and testing system ........................................................... 7
Figure 1.8 TEG module steady-state testing results ........................................................... 8
Figure 1.9 Electrical equivalent circuit of one TEG module. ............................................. 8
Figure 1.10 TEG module dynamic test circuit .................................................................... 9
Figure 1.11 TEG module output waveforms ...................................................................... 9
Figure 1.12 Traditional boost dc-dc converter .................................................................. 12
Figure 1.13 Boost converter considering internal resistance. ........................................... 15
Figure 1.14 Voltage gain vs. duty cycle considering power loss ...................................... 15
Figure 1.15 Two-phase interleaved boost dc-dc converter. .............................................. 17
Figure 1.16 Current ripple cancellation in multiphase boost converters. ......................... 17

Figure 1.17 Normalized input current ripple with duty cycle and the number of

interleaved phase ............................................................................................................... 18
Figure 1.18 Two phase interleaved boost converter with active clamp ZCT network. 19
Figure 1.19 Common mode coupled interleaved boost dc-dc converter. ......................... 20
Figure 1.20 Differential mode coupled interleaved boost dc-dc converter. ..................... 20
Figure 1.21 common mode ocupled inductor interleaved boost dc—dc converter with
active clamp. ..................................................................................................................... 21
Figure 1.22 Three level boost dc-dc converter. ................................................................ 22

viii

Figure 1.23 N-Ievel boost dc-dc converter. ...................................................................... 23

Figure 1.24 Multilevel boost dc-dc converter voltage gain curve considering internal

resistance. .......................................................................................................................... 24
Figure 1.25 Cascaded three level boost dc-dc converter. .................................... 25
Figure 1.26 Boost flyback step-up dc-dc converter. ......................................................... 26
Figure 1.27 Improved boost flyback dc-dc converter with capacitor coupling. ............... 27
Figure 1.28 Improved boost flyback dc-dc converter with charge pump. ........................ 28
Figure 1.29 Interleaved three coupled inductor boost flyback dc-dc converter ............... 28
Figure 1.30 Ideal voltage gain curve of boost flyback and its improvements. ................. 29
Figure 1.31 Traditional switched-capacitor voltage multiplier ......................................... 31
Figure 1.32 Traditional multilevel modular switched-capacitor dc-dc converter ............. 32
Figure 1.33 Traditional generalized multilevel switched-capacitor dc-dc converter. ...... 33
Figure 1.34 Three level generalized multilevel converter derivation. .............................. 34
Figure 1.35 Some other three level generalized multilevel converter derivations. .......... 34
Figure 1.36 Four level switched-capacitor resonant converter main circuit ..................... 36
Figure 2.1 Four-level MMSCC with three modular blocks .............................................. 41
Figure 2.2 Four-level ZCS-MMSCC with three modular blocks ..................................... 42
Figure 2.3 proposed ZCS-MMSCC modular block .......................................................... 43
Figure 2.4 ZCS-MMSCC modular block with all the stray inductance. . ......................... 44
Figure 2.5 Typical waveforms of proposed ZCS-MMSCC .............................................. 46
Figure 2.6 Operation modes State I Sp is on ................................................................... 47
Figure 2.7 Operation modes State 11 S N is on ................................................................. 47
Figure 2.8 Simplified equivalent circuits of state I (a) ..................................................... 48
Figure 2.9 Simplified equivalent circuits of state I (b) ..................................................... 48

Figure 2.10 Simplified equivalent circuits of state II (a) .................................................. 51

ix

Figure 2.11 Simplified equivalent circuits of state 11 (b) .................................................. 51

Figure 2.12 ZCS stray inductance and switching frequency ............................................ 54
Figure 2.13 Ideal input current waveform ........................................................................ 58
Figure 2.14 Simulation waveforms of 150 W four-level ZCS-MMSCC .......................... 60
Figure 2.15 Gate drive signal of Sp and SN ................................................................... 61
Figure 2.16 Voltage and current waveform of S p1 .......................................................... 62
Figure 2.17 Zoomed in voltage and current waveforms of S p1 ....................................... 62
Figure 2.18 Measured Efficiency and Calculated Efficiency ........................................... 63
Figure 2.19 Input voltage, output voltage and switch current waveforms ........................ 64
Figure 2.20 Switch voltage and current waveforms ......................................................... 64
Figure 2.21 Loss break down of the 630 W prototype. .................................................... 65
Figure 3.1 Voltage multiplier ............................................................................................ 68
Figure 3.2 Multilevel modular switched-capacitor dc-dc converter. ................................ 68
Figure 3.3 Generalized multi-level switched-capacitor dc-dc converter. ......................... 69
Figure 3.4 ZCS voltage multiplier .................................................................................... 71
Figure 3.5 ZCS multi-level modular switched-capacitor dc-dc converter ........................ 71
Figure 3.6 ZCS generalized multi-level switched-capacitor dc-dc converter ................... 72
Figure 3.7 Four-level ZCS voltage multiplier main circuit. ............................................. 74
Figure 3.8 Ideal waveforms of four-level ZCS voltage multiplier. .................................. 75
Figure 3.9 Operation modes state I Sp is on .................................................................... 76
Figure 3.10 Operation modes state 11 S N is on ................................................................ 76
Figure 3.11 Simplified equivalent circuits of state I ......................................................... 78
Figure 3.12 Simplified equivalent circuits of state 11 ....................................................... 79
Figure 3.13 ZCS voltage doubler main circuit .................................................................. 81

Figure 3.14 ZCS voltage doubler topology simplification. .............................................. 82

Figure 3.15 Ideal waveforms of ZCS voltage doubler ...................................................... 83
Figure 3.16 Operation modes of state I when Sp is on .................................................... 84
Figure 3.17 Operation modes of state 11 when S N is on. ................................................ 84
Figure 3.18 Simplified equivalent circuits of state I ......................................................... 85
Figure 3.19 Simplified equivalent circuits of state 11 ....................................................... 88
Figure 3.20 Simulation results of 160 W ZCS voltage multiplier. ................................... 94
Figure 3.21 Simulation results of 480 W ZCS voltage doubler ........................................ 95
Figure 3.22 Simulation results of 480 W ZCS voltage doubler ........................................ 96
Figure 3.23 Gate drive signal of ZCS voltage doubler ..................................................... 97
Figure 3.24 Switch voltage and input current waveform of ZCS voltage doubler ........... 98
Figure 4.1 ZCS-MMSCC input current. ......................................................................... 101
Figure 4.2 ZCS voltage multiplier input current ............................................................. 101
Figure 4.3 Proposed ZCS-MMSCC 10 with continuous input current main circuit ...... 103
Figure 4.4 Proposed ZCS voltage multiplier with continuous input current main chpgist
Figure 4.5 Ideal waveforms of ZCS-MMSCC with continuous input current. .............. 107
Figure 4.6 State I Sp and S R conduct. .......................................................................... 108
Figure 4.7 Simplified equivalent circuits of state I (a) ................................................... 109
Figure 4.8 Simplified equivalent circuits of state I (b) ................................................... 109
Figure 4.9 Simplified equivalent circuits of state I (c) ................................................... 109
Figure 4.10 Simplified equivalent circuits of state I (d) ................................................. 110
Figure 4.11 State 11 Sp and SB conduct. ...................................................................... 111
Figure 4.12 Simplified equivalent circuits of state 11 (a) ................................................ 111
Figure 4.13 Simplified. equivalent circuits of state II (b) ................................................ 112

xi

Figure 4.14 Simplified equivalent circuits of state 11 (c) ................................................ 112

Figure 4.15 Simplified equivalent circuits of state II (d) ................................................ 112
Figure 4.16 State 111 S N and SB conduct. .................................................................... 114
Figure 4.17 Simplified equivalent circuits of state ID (a) ............................................... 115
Figure 4.18 Simplified equivalent circuits of state 111 (b) .............................................. 115
Figure 4.19 Simplified equivalent circuits of state 111 (c)..........‘. .................................... 115 .
Figure 4.20 Simplified equivalent circuits of state m (d) .............................................. 116
Figure 4.21 State IV S N and S R conduct. .................................................................... 117
Figure 4.22 Simplified equivalent circuits of state IV (a) .............................................. 117
Figure 4.23 Simplified equivalent circuits of state IV (b) .............................................. 118
Figure 4.24 Simplified equivalent circuits of state IV (c) .............................................. 118
Figure 4.25 Simplified equivalent circuits of state IV ((1) .............................................. 118

Figure 4.26 Ideal waveforms of ZCS voltage multiplier with continuous input current. 120

Figure 4.27 State] Sp and S R conduct. ........................................................................ 121
Figure 4.28 Simplified equivalent circuits of state I (a) ................................................. 122
Figure 4.29 Simplified equivalent circuits of state I (b) ................................................. 122
Figure 4.30 Simplified equivalent circuits of state I (c) ................................................. 122
Figure 4.31 Simplified equivalent circuits of state I (d) ................................................. 123
Figure 4.32 State II Sp and SB conduct. ...................................................................... 123
Figure 4.33 Simplified equivalent circuits of state 11 (a) ................................................ 124
Figure 4.34 Simplified equivalent circuits of state I] (b) ................................................ 124
Figure 4.35 Simplified equivalent circuits of state 11 (c) ................................................ 124
Figure 4.36 Simplified equivalent circuits of state 11 (d) ................................................ 125
Figure 4.37 State 111 S N and S B conduct. .................................................................... 125

xii

Figure 4.38 Simplified equivalent circuits of state ID (a) ............................................... 126

Figure 4.39 Simplified equivalent circuits of state IH (b) .............................................. 126
Figure 4.40 Simplified equivalent circuits of state 111 (c) ............................................... 126
Figure 4.41 Simplified equivalent circuits of state 111 (d) .............................................. 127
Figure 4.42 State IV S N and S R conduct. .................................................................... 127
Figure 4.43 Simplified equivalent circuits of state IV (a) .............................................. 128
Figure 4.44 Simplified equivalent circuits of state IV (b) .............................................. 128
Figure 4.45 Simplified equivalent circuits of state IV (c) .............................................. 128
Figure 4.46 Simplified equivalent circuits of state IV ((1) .............................................. 129
Figure 4.47 Simulation results of ZCS-MMSCC with continuous input current. .......... 133
Figure 4.48 Switch voltage and current waveform. ........................................................ 134
Figure 4.49 two switches control signals and current waveforms. ................................. 134

Figure 4.50 Simulation results of ZCS voltage multiplier with continuous input current.
......................................................................................................................................... 136

xiii

CHAPTER 1

Introduction and Motivation

Recently, renewable energy sources are used more and more in automotive industry
for hybrid electric vehicle (HEV), such as photovoltaic (PV) cells, firel cells, and
thermoelectric generation (TEG) modules. Because of the newly developed materials for
the efficiency improvement of TEG modules, TEG for automotive application has drawn
more attentions. However, TEG modules are still not widely used in the automotive
industry; there are several problems of TEG modules that limit their applications.
Because of the inherent low output voltage and high output current characteristics of
TEG modules, special dc-dc converter interface is required for the automotive
applications such as battery charging. This thesis will concentrate on developing a high
efficiency, high input current, high voltage gain step-up dc—dc converter as the interface
circuit for TEG modules in automotive application.

The following discussion starts with the background information introduction of TEG
modules, literature review of the traditional step-up dc-dc converters and their application
limits for the automotive application, conventional switched-capacitor dc-dc converters

for automotive applications, and their limitations. 1

 

'This chapter was presented in part at the 39th IEEE Power Electronics Specialists
Conference, Island of Rhodes, Greece, Jun.15-19, 2009

1.1 Background

1.1.1 TEG Modules Basic Structures and Potential Automotive
Applications

Thermoelectric modules (thermoelectric devices) are solid state devices that can
convert thermal energy from a temperature gradient into electric energy as power
generators or vice versa (convert electrical energy into a temperature gradient across the
modules) for cooling applications [1]. Unlike the thermocouples used for temperature
measurement, the TEG modules can generate enough electricity for many applications [2].
Compared to other energy conversion methods, TEG modules are reliable without any
noise or vibration and are attracting more attention as renewable energy sources where
temperature gradients are available. Because of the low efficiency and cost issues,
previously the TEG modules have been restricted to special applications, such as
powering the onboard electronics of a satellite in deep space, and providing electricity
from nuclear heat for a submarine in deep waters [3, 4]. Recently, due to environmental
concern and global warming issues, TEG modules have received more attention as a
method to convert wasted heat to electricity. For example, converting the waste heat from
the exhausting pipe of automobiles to power accessory electric loads such as air
condioner in a vehicle or put the energy back to the wheel to increase efficiency [3, 4].
Many new materials have also been developed to increase the heat to electricity
conversion efficiency of TEG modules [5, 6, 7].

Thermoelectric modules consist of p-type and n-type semiconductors connected

electrically in series and thermally in parallel as shown in Figure 1.1 and Figure 1.2 [8].

Figure 1.1(a) shows a pn module used for cooling applications while (b) shows the same
device being used for power generation. By the Seebeck effect, heat flow through this
thermoelectric material will tend to move the charge carriers in the same direction as the
heat flow. As shown in Figure 1.2, TEG modules for power generation usually consist of
an array of 2N pellets (n- and p- type semiconductor thennoelements) that make up N
thermoelecuic couples thermally in parallel and electrically in series to achieve high
output voltage and high power [8]. Usually these pellets are connected by high
conductive metal strips and sandwiched between thermal conducting while electrically
insulating metalized ceramic plates. The pellets, tabs and substrates thus form a layered

assembly, which is shown in the Figure 1.3 [9].

Heat Applied
Cooling

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F

 

r l
I 4-
b

(a)
Figure 1.] PN Thermoelectric modules. (a) Cooling applications. (b) Power generation.

“:31:

Writ/IV» 7

 

(‘nld Side

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Electrical Electrical a
Current Current Current 1
3
I I I I I I Thermal
Flow
N P N P N P _
i?
I
+ —I I I I I I I I— -
——-—> ———)- ——> —> 2
Electrical Electrical Electrical Electrical
Current Current Om'errt Current

-I-|-l-I-l-I-l-I-l Hotside —--I—o—o-o—I-I-I-

Figure 1.2 TEG module configuration.

    

I I'Wé'rinns'idé
Figure 1.3 Typical TEG module assembly.

By adding TEG modules around the car exhausting pipe, the waste heat energy can be
converted into electricity shown in Figure 1.4 The new developed materials for TEG
modules has about 10% electricity conversion efficiency, which means 10% waste heat
energy can be converted into electricity. In this case, more than 5% of firel can be saved.
The generated electricity by the TEG modules is around 500 W~ 1kW in some big truck.

And this depends on how many TEG modules are put around the exhausting pipe.

TEG .
Modules

Exhaust -
Coolant

 

Figure 1.4 TEG modules around the exhausting pipe
1.1.2 TEG Modules Electrical Characteristics

In order to apply TEG modules to automotive application, electrical characteristics of
TEG modules has to be modeled.

At present, the power conditioning technology was majorly based on the high
frequency switching DC-DC converter design, with high frequency (50 KHz~1 MHz)
switching device (MOSFET, IGBT etc.) used. So the high frequency characteristics and
dynamic response of TEG module are becoming major concerns in the outside power
conditioning circuit design. In order to design a suitable switching dc—dc converter
special for the TEG module usage, the high frequency electrical characteristics of TEG
module in steady state and in transient procedure have to be known. In the following
parts, a method will be proposed to test the TEG module outside electrical characteristics
in steady state and in transient procedure, and a high frequency electrical model will be
put forward to help design the switching power supply DC-DC converter.

To characterize TEG modules, a heat exchanger capable of outputting 100 W
electrical power was designed and fabricated. Figure 1.5 shows the decomposed structure

of the heat exchanger. Heat elements are distributed evenly within the hot plate to

generate a uniform hot side temperature. A total of twenty TEG modules, Gl-1.4-219-
1.14, from Tellurex® Corp. shown in Figure 1.6 [10], are installed on both sides of the
hot plate, ten pieces on the top of the hot plate and ten pieces on the bottom of it. Two
radiators are clamped on both sides to cool the TEG modules’ cold surface. When a
temperature gradient exists between the hot plate and the radiator, electric power is
generated by the TEG modules as a result of heat flow through them. Thermal couple was
used as temperature sensor that was installed in the hot plate and the heat sink to monitor

the temperature between hot side and cold side during the tests.

Heatsink

\\\\\\\\\

Heat elements

 

Figure 1.5 Heat exchanger configurations

 

Figure 1.6 One TEG module Gl—1.4-219-1.14 from Tellurex® Corp

Figure 1.7 shows the TEG module heating and testing system flowchart. And this
system was used to measure the steady-state and dynamic response of TEG modules. By
taking advantage of thermo-coupler as the temperature sensor, a temperature PID
controller can be used to adjust a solid state contactor to control the power flow from the
AC power supply to the heating elements of the TEG modules. And in this way, the
temperature of the hot plate accurately controlled. By using this temperature close loop
control, stable hot plate temperature could be achieved when the steady state and

dynamic response of TEG modules are tested.
PM" supply Heatin TEG Testin
and Solid state g , ' . . g

Elements modules crrcurts

contactor
Temperature T'I‘lziirngilriiizr
PID controller p
Sensor

Figure 1.7 TEG module heating and testing system

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 1.8 shows the measured steady-state electrical output characteristics of a single
TEG module. Three thermal conditions were tested and the V-I curves are plotted.
During tests, the heat exchanger hot plane temperature is controlled to 150°C, 115°C,
79°C; the heatsink temperature are 27°C, 29°C, and 31°C, respectively. From the three
curves shown in Figure 1.8, the internal resistances of the TEG modules under those
thermal conditions are calculated and are 3.59, 3.99, and 4.252, respectively. The

maximum power output of a single module at 150 °C is about 4.5 W. From the plotted

V-I curve of the TEG module, the TEG module can be modelled as a ideal voltage source

with internal resistance shown in Figure 1.9

Output Voltage(V) output power(W)

In
G

 

V-I characristics

+Voltage @150"C
-I-VoItage @115"C
«Voltage @79°C
power @1500C
*power @115°C

0 0.5 1 1.5 2 2.5

Output Current(A)

Figure 1.8 TEG module steady-state testing results

 

TEG module

Figure 1.9 Electrical equivalent circuit of one TEG module.

Figure 1.10 shows the test circuit of the electrical characteristics of the TEG module’s
dynamic behaviors. Figure 1.11 shows the captured single TEG module output voltage
and current waveforms. Test results reveal that the TEG module has a very fast dynamic
response and it will not influence the converter design. Because the TEG module output
current can increase in the range of nanoseconds and the switching speed of DC-DC
converter is usually in the range of 50K~1MHz, the switching period will be 1us~20us.
So, the ideal voltage source with the internal resistance model can represent the TEG

steady state and dynamic model very well.

 

TEG KHz
module

Figure 1.10 TEG module dynamic test circuit

 

    

, : i
l i . i
i Inui- 2 us/div but
i :

Figure 1.11 TEG module output waveforms

1.2 Power Electronic Challenges for TEG

Initially, the TEG module output voltage and power will change distinctly with the
temperature gradient, which means it cannot output stable voltage or constant current. In
order to utilize the TEG modules as the power source, a power conditioning circuit as
interface between the TEG module and loads is needed. In order to solve this problem,
the electrical characteristic of the TEG module should be modeled for circuit anaylsis and
design. Some modeling method has been previously proposed [11]. Some DC-DC
converter circuits have been investigated to output stable voltage and improve the TEG
module power condition for more applications [12, 13]. And some control methods such
as Maximum Power Point Tracking (MPPT) and constant voltage control have also been
investigated to apply to the TEG module [14]. The TEG modules have also been used for
battery charging applications reported in [15].

Moreover, due to the inherent characteristics of the materials making TEG modules,
bigger pellets with larger heat conduction areas can produce high output current with the
same output voltage compared to the smaller pellets with smaller conduction areas [5, 7,
8]. At the same time, by using the same amount of materials to manufacture TEG
modules, it is much easier to manufacture bigger pellets. That means, in order to output

the same amout of power, it is much easier to produce a TEG module with low output

voltage and high output current than a low output current and high output voltage version.

The reliability and the total heat-electricity conversion efficiency of the high output
current and low output voltage module is also much higher than the low output current
and high output voltage version, because the latter one needs more small pellets in series.

By putting more pellets in series means more electric connectors are needed, which will

10

' -:.!A

 

cause the increase of the internal resistance of the whole TEG module, and the reliability
of the whole module will also reduce accordingly. Therefore, the low output voltage with
high output current TEG modules are preferred in the manufacturing process and
application. And this features add special challenges to the power electronics interface
circuit design. Following provides the power electronics circuit reqirements for the TEG
module interface and some challenges in the circuit design for automotive application:
TEG module interface circuit reqirements:
> Maximum power point tracking control
> Constant output voltage or current control
TEG module interface circuit design challenges for automotive application
> Low input voltage
High input current
High voltage conversion ratio
High temperature operation

High efficiency

VV VV V

Small size

Among these challenges, the low input voltage, high input current, and high voltage
conversion ratio are the requirements from TEG modules, and high temperature operation
and small size are the features preferred by the automotive application. And high
efficiency is always a preferred feature.

In order to meet all these requirements, traditional step-up dc-dc converter with a

transformer or coupled inductor for high voltage conversion ratio applications are

11

reviewed in the following discussions. Switched-capacitor dc-dc converter topologies for

the automotive application are also summarized; drawbacks of each circuit are addressed.

1.3 Summary of Previous Works

1.3.1 Traditional Step-up DC-DC Converter

Traditional step-up dc-dc converter utilizes the inductor charging and discharging to
boost the voltage. We will discuss the basic step-up circuit topology from the very
beginning to the improvements of them proposed recently.

1.3.1.1 Boost dc-dc converter

Figure 1.12 shows the traditional boost dc-dc converter. There are several benefits of
the traditional boost converter. The structure of the traditional boost converter is simple.

There are only one switch S, one diode D0 , one inductor L, and one capacitor Co . The

control and gate drive of this circuit is also very simple, only one switch needs to be
controlled and gate drive shares the same ground with the input voltage source. The input
current ripple is small; the total cost of the circuit is also relatively low. Because of these
good features of traditional boost circuit, it has more and more applications in normal dc-

dc step-up applications with voltage gain less than three and power factor correction

(PFC) circuit [16, 17].

 

 

- I>I -
SJ Col .Ro

'V'

Vin

 

Figure 1.12 Traditional boost dc-dc converter.

12

Theoretically, the traditional boost dc—dc converter has infinite voltage gain, but
considering the internal resistance of switch and inductor, the voltage gain of the boost
converter is limited [18]. Figure 1.13 shows the boost converter circuit configuration

considering the internal resistance of the inductor RL. Actually, RL is also can be

considered as the whole circuit power loss equivalent resistance. By considering the
internal resistance of the boost converter, the new voltage gain can be expressed as
follows:

V I
Vgain = 79‘ =
' a—Dm+

 

RL ) (1 . 1)
R00 — D)2

Figure 1.14 shows the voltage gain curve vs. duty cycle considering the internal
equivalent resistance describe as equation (1.1). With the increase of the equivalent

resistance to the load resistance ratio, the voltage gain of the boost converter reduced

accordingly. When the RL / R0 = 0.01 ,which means the total power loss of the converter

is 1%, the boost converter can achieve five times voltage gain. In the real application, the
equivalent resistance is usually larger the 1%, which means for a regular boost converter,
it is nearly impossible to achieve a voltage gain higher than five.

In order to solve the hard switching problem of the traditional boost converter and
reduce the switching loss and solve the reverse recovery problem of the diode. Some soft
switching strategies have been proposed [19, 20, 21, 22, 23]. Adding an active clamp
circuit or passive clamp circuit to achieve the soft switching of the main switch can
reduce the switching loss and improve the converter efficiency. The diode reverse

recovery current is also restrained effectively. But these improvements are only for the

13

boost converter in regular applications. The voltage gain of these converters is not
improved.

Moreover, if the power rating of the boost converter is increased, or if the input
current rating is increased, a huge inductor with high current rating has to be used; more
devices have to be put in parallel to meet the current rating requirements. However,
because of the negative temperature coefficient of the diode and IGBT, when many
devices are paralleled together, the current will not equalize with each other. Some of the
devices may flow more and more current than others until burn out. Therefore, In order to
increase the input current rating of the boost converter, interleaving strategy has to be

used.
1.3.1.2 Interleaved boost dc-dc converter

Interleaved boost dc-dc converter are proposed to increase the input current rating and
power rating of the boost converter [24, 25, 26, 27, 28, 29, 30, 31]. Figure 1.15 shows the
two-phase interleaved boost dc-dc converter with higher input current rating. By the
interleaving several phase of boost converter together, the current can be shared with
each phase equally automatically, the input current ripple could also be reduced
significantly. The converter dynamic response could be increased. The input inductor size
could also be reduced accordingly [29, 32, 33, 34, 35]. Figure 1.16 shows ripple
reduction effect as a function of duty cycle [34]. For an N-phase boost dc-dc converter,

the current ripple cancellation effect K; can be qualified as:

m m+1
ML _N<D—7v-)( N -D)

= AILS ’ 00—0)

 

(1.2)

 

 

K1

l4

where m = floor(ND) is the maximum integer that does not exceed the ND. N is
the number of phase interleaved together, and D is duty cycle. At some of the duty cycle

point, the current ripple of multi-phase boost converter can be eliminated.

L RL D0 V0
S J cog/IL
* v

Figure 1.13 Boost converter considering internal resistance.

 

V'V

Vin

All

 

 

 

5 ‘ I“
I
<3 RI/R0=(i—> I t.
20 4R1/Ro=0.01—>a n'
"o
E, 3] RL/Ro=0. 02—;5 .I‘
.S. , » I
:6
DD
0.)
D!)
E
O
>

 

 

 

0 0.2 0.4 0.6 0.8 1
Duty Cycle ((1)
Figure 1.14 Voltage gain vs. duty cycle considering power loss.
For a traditional boost dc-dc converter, the current ripple can be expressed by:

VinD

AILS = Lfs

(1.3)

 

where Vin is the input voltage, L is the inductance value, f5 is the switching

frequency and AI is the current ripple. The current ripple is poor when a very large duty
cycle is present. The large duty cycles further increase the input current ripples by
increasing the individual inductor current ripples, as can be seen from equation (1.3).
Substituting equation (1.3) into equation (1.2), the magnitude of the output current ripples
for multiphase boost converters can be easily derived, as follows: i

m m +1

V ”(l-rX—rv—‘D’

AI =K :-
1. INLS Lfs D(1— D)

 

(1.4)

Vi" equal to 1, we can derive the normalized input current ripple equation.

By setting Lf
S

 

Figure 1.17 shows the relationship of normalized input current ripple curve with duty
cycle and number of phase interleaved in equation (1 .4). It can be shown fi'om the curve
that, even for the four-phase interleaved boost dc-dc converter, the best operation point is
around 0.75 duty cycle. When the duty cycle is increased for the high voltage gain
application, the input current ripple will increase accordingly. And the benefits of the
interleaved strategy will disappear too. Besides, for the traditional interleaved boost dc-dc
converter, the main switches still switch with hard switching, the switching loss of the
main switch is still quite huge, and the diode also have sever reverse recovery problem.
And the efficiency of the whole converter is low.

In order to increase the efficiency of the interleaved boost dc-dc converter, reduce the
switching loss and solve the voltage spike problem of the diode caused by the diode

reverse recovery. Some soft-switching strategy has been proposed [36].

16

Ripple Cancellation

 

 

 

 

L1 I)ol V0
”60‘ ‘ M
v.
m SlJ ::Co 5E R0
i’ -
L2 1)02

 

 

 

S2J

'7

 

 

 

Figure 1.15 Two-phase interleaved boost dc-dc converter.

 

      
   

 

 

 

1 .
. —— 2-Phase .'
_ 1:311: 3-Phase 1".-.”
0.8 “3 x,
‘ o_ ------ 4-Phase 3 I
\ '. . ; .’ I
0.6 t 1 ' .' I
‘ . ' ’
\ ‘ I
' I
0.4 ‘ .' '
.' I
‘ .' I
0.2 .\ '0
'. .' \ l
O : o - ~
0 0.2 0.4 0.6 0.8
Duty Cycle

Figure 1.16 Current ripple cancellation in multiphase boost converters.

 
 

 

 

 

 

 

1 I
—— l-Phase 3.
. . . . . . _ -'I‘
“£08 2 Phase } I!
g4 ------ 3-Phase II
Ei - - - - 4-Phase .° 1"
00.6 .. _ _ - . .. 19.].
5 .° II
0 o o
'8 -° II!
.5 0.4 o. I ’
T3 3 o. ’ .
E . -’
20.2 I ;va .I
~° " . ; , I
‘.-~\ .fl". v \ I .
0 ‘u‘-’ . y’ \I ‘1
O 0.2 0.4 0.6 0.8

Duty Cycle

Figure 1.17 Normalized input current ripple with duty cycle and the number of
interleaved phase.

Figure 1.18 shows the two-phase interleaved boost converter with an active clamp
resonant zero current transition (ZCT) network [36]. By using an active switch with an
inductor and a capacitor, the main switch can achieve zero current turn on using critical
conduction mode. Zero current and zero voltage during turn off can be achieved using the
resonant network. In this case the main switch voltage stress is reduced. The output diode
reverse recovery problem can also be solved using the resonant network. However, in

order to maintain the critical conduction operation, switching frequency has to be

changed accordingly. This will obviously increase the control complexity and increase

difliculty of the EMI filter design

 

 

 

 

 

Ll D01 vo
v- is
m SI] A ° aER"
J
1i -
L2 D02
52]

J

 

 

 

Figure 1.18 Two phase interleaved boost converter with active clamp ZCT network.

Using coupled inductor for the interleaved boost dc-dc converter can reduce the
inductor size, and achieve the main switch zero current switching and suppress the diode
reverse recovery current [29, 31, 32, 33, 35, 37, 38, 39, 40]. There are two different
coupling method, common mode coupling and differential mode coupling shown in
Figure 1.19 and Figure 1.20. Both method could realize the zero current turn on of the
main switch, and solve the reverse recovery problem of output diode. The common mode
coupled method could reduce the current ripple of main switch, and reduce the
conduction loss of the switch. But the main switch turn off at hard switching, which will
have high switching loss. The differential mode coupled method has larger current ripple,
because the circuit operates at discontinuous mode. This will increase the conduction loss
of the main switch. But the main switch can achieve zero current switching when the

switch turns off. These two different coupling methods have their own features, and

19

which coupling method should be chosen depends on the specific application and circuit

design trade off.

D01 V0

 

 

V'V

 

 

 

 

 

 

 

 

Figure 1.19 Common mode coupled interleaved boost dc-dc converter.

 

"'

 

 

 

 

 

 

 

 

Figure 1.20 Differential mode coupled interleaved boost dc-dc converter.

In order to maintain the low conduction loss features of common mode couple

interleaved boost dc-dc converter and overcome the hard switching turn off problem. An

20

active clamp soft switching strategy has been proposed recently [31, 41, 42, 43]. Figure
1.21 shows the common mode coupled inductor interleaved boost dc-dc converter with
active clamp circuit. By using two active clamp switches, the main switch can achieve
zero voltage turn off. The introduction of the active clamp switch also reduces the voltage
stress of the main switch. The active clamp switch can achieve zero voltage turn on and
turn off, no inductor need to be added too. The control and gate drive of the active clamp
switch is also easy to implement. This circuit is suitable for regular voltage boost

operation with normal voltage gain.

 

 

 

 

 

 

 

 

Figure 1.21 common mode coupled inductor interleaved boost dc-dc converter with
active clamp.

The interleaved boost dc-dc converter can increase the input current rating and the
converter power rating effectively. The input current ripple can be reduced significantly
by choosing proper duty cycle and the number of interleaved phase. By using the coupled

inductor strategy, the inductor size can also be reduced. However, the interleaving

21

technique does not increase the converter voltage gain; other techniques have to be used

to increase the converter conversion ratio.

1.3.1.3 Multilevel boost dc-dc converter

In order to reduce the voltage stress of main switch and increase voltage gain of the
boost converter. Three-level boost dc-dc converter and N-level boost dc-dc converter are
proposed [44, 45, 46, 47, 48, 49]. Figure 1.22 shows the three-level boost dc-dc converter.
Figure 1.23 shows the N-level dc-dc boost converter. In the high voltage output
application, using multilevel structure can reduce the voltage stress of each switch, where

low voltage devices could be used.

 

L D01 V0
—_/'UU" - u -
er COL—l;
Vm Ro

 

 

I I '1'"
U
an
I"

 

s2] ——

 

 

 

Figure 1.22 Three level boost dc-dc converter.

However, by using the multilevel structure will not increase the voltage gain of the

converter assuming %:‘- is the same. In reference [48], the voltage gain equation

considering the influence of RL has been mentioned as follows:

. _ 1 1.5)
VgamN-1_D+ NL £1;- (

NL l—DRO

 

 

Where N L is number of levels.

 

——>
.5

All

 

 

 

 

. SJ

 

 

Figure 1.23 N-level boost dc-dc converter.

Figure 1.24 shows the voltage gain curve by change number of level and duty cycle

described in equation (1.5) assuming 4%. = 0,0]. It can be seen from the curve that, with

the increase of number of levels, the maximum voltage gain will not change. The duty
cycle of maximum output voltage has been reduced, which will increase the dynamic

response of the converter.

23

 

   
    

 

 

Voltage gain (Va/Vin)

  

- ' - - - ° 2—Level

' ”-ilii-Ql- 3-Level

. - - - . 4-Leve1

0 0.2 0.4 0.6 0.8 l
Duty Cycle

Figure 1.24 Multilevel boost dc—dc converter voltage gain curve considering internal
resistance.

 

 

In order to achieve high efficiency, and minimize the switching loss, several sofi-
switching strategies have been proposed by adding an auxiliary circuit [50, 51, 52]. .
However, because of the inherent characteristics of multilevel boost converter, the
voltage gain of the converter is not increased, and not suitable for high voltage gain
application. By cascading multilevel boost converter, some other converter topologies
have been proposed [53]. Figure 1.25 shows the cascade three level boost dc-dc converter.
By cascading two boost dc-dc converters together, the voltage conversion ratio is doubled
obviously, and the device voltage stress of the first stage is reduced, the device current

stress of the second stage is also reduced. However, the cascaded boost converter needs

24

two sets of power devices, two inductors, and two sets of control circuits. The control

signal of the two different control chips has some difference, the total system may have

 

 

 

 

 

 

 

 

stability problem [54, 55].
La l)aol Lb l)bol V0
Gaol c l
Sal] Sbl_| bol
r r
CI) 5"
c l c 1
Say ao2 Sb2| b02
I)aoz T l)bo2 T
V K} K}
Stage 1 Stage 2

 

 

 

 

 

Figure 1.25 Cascaded three level boost dc-dc converter.

The multilevel boost dc-dc converters reduce the device voltage stress by using
multilevel technique, but the voltage gain is not increased as expected considering the
internal resistance. In order to increase the voltage gain of the boost converter, other
techniques, such as coupled inductor have to be used.

1.3.1.4 Coupled inductor boost dc-dc converter

Flyback transformer actually is a coupled inductor. 1f the circuit does not require the
isolation, a non-isolated flyback transformer or coupled inductor could be used. By
adding a non-isolated flyback dc-dc converter with a boost converter. A high voltage gain
coupled inductor boost dc-dc converter can be derived [56, 57, 58, 59, 60, 61, 62, 63].
Figure 1.26 shows the boost flyback step-up dc-dc converter. The output voltage is the

sum of a flyback converter which consists of Ll/L2, D1, C1 and S, and a boost converter

25

nD

which consists of L1, S, D2, and C2. Since the flyback output is V0 = Vin I_D and boost
. 1 . 1+ nD .
output rs V0 = Vin l—:—5 , the total output voltage rs V0 = Vin -1—:-l-)—. Here, It IS the turns

ratio between the secondary and primary, and D is the switch duty cycle. When the
switch S is turned on, the energy is stored in L1, and when S is turned off, the energy is
released to charge both C1 and C2 through diodes D1 and D2. The problem is when S
turns on these diodes need to be turned off, and a parasitic capacitance across D1 and the

leakage inductance can cause severe ringing and additional voltage stress on D1 .

 

      
 

 

   

 

All
'V'
W

 

 

 

Figure 1.26 Boost flyback step-up dc-dc converter.
In order to solve the diode voltage spike problem of boost flyback step-up dc-dc

converter, some other topologies have been proposed using capacitor coupling or charge
pump circuits [63, 64, 65, 66, 67]. Figure 1.27 shows the improved boost flyback dc-dc
converter with coupling inductor between the primary side and secondary side of the
transformer. A diode is added between boost output and secondary of the flyback
winding to circulate the energy, as shown in Figure 1.27. The added capacitor, C1, stores

the energy when the switch S is turned on and maintains a constant voltage related to the

26

turns ratio 11, duty cycle D, and input voltage Vin. During switch-off state during which
D1 and D3 conduct, Cl energy is released to output, and the output voltage equals the

sum of the two capacitor voltage and the secondary winding voltage. If the leakage
inductance is negligible, then the output voltage equals V0 = Vin 12:13. Compared with

the version with combination of flyback and boost converters, this circuit allows a higher-
voltage boost ratio, and thus the turns ratio or duty cycle can be reduced for the same

output voltage.

 

 

V'V

 

 

 

 

Figure 1.27 Improved boost flyback dc-dc converter with capacitor coupling.

The circuit shown in Figure 1.27 has the problem to filter out the low fiequency
ripple in the input side if a large inductor is not used in the high voltage dc link. Another
improvement of boost flyback dc-dc converter has been proposed by combining the boost
flyback with a charge pump circuit shown in Figure 1.28. Compared to the circuit shown
in Figure 1.27, this circuit sacrifice some voltage gain to achieve the wide input voltage

range operation. Moreover, this circuit have to insert a small inductor to limit the inrush

current of the charge pump. The output voltage of this circuit is V0 = Vin TT'

27

 

 

 

._..;,;.- C1 “~.;_ D3 V0
Vin D1 A D2 C
e ’ 3 R
C2 5E
SJ A I

 

 

Figure 1.28 Improved boost flyback dc-dc converter with charge pump.

In order to increase the input current rating of the boost flyback dc-dc converter, an
interleaved three coupled inductor boost dc-dc converter are proposed [31, 68, 69, 70, 71,
72] shown in Figure 1.29. The extra inductor is added in order to simplify the circuit
small signal mode to a boost converter, and the close loop control circuit design is

becoming easy.

L1,, L2a L3b

=33
.

 

    

 

 

 

 

 

 

e
..<
B
U)
U:
>-
.55
9
——)
"u:

 

Figure 1.29 Interleaved three coupled inductor boost flyback dc-dc converter

28

Figure 1.30 shows the ideal voltage gain curve of boost flyback and its improvements
when the transformer conversion ratio n=3. By using a coupled inductor the voltage gain

of the converter can be improved significantly.

 

12

10

 

._ 2 + N
1— D

2+ND
1—D

1+N
l—D

0 0.2 0.4 0.6 0.8 1

 

 

 

 

 

Figure 1.30 Ideal voltage gain curve of boost flyback and its improvements.

In conclusion, for the traditional step-up dc-dc converter, there are several limitations
related to the high voltage gain and high current applications. Coupled inductor has to be
used in order to increase the converter voltage gain. Interleaved strategy has to be used in
order to increase the converter input current rating. Active-clamp or passive devices
clamp strategies have to be used to ease switching, reduce the switching loss and increase
the converter efficiency. Moreover, if the converter input current rating is increased,

more and more interleaved circuits have to be use, which will obviously increase the

29

complexity of the control and gate drive. Besides, more and more inductors in parallel are
hard to couple and increase the difficulty of circuit layout. And because of the leakage
inductance and the internal resistance of the coupled inductor, the converter voltage gain
will be limited too.

Furthermore, all the traditional step-up dc-dc converters have to utilize coupled
inductors or transformers for the high voltage gain application. And the magnetic
components are usually the most bulky and lossy part in the converter. Also, in high
temperature automotive application, the magnetic parts become dysfunctional. So, in
order to achieve small size, high efficiency dc-dc converters with high temperature
operation features, magnetic-less switched-capacitor dc-dc converter is needed to be
considered. Traditional switched-capacitor dc-dc converter is going to be reviewed in
next section. Problems related to the traditional switched-capacitor dc-dc converter will
be addressed and discussed. New soft-switching strategy will be proposed to solve the

traditional circuit limitations and improve the circuit performances in next three chapters.

1.3.2 Switched-Capacitor DC-DC Converter

Switched-capacitor dc-dc converters have been proposed since 19705 due to their
integration capability and small size, light weight features. The three basic structures of
switched capacitor dc-dc converter will be discussed in detail in the following parts. The
advantages and disadvantages of each structure will be addressed and discussed. The
appropriate structure for high voltage gain and high current TEG application will be

summarized.

1.3.2.1 Marx converter type switched-capacitor voltage multiplier

30

Figure 1.31 shows the traditional switched-capacitor voltage multiplier structure [73,
74, 75]. The control signal of switched-capacitor voltage multiplier is complementary,
and duty cycle can be set as 50% duty cycle or other value to achieve some voltage

regulation. The voltage stress of the capacitor C1 ~ CN_1 is the input voltage. When the

conversion ratio is high, low voltage rating capacitor can be used, which can reduce the

converter size. The current stress of the capacitor C1 ~ CN__1 is the same, which means

same current rating capacitor could be used. The current stress of all the switching
devices is also the same, which means the same current rating switching devices could be
used. However, the voltage stress of the switching devices increases as the conversion
ratio increases. When the output voltage is low (less than 60 V), this is not a problem.
However, when the output voltage is high, high voltage rating devices have to be used in
the output side. However, the turn on resistance of high voltage switching devices is
much higher than the low voltage devices, so this structure is not suitable for the high

output voltage applications.

 

 

 

 

t
I

Figure 1.31 Traditional switched-capacitor voltage multiplier.

1.3.2.2 Dickson charge pump type multilevel modular switched—

capacitor dc-dc converter

31

Figure 1.32 shows the traditional Dickson charge pump type multilevel modular
switched-capacitor dc-dc converter [76, 77, 78, 79, 80]. The control signal of this type
converter is complementary with 50% duty cycle which is very easy to implement. The
current stress of all the switches and capacitors are the same, which means same current
rating device could be used. And when the current rating of the converter is increased, the
current through each devices could be equally distributed thus making this converter
especially suitable for the high current application. The voltage stress of the switches is
one or twice the input voltage, which is also relatively low, when the conversion ratio is
high. However, for this converter, the capacitor voltage stress is increased with the
increasing of converter voltage gain. When the output voltage is high, a high voltage
stress capacitor has to be employed. Therefore, this structure is suitable for the relatively

low output voltage (less than 100 V), high current, high voltage gain application.

_/SP / SN / SP xT/SP SN
(‘31-— ;l— :51 CN-ZI—CN-l CNA

 

 

 

 

 

 

 

V Ear Ar .«{- -- [LE 5
In SN [SPJSN 181) SN1 SN 1 SP a.
i' - - - - -
Figure 1.32 Traditional multilevel modular switched-capacitor dc-dc converter.
1.3.2.3 Generalized multilevel switched-capacitor dc-dc converter and

the derivative circuits

Figure 1.33 shows the generalized multilevel switched-capacitor dc-dc converter [81,

82, 83].

32

Capri
“'6 cor
WWW

WW I‘D/t

 

 

 

 

 

“l

 

 

 

 

'— — Cmm
SNmm T
I

 

Figure 1.33 Traditional generalized multilevel switched-capacitor dc-dc converter.

Figure 1.34 shows the one three level generalized multilevel converter derivation
circuit. Figure 1.35 shows some other derivation by reducing the capacitor and switch
numbers. The device voltage stress of the generalized switched-capacitor dc-dc converter
is as the same as the input voltage. The capacitor voltage stress of circuit shown in Figure
1.33, Figure 1.34 and Figure 1.35(b) are also the same, which is the input voltage. The
structure shown in Figure 1.35(b) is also known as the Cockcrofi-Walton generator. The
capacitor voltage stress of the derivation circuit shown in Figure 1.35(a) increases with
the conversion ratio. Because of the low voltage stress features of the generalized
switched-capacitor dc-dc converter, this type of converter is suitable for the very high

output voltage application. However, the current stress of this type of converter is not

33

equal, and the control signal is very complex with the increase of voltage level except the
derivation shown in Figure 1.35(b) with complementary control signal. Consequently,

this type of converter is not suitable for high current and high voltage gain application.

 

 

 

 

 

 

*

Figure 1.34 Three level generalized multilevel converter derivation.

 

 

 

 

 

 

 

 

S3pjfi J i A ”Vdc

32p] Tch .I ‘
5le 10192.50 J ‘ .3“

,‘ A?
$an Vdc _I A
v.

ms2n] J ‘ +Vdc

S3njfi J A

1' - .
(a) (b)

Figure 1.35 Some other three level generalized multilevel converter derivations.

34

In summary, the Marx converter type and charge pump type switched-capacitor
circuits are suitable for the high current, high voltage gain application with output voltage
relatively low. And the generalized multilevel type is more suitable for the high output

voltage, low voltage gain, and low current application.

1.3.2.4 Traditional Zero current switching (ZCS) switched-capacitor

dc—dc converter

But these traditional switched-capacitor dc-dc converter circuits have some common
problems such as high voltage spike, high switching loss and EM] problem. In order to
reduce the switching loss, high voltage spike and EMI, several ZCS switched-capacitor
dc-dc converter have been pr0posed to solve the problem by inserting an inductor in
series with the capacitor to achieve the ZCS of the main switches [84, 85, 86, 87, 88].

Figure 1.36 shows a four level switched-capacitor resonant converter as an example.
By inserting an inductor L, resonating with the capacitor C20 , the ZCS of the main
switches S1 and S2 can be achieved. The switching loss can be minimized, the voltage
overshoot across the switching devices can be reduced and the EMI noise is also
restricted. However, by inserting a relatively big inductor in the switched-capacitor
circuit is a contradiction by itself which means many good features of switched-capacitor
circuit will lose, such as good integration capability and high temperature operation. So

the traditional ZCS method is not practical, new method need to be proposed.

35

 

ch

 

D2c

EDP—DI—

Lclc

\l

paol GEBHOA q8m|————

 

 

 

 

 

 

 

 

 

 

*

Figure 1.36 Four level switched—capacitor resonant converter main circuit.
1.4 Outline of Thesis

The goal of this research is to develop a high efficiency, small size, high voltage gain
dc-dc converter with low input voltage and high input current features especially for TEG
modules in automotive application. In this thesis, a new soft-switching strategy of
realizing ZCS for switched-capacitor dc-dc converter has been proposed. By utilizing the
stray inductance distributed in the circuit to resonate with the capacitor, the ZCS of all the
switching devices can be achieved. By applying this strategy to the traditional switched-

Capacitor dc-dc converter, switching loss is minimized, huge di/dt, dv/dt and EMI noises

36

are reduced, high voltage spike problem is also solved. In this case, the efficiency and
reliability of traditional switched-capacitor dc-dc converter would be improved. Several
new ZCS switched-capacitor dc-dc converters have been proposed and analyzed.

Chapter 2: A ZCS multilevel modular switched-capacitor dc-dc converter (MMSCC)
for high input current high voltage gain TEG application is proposed. By using the
proposed ZCS strategy for MMSCC, the capacitor size is reduced, voltage overshoot is
eliminated and EMI noise is restricted. Prototypes are designed and built. Simulation and
experiment results are provided to validate the proposed topology.

Chapter 3: A family of ZCS switched-capacitor dc-dc converters is proposed and
analyzed. By using the ZCS strategy, very high power density (above 300 W/in3) with
high efficiency switched-capacitor dc-dc converters could be made by eliminating the
lossy magnetic cores and bulky capacitor bank. Simulation and experiment results are
provided to confirm the operation of proposed circuits.

Chapter 4: Other circuit improvements for the ZCS switched-capacitor dc-dc
converter are proposed and analyzed. By using the proposed improved ZCS switched-
capacitor dc-dc converter topologies, interleaved operation of ZCS switched-capacitor
dc-dc converters become possible. The input current of ZCS switched-capacitor dc-dc
converters becomes continuous due to the interleaving operation. In this case, the input
capacitor size could be reduced significantly. Continuous input current is also preferable
by many renewable energy sources. Simulation and experiment results are provided to
validate the proposed topologies.

Chapter 5: Conclusions of the thesis. Contributions are summarized, suggestions for

future work are provided.

37

CHAPTER 2
Zero Current Switching Multilevel
Modular Switched-Capacitor DC-DC
Converter for TEG Applications

This Chapter presents the quasi-resonant technique for multilevel modular switched-
capacitor circuit (MMSCC) to achieve zero current switching (ZCS) without increasing
cost and sacrificing reliability. This zero current switching multilevel modular switched-
capacitor circuit (ZCS-MMSCC) employs the stray inductance existing in the circuit as
the resonant inductor to resonate with the capacitor and provide low dv/dt and low
switching loss for the device. The ZCS—MMSCC does not utilize any additional
components to achieve ZCS and solves the voltage spike problem during the switching
transition, thus leading to reliable and high efficiency advantages over traditional
MMSCC. Furthermore, the ZCS-MMSCC reduces the capacitance needed the circuit; in
this case, the bulky capacitors present in traditional MMSCC to attain high efficiency is
not necessary any more. A 150 W four-level ZCS-MMSCC prototype has been built.
Simulation and experimental results are given to demonstrate the validity and features of

the soft switching switched-capacitor circuit.2

 

2 This work was presented in part at the first annual IEEE Energy Conversion
Congress and Expo, San Jose, CA USA, Sep.20 — Sep.24 2009 and an extended paper
titled “Zero Current Switching Multi-level Modular Switched-Capacitor DC-DC
Converter for TEG Applications” has been submitted to IEEE Transactions on Industry
Applications.

38

2.1 Introduction

In order to obtain the high input current, high, voltage gain, light weight, small size,
high temperature high efficiency and high power density dc-dc converter for TEG in
automotive application, switched-capacitor dc-dc converters have to be used as discussed
in Chapter 1. Switched-capacitor circuits have been investigated since 1970s [76, 89].
Conversional Switched-Capacitor dc-dc converters have some common drawbacks: 1)
weak output regulation ability and structurally determinate voltage conversion ratio; 2)
pulsating input current and high current spike; 3) high voltage spike across the switching
device; 4) high electromagnetic interference (EMI); 5) unidirectional power conversion
ability. Many approaches have been proposed to achieve voltage regulation by using duty
cycle control [75, 89, 90]. But all this methods have to sacrifice efficiency to achieve the
voltage regulation, which is only acceptable in low power conversion field. Several zero
current switching (ZCS) techniques by inserting an inductor to Switched-Capacitor
circuit have been proposed to solve the voltage spike, current spike and EMI problem [84,
87, 88, 91]. However, by adding a relatively big resonant inductor into the switched-
capacitor circuit to achieve ZCS is a contradiction by itself. Switched-capacitor circuit
with a magnetic core is not a switched-capacitor circuit any more, and all the good
features such as, high temperature operation, good integration, and small size will lose
[92, 93].

Another type of switched-capacitor circuit, flying capacitor multilevel dc-dc
converter (FCMDC) has become more and more popular recently because of the potential
automotive application [83, 94, 95, 96, 97]. Nevertheless, there are several limitations of

FCMDC, such as non-modular structure, complex control strategy and high conversion

39

ratio unreachability. When the conversion ratio is larger than five or more than five levels
have to be used, the control of FCMDC is becoming very complex. The high current
stress of the switching device of F CMDC also prevents it for high current application.

In order to solve the problems of FCMDC in high voltage conversion ratio, high
current automotive application, multilevel modular switched-capacitor dc-dc converter
(MMSCC) was proposed recently, shown in Figure 2.1[78]. MMSCC has modular
structure, complementary control scheme, capability of reaching high voltage gain and
reduced current stress of each switch and shows good application potential in automotive
application [98]. Nevertheless, because MMSCC still use hard switching, there still exist
several problems limiting its power rating such as huge current spike, huge voltage spike,
high switching loss and sever EMI noise. With the increasing of power rating or current
rating of the MMSCC, the voltage spike and switching loss problems become more and
more serious. Also, in order to increase the total system efficiency, higher capacitance
capacitors, aluminum electrolytic capacitors have to be used [78, 79, 96, 98]. The current
rating and life time of the aluminum electrolytic capacitor is small to some extent. In
order to meet the high current ripple requirement a huge capacitor bank has to be used,
which will increase the size of the converter significantly. Multi-layer chip type ceramic
(MLCC) capacitor has much better performance than the aluminum electrolytic capacitor,
in current rating, equivalent series resistance (ESR), life time, and size in terms of current
rating. But the capacitance of MLCC capacitor is very small, so it is not feasible to use

MLCC capacitor for the traditional MMSCC.

40

 

u...

__I
J’

 

 

 

is. .3“
r "‘ C3? T L— C?‘
e C4x m
3 SP5 LDIJ SN3
} SN4

 

 

I...

J

 

 

TIT

 

III.—
I!

 

SP3

LL“

‘21}

 

 

SP1 —{JL

 

_

 

SNI

 

 

 

Vin SD

 

s

 

Figure 2.1 F our-level MMSCC with three modular blocks

This chapter presents a quasi-resonant technique for MMSCC that is able to achieve

ZCS without increasing cost and sacrificing reliability. The proposed ZCS strategy

' employs the distributed stray inductances present in each module of the circuit resonating

with the capacitors to provide zero current tum-on and tum—off to the devices. Because

the MMSCC is especially suitable for high voltage gain with high input crurent

application [78, 79, 80, 98, 99, 100], the ZCS version also inherit all the benefits from it.

By using the ZCS, the switching loss of the traditional MMSCC is minimized, current

spike, voltage spike and EMI is reduced. Besides the benefits gained from ZCS and

MMSCC, the proposed ZCS-MMSCC has other special features:

0 Different from other soft-switching techniques, this ZCS strategy does not use

additional active devices or passive components, thus making it reliable and cost

efficient.

0 Because of the module structure, the required resonant inductance is quite small for

each module, thus making it feasible to be realized by the distributed stray inductance

existing in the circuits.

The ZCS-MMSCC doesn’t need high capacitance to achieve high efficiency like

traditional MMSCC. In this case, small capacitance, high current rating, low ESR and

small size MLCC capacitor could be used. The total size of the converter is reduced

significantly, the power density and the converter current rating is increased

correspondingly.

Hence, the proposed ZCS-MMSCC solves aforementioned problems of traditional
MMSCC and achieves ZCS without inserting big magnetic cores. For the same current
rating and voltage gain, the ZCS version of MMSCC is smaller, higher power density,
and higher efficiency than the traditional MMSCC. So the proposed ZCS-MMSCC is
especially suitable to the high current high voltage gain automotive application. A 150 W
four-level ZCS-MMSCC prototype was built to confirm the operation. A 630 W 5V input
twelve-level ZCS-MMSCC prototype was built for the TEG interface in automotive
battery charging application. Simulation and experimental results are given to

demonstrate the validity and features of proposed ZCS-MMSCC.

2.2 Proposed Circuit Topology

Figure 2.2 shows the proposed four-level ZCS-MMSCC as an example. The circuit
works as a four times step-up converter. Figure 2.3 shows the proposed ZCS-MMSCC

converter modular block. The capacitor and the switch label is the same as the Figure 2.1

 

 

 

shown before.
—1 —' 1III-I'I—I—J-I II LS]
" g LS4 ,

 

 

 

 

    

M
i
r

r

i
i
J

 

 

 

 

Figure 2.2 Four-level ZCS—MMSCC with three modular blocks

42

 

 

 

Figure 2.3 proposed ZCS-MMSCC modular block

By using n-l modular blocks, a switch and a capacitor, n-level ZCS-MMSCC with n

times voltage gain can be generated. Vin represents the ideal input voltage source. LS
represents the equivalent stray inductance present in each module of the circuit. Sp and
SN are the same switching devices controlled complementary at 50% duty cycle. C1 X
to C4 X are the capacitors with the average voltage from one time to four times of input

voltage. LS does not have to be in the position drawn in Figure 2.2, it could be
distributed anywhere in series with switches or capacitors in the circuit shown in Figure

2.4. It could be sum of the connection wire parasitic inductance LSW , capacitor parasitic
inductance LESL and the MOSFETs package parasitic inductance LSP . Usually the
connection wire parasitic inductance LSW is the major part of the stray inductance.
Because all the stray inductance is in series when the current flows through. In each
Simplified equivalent circuit discussed in the next section, only one equivalent L5 is

needed to represent the total stray inductance present in the circuit.

43

 

 

Vnext

 

 

Figure 2.4 ZCS-MMSCC modular block with all the stray inductance.

Because of the modular structure of the circuit, and the stray inductance is distributed
in each module, the required stray inductance for resonant is more than 100 times smaller
(2 nH~l3.5 nH) than other ZCS strategies using same switching frequency [84, 85, 86, 87,
88]. In case the stray inductance is not sufficiently large or equal in each module, a small
air core could be utilized to promise each module have the same stray inductance for
resonant.

For traditional MMSCC in high power and high current application, a huge capacitor
bank has to be employed in order to sustain current and increase efficiency, which
increases the converter size in a significant manner. The huge switching loss and voltage
Spike caused by the large turn-off current is another problem. Considering the stray
inductance present in each module of MMSCC, the capacitance can be designed to

resonate with the stray inductance at switching frequency to provide the zero current

44

switching to the devices. In this case, small size, low ESR, high current rating and high
temperature rating MLCC capacitor with relatively small capacitance can be utilized. The
switching loss of device is minimized, capacitor conduction loss and EMI is also reduced
accordingly. Smaller size and higher efficiency is achieved by using ZCS in MMSCC.
Hence, ZCS-MMSCC is more suitable to high power, high current and high temperature

application.

2.3 Operation Principle

Figure 2.5 shows the idealized waveform of proposed ZCS-MMSCC under steady-
state conditions. The gate signal of switch Sp and S N is complementary, and duty cycle

is 50%. Assume input voltage is an ideal voltage source. By considering the stray
inductance present in the circuit, when the switch is turned on, the current through the

stray inductance, capacitors and the switch will begin to resonate from zero. By adjusting
switching frequency to the resonant frequency, the current through switch Sp , S N and

stray inductance will decrease to zero when the switch is turned off, which is the half
period of the sinusoidal waveform. Therefore, the ZCS of the switch is achieved in both
turn on and turn off. The capacitor is charged in half-period with the sinusoidal current
waveform and discharged in another half-period also in the sinusoidal shape. So, the
current through the capacitor is the sum of the current through the switch, which is a
sinusoidal waveform. When the capacitor is charged, the current is positive; when the
capacitor discharges, the current is negative. The voltage across the capacitor has a dc
offset with a sinusoidal ripple. The dc voltage offset is determined by the capacitor

Position in the circuit from one time input voltage to n times input voltage. The voltage

45

ripple is determined by the capacitor current and capacitance. The operation of the circuit

can be described in two states as shown in Figure 2.6 and Figure 2.7 with different switch

is turned on.

t»

 

 

 

 

 

 

 

 

 

 

v.._s.t———, ' r—‘I

VGS_SN

VDs_SP

ISp
N

VDs SN

IC

1X

I_C2x

12

Figure 2.5 Typical waveforms of prOposed ZCS-MMSCC

46

 

- m Sir

_.I
My: 5.8.2. : : m
i—szz-«i _l_ Ltd-I .. i-+::~--‘ _] [Io-I

‘ I ’

 

 

 

 

 

 

 

m
41
II

i
"Li:

I"

.. a
- \I
z 1.} II
%
r

m

w
I 7
«VII;

4‘ 4

l-oi
L“,

r"

m

N

I

 

 

 

 

 

_l .....: ._.I .....3 LS]
121 - 35'? m m 37?? 133‘.
_L I-IeJ i I-IeJ i -4
A

 

 

 

m
£
I"
r
ll
.3
‘4” ‘53:.
La.
I"
a
i
I
I"
m
N

 

Figure 2.7 Operation modes State II SN is on
2.3.1 State I
Figure 2.6 shows the state when Sp is turned on at t=t0 while SN is off. During
this state C1 X is charged by Vin- C3 X is charged by Vin and C2 X in series with.
Figure 2.8 and Figure 2.9 shows the two simplified equivalent circuits of state I. Figure

2.8 shows the situation when Vin , L51, S p1, C 1 X and S p2 form a resonant loop. Figure
2.9 shows the situation when Vin , LS3, S p3 , CZX, S p4, C3 X and S p5 form a resonant
100p. Because of the presence of the stray inductance LS , before the switch is turned on,
the current through LS already decreases to zero. The current through Sp will increase
from zero when the switch is turned on, so Sp is turned on at zero current. For the case

shown in Figure 2.8, afier L51 and C1 X resonate for half cycle, the current through S pl

47

and sz falls to zero. Therefore SP1 and sz turn off at zero current. For the case
shown in Figure 2.9, after LS3 resonate with C2 X and C3 X in series for half cycle, the

current through S p3 , S p4 and Sp5 will decrease to zero too. So, zero current turn off is

also realized on these switches. For the situation shown in Figure 2.8, there is only one
capacitor in the equivalent circuit other than two capacitors in series in other equivalent
circuits. The required stray inductance value is two times smaller than the other circuits
assuming the capacitance are the same. This will not be a problem in the real circuit
design and layout, one only need to pay attention to make sure the stray inductance of

first resonant loop is twice smaller than all the other stray inductance.

SP1 L31

Figure 2.8 Simplified equivalent circuits of state I (a)

SP4

sz
v
(33" XVsz SP3 LS3

SP5 ‘ ILS V

 

Figure 2.9 Simplified equivalent circuits of state I (b)

48

Without loss of generality, the following assumptions have been made for the

analysis: all the switches are ideal, i.e. no conduction resistance is considered; input

voltage source is ideal, i.e. constant and no internal impedance; the capacitor ESR is zero.

Assuming C1X =C2 X=C3 X =C4 X, so in order to have the same resonant frequency,

L52 = LS3 = LS4 = 2L51 . The state equations of Figure 2.8 are

diL
SI
Vin = LSIT'I'VCIX

 

The solutions are:

. IIP .
11,510) = 4V; srn (art

 

VC1 X (t) = Vin cos cart

_ __o__
4VinC1pr

(2.1)

(2-2)

(2.3)

(2.4)

Where K), is the value input voltage, L51 is the value of stray inductance, a), is the

resonant frequency equals to 1/ JLSICI X , and P0 is the output power. After half cycle,

the capacitor voltage is charged to

”R;
The capacitor C1 X voltage ripple is
”Po

Av = ——
CIX 4VinC1pr
The state equations of Figure 2.9 are

diL
S3
Vin = L537"+ VC3X ‘VCZX

49

(2.5)

(2.6)

(2.7)

de3X

 

 

iL53 = C3X dt . (2-8)
de

Plug (2.17) into (2.7)and (2.9) to solve the equations

. 7rP .
(LS3 (t) = Z-Vfisrn (or! (2.10)
VC3X (t) = 3V,-,, — 4VinC1:’wr cos a),t (2.11)
The capacitor C3 X voltage ripple is
IrP
A = __ _. ___O 2.12
VC3X 4VinC1pr ( )

2.3.2 State II

Figure 2.7 shows the state when SN is turned on at I: I1 while Sp is off. During
this state, C2 X is charged by the V,-,, and Cl X in series; C4 X is charged by Vin and
C3 X in series. Figure 2.10 and Figure 2.11 show the simplified equivalent circuits of
state 11. Figure 2.10 shows the situation when Vin: L52, 5N1, CIX , SNZ CZX and
S N3 form a resonant loop. And Figure 2.11 shows the situation when Vin , LS4 , S N4 ,
C3 X , S N 5 , C4 X form a resonant loop. Because of the presence of the LS, the current
through S N will also increase its value fiom zero in a resonant manner. The zero current
turn-on of SN can be achieved. For the case shown in Figure 2.10, after L52 , C1 X and

C2 X resonate for half cycle at t = t2, S N1 , S N 2 and S N3 will have a zero current tum-

off when the current through them decreases to zero. For the case shown in Figure 2.11,

50

afier LS4 resonate with C3 X and C4 X in series for a half cycle, the current through

S N3 , S N4 and S N5 will also decrease to zero. Hence, zero current turn off is also

realized on these switches.

1‘} dc.

V+
C2XVC1X LS2
‘__
SN3 ILS Vin

 

Figure 2.10 Simplified equivalent circuits of state 11 (a)

 

 

 

 

 

Figure 2.11 Simplified equivalent circuits of state 11 (b)

The state equations of Figure 2.10 are:

 

 

diL
V... = L52 7;?— + vczx — m (2.13)
. dVC
1L5, = CZX de (2.14)
dVC
.152: ——C1X d? (2.15)

51

Plug (2.4) into (2.13) and (2.15) to solve the equations

 

. 7rP .
lLsz (t) = —4Vi: srn (or! (2.16)
fl'P
vCZX (t) = 2Vin + W005 wrt (2.17)

The capacitor C2 X voltage ripple is

fl'Po

 

 

 

AVCZX = W (2.18)
The state equations of Figure 2.11 are
V,-,, = LS4 (11:24 + vC4X — VG” (2.19)
1154 = C4 X dvgjx + 1, (2.20)
1L5 4 = —C3X dvgiX (2.21)

Where 10 is the output current. Since this converter is a four times boost circuit

V0 =‘ 4V,-,, , so [in = 410. Plug (2.11) into (2.19) and (2.21) to solve the equations

 

. P .
11.540) = {V12 srn (0,: (2.22)

. 7rP
VC4X (I) = 4V!” + WCOS (0,! (2.23)

The capacitor C4 X voltage ripple is

”Pa

= —— 2.24
AVC4X 4Vin ClX (0,. ( )

The soft switching conditions in both states is f, = f, , where f, is the switching

frequency and f, is the resonant frequency.

52

2.4 Design Guidelines

The 150 W four-level ZCS-MMSCC design procedure is shown here as an example.
The specification of the prototype converter is Vin =5 V, V0 =20 V, P0 =150 W, fs=45

kHz.

2.4.1 Capacitance

Capacitance value should be chosen according to the voltage ripple.

Ira.
C " 4V...Avcwr

(2.25)

Because of the special structure of the circuit, the voltage ripple across all the
capacitors is the same. And the value of the voltage ripple is detennined by the input
current, capacitance and the resonant frequency. The capacitor voltage ripple should be
chosen smaller than the input voltage to prevent the voltage across the first capacitor
from resonating to the negative region and lose the zero current switching. That means,
the first capacitor should have a positive dc voltage offset. Actually because of the
special structure of the converter the output voltage is n times of input voltage, even
when the voltage ripple is as large as the input voltage, the voltage ripple on the last
capacitor is still 1 / n . When the conversion ratio is large, the ripple will be small enough
in the output side. And high capacitance is not needed to reduce the output voltage ripple.

The output ripple is chosen around 9% of output voltage. According to the (2.25), the
capacitance is chosen 47 [LP in the prototype. Another parameter to determine the
capacitance value is the current rating of the capacitor, if the current rating of the

capacitor is too small to meet the current requirements, then more capacitors in parallel

have to be used. In this prototype, high current rating MLCC capacitors are used. Ten 100

53

V 4.7 11F C5750X7R2A475K capacitors from TDK are used in parallel. The current

rating of each capacitor is around 3 A each.
2.4.2 Stray inductance

The circuit layout should be designed carefully, in order to make the stray inductance
of each equivalent circuit equal. In case the stray inductance is not equal or large enough,
small air cores can be inserted to equalize the stray inductance of each module. The
switching frequency can be adjusted according to the stray inductance present in the
circuit if the circuit layout is already fixed. Required stray inductance for ZCS can be

determined by the following equation, using the equivalent circuit shown in Figure 2.8.

Lsr (2.26)

1
= ——§
C1X(2”fS)
When the resonant capacitance is 47 uF, Figure 2.12 shows the curve of switching

frequency vs. stray inductance.

 

1M

100k

 

 

i

 

 

10k

 

Switching Frequency fs (Hz)

1n 1 0n 100n 1 u
Stray inductance L51 (H)

Figure 2.12 ZCS stray inductance and switching frequency

54

Table 2.1 shows the relevant required stray inductance according to the switching
frequency, when the capacitance is 47 11F .

Table 2.1 Required stray inductance according to switching frequency

 

 

 

 

 

 

 

Switching Frequency f, Stray inductance LS]
500kHz 2.15 nH
400 kHz 3.37 nH
300 kHz 6 nH
200 kHz 13.5 nH
100 kHz 54 nH
50 kHz 215 nH

 

 

 

 

Obviously, for other equivalent circuits shown in Figure 2.9, Figure 2.10, Figure 2.11,
the stray inductance values of L52 , LS3 , LS4 for resonant needs to be doubled. The

capacitance value becomes half when two capacitors are connected in series in these
equivalent circuits. The switching frequency can be easily determined by the actual stray
inductance in the circuit. Around 100 kHz and 200 kHz, the most often used switching
frequency in dc-dc converter, the needed stray inductance for resonating is less than 55
nH. This is value is small enough to be realized by the stray inductance in the circuit
layout or by a small air core. The inductance of a 10 cm long wire or air core inductor is
already about 50 nH. Only about 2 nH stray inductances are needed when the switching
frequency is increased to 500 kHz. But the stray inductance inside a normal MOSFETs
package such as TO-220, is already about 1~2 nH, when several MOSFETS are

Connected in series, this value could be higher considering the stray inductance of

55

MOSFET leg which means the switching frequency does not need to be higher than 500

kHz to achieve ZCS.

2.4.3 Switching frequency

Switching frequency should be set the same as resonant frequency in order to promise
the zero current switching. Usually, the stray inductance of the circuit is already
determined when the circuit layout is finished. The capacitance is also determined by the
required voltage ripple. Assume the air core inductor is used, and the stray inductance of
each module is equalized. The switching frequency can be twisted by monitoring the
power device current when the switch is turned off. The switching frequency should be

set exactly at the point when the switch current resonates to zero when the switch is

turned off.

2.5 Power Loss Analysis

2.5.1 Power device loss

2.5.1 .1 Conduction loss

Assume the input power is 1],, , power device turn on resistance is Ran, the RMS

value of switch current is [S RMS , the average value of input current is 1],, ave , the

conversion ratio of the converter is NT, the conduction loss of power device is PS can.

So the power device conduction loss equation can be derived as follows:

 

II'n__ave = 7— (2.27)
m
I Iin_ave 7r 2 2
S__RMS = NT 3 ( . 8)

56

PS'con = IS_RMS2Ron (229)

Plug (2.27) and (2.28) to (2.29), the conduction loss can be derived:
PS_con = —iV_2"Ron (2-30)

2.5.1.2 gate drive loss
Assume the gate drive voltage is VGS, gate total charge is Qg , the gate drive loss of
power device is PS_d,v. So the power device gate drive loss can be derived using the
following equation:
PS__drv = VGSngs (2-31)
2.5.2 Capacitor conduction loss

2.5.2.1 Resonant capacitor conduction loss
Assume the capacitor RMS current is [C RMS , the capacitor ESR is RESR , the
capacitor conduction loss is PC_con . So the capacitor conduction loss can be derived

using the following equation:

 

7r]-
IC_RMS = g}? (2.32)
PC__c0n = IC_RM52RESR (2-33)
Plug (2.32) into (2.33),
PC_con = MREW (2-34)
2NT
Plug (2.27) into (2.34),

57

”2P”?

———RESR
2NT2V...’-

PC__con =

2.5.2.2 Input capacitor conduction loss

(2.35)

Assume the RMS value of input current is [m_RMS , the capacitor ESR is RESR in , the

conduction loss of input capacitor is Pcm_co,,. The input current can be shown Figure

2.13

 

 

 

 

”1 in ave
I . z " 2.36
m__RMS 2J2- ( )
PCin_c0n = in_RMS2RESR_in (2-37)
Plug (2.36) into (2.37) one can get,
2 2
7r 1-
PCin__con = $13 RESR_in (238)
Plug (2.27) into (2.38) one can get,
2 2
7: P-
PCin_con = '2 RESR_in (2-39)
8Vin
IIN“
: i t
0 Ts 2T3 3TS 4rS '
Figure 2.13 Ideal input current waveform
2.5.3 Total power loss

58

There are 3N7 — 2 switching devices and NT capacitors in a NT level ZCS-
MMSCC, so the total power loss Boss is:
H053 = (3N T " 2)(PS__corl 'I' PS_drv) 'I' N T P C__c0n + PCl'n_con (2-40)

Plug (2.30), (2.31), and (2.34) into (2.40), one can get

 

 

 

 

2 2 2 2 2p. 2 R .
7: P- R0 71' Pin RESR 7’ m ESR_m
r7 =(3NT —2)(——-‘"——"+V f)+ + (2-41)
oss 4NT2Vin2 GS Qg s ZNTsz SVI'nZ
Assume I] is the converter efficiency
,7 = Eggs: (2.42)
in
Plug (2.41) into (2.42), one can get:
”ZR-"2R0" ”2Bn2 R ESR ”ZBnZRESR _ in
Pin - (3NT " ZX—i—z + VGSngs) " 2 " 8V 2 -
n = 4N T Vin ZNTVin m (2.43)

P,-
2.6 Simulation and Experiment Results

2.6.1 A 150 W four-level ZCS-MMSCC prototype

Figure 2.14 shows saber® simulation waveforms of a 150 W four-level ZCS-
MMSCC, where Vgs_Sp and Vgs_Sn are the switch gate—source control voltage,
Vds_Spl and Vds_Sn2 are the switch drain-source voltage, Id_Spl and Id_Sn2 are the
switch drain-source current. The input voltage is 5 V. Switching frequency is about 45
kHz. Capacitance is 47 [IF and stray inductance L51 is about 250 nH and 500 nH for
others. The simulation results is quite consistent with the theoretical analysis, which

Verifies the above analysis.

59

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vgs_Sp i
I
Vgs_Sn l
(WINS)
10.01 ' ' Vds_Spt
.. 5.0 "W ——
a I
0.0] » - - _ -
-5.0 J
(1011(8)
30.0 , m_sm
A 20.0 i ____._..__._._
< t
V 10.0 t
0.0 It
(V)11(8)
15'0 ~ , . Vds_Sn2
A 10.0 , . - __
3 5.04; , -+ -
0.04
(1011(5)
Id_Sn2
E
WINS)
I_C1X
i
(V):t(s)
V_C1X
S
5 l- i I I‘M—I
4.939m 4.95m 4.961m 4.972m 4.983m 4.994m

t(s)

 

 

 

Figure 2.14 Simulation waveforms of 150 W four-level ZCS-MMSCC

60

 

 

 

In the 150 W 4-level ZCS-MMSCC prototype, the switching devices are two 30 V
180 A MOSFETs IPB009N03L from infineon connected in parallel. Resonant capacitor
are ten 100 V 4.7 11F MLCC capacitors C5750X7R2A475K from TDK connected in
parallel. Input capacitor are fourteen 6.3 V 470 [IF conductive polymer aluminum solid
electrolytic capacitors PLEOJ471MDOlfrom nichicon connected in parallel. Gate drive
voltage is 15 V. Figure 2.15-Figure 2.18 shows the experiment waveforms of the 150 W
4-level ZCS-MMSCC prototype with the parts mentioned above. Figure 2.15 shows the

complementary gate drive signals of Sp and SN with duty cycle about 48% due to some

dead time. VGS_ Sp and VGS _ SN are the complementary gate-source control voltage.

 

 

 

 

  
 

 

+__ _' .VGS—SP 3
, H (5 V/div) . '
.1 4.....- . ..- ..........-...-..i_..... H ._..-. . .. ..
VGS_SN
(5 V/div)
— ' 4 Its/div

 

 

 

Figure 2.15 Gate drive signal of Sp and SN

Figure 2.16 shows the voltage and current waveforms of S p1. VGS is the gate-source
voltage of S 1)}, VD S is the drain-source voltage of S p1 and I D is drain-source current

0f Sp1.The resonant current waveform realizing ZCS is shown. Figure 2.17 shoWs the

61

zoomed in waveforms of the switch S p1 turn off transient, which indicates that the
switch achieves ZCS during turn off. From the experiment results, we can derive that the

switch S p1 can achieve ZCS in both turn on and turn off. Other switches have the same

voltage and current waveforms similar to S p] which will not shown here.

 

~ . VGS(10 V/div) ,

31

J; V. M-
VDs(5V/div)

 
      

  
 

  

 

 

 

l
1
1
I

 

   

i. . "Inuo A/diY). . «us/div) ..

Figure 2.16 Voltage and current waveform of S p1

 

' V

zcs turn off ,

   

.—

-V(;s(10 V/ div)

    
 
 

VDS(5 V/div) g

 
   

[(400 ns/div)

 
 

1])(2 A/div)

 

 

Figure 2.17 Zoomed in voltage and current waveforms of S pl

62

Figure 2.18 shows the measured efficiency curve using Yokogawa WT1600 digital
power meter of proposed ZCS-MMSCC and the calculated efficiency using (2.43). And

the efficiency is above 97% which is a big improvement than traditional MMSCC.

 

 

 

 

 

 

 

 

 

 

 

0.985
A 0.98 Calculated—
8\:
>5 0.975
8 t
,2 0.97 .
21E) Measured
m 0.965

0.96 1 1 1 1
0 50 100 150 200
Output power (W)

Figure 2.18 Measured Efficiency and Calculated Efficiency
2.6.2 A 630 W twelve-level ZCS-MMSCC prototype

A 630 W twelve-level ZCS-MMSCC prototype is built and tested. In the 630 W
twelve-level ZCS-MMSCC prototype, the switching devices are two 30 V 180 A
MOSFETs IPB009N03L from infineon connected in parallel. Resonant capacitor are ten
100 V 4.7 11F MLCC capacitors C5750X7R2A475K from TDK connected in parallel.
Input capacitor are sixty-five 6.3 V 470 11F conductive polymer aluminum solid
electrolytic capacitors PLEOJ471MDOlfrom nichicon connected in parallel. Gate drive
voltage is 6 V. Different with the four-level prototype, this new prototype use switching

frequency around 70 kHz. The required stray inductance is about 110 nH for L51 and

220 nH for all the other switches. Figure 2.19 shows the twelve-level ZCS-MMSCC

input voltage, output voltage and one switch current waveforms under 480 W output.

63

Figure 2.20 shows the gate drive voltage, drain-source voltage and drain—source current
of one switch under 630 W condition. From the experiments waveforms we can derive
that, ZCS was achieved in both turn on and turn off of the switch. The voltage gain of the

converter is about 12 times.

 

 

 

 

.1-....1..... .1.....-x..1.+..1-IQ.I.....4...A11..1...11.

s...

(5 V/div) l 20 V(/)div)f
1’ i

, Is 4 1.18/le
(10 A/div)

       

 

 

Figure 2.19 Input voltage, output voltage and switch current waveforms

 

,
i
‘r
I
i-

    

 

 

Figure 2.20 Switch voltage and current waveforms

64

Figure 2.21 shows the estimated loss break down of 630 W prototype using equation
(2.41), the estimated efficiency is around 96.7% using equation (2.43). MOSFET and
capacitor conduction loss are still the major part. Because of a huge input capacitor bank
is using, the input capacitor conduction loss is not that significant. When the input power
rating is increased, the input capacitor conduction loss percentage could be bigger caused
by the huge input current ripple in an optimized design. Input current ripple should be

reduced in order to reduce the total converter size and increase the efficiency.

 

Loss Break Down

 
 
   
 

Conduction
Loss
17%

  

MOSF ET
Conduction
Loss
45%

 
   

 
 
  
 

    
   
 

Capacitor g,
Conduction fl.
Loss '1
32%

  

MOSFET

 

 

 

Figure 2.21 Loss break down of the 630 W prototype.

2.7 Conclusion

The presented ZCS-MMSCC has all the advantages of ZCS and MMSCC. And it has
some special features besides the features got from ZCS and MMSCC. All the features
can be concluded as follows:

> reduces dv/dt, di/dt and EMI because of ZCS;

> reduces the switching ‘loss which improves efficiency;

65

uses simple control strategy and possesses modular structure and bidirectional

power conversion;
> increases the potential power rating by using MLCC capacitor;
> reduces the capacitance and capacitor size, which lowers the cost
> utilizes distributed stray inductance to achieve ZCS which improves reliability.

A new soft-switching operation strategy to the existing MMSCC has been proposed
and validated by both simulation and experiment results. A 150 W, 5 V input four-level
converter prototype has been built based on proposed circuit and the efficiency is higher
than 97%. A 630 W, 5V input twelve-level converter prototype is also built for the TEG
application. The ZCS-MMSCC overcomes the current and voltage spike problems of
traditional MMSCC and provides a technically viable soft-switching strategy with circuit
layout stray inductance. This technique could be applied to the switching-capacitor
circuits on a semiconductor chip with very small stray inductance in the circuit without
pushing the switching frequency to megahertz. The proposed ZCS-htflVlSCC also shows

great potential to high voltage gain and high input current applications.

66

CHAPTER 3

A Family of ZCS Switched-Capacitor
DC-DC Converters

This Chapter presents a new zero current switching technique for a family of
switched-capacitor dc-dc converters. Compared to the traditional ZCS switched-capacitor
dc-dc converter by inserting a relatively big inductor in the circuit, these new ZCS
switched-capacitor dc-dc converters employ the stray inductance present in the circuit as
the resonant inductor and provide soft-switching for the devices. These ZCS switched-
capacitor dc-dc converters do not utilize any additional components to minimize
switching loss and reduce current and voltage spike, thus leading to high efficiency and
reliable benefit over traditional switched-capacitor dc-dc converters. Moreover, the bulky

capacitor bank existing in traditional switched-capacitor circuits for high power high
current application to achieve high efficiency was reduced significantly. So, small size,
low capacitance, low ESR, high current rating and high temperature rating ceramic
capacitors can be employed. Therefore, by using proposed ZCS technique, smaller size,
higher power density, higher efficiency, higher temperature rating, and higher current
rating switched-capacitor dc-dc converter could be built. Simulation and experimental

results are given to demonstrate the validity and features of the soft switching switched-

capacitor dc-dc converters.3

3.1 Introduction

3This work is going to present in part at the 25nd annual IEEE Applied Power
Electronics Conference and Exposition, Pahn Spring, CA USA, Feb. 21 — Feb. 25 2010.

67

With the technological development of silicon carbide (SiC) and ceramic materials,
very high temperature (250 °C) SiC switching devices and ceramic capacitors will be
available. But the magnetic cores become dysfunctional at very high temperature.
Therefore, magnetic-less switched-capacitor dc-dc converters operating at very high
temperatures become possible and attractive with the adoption of natural air cooling by
eliminating bulky heat sinks and magnetic cores. There are three main basic structures of
switched-capacitor of dc-dc converters that is most p0pular, Marx generator type voltage
multiplier shown in Figure 3.1 [73, 74, 75], charge pump type multi-level modular
switched-capacitor dc-dc converter shown in Figure 3.2 [76, 78], and generalized multi-

level type switched—capacitor dc-dc converter shown in Figure 3.3 [81, 82, 83, 96, 101].

 

 

 

 

 

Figure 3.1 Voltage multiplier

 

/SN 3481’

_/ SP fil:[_/ SN
C] I C2]: :3]— CN-2 -I—— CN-r CN A
v, SEQ/er Lt- - - i. 31.1

In SN SP S SP SN SN

1 I”: 1 18"

i -

 

 

 

 

pvo'r

 

Figure 3.2 Multilevel modular switched-capacitor dc-dc converter.

 

SPmlxs

0”: F‘ k—le

\l

 

 

 

SP1]: IC: '“C m2
SNm2 k—|

SNrr

P901

SP12 SPmm—lq

Cmm-l
SN22| IC: I I

Cmm
SNmm T
l r

 

 

Figure 3.3 Generalized multi-level switched-capacitor dc-dc converter.

However, there are many common drawbacks in traditional switched-capacitor dc-dc
converters in high power and high current automotive application. A huge capacitor bank
with high capacitance has to be utilized in order to reduce the voltage ripple of the
capacitors and achieve high efficiency, which will undoubtedly increase the size of the
converter [82, 94, 95, 102]. Besides, with the increase of switching frequency, the
switching loss of the device becomes more and more unneglectable. Moreover, huge
current spikes, big voltage overshoot caused by large turn off current and EMI problems
caused by the di/dt and dv/dt generated during the switching transient are undesirable in
automotive applications. In order to reduce the switching loss, voltage spikes, current
spikes and EMI, several ZCS methods have been proposed [84, 85, 86, 87, 88, 103]. But

adding a relatively big resonant inductor in the switched-capacitor circuit to achieve ZCS

is a contradiction by itself. Also, by using the methods mentioned above, switching

69

frequency has to be pushed to tens of megahertz to utilize parasitic inductance which is

not technically feasible [92, 93, 104]. A charge pump type ZCS multi—level modular
switched-capacitor dc-dc converter has been proposed recently. By utilizing the
distributed parasitic inductance present in the circuit, switching frequency need not to be
increased to megahertz, no big inductors are needed to be inserted [105]. By applying the
ZCS strategy pr0posed in [105] to the existing switched-capacitor circuits, a family can
be generated.

This chapter presents a family of ZCS switched-capacitor dc-dc converters that is able
to overcome the aforementioned drawbacks of traditional switched-capacitor dc-dc
converters without inserting big magnetic cores or increasing switching frequency. This
new strategy can achieve the ZCS of all the switches without losing the good features of
switched-capacitor circuit compared to the traditional ZCS strategy. This ZCS strategy
employs the distributed parasitic inductance in the circuit resonating with the capacitors
to provide low di/dt and dv/dt to the switching devices. So, the switching loss is
minimized, current spike and voltage spike are reduced and EM] is limited. In case the
stray inductance is not sufficiently large or equalized, small air core inductors (less than
100n) can be used to meet the requirement of the stray inductance. The power loss is only
related to the conduction loss and gate drive loss of switching devices and capacitors by
considering the influence of stray inductance. Therefore, bulky capacitor banks with high
capacitance are no longer needed to achieve high efficiency, while small MLCC

capacitors with low ESR and low capacitance can be adopted to increase efficiency
reduce the size. No extra components are added in the presented soft switching strategy,

thus making it reliable and low in cost. A 630 W twelve-level ZCS charge pump type

70

switched-capacitor dc-dc converter and a 480 W ZCS voltage doubler were built to

confirm the operation.

3.2 Proposed ZCS Switched-Capacitor DC-DC

Converter Family

Figure 3.4, Figure 3.5, and Figure 3.6 show the proposed ZCS switched-capacitor
family utilizing the distributed parasitic inductance existing in the circuit. Figure 3.4
shows the N-level ZCS voltage multiplier. Figure 3.5 shows the N-level ZCS MMSCC
which has already been discussed in detail in chapter 3. Figure 3.6 shows the N-level

ZCS generalized multi-level switched capacitor dc-dc converter.

 

 

4% C C O
s... ins L
Figure 3.4 ZCS voltage multiplier
L3 L5 LS
Ls Ls L3 1 Ls I
Ls? 1...; % Lsi

Figure 3.5 ZCS multi-level modular switched-capacitor dc-dc converter

I
HM;-
r

m

 

t"
m
"Jil—
m

71

 

 

 

J. P301 ',

 

 

 

 

 

Figure 3.6 ZCS generalized multi-level switched-capacitor dc-dc converter.

The parasitic inductance mainly includes the stray inductance due to the circuit layout,
MOSFETs package parasitic inductance and the capacitor ESL. The stray inductance
caused by circuit layout is usually the dominant part. By designing the circuit layout
specially or inserting specific length of wires which is an air core inductor in the circuit,
the inductance needed for resonant is achieved. Because resonant inductors or the
inserted wires are distributed in the circuit properly, only small resonant inductance is
needed for resonant. Therefore, ZCS of all the switching devices can be achieved by the
resonant of the capacitor and the circuit layout stray inductance or inserted wires. In the

following parts, two examples of proposed ZCS switched-capacitor dc-dc converters are

analyzed, simulation and experimental results are given.

72

3.3 Operation Principle

Since ZCS-MMSCC has already been discussed in detail in chapter 3, only ZCS

voltage multiplier and ZCS generalized switched-capacitor dc-dc converter is going to be

discussed here.

3.3.1 ZCS voltage multiplier

Figure 3.7 shows the four-level ZCS voltage multiplier as an example. Similar to the

four-level ZCS-MMSCC, this circuit also works as a four times step-up dc-dc converter.

V5,, represents the ideal input voltage source. LS represents the equivalent stray
inductance present in the circuit. L32 , LS4 and LS6 are the equivalent stray inductance
when the capacitor is charged in parallel. LS] , LS3 , L55 and LS7 are the equivalent
stray inductance between each capacitor when the capacitor discharges in series. S p and
SN are the same switching devices controlled complementary at 50% duty cycle. C1 to
C3 are the capacitors with the average voltage of input voltage, while C4 has the average

voltage of four times of input voltage. LS does not have to be in the position drawn in

Figure 3.7, it could be distributed anywhere in series with switches or capacitors in the
circuit shown in Figure 3.4 or similar to Figure 2.4. Similar to the ZCS-MMSCC, the

total stray inductance could be sum of the connection wire parasitic inductance L SW ,

capacitor parasitic inductance L ESL and the MOSFETs package parasitic inductance L 5,, .

Usually the connection wire parasitic inductance L SW is the major part of the stray

inductance. For the analysis convenience, only one equivalent L3 is used to represent the

73

total stray inductance present in each parallel resonant loop. And one equivalent L5 is

used between two capacitors in the series resonant loop.

 

 

 

 

 

Figure 3.7 Four-level ZCS voltage multiplier main circuit.

Figure 3.8 shows the idealized waveform of pr0posed ZCS voltage multiplier under
steady-state conditions. The gate signal of switch Sp and S N is complementary, and
duty cycle is 50%. Assume input voltage is an ideal voltage source. By considering the
stray inductance present in the circuit, when the switches are turned on, the current
through the stray inductance, capacitors and the switch will begin to resonate fi'om zero.
By adjusting switching frequency to the resonant fi'equency, the current through switches

Sp , S N and stray inductance will decrease to zero when the switches are turned off,
which is the half period of the sinusoidal waveform. Therefore, the ZCS of all the
switches is achieved in both turn on and turn off. The capacitor C1 C2 and C3 are
charged in parallel in half-period with the sinusoidal current waveform when Sp is on.
And they are discharged in series with the input voltage source in another half-period also

in the sinusoidal shape when SN is on. So, the current through the capacitor C1, C2, and

C3 is the sum of the current through the switch, which is a sinusoidal waveform.

74

 

 

n
./.
4

 

 

 

 

 

 

 

 

 

VGs_SN
VDs_SP

-10
, ./"
\

75

t 0
Figure 3.8 Ideal waveforms of four-level ZCS voltage multiplier.

The capacitor C4 is charged when other capacitors are in series with input voltage.
And it is discharged to the load. So the current through capacitor C4 is a sinusoid
waveform when SN is on with a negative dc output current offset. When Sp is on, the
current through C4 is the load current. When the capacitor is charged, the current is
positive; when the capacitor discharges, the current is negative. The voltage across the
capacitor C1, C2 and C3 has a dc offset of input voltage with a sinusoidal ripple. The
voltage ripple is determined by the capacitor current and Capacitance. The voltage across
the capacitor C4 has a dc offset of four times input voltage with voltage ripple also
determined by the capacitor current and capacitance. The operation of the circuit can be

described in two states as shown in Figure 3.9 and Figure 3.10 with different switch is
turned on.

 

 

 

 

 

 

 

 

 

 

 

LS4 % LS6 %
, .. S $3 SN4
_ Lss 1.133 SP5 itfi LS7 I. I0
C3
R
C4:= EE
is + Sprig; ;,
v A A:

 

 

 

Figure 3.10 Operation modes state 11 S N is on.

76

3.3.1.1 State 1 [to,t1]
Figure 3.9 shows the state when Sp is turned on at t = to while S N is off. During
this state C1 , C2 and C3 are charged by Vin. Figure 3.11 shows the three simplified
equivalent circuits of state I. Figure 3.11(a) shows the situation when Vin , L52 , S H , C1
and S p2 form a resonant loop. Figure 3.ll(b) shows the situation when Vin, LS4, SP3 ,
C2 and S p4 form a resonant loop. Figure 3.11(c) shows the situation when Vin, LS6 ,
S p5 , C3 and SP6 form a resonant loop. Because of the presence of the stray inductance
LS, before the switch is turned on, the current through LS already decreases to zero. The
current through S p will increase from zero when the switch is turned on, so S p is turned
on at zero current. For the case shown in Figure 3.1 1(a), after L52 and C1 resonate for
half cycle, the current through S 1)} and S p2 falls to zero. Therefore S 1)} and S p2 turn
off at zero current. Similarly, for the case shown in Figure 3.1 1(b) and Figure 3.1 1(c) the
current through SP3 , S p4, S p5 and S 136 will realize zero current turn on and turn off too.

So, ZCS is achieved on all the switches. The required stray inductance value is the same
for the three circuit and is easy to be achieved by the circuit layout due to the symmetry
of the circuit, assuming the capacitance are the same.
Without loss of generality, the following assumptions have been made for the
analysis: all the switches are ideal, i.e. no conduction resistance is considered; input

voltage source is ideal, i.e. constant and no internal impedance; the capacitor ESR is zero.

Assuming C1: C2 = C3 = C4 , so in order to have the same resonant frequency,

L31= L32 = LS3 = LS4 = L55 = LS6 = LS7-

77

 

 

 

 

(a) (b) (C)

Figure 3.11 Simplified equivalent circuits of state I

The state equations of Figure 3.1 1(a) are

 

 

diL
Vin = L32 dfz +VC1 (3-1)
. dVc:
lL52 = Clj' (3-2)
The solutions are:
i520) = :50 sin curt (3.3)
m
IIPO
= . _ __ 3.4

Where Vin is the value input voltage, L52 is the value of stray inductance, a); is the

resonant frequency equals to l/JLSlCl , and B, is the output power. After half cycle, the

capacitor voltage is charged to:

IZ’PO
_. V- | . . __. 3,5
vCl (t1) m 4I7inClwr . ( )

The capacitor voltage ripple is:

rrP
A = ——0—— 3.6
VCl 4Vin C1 (or ( )

78

The state equations of Figure 3.11(b) and Figure 3.11(c) are similar to the state

equations of Figure 3.11(a). The voltage across C2 and C3 are exactly the same as the

voltage across C1. The voltage ripple of C2 and C3 are also the same as Avcl .

3.3.1.2 State 11 [t1,t2]
Figure 3.10 shows the state when S N is turned on at t = t1 while Sp is off. During
this state, C4 is charged by the Vin C1 C2 and C3 in series. Figure 3.12 shows the
simplified equivalent circuits of state 11. It shows the situation when Vin , L51, SM , C1,
LS3, 5N2, C2, LS5, SN3, C3,LS7, SN4, and C4 form a resonant loop. Similar as the
last state, because of the presence of the LS, the current through S N will also increase its
value fi'om zero in a resonant manner. The zero current turn-on of S N can be achieved.
After stray inductance L51, L53, L55 and L57 in series resonate with capacitor C1 , C2,

C3 and C4 in series for half cycle at t = t2, SN}, S N2 , S N3 and SN4 will have a zero

current turn-off when the current through them decreases to zero. Hence, zero current

switching can be achieved on these switches.

L31 SNl C1 LS3 SNZ C2

C633 / \l cm /‘ \I
‘ I7l+ l 1' +

 

 

 

 
  

C4 SN4 LS7 C3 SN3 Lss
+ + I
k—f—csar K /—ab——

Figure 3.12 Simplified equivalent circuits of state 11

 

 

The state equations of Figure 3.12 are:

79

 

V — 4 diLSI
in + VC] + VCZ + vC3 — LS] d! + vC4

 

de
. _ 4
The solutions are:
fl'P
VC4(t) = 4Vin - W008 curt
m r
. n'P .
'LSI (t) = ism 0),!

After half cycle, the capacitor voltage is charged to

ItP
VC4 (’2) = 4Vin + W
The capacitor voltage ripple is:
IrP
C4 4VinC4wr

(3.7)

(3.8)

(3.9)

(3.10)

(3.11)

(3.12)

All the capacitors have the same voltage ripple and the voltage ripple depends on the

output power, input voltage, capacitance and the resonant frequency.

3.3.2 ZCS voltage doubler

Figure 3.7 shows the two-level ZCS generalized multi-level switched-capacitor dc-dc

converter an example. This circuit can be also called as the ZCS voltage doubler in short,

because this circuit works as a two times step-up dc-dc converter. Vin represents the ideal

input voltage source. LS represents the equivalent stray inductance present in the circuit.

LS] , L32 L53 and LS4 can be considered as the stray inductance in series with the

switch during the circuit layout. Sp and S N are the same switching devices controlled

complementary at 50% duty cycle. C1 and C2 are the capacitors with the average voltage

80

the same as the input voltage. Because of the symmetry of the circuit, the distributed

stray inductance L51 , L52 L53 and LS4 can be replaced with an equivalent stray
inductance L5 in the input side shown in Figure 3.14 for the analysis convenience. Only

‘ one equivalent stray inductance L5 is needed to represent the total stray inductance in

two resonant loop.

10
f
8le
Iin
—> L51 + C1
VCl Z:
SNIJ "’ +
Vin
L
+ 82 R5 V0

 

 

 

 

 

Sm-l

LS4

 

 

 

Figure 3.13 ZCS voltage doubler main circuit.

81

 

 

')l+
ll

 
   

 

it

i’ "F‘

l.__

 

 

 

 

 

 

 

Figure 3.14 ZCS voltage doubler topology simplification.

Figure 3.15 shows the idealized waveform of proposed ZCS voltage doubler under
steady-state conditions. The gate signal of switch Sp and S N is complementary, and
duty cycle is 50%. Assume input voltage is an ideal voltage source. By considering the
equivalent stray inductance in the input side, when the switches are turned on, the current
through the stray inductance, capacitors and the switch will begin to resonate from zero.
By adjusting switching frequency to the resonant frequency, the current through switches
Sp, SN and stray inductance will decrease to zero when the switches are turned off,
which is the half period of the sinusoidal waveform. Therefore, the ZCS of all the

switches is achieved in both turn on and turn off. The capacitor C1 and C2 are charged in
each half-period with the sinusoidal current waveform when Sp or S N is on. And they
are always discharged in series So, the current through the capacitor C1, and C2, is the

current through the switch subtracts the output current. The output voltage ripple is half

of the voltage ripple of the capacitor, because of the 180 degree phase shift of the

82

capacitor voltage ripple. The capacitor voltage ripple will cancel with each other. The
operation of the circuit can be described in two states as shown in Figure 3.16 and Figure

3.17 with different switch is turned on.

A
VGs_SP

 

 

VGs_SN
VDs_SP1

 

 

 

 

..........

.3?

:42”

“4.-
""'V~

'N

 

~
0
'0
l
dI-——-——

VN.

 

7K
34 .
.52
'4

d-IJ

 

 

 

 

Figure 3.15 Ideal waveforms of ZCS voltage doubler.

83

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 3.16 Operation modes of state I when Sp is on.

 

o“: ’ ”.4. “3-.

Sue: {"3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 3.17 Operation modes of state 11 when S N is on.

84

3.3.2.1 State 1 [to,t1]

Figure 3.16 shows the state when Sp is turned on at t = to while S N is off. During
this state C1 is charged by Vin. Figure 3.18 shows the simplified equivalent circuits of
state I. It shows the situation when Vin , LS, S p] , C1 and sz form a resonant loop.
Because of the presence of the stray inductance LS, before the switch is turned on, the
current through Ls already decreases to zero. The current through Sp will increase from
zero when the switch is turned on, so Sp is turned on at zero current. After LS and C1
resonate for half cycle, the current through S p1 and sz falls to zero. Therefore S p1 and

S p2 turn off at zero current. So, ZCS is achieved on all the switches.

[_ig Ls SP1 13,11

i + I + |
V ICll V0
Ls

99“,, C1}:- (32 =
SP2 i

Figure 3. l8 Simplified equivalent circuits of state I

+'\|

 

 

 

 

 

Without loss of generality, the following assumptions have been made for the
analysis: all the switches are ideal, i.e. no conduction resistance is considered; input

voltage source is ideal, i.e. constant and no internal impedance; the capacitor ESR is zero.

Assume C1 = C2 . The state equations of Figure 3.18 are:

diL
Vin = LS __dtS + VCI (313)

85

 

 

1L5 = C1 dt + 10 (3.14)
—10=C29%%- (1.15)
10 = 21;?" (1.16)

And the solutions are:
vC1(t) = V,-,, -3fi:‘;7reese,t (3.17)
vC2(t)=—§I—/:ié—2-t+V,-n +55%; (1.18)
115(1) = %/%-sin (or! (3.19)

Where V,-,, is the value input voltage, L5 is the value of stray inductance, (a, is the

resonant frequency equals to l/JLSCl , and P0 is the output power. After half cycle, the

capacitor voltage is charged to:

nPo

VC1(tl) = Vin + m (320)
The capacitor voltage ripple is:
n'P
A = 0_ 3.21
VC] 2Vincla’r ( )

3.3.2.2 State II [t1,t2]

Figure 3.17 shows the state when S N is turned on at t =11 while Sp is off. During
this state C2 is charged by Vin. C1 and C2 in series form the output current. Figure 3.19
shows the simplified equivalent circuits of state 11. It shows the situation when Vin , L5,

SN] , C2 and S N2 form a resonant loop. Because of the presence of the stray inductance

86

LS, before the switch is turned on, the current through LS already decreases to zero. The
current through S N will increase from zero when the switch is turned on, so S N is
turned on at zero current. After LS and C2 resonate for half cycle, the current through
SN] and S N2 falls to zero. Therefore SM and S N2 turn off at zero current. So, ZCS is

achieved on all the switches. The state equations of Figure 3.19 are:

 

 

Vi, = L3 01:25 + vC, (3.22)
iLS = C2 (1:2 + 10 (3.23)
And the solutions are:
vC2 (t) = Vin — i—ég—‘im—rcos curt (3.24)
iLS(t) =;r—£°—sinw,t (3.25)

After half cycle, the capacitor voltage is charged to:

_ . __”Po 3 26
sz (t2) _ Vm + ZI/inclwr ( ° )

The capacitor voltage ripple is:

7rP
A = __0__ 3.27
VCZ 2 VinCl 0r ( )

The soft switching conditions in both states is f; = f, , where f, is the switching

frequency and f, is the resonant frequency.

87

 

+"l

 

 

 

 

Figure 3.19 Simplified equivalent circuits of state 11

3.4 Design Considerations

3.4.1 ZCS voltage multiplier

The 160 W four-level ZCS voltage multiplier design procedure is shown here as an

example. The specification of the prototype converter is Vin =5 V, V0 =20 V, Po =160 W,
f; =70.4 kHz.

3 .4. 1 .1 Capacitance
Capacitance value should be chosen according to the voltage ripple.

_ J52— 3 28
C “ 4V,-,,AvC(o, ( )

Because of the special structure of the circuit, the voltage ripple across all the
Capacitors is the same. And the value of the voltage ripple is determined by the output
Power, input voltage, capacitance and the resonant frequency. The capacitor voltage
l‘ipple should be chosen smaller than the input voltage to prevent the voltage across the

capacitor from resonating to the negative region and lose the zero current switching. That

88

means, the capacitors should have a positive dc voltage offset. The output voltage ripple
is two times smaller than the capacitor voltage ripple because of the 180 degrees phase
shifl operation of switches.

The output ripple is chosen around 6% of output voltage. So the capacitor voltage
ripple is 12% of the capacitor voltage. According to the (3.28), the capacitance is chosen

47 pF in the simulation.
3 .4. 1 .2 Stray inductance

The circuit layout should be designed carefiilly, in order to make the stray inductance
of each equivalent circuit equal. In case the stray inductance is not equal or large enough,
small air cores can be inserted to equalize the stray inductance. The switching frequency
can be adjusted according to the stray inductance present in the circuit if the circuit layout
is already fixed. Required stray inductance for ZCS can be determined by the following
equation, using the equivalent circuit shown in Figure 3.11.

1

= —— (3.29)
Clam?

L52

Considering the output current influence, required stray inductance for L 51 , L s 3 ,
L55 and LS7 are a little bit smaller than the stray inductance of L52 , LS4 and £36 . So in
the design, attention should be paid in order to achieve the ZCS of all the switches.
3.4.1.3 Switching frequency

Switching frequency should be set the same as resonant frequency in order to promise
the zero current switching. Usually, the stray inductance of the circuit is already
determined when the circuit layout is finished. The capacitance is also determined by the

required voltage ripple. Assume the air core inductor is used, and the stray inductance of

89

all the parallel charging loop is equalized. The stray inductance for the series loop is also
chosen properly. The switching frequency can be twisted by monitoring the power device
current when the switch is turned off. The switching fiequency should be set exactly at

the point when the switch current resonates to zero when the switch is turned off.

3.4.2 ZCS voltage doubler

The 480 W ZCS voltage doubler design procedure is shown here as an example. The
specification of the prototype converter is Vin=12 V, Vo=24 V, B,=480 W, 13:44.2
kHz.

3.4.2.1 Capacitance

Capacitance value should be chosen according to the voltage ripple.

”P0

C = _—
2VinAVer

(3.30)

Because of the special structure of the circuit, the voltage ripple across all the
capacitors is the same. And the value of the voltage ripple is determined by the output
power, input voltage, capacitance and the resonant frequency. The capacitor voltage
ripple should be chosen smaller than the input voltage to prevent the voltage across the
capacitor from resonating to the negative region and lose the zero current switching. That
means, the capacitors should have a positive dc voltage offset. The output voltage ripple
is two times smaller than the capacitor voltage ripple because of the 180 degrees phase
shift operation of the switches.

The output ripple is chosen around 8% of output voltage. So the capacitor voltage
ripple is 40% of the capacitor voltage. According to the (3.30), the capacitance is chosen

47 uF in the simulation.

90

3.4.2.2 Stray inductance

The circuit layout should be designed carefully, in order to make the stray inductance
of each equivalent circuit equal. Assume all the stray inductance in the circuit is
equalized. And the required stray inductance can be satisfied by using proper input
inductance. Required stray inductance for ZCS can be determined by the following
equation, using the equivalent circuit shown in Figure 3.18.

l

L =_____ (3.31)
S Clan/sf

3.4.2.3 Switching frequency

Switching frequency should be set the same as resonant frequency in order to promise
the zero current switching. Usually, the stray inductance of the circuit is already
determined when the circuit layout is finished. The capacitance is also determined by the
required voltage ripple. Assume the air core inductor is used for the input inductance, and
the switching frequency can be determined by the input inductance value. If the input
inductance is determined, he switching frequency can be twisted by monitoring the power
device current when the switch is turned off. The switching frequency should be set
exactly at the point when the switch current resonates to zero when the switch is turned

off.

3.5 Simulation and Experiment Results

3.5.] ZCS voltage multiplier

Figure 3.20 shows saber® simulation waveforms of a 160 W four-level ZCS voltage

multiplier, where Vp and Vn are the switch gate-source control voltage, Vds_Sp and

91

Vds_Sn are the switch drain-source voltage, I_Sp and I_Sn are the switch drain-source

current. I_C1,2,3 is the current through capacitor C1 , C2 and C3. I_C4 is the current
through capacitor C4. V_C1,2,3 is the voltage across the capacitor C1 , C2 and C3. Vin is
the input voltage. V0 is the output voltage or the voltage across the capacitor C4. The
input voltage is 5 V. Switching frequency is about 70 kHz. Capacitance is 47 uF and
stray inductance L52 = LS4 =LS6 =108 nH L5, = LS3 = L55 = LS7 = 98 nH. The
simulation results is consistent with the theoretical analysis, which verifies the above
analysis.

3.5.2 ZCS voltage doubler

Figure 3.21 and Figure 3.22 shows saber® simulation waveforms of a 480 W ZCS
voltage doubler, where Sp and Sn are the switch gate-source control voltage, Vds_Sp],

Vds_Snl, Vds_SpZ, Vds_Sn2 are the switch drain-source voltage of switch Sp] , S N1 ,
sz and 5N2- I_Spl and I_Snl are the switch drain-source current of switch Sp] and
S N]. The current through sz is the same as S p1 , the current through SNziis the same
as S Nl- lin is the current through the input stray inductance L5. I_Cl and I_C2 are the
current through capacitor C1 and C2 . V__C1 and V_C2 are the voltage across the
capacitor C1 and C2. Vin is the input voltage. V0 is the output voltage. The input voltage
is 12 V. Switching frequency is about 44 kHz. Capacitance is 52.6 uF and stray
inductance L5 = 110 nH. The simulation results is consistent with the theoretical analysis,

which verifies the above analysis.
In the 480 W ZCS voltage doubler prototype, the switching devices are two 30 V 180

A MOSFETS IPBOO9NO3L from infmeon connected in parallel. Resonant capacitor are

92

ten 100 V 4.7 uF MLCC capacitors C5750X7R2A475K from TDK connected in parallel.
Input capacitor are twelve 16 V 470 uF conductive polymer aluminum solid electrolytic

capacitors PLG1C471MD01 from nichicon connected in parallel. Gate drive voltage is 7

V.

93

 

 

 

 

's__——._.~.._ -..- L. —.___-.— --.—-.— 4.

(V)

(A)

(A)

(V)

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21.0 J3me- . -. -9 , ._._. __ 3 ,_ , ~ _-

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.
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V
n

L-
l I l 1 l 3 I

1 .96315m1.9667mt .97025m1 .9738m1.97735m1 .9809m1.98445m 1.988m 1 .99155m
t(s)

.w_

 

Figure 3.20 Simulation results of 160 W ZCS voltage multiplier.

94

 

 

 

Sp
Sn

.-..~..- a k..- .

 

 

(V)

(V)

(A)

(A)

 

 

 

 

 

 

 

 

 

 

 

15.0 —

(V) :t(s)

 

10.0 —

 

 

0.0 J

 

 

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Vds_Sp1

 

 

 

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15.0 a

(V) :t(s)

 

§
~ I
.t
~ :
.
a
g .
.
I

5.0 -~

 

 

 

0.0 J

 

80.0 ~ .-

40.0 -

0.0~ .-.--..--

 

 

- ---1. C -

 

 

Vds_SpZ

 

............

 

 

 

 

 

 

 

 

40.0 —

 

 

0.0 ~

 
 

(A) :t(s)

ff:fifiijf. f .. .1 "0

 

 

4.9155m

l
4.9268m

4.9381 m 4.9494m 4.9607m
1(8)

Figure 3.21 Simulation results of 480 W ZCS voltage doubler.

95

 

 

Sn

(A)

(V)

(V)

 

 

 

 

 

 

 

 

 

 

 

 

60 0 (A) = t(s)

40.0, .. , _,
20.04 .v
0.0.
-20.0«

 

 

 

 

 

 

 

 

(V) 11(8)
30.0 . j : v__01

 

20.0 -« .

 

10.0-

 

 

 

 

 

 

0.o .

(V) 31(5)
3°” " g : Vin

—.——-- q...
l _.—- _ .‘___
K

 

20.0 a .., ..
Vo

«re-H-u-u-w—w—c-umu-HW

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100‘
.

 

 

 

 

.0 _ .. -- __..-___.
O I ‘ . ' 1

i m“ 1 l

4.9155m 4.9268m 4.9381m 4.9494m 4.9607m
t(S)

 

Figure 3.22 Simulation results of 480 W ZCS voltage doubler.

Figure 3.23 and Figure 3.24 show the experiment waveforms of the 480 W ZCS

voltage doubler prototype with the parts mentioned above. Figure 3.23 shows the

96

complementary gate drive signals of Sp and SN with duty cycle about 49% due to
some dead time. Vgs_Sp and VGS_SN are the complementary gate-source control

voltage.

 

   
  

was. ,

  
 

f .
. VGS_SN
.. _ _(5 V/div)
(4 us/div)

 

 

Figure 3.23 Gate drive signal of ZCS voltage doubler

Figure 3.24 shows the voltage waveforms of S p2 and input current waveforms.
VGS __Sp is the gate-source voltage of sz, Vgs_Sp is the drain-source voltage of sz
and IIN is the current through input stray inductance Ls . The resonant current waveform
realizing ZCS is shown. Because the sum of the switch current is input current and the
input current is critical discontinuous sinusoid waveform, the switch current is also zero

when the switches are turned on and turned off. From the experiment results, we can

derive that all the switches can achieve ZCS in both turn on and turn off.

97

 

     
  
  
 

      

VGs_ SP . 4
=. 3‘ (5 V/div)
Wd- VDS_ Sp J

3 3 (10 V/div)

No Spike

  

 

 
   

 

,- (4 us/le) , i (20 V/diV) , -

Figure 3.24 Switch voltage and input current waveform of ZCS voltage doubler

3.6 Conclusion

In this chapter, A Family of zero current switching switched-capacitor dc-dc
converters has been proposed. By eliminating the bulky, lossy inductive component with
a magnetic core, the converter is able to operate at very high temperatures with high
efficiency. By using a soft-switching strategy, switching loss has been minimized and
EM] has been restricted; the size of capacitors has been reduced, making the converter
small and light. Owing to the proposed utilization of distributed stray inductance or
distributed air core inserting technique, the big inductor is avoided to achieve ZCS.
Hence, the proposed ZCS switched-capacitor converter family shows great potential in

high temperature, high power fiiture automotive applications.

98

CHAPTER 4
Improved ZCS Switched-Capacitor DC-
DC Converters with Continuous Input

Current for High Power Application

This chapter presents a family of ZCS switched-capacitor dc-dc converters with
continuous input current. It includes all the positive characteristics of ZCS switched-
capacitor dc-dc converter with small size, light weight, soft-switching and high efficiency,
and it also has the prominent features of continuous input current. Compared to the
traditional ZCS switched-capacitor dc-dc converters working at critical discontinuous
mode with huge input current ripple, the proposed converters have continuous input
current without inserting any magnetic cores. Therefore, the huge input capacitor bank in
traditional ZCS switched-capacitor dc-dc converter to meet the current ripple requirement
could be reduced correspondingly. The power loss related to the input capacitor ESR was
reduced significantly. Smaller size, higher efficiency and higher power density switched-
capacitor dc-dc converter could be made. The proposed converters show better potential
in high input current and high power renewable energy application such as TEG where
continuous current is preferable. Analysis, simulation and experiment results are given to

demonstrate the validity and features of the proposed converter.4

 

4 This work is submitted in part at the 32nd International Telecommunications Energy
Conference, Orlando, FL USA, June. 6 — June. 10 2010.

99

4.1 Introduction

To achieve small size, light weight, high efficiency and high power density dc-dc
power supplies, switched-capacitor dc-dc converters has been investigated since 19708
[73, 74, 75, 76, 90, 101, 104, 106, 107, 108, 109, 110, 111, 112, 113]. For traditional
switched-capacitor dc-dc converters, high voltage spike, current spike and EM problems
are common. In addition, when switching frequency is increased, the switching loss
becomes more and more innegligible. For purpose of reducing the current spike, voltage
spike, EM] and switching loss of switched-capacitor dc-dc converter, many ZCS type
switched-capacitor dc-dc converters have been proposed [84, 85, 86, 87, 88, 103]. By
inserting an inductor in series with the capacitor to resonate, zero current switching of
main switches can be achieved. However, inserting a relatively big magnetic core to the
switched-capacitor circuit loses the original intention of developing magnetic-less small
size IC chip converters and limits the application areas [92, 93]. In the meanwhile, in
high power automotive application, a huge capacitor bank has to be employed for the
sake of achieving high efficiency and sustaining current ripple. [82, 83, 94, 95, 96, 97,
102]. In order to reduce the huge capacitor bank in high power application and achieve
ZCS without adding extra inductors, a family of zero-current-switching switched-
capacitor dc-dc converter has been proposed in chapter 3 and 4. By utilizing the
distributed stray inductance present in the circuit, ZCS of all the switches can be achieved
and the capacitor size can be reduced [105, 114].

However, when all the switches achieve ZCS in a sinusoid manner, the input current
also becomes critical discontinuous sinusoidal waveforms shown in Figure 4.1 or Figure

4.2. Therefore, the input current ripple will be huge in high power and high input current

100

application. A huge input capacitor bank has to be adopted to meet the current ripple
requirements and to increase efficiency. The power loss related to the input capacitor is
also a big part of the converter total power loss. Also, for the renewable energy source in
automotive application such as TEG, dc—dc converter with continuous input current is
preferred. The output voltage ripple of the traditional ZCS switched capacitor dc-dc
converter is also relatively big. Because the output capacitor also joined the resonant and

a relatively small capacitance MLCC capacitor is usually used as the resonant capacitor.

 

 

 

 

A
IIN
t
0 TS 2T3 , 3T3 4T3
Figure 4.1 ZCS-MMSCC input current.
A
IIN
t
0 Ts 2T3 3T3 4T3

Figure 4.2 ZCS voltage multiplier input current

101

This chapter presents a series of ZCS switched-capacitor dc-dc converters with
continuous input current, which overcomes the huge input current ripple drawbacks of
traditional ZCS switched-capacitor dc-dc converter without inserting any filters. The
output voltage ripple of the proposed converter is also reduced by using a relatively small
output capacitor. These proposed converters employ four phase interleaved traditional
ZCS switched-capacitor dc-dc converters with an extra switch in each phase and an extra
common output capacitor. By operating the proposed converter with 90 degrees phase-
shift angle of control signal of each phase, the input current becomes continuous with
ripple current four times of switching frequency. For example, for the continuous current
version ZCS-MMSCC, the input current ripple can be reduced by about 80% which
means the RMS value of ripple current is also reduced by five times. Therefore, the
power loss caused by the input capacitor ESR is reduced by 96% because of the square
relationship between the power loss and ripple current. The huge input capacitor bank of
traditional ZCS switched-capacitor dc-dc converter to meet the capacitor ripple current
and thermal requirement could be eliminated. Smaller size, higher efficiency with higher
input current rating switched-capacitor dc-dc converter could be made by using the
pr0posed converter. Analysis of input current ripple reduction is given for the proposed
converters. Simulation and experiment results are also given to demonstrate the validity

and features of the proposed converters.

4.2 Proposed Improved ZCS Switched-Capacitor DC-

DC Converters with Continuous Input Current

4.2.1 Improved ZCS-MMSCC with continuous input current

102

 

 

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Figure 4.3 Proposed ZCS-MMSCC 10 with continuous input current main circuit

Figure 4.3 shows a four-level ZCS-MMSCC with continuous input current main

circuit as an example. The circuit also works as a four times step-up converter.

103

Four phase traditional ZCS-MMSCCS are connected in parallel with the same input
voltage source. Each phase is controlled with 90 degrees phase shift. Only four different

control signals are needed because of the special structure of the ZCS-MMSCC. One

extra switch is added in each phase of the traditional ZCS-MMSCC, which are S 136 , S B6 ,

S N1 1 and SR1]. The added switches are also controlled with 90 degrees phase shift and

ZCS can be also achieved. One output capacitor with higher capacitance is added to
reduce the output voltage ripple. The output capacitor with higher capacitance can be
treated as a voltage source considering the resonant of stray inductance of the added
switch and original output capacitor of ZCS-MMSCC to achieve the ZCS of the added

switches. The required stray inductance of the extra switch to achieve the ZCS is the

same with the first resonant loop, for example, L55 = L51.

4.2.2 Improved ZCS voltage multiplier with continuous input

current

Figure 4.4 shows a four-level ZCS voltage multiplier with continuous input current
main circuit as an example. Similar to the ZCS-MMSCC with continuous input current
this circuit also works as a four times step-up converter. Four phase ZCS voltage
multipliers are connected in parallel with the same input voltage source. Each phase is
controlled with 90 degrees phase shift. Only four different control signals are needed

because of the special structure of the ZCS voltage multiplier. One extra switch is added
in each phase of the ZCS voltage multiplier, which are S p7 , S N] 1 , S B7 and S R1 1. The

added switches are also controlled with 90 degrees phase shift and ZCS can be also

achieved.

104

 

 

 

All
7"

 

 

 

 

 

 

 

 

 

 

 

 

 

 

mam»H W ..,

 

 

 

 

 

 

 

 

Figure 4.4 Proposed ZCS voltage multiplier with continuous input current main circuit

One output capacitor with higher capacitance is added to reduce the output voltage

ripple. The output capacitor with higher capacitance can be treated as a voltage source

105

considering the resonant of stray inductance of the added switch and original output
capacitor of ZCS voltage multiplier to achieve the ZCS of the added switches. The

required stray inductance of the extra switch to achieve the ZCS is the same with all the

other equivalent stray inductance, for example, L58 = L5] = L52.

4.3 Operation Principles

4.3.1 Improved ZCS-MMSCC with continuous input current

Figure 4.5 shows the idealized waveforms of the ZCS-MMSCC with continuous input
current. There are only four different control signals with 90 degrees phase shift. Because
of the special structure of ZCS-MMSCC with complementary control signal and 50%
duty cycle, the control signal of the third phase is 180 degrees phase shift of the first
phase where the control signal of the first phase could still be used for the third phase.
Compared to the traditional ZCS-MMSCC, the current of each switch is reduced by four
times. The input current is become continuous with current ripple only 20% of the
traditional ZCS-MMSCC. There are four states in total of the new converter compared to
two states of traditional ZCS-MMSCC. During each state, two types of switches turn on
while the others turn off. Each state has the same equivalent circuit which means the

impedance of each state is the same. So the input current of each state is the same.

106

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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t4

t3

11

to

Figure 4.5 Ideal waveforms of ZCS-MMSCC with continuous input current.

4.3.1.1

State I [to — II]

107

In the following analysis, Sp will represent all the switches begin with Sp with
numbers afier it. And all the other switches follow the similar rules too. Figure 4.6 shows
the operation mode of state I with Sp and S R conduct. When t = t0, the current through
switches Sp begin to increase from zero, and the current through switches S R begin to
decrease from the maximum point, since S R is turned on since last state. When 1 = t1 the
current through S R resonate to zero and S R turn off at zero current. The current through

switches Sp reach the maximum point.
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Figure 4.6 State I. Sp and S R conduct.
Figure 4.7, Figure 4.8, Figure 4.9, and Figure 4.10 shows the equivalent simplified

circuits of State I. It can be shown from the figure that there are eight loops connected

108

with the input voltage source which mean the input current is divided by eight times. Two
loops are connected with output capacitor, which means output current is divided by two
times. By using one extra switch, the output capacitor is decoupled with the input voltage

source. Because the output capacitor C0 is big enough, only L55 and C4 will resonate.

L53 SP3 C2 Lss

 

 

 

 

Figure 4.7 Simplified equivalent circuits of state I (a)

L512 SP7 L514 SP1" ICu

581’“ 15ml
Vin Vin
SP9 :ji" C10_TC12

Figure 4.8 Simplified equivalent circuits of state I (b)

 

 

 

 

Figure 4.9 Simplified equivalent circuits of state I (c)

109

 

 

 

Figure 4.10 Simplified equivalent circuits of state I (d)
It can be also derived that, for first and third loop shown in Figure 4.7 and for the fist

and third loop shown in Figure 4.10, the needed stray inductance value is two times
smaller than other resonant loop, because there is only one capacitor in the resonant loop

compared to others with two capacitors in series for resonating.

4.3.1.2 State II [t1 —t2]

Figure 4.11 shows the operation mode of state 11 with Sp and S B conduct. When
t=t1, the current through Sp begin to decrease from the maximum point. And the
current through S B begin to increase from zero. When t= t2, the current through Sp
decreased to zero, and zero current turn off of Sp can be achieved. The current through

switches S B reach its maximum point.

Figure 4.12, Figure 4.13, Figure 4.14, Figure 4.15 shows the equivalent simplified
circuits of State 11. Similar to State I, this state still have eight loops with input voltage
source. And two loops with output capacitor. The required stray inductance for each
resonant loop to achieve ZCS is similar with state I too. There are four loop with only one
capacitor in the resonant loop, which means the required stray inductance is also smaller

than other loops with two capacitors in series for resonant.

110

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 4.11 State 11 Sp and SB conduct.

3SP3 C2 Lss

+| SP6
v. SP4 + (3441'. C
Vin +_|_ TC3 _
51,12? SP5 —

Figure 4.12 Simplified equivalent circuits of state 11 (a)

111

 

 

 

 

 

 

Figure 4.14 Simplified equivalent circuits of state 11 (c)

L517 537 C13 L519 Sm" C15
I 3 + _—l) +
538 k SB“
Vin . +___C14 Vin +J'Cl6
SB9 _ _T
1' /—‘ *

 

 

 

Figure 4.15 Simplified equivalent circuits of state 11 (d)

112

State HI [[2 - t3]
_. _J

~J ‘31
[an m?“ gm . r. . ,5...
Lm—l __ flag] I Hal I L121 _L “A
“ L_. j I..—
-- _FIJ'L
LfiJ

 

 

 

 

 

 

.4 ——J . O...)
.4—«753 W, - in: - ".5 - {HELP—4.3..

as __ J. , J. _L
“ L”? earl g:
‘ l

 

 

 

 

hf} ~ l
l 1
__ Iikrj ’
.3 Hg— a
15!": .m...‘
.I is} J
1

 

cm ,_ ”2:, _J ‘J‘ . i .3 . ‘2': m
. .fi Ir]; 2,1' 3 3" ini nu
' L‘N‘“ ".'~- 4Q“ - la"
g j
L 1’77,

 

 

 

 

 

Figure 4.16 shows the operation mode of state 11 with SN and SB conduct. When
t=t2, the current through SB begin to decrease from the maximum point. And the
current through S N begin to increase fiom zero since Sp is already turned off during
last state. When t=t3, the current through S B decreased to zero, and zero current turn

off of S B can be achieved. The current through switches S N reach its maximum point.

113

 

 

“6.5. if g I it . Im an
7+3] _ _ K1- ! I LNJ
J ‘ L—

.f-r
l' L

 

 

 

 

4‘“ 3 J J51
1...
Mil—"—_ .‘T‘f, _ 53—1“ . V‘: {1‘ . '_._“ I
LKPJ -- “I” J. Lwé _L “‘33 _L Wé
1.— I—. ,
.5135 Lt" iffL,
l 1 l
A T' __J ”-L) _J
[13] _TW
"u . J

 

 

 

 

 

 

 

 

Figure 4.16 State 111 S N and SB conduct.

Figure 4.17, Figure 4.18, Figure 4.19, Figure 4.20 shows the equivalent simplified
circuits of State 111. Similar to State I, this state still have eight loops with input voltage
source. And two loops with output capacitor. The required stray inductance for each
resonant loop to achieve ZCS is similar with state I too. There are four loop with only one
capacitor in the resonant loop, which means the required stray inductance is also smaller
than other loops with two capacitors in series for resonant. The only difference is the

conduction switch is changed from Sp and S R to S N and S B-

114

Figure 4.17 Simplified equivalent circuits of state III (a)

 
  

 

 

 

L311 L313 8N8 C10 L$15
SN6 l3 +
l 3N9 I \SNn
Vin : C9 Vin C : C12 : Co
SN7 + 11 T I
| 5N10 —
1r 1r t

Figure 4.18 Simplified equivalent circuits of state III (b)
L88 8133 C6 L310
3131 ' + l SB6
l S“
+
_ C:5 Vin J-
+

S C
I B2 S;5___’T 7
1r 1? 1

Figure 4.19 Simplified equivalent circuits of state 111 (c)

l \l+
II
C

co
\I+
II
C
e

 

 

 

 

 

 

115

 

 

 

Figure 4.20 Simplified equivalent circuits of state 111 ((1)
4.3.1.3 State IV [t3 —t4]

Figure 4.21 shows the last operation mode of state IV with S N and SR conduct.
When I = t3 , the current through S N begin to decrease from the maximum point. And
the current through S R begin to increase from zero since S B is already turned off during
last state. When t: 14, the current through S N decreased to zero, and zero current turn
off of S N can be achieved. The current through switches S R reach its maximum point.

And one period is over. In the next period, the switches will repeat the operation from
State I. Figure 4.22 - Figure 4.25 shows the equivalent simplified circuits of State IV. The

description of operation is omitted here, since it is similar with other state.

116

 

 

 

 

 

 

 

 

 

 

 

 

 

l .le

 

 

 

 

 

I
Figure 4.21 State IV S N and S R conduct.
LS2 SNl C1 LS4 SN4 C3
—') + ——l) +
SNZ SNS
Vin Vm
.1, is.
_ 2 _
Sm T T
f 7’ 7 1' 7

Figure 4.22 Simplified equivalent circuits of state IV (a)

 

 

 

 

 

 

 

Figure 4.24 Simplified equivalent circuits of state IV (0)

L513 SR8 IC14 L820

SR11
i SR9 _i_
+ C16 + Co
4%: C15 " "
SR10 ’1

Figure 4.25 Simplified equivalent circuits of state IV (d)

 

 

 

4.3.2 Improved ZCS voltage multiplier with continuous input

current

Figure 4.26 shows the idealized waveforms of the improved ZCS voltage multiplier

with continuous input current. Similar with ZCS-MMSCC with continuous input current,

118

there are also four different control signals with 90 degrees phase shift. Because the ZCS
voltage multiplier also has complementary control with 50% duty cycle. When four
phases ZCS voltage multiplier with four extra switches and one output capacitor
interleaved together, only four different control signals with 90 degrees phase shift angle
from each other are needed. ‘Compared to the traditional ZCS voltage multiplier, the
current of each switch is reduced by four times due to the four phase interleaving strategy.
The input current is become continuous, compared to the discontinuous current with
different peak current of traditional ZCS voltage multiplier. Similar to the ZCS-MMSCC
with continuous input current, there are also four states in total of the new converter
compared to two states of traditional ZCS voltage multiplier. During each state, two types
of switches turn on while the others turn off. In each state, there are two phases circuit
charges all the capacitor in parallel, while other two phases with all the capacitors in
series with the input voltage source and charge the last capacitor. Because of the inserting
of the extra switch, there are two extra loop in each state with the last resonant capacitor

such as C4 and C16 in the first state to charge the output capacitor Co. In this case, each

state has the same equivalent circuit which means the impedance of each state is the same.
So the input current of each state is the same similar to the ZCS-MMSCC with the

continuous input current.

119

I:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V

II lHIlIVl

vlll.

villi.

II 1111 IV

I

 

 

 

t1 t2 t3

1‘0

Figure 4.26 Ideal waveforms of ZCS voltage multiplier with continuous input current.

120

4.3.2.1 State I [t0 -—t1]

Figure 4.27 shows the operation mode of state I with Sp and S R conduct. When
I: to , the current through switches Sp begin to increase from zero, and the current
through switches S R begin to decrease from the maximum point, since S R is turned on
since last state. When t = t1 the current through switches Sp reach the maximum point.

And the current through S R resonate to zero and S R turn ofi‘ at zero current.

.1.
L91 112-3 MW
, 117% , r T?

 

 

 

 

 

 

 

 

 

l'
f’

 

 

 

 

 

 

 

 

 

 

 

 

Figure 4.27 StateI Sp and S R conduct.

Figure 4.28 - Figure 4.31 shows the simplified equivalent circuit of State 1. Similarly
to ZCS-MMSCC with continuous input current, there are also ten resonant loops in each

state, eight of them are connected with input voltage, and two of them are connected with

121

output capacitor. Different with ZCS-MMSCC with continuous current, there are only
equivalent circuits with one resonant capacitor or four capacitors in series. If the level is

increased, the capacitors in series will also be increased.

 

 

 

 

 

Figure 4.28 Simplified equivalent circuits of state I (a)

LS9 S Cs Lsus C6
_n'9+ —T)l'+—‘

  
   
  

Vin

lcq SP1] L315 +C7I SP10 L813
1—— FW—

Figure 4.29 Simplified equivalent circuits of state I (b)

 

 

 

 

 

 

 

Figure 4.30 Simplified equivalent circuits of state I (c)

122

L317 SR1 C9 L819 SR2 C10
__TIW I)|+

 

Vin
C12 SR4 L323 C11 SR3 L821

Figure 4.31 Simplified equivalent circuits of state I (d)
4.3..22 State 11 [t] -12]

 

Figure 4.32 shows the operation mode of state H with Sp and S 3 conduct.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

flux.)
-2 2.. “-u
1’. "' '.‘ I ;. ' .. 1
Ln...—' . 3...' “‘5‘: L.,..' T“"T’ ‘3’.‘2
‘ , . 1; ' .1 .— I - ; .
3:.1- t (.4.- b— ...; q . a...“ ~.....—-.-—-—-
J: ".-_; I 'L-II
on“? a- 12;}. {:4 .. .. .,.. ..
L. m- L .. . - t-..“
.- J 1 ' ' " 1 ’
7" .' ~ 1" ... Vu- ‘
.1- .- 1...:
.. . -4 AP! 1-.“ "1" ._.: ,_ ." 'i‘
3 . , ; .
..-.' ;._.; -_...
A A A

v v '

 

 

 

Figure 4.32 State 11 Sp and SB conduct.

123

When t = t1, the current through switches S B begin to increase from zero, and the
current through switches Sp begin to decrease from the maximum point, since Sp is
turned on since state I. When I =12 the current through switches S B reach the maximum

point. And the current through Sp resonate to zero and Sp turn off at zero current.

Figure 4.33 - Figure 4.36 shows the simplified equivalent circuit of State 11.

L2

    

 

 

 

 

 

Figure 4.33 Simplified equivalent circuits of state 11 (a)

LS9 S C5 148118 9 C6
_T)+ ”—7”?—

  
   
 

Vin

'Cfi SP1] 14315537l SP10 L813
l-—-/—db—-I(-—-/—db—'

Figure 4.34 Simplified equivalent circuits of state 11 (b)

 

 

 

Figure 4.35 Simplified equivalent circuits of state 11 (c)

124

L825 SBS C9 L527 839 C10
-—-,—)|;—4P—/——,—)|;—

Vin
(Eli S1311 L531 5313 SBlo L529
Figure 4.36 Simplified equivalent circuits of state 11 ((1)
4.3.2.3 State III [t2 — t3]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 4.37 State 111 SN and SB conduct.

Figure 4.37 shows the operation mode of state 111 with S N and S B conduct. Figure

4.38 - Figure 4.41 shows the simplified equivalent circuit of State 111. When t= 12, the

125

current through switches S N begin to increase from zero, and the current through
switches S B begin to decrease from the maximum point, since S B is turned on since
state 11. When t = t3 the current through switches S N reach the maximum point. And the

current through S B resonate to zero and S B turn off at zero current.

 

 

 

 

 

Figure 4.38 Simplified equivalent circuits of state HI (a)

C1 L53 SNz C2
fiW—fil'r

 

 

 

 

 

 

 

Figure 4.40 Simplified equivalent circuits of state 111 (c)

126

Lszs SBs C9 L327 SB C10
WWW—rib

Vin
$1: SBll L831 +Cl|1 S310 Ls29
1—7—ab—11—7—ab—
Figure 4.41 Simplified equivalent circuits of state 111 (d)
4...324 State IV [13 - t4]

 

Figure 4.42 shows the operation mode of state IV with S N and SR conduct. Figure

4.38 - Figure 4.46 shows the simplified equivalent circuit of State IV. All the Operation is

similar with the other states, the detail analysis will be omitted.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 4.42 State IV S N and SR conduct.

127

 

 

 

 

 

 

 

 

 

 

 

Figure 4.45 Simplified equivalent circuits of state IV (c)

128

L817 SR1 C9 L519 SR2 C10
-—.11.—=m—/——.—>1.—

V1

1C3} SR4 143235311 SR3 L321
1——/—a1=—1(——/—=u.—v

Figure 4.46 Simplified equivalent circuits of state IV (d)

 

4.4 Analysis of Input Current Ripple Reduction

4.4.1 ZCS-MMSCC type

Assume both converters are 500 W with 5 V input voltage, and all the components

are ideal

4.4.1.1 Traditional ZCS-MMSCC input current ripple calculation

Assume I in = A1 sin 6,6 6 [0, 7r] , Because [m_ave = 100A So,
% El Al sin 6d6 = 100 . A1 = 507! z 157 , the input current ripple Iin_l is

Iin_l = A1 =157A .The RMS value of the input current ripple

 

Iin_1_RMS =\/—17;K(507rsin6 ~100)2d0 , Iin~_1_RMS = 48.3/1 .

So, the loss of the input capacitor is Loss] = 1in_1_ R MSZ ~ESR

4.4.1.2 Improved ZCS-MMSCC input current ripple calculation
Assume [in = Bl sin 6,6 6 [7r / 4,37: / 4] , Because [m_ave = 100A So
2 3/r/ 4

E /4 81 sin6d6=100 ,. 31:507r/x/Ez111 ,the input current ripple [m_z is

129

 

. 72' . 7: 507: J2
[m_z =Bl(8m§-Slnz) :720—7) #32-5A. The RMS value of the input current

 

2 /4 507: .
ripple is Iin_2_M = J}; E; (Esme-1m)2d6,1in_2_RA/IS = 9.7A which is about

20% of Iin_l_R}l£S' .
So, the loss of the input capacitor is LOSSZ =I,-,,_2_RMg2 ~ESR . So the reduced

power loss ratio is Preduce.rati0 = LOSS2/LOSS1 = Iin_2_ M2 /I,-,,_1_ RMSZ = 4%

Hence, by using Four-phase interleaved strategy of improved ZCS-MMSCC, the
input current ripple RMS value is reduced by 80%, and Input capacitor ESR loss is
reduced by 96% which is a huge reduction. Much smaller capacitor bank could be

adopted; the converter efficiency and power density is improved significantly.

4.4.2 ZCS voltage multiplier type

4.4.2.1 Traditional ZCS voltage multiplier input current ripple
calculation

Assume [in = 3A2 sin 6 + A2 sin a,(6 e [0, 7r],a e [7r,27r]) , Because Iimave = 100A
2
So, £E3A2 sin 6d6 +-71;L”A2 sin 6d6 = 100 . A2 = 257: z 78.5 , the input current

ripple is [m_3 =3A2 =235.5A A. The RMS value of the input current ripple is

 

. _ l . _ 2 l 27! _ . _ 2
I,,,_3_RMS — fl” E(757:srn6 100) d6+ ”I” ( 257tsrn6 100) d6)/2 ,
Iin__3_RMS = 73.63A.

So, the loss of the input capacitor is Loss3 = I in__3_ RMSZ ~ESR

130

4.4.2.2 Improved ZCS voltage multiplier input current ripple
calculation
Assume Ii" = 32 sin 6,6 6 [7r / 4,37: / 4] , Because [m_ave 2 100A So,

2 37r/4

7r- /4 Bsin6d6 = 100. 32 = 507r/ J2 , the input current ripple is about 32.5 A. The

 

2 7t/4 5071' .
RMS value of the input current ripple is Iin_4_RMS‘ =J; EM (7—2-Sln6-100)2d6,

Iin_4_RMS = 9.7A which is about 13% of I;,,_3_RMg. So, the loss of the input capacitor

is Loss4=1m_4_RMg2 -ESR . So the reduced power loss ratio is

Reduce... = Lossz/Lossl = I.._4_M2/I.._3_M2 = 1.7%.

Hence, by using four phases interleaved strategy of improved ZCS voltage multiplier,
the input current ripple RMS value is reduced by 87%, and Input capacitor ESR loss is
reduced by 98.3% which is a huge reduction. Much smaller capacitor bank could be

adopted; the converter efficiency and power density is improved significantly.

4.5 Simulation and Experiment Results

4.5.1 Improved ZCS-MMSCC with continuous input current

Figure 4.47 shows the simulation results of a 500 W 5 V input 20 V output improved

ZCS—MMSCC with continuous input current waveforms. All the capacitors (C1~C16)
are 47 uF. Output capacitor C0 is 672 uF. L51,'LS5, L56 , L510, L511, L515, L516,

L320 are 108 RH, L52 ~LS4, LS7 ~LS9, L512 ~L514, L517 ~LS19 are 216 HH-

Switching frequency is 70.4 kHz. The input current maximum value is about 110 A, the

131

 

'lla' I h-

input current minimum value is about 77.8 A, so ripple current is 32.2 A, which is about
one fifth of the value of the non-interleaved version as calculated. The RMS value of the
ripple current is about 9.7 A which is also about 20% of the traditional ZCS-MMSCC.
Figure 4.48 and Figure 4.49 shows the experiment waveforms of a 500 W improved
ZCS-MMSCC with continuous input current prototype with the same parameter of

simulation.

132

 

 

 

 

.-.".--
V93_3" __-..."- .___..._._.._.._ ......-
Vgs_St -..-...... -_......_.-- ..- .... ..--..-
VOS.SP __.,- .__..__..__._,_- -..._...__.__
Vgs_Sb

J

 

 

 

 

6.0 0,,

 

 

I
.
I
i
|

200‘ . ,,,, . . .. ’7 .........

 

 

 

 

 

 

o.o 1‘
6.0 .

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3
g
(A) = 1(8)
F I_In
.. 000.0 NVWWVVW __.

 

 

 

(vmrs)
. , 1‘“
g 19.9.9 . . .' v » 1

..-.w-l.-m~\..h\-«~s~.N-Q’—\AN...:
19.8 ii... , __. , , _. ,_ .. -,,_,-, , 3..-

I '2 I: i s 3
9.929900 9.940010 9.951700 9.962611! 9.973510 9.9844": 1
t(s) i

 

 

 

 

 

 

”d Ic—-—~—

 

 

Figure 4.47 Simulation results of ZCS-MMSCC with continuous input current.

133

 

 
    

VGs_ SP
‘ (5 V/div)

M'Mfi ...... 1”"‘1

?_VDS Sp HAW—'—
(5 V/div):

 
     
 

ID_SP
(5 A/div) '

 

 
 

34(4 us/diV) ,

Figure 4.48 Switch voltage and current waveform.

 

 
   
 
 
 
 

   

VGs_SP
(5 V/div)

E VGs_SN

 

ID_SP :
(10 A/div):

 

 

. ID_SN . ,, ‘
C12. Qatari (10 A/diV) A: I; 1‘31,

    
 

 

 

Figure 4.49 two switches control signals and current waveforms.

134

4.5.2 Improved ZCS voltage multiplier with continuous input

current

Figure 4.50 shows the simulation results of a 500 W 5 V input 20 V output improved

ZCS voltage multiplier with continuous input current waveforms. All the capacitors (C 1
- C16) are 47 11F. Output capacitor C0 is 672 uF. All the stray inductance value are 108

nH (L51 - L532 ), Switching fiequency is 70.4 kHz. The average input current is 100 A.
The input current maximum value is about 110 A, the input current minimum value is
about 77.8 A, so ripple current is 32.2 A, which is about one seventh of the value of the
traditional ZCS voltage multiplier as calculated. The RMS value of the ripple current is

about 9.7 A. which is also about 13% of the traditional ZCS voltage multiplier.

135

 

 

 

VP
Vn
Vb
W

(V)

(V)

(A)

(A)

(A)

(V)

 

 

 

6.0

«o1-~-~-

2.0.

 

on.
so
1

4.0 1
2.0 1

0.0 J
30.0 ~

20.01 ~~

10.0100

 

on.
sun
1

. E

1
10.0

l

ao.------f

rsao1-¢-.-t-.
ioaol~ ‘-

50.0
0.0
19.9 .
19381
19.86 1

19.13“f

‘ ,.—.‘. ...—. 4... ~4-a---'.~- -~ 0». v.0 —.~.w.——.--.»——'-— —.~~-.-_.._ . -. ., __..--, .. __-.wa-.~.-_-—.- -.—.~—-v.»—o.0—- . 4 »~.—“ ..-.q-~--‘---- .,-.‘.—--..— -_‘—*—'o"'-fi~do—"~ .. ~.» - - "Mun—.1

 

 

I -.___. Y. -»v..-»,—..._-.-.. . .-.. -...-_-..-_.._-.._.. u-.....; --.--w._uo~- ........._.__..........—.._-.....-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L“ ‘ _ A‘_A _‘- -h-‘_-A

 

 

 

 

 

 

 

 

 

 

 

 

 

ssL2e-sgsaaI—xc_,rersgs22e~sc.4a’-¥~.;»*-4;;,»’~<c_,ze*~

 

 

.—._-—~-.-1-..qw-‘~———.--——w—r—0—.-. .. .---.--...4.- -.-......H-.—...—.—.---.‘.—M—.—.V'~.w_m.‘-u—m—.——-,-_—a_-m--v—m.u ---——-.—.—.-..——~.—....-..._-

I ’ l I l I l I

(V) : it!)
Vds_Sp

Vds_Sn

(V) : t(s)
Vds_Sb

LSD

(A) = K‘)
I_Sb

“(Anre)
t(shorwn)

.... -9,

 

(V) = t(s)
Vo

4.97355"! 4.9771m 4.98065!“ 4.9842"! 4.98775"! 4.9913!!! 4.99485"! 4.9984!!! 5.0019511:

t(s)

Figure 4.50 Simulation results of ZCS voltage multiplier with continuous input current.

136

 

4.6 Conclusion

In this chapter, a series of improved switched-capacitor dc-dc converter has been
proposed. An extra switch and a relatively big output capacitor are added into the
traditional ZCS switched-capacitor dc-dc converter to decouple the input voltage source
and the output. The output capacitor will not join the resonant anymore, and output
voltage ripple is reduced significantly. By interleaving four phases of improved switched-
capacitor dc-dc converters together, input current becomes continuous. The input current
ripple is reduced more than five times accordingly. The huge power loss related to the
input capacitor is minimized. The operation, analysis and features are illustrated.
Simulation and experiment result for a 500 W 5 V input, 70 kHz improved ZCS-MMSCC
with continuous input current prototype were shown to verify the operation principal. As
a result, the proposed improved ZCS switched-capacitor dc-dc converter with continuous
input current has smaller size, higher efficiency and higher power density. So they are

more suitable to the high power, high current automotive application.

137

WTSfI-flw To;

CHAPTER 5

Conclusion and Future works

5.1 Contributions

This work has the following contributions:

Electrical characteristics of TEG modules in steady state and high frequency are
proposed and modeled. The problems related to dc-dc converter design of TEG
modules in automotive application are addressed. The problems of traditional step-up
dc-dc converters and switched-capacitor dc-dc converters are summarized.

A quasi-resonant soft switching strategy of utilizing the distributed stray inductance
in the circuit for the switched-capacitor dc-dc converter is proposed. By using the
proposed sofi switching strategy, the high voltage and current spike of traditional
switched-capacitor dc-dc converter are reduced. The huge di/dt and dv/dt in the
switching transition and EMI noise are restricted. The huge capacitor bank to reduce
the voltage ripple and achieve high efficiency is eliminated.

A ZCS multi-level modular switched-capacitor dc-dc converter as the high input
current, high voltage gain interface circuit for TEG in automotive application is
proposed. This new converter includes the advantages of both zero current switching
and multi-level modular switched-capacitor dc-dc converter. Also this new converter
does not employ extra devices to achieve ZCS which increase the circuit reliability.

A family of ZCS switched-capacitor dc-dc converter for the automotive application is

proposed and analyzed. By using the proposed ZCS switched-capacitor dc-dc

138

 

converter, very high power density dc-dc converter operating at high temperature
could be made.

A family of improved ZCS switched-capacitor dc-dc converter with interleaving
capability is prOposed in order to reduce the input capacitor current stress by reducing
the input current ripple using interleaving strategy. By interleaving the improved ZCS
switched-capacitor dc-dc converter, a family of ZCS switched-capacitor with
continuous input current is achieved. Much higher power density with higher input

current rating switched-capacitor dc-dc converters could be made.

5.2 Recommendations for Future Works

More detailed theoretical analysis could be done to compare the traditional switched-
capacitor dc-dc converter and the ZCS version in terms of size, efficiency and etc.
The optimal design point of switched-capacitor dc-dc converter could be addressed in
terms of capacitance, stray inductance and switching frequency.

The ZCS switched-capacitor with voltage regulating capability could be investigated.
The stray inductance for the voltage regulation could be considered.

Other improvements of switched-capacitor dc—dc converter could be proposed, while
the device and the capacitor have the voltage stress, current stress for more
generalized high power operation.

The integrated version of switched-capacitor dc-dc converter working at higher
switching frequency around (200 kHz~500 kHz) with ZCS by utilizing the stray

inductance could also be investigated.

139

w“~tm ‘L_-¢.~
v~l

[1]

[2]

[3]

[4]

[5]

[6]

[7]

[81

[91

[101

[11]

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