ABSTRACT A COMPUTERIZED DIGITAL DATA ACQUISITION SYSTEM FOR ELECTROCHEMICAL EXPERIMENTS By Joseph Samuel Cardarelli A computerized digital data acquisition system is applied to cyclic voltammetry studies for the elucidation cf electrolysis mechanisms. To aid in understanding the computerized system, a general approach to the interfacing of a digital computer to laboratory experiments is presented. The basic logic gates, the interface components, and the features of data transfer within the interface are discussed and a very versatile interface which can be used to computerize virtually any measurement performed in a chemical laboratory is described in detail. To evaluate the efficacy of the computerized system for cyclic voltammetry experiments, the reduction of a group of sulfonephthalein indicators is investigated. The computerized system has resulted in vastly improved data collection and analysis capabilities for cyclic voltammetry experiments. Finally, the interactive use of computer in the laboratory is demonstrated by the computerization of classical polarography. A COMPUTERIZED DIGITAL DATA ACQUISITION SYSTEM FOR ELECTROCHEMICAL EXPERIMENTS By Joseph Samuel Cardarelli A THESIS Submitted to Michigan State University in partial fulfillment of the requirements for the degree of DOCTOR OF PHILOSOPHY Department of Chemistry 1971 ACKNOWLEDGMENTS The author wishes to express his appreciation to Dr. Richard S. Nicholson for his guidance and encouragement throughout this study. The author is grateful to the Socony Mobil Oil Company, the National Science Foundation, and the Department of Chemistry for financial aid. Special thanks go to the author's wife, Vibiana, for assistance rendered throughout the course of his graduate studies. Finally, the author wishes to express his appreciation to his parents, Joseph and Julia Cardarelli, for making possible the attainment of his education. ii TABLE OF CONTENTS Page I. INTRODUCTION ......................... l A. Background ........................ l B. Objectives and Contents of Thesis ............ 2 C. Description of the Minicomputer Employed ......... 3 II. BASIC LOGIC CIRCUITS ..................... 5 A. Binary Operations and Digital Logic ........... 5 B. Flip-Flops ........................ 5 C. The AND Gate ....................... 6 D. The NAND Gate ...................... 6 E. The OR Gate ....................... 9 F. The Inverting AND Gate ,,,,,,,,,,,,,,,,,, 9 G. The Inverter ....................... 9 H. More Complex Circuits and Functions ........... 9 l. The Device Selector .................. 18 2. The Bus Driver .................... 21 3. The Multiplexer ................... 21 4. The Analog-to-Digital (A/D) Converter ........ 21 5. The Digital-to-Analog (D/A) Converter ........ 29 III. INTERFACE AND INSTRUMENTATION ................ 33 A. Cyclic Voltammetry .................... 33 B. Requirements for the Interface .............. 37 C. Data Transfer with the PDP-B/I .............. 38 l. The Input/Output Skip Facility ............ 38 2. Transfer of Data by the PDP-B/I ........... 39 D. The Actual Interface ................... 40 E. Versatility of the Interface ............... 45 F. Analog Instrumentation .................. 46 G. Electrochemical Cell ................... 50 H. Chemicals ........................ 55 IV. CONTROL OF THE INTERFACE [IA_SOFTNARE ............ 56 A. The Role of Software ................... 56 8. Programming Minicomputers ................ 56 C. The Software Created for Cyclic Voltammetry ....... 6l 1. Basic Considerations ................. 61 2. Dynamic Scan Rate Range ............... 61 iii 3. Data Display ..................... 63 4. Background Corrections ................ 70 ' 5. Data Analysis .................... 75 6. The Entire Software Package ............. 80 V. EVALUATION OF THE SYSTEM ................... 87 A. Introduction ....................... 87 8. Performance with a Dummy Cell .............. 87 C. Standard Chemical Systems ................. 88 1. Reduction of Cadmium ................. 88 2. Reduction of Thallium ................ 94 3. Reduction of Sulfonephtha1ein Indicators ....... 99 VI. COMPUTER CONTROLLED CLASSICAL POLAROGRAPHY .......... 106 A. Introduction ....................... 106 8. Classical Polarography and Possible Approaches ...... 106 1. Control and Acquisition of Data ........... 107 2. Data Display ..................... 113 3. Data Analysis .................... 114 C. The Software Package for Classical Polarography ..... 117 0. Discussion and Evaluation ................ ll7 VII. CONCLUSION .......................... 123 REFERENCES ............................. 124 APPENDICES ............................. 127 A. Logic Print of the Interface ............... 127 8. Software for Cyclic Voltammetry ............. 129 iv LIST OF TABLES Table Page I Program Segment for Analog-to-Digital Conversion ...... 59 II Computer Output of Current versus Potential for Aqueous CdSO4 in 0.10 Molar Na2504 at 20 Volts/second ........ 68 III Computer Output Illustrating the Disproportionation Rate Constants for Five Sphericity Factors ........... 81 IV Example of Computer Teletype Dialogue ........... 86 V Sulfonephthalein Indicators ................ 101 VI Rate Constants of Sulfonephthalein Indicators ....... 105 VII Sample Teletype Listing During a Computer Controlled DME Polarography Experiment .................. 121 LIST OF FIGURES Figure 1. Symbol and truth table for the AND gate ........... 2. Symbol and truth table for the NAND gate .......... 3. Symbol and truth table for the OR gate ........... 4. Symbol and truth table for the Inverting AND gate ...... 5. Symbol and truth table for the Inverter ........... 6. Basic elements of the device selector ............ 7. Logic diagram for the Bus Driver ............... 8. Circuit diagram for the Multiplexer ............. 9. Circuit diagram for successive approximations analog-to- digital converter ...................... 10. Circuit diagram for a digital-to-analog converter ...... lla. Variation of electrode potential with time for cyclic voltammetry ......................... llb. Cyclic electrolysis current for reversible charge transfer. . 12. Block diagram of the programmed data transfer facilities of the PDP-8/I ......................... 13. Block diagram of the interface ............... 14. Circuit diagram of the instrument .............. 15. Photograph of outside panel of instrument .......... 16. Electrochemical cell .................... l7. Illustration of the oscilloscopic display system ...... 18. Illustration of the oscilloscopic display system ...... 19. Charging current correction for a cyclic voltammogram . . . . 20. Blank data collected and displayed by the computer ...... vi Page 8 11 13 15 17 19 23 25 28 32 35 35 42 49 52 74 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. Example of computer displayed diagnostic plot of Ip/v 1/2 vs, 1n (v) .................... 77 Cyclic voltammogram illustrating locations of IC, the cathodic peak current; IA, the anodic peak current; IS, the switching current ..................... 79 Flowchart of DSEP, the main cyclic voltammetry program, and K20, the disproportionation rate constant program ..... 83 Cyclic voltammogram for the reduction of cadmium ..... 90 Blank correction of cyclic voltammogram for the reduction of cadmium ........................ 93 Cyclic voltammogram for the reduction of thallium ..... 96 Plot of computer diagnostic data for a cyclic voltammetry experiment ........................ 98 Computer diagnostic plots for cyclic voltammetry experiments of sulfonephthalein indicators .............. 104 Potentiostat for computer controlled classical polarography ....................... 109 Effect of spurious noise on dme current ......... 112 Sample display of computer controlled dme polarography . . 116 Flow chart for computer controlled dme polarography . . . 119 vii I. INTRODUCTION A. Background Although use of the so-called minicomputers in chemical laboratories is still in the embryonic stage, it seems safe to predict that the minicomputers are going to revolutionize nearly all chemical instrument- ation. Indeed, there already are popular examples, such as Fourier transform nmr and far-infrared Fourier transform spectroscopy, which cogently attest to the truth of this statement. Because of a strong conviction of the accuracy of the foregoing remarks and this laboratory's interest in electrochemistry, this thesis is devoted primarily to an electrochemical application of a minicomputer. Although most of the work described herein is believed to be original, this thesis by no means describes the first application of minicomputers to electrochemical instrumentation. Indeed, electrochemists were among the first chemists to use digital computers in the laboratory, and therefore there already exists some electrochemical literature in this area. Predictable, the first effort was by Glen Booman, prior to the general availability of minicomputers (1). As minicomputers became available at reasonable cost, several electrochemical laboratories reported exploratory applications in on-line control of experiments and acquisition, and analysis of data (2-8). In a recent application (9) a minicomputer was used to overcome in real time nonideal experimental conditions in stationary electrode polarographic measurements. The computer was able to modify the course of the l 2 experiment based on the nature of continuously monitored output. The computer was programmed to interrupt the linear voltage sweep after detection of each reduction step in order to dissipate the reducible species in the diffusion layer and minimize interference with succeeding reduction steps. This example, although fairly simple, is a good illustration of the way a minicomputer can control an experiment in an "intelligent" and interactive fashion. 8. Objectives and Contents of Thesis A major objective of the research undertaken for this thesis was to evaluate the efficacy of using a minicomputer for cyclic voltammetry experiments, and elucidation of electrolysis mechanisms. The hardware and software developed for this purpose are unique, and, as will be shown, have resulted in some significant improvements in the acquisition and interpretation of cyclic voltammetry data. The first chapters of this thesis are devoted to the hardware and software that have been developed, with the last chapters devoted to chemical applications of the computerized system. Since computer hardware, digital electronics, and interfaces are the essence of logic, the average chemist, once provided with appropriate background material, can easily understand the design and operation of a computer interface. Because of this fact and a belief that in the future chemists will have to possess some understanding of laboratory computers, Chapter II of this thesis is devoted to topics necessary to equip the reader with the background material required to understand the interface presented in Chapter III. Chapter IV then deals with software (programming), first illustrating how the interface can be controlled yia_software, and then specifically describing the software that was written to perform the cyclic voltammetry experiment. Chapter V is devoted to evaluation and 3 application of the computerized instrumentation to several chemical systems. Finally, results of some preliminary studies of computer controlled polarography are presented in Chapter VI. C. Description of the Minicomputer Employed Many minicomputers are now commercially available. In general, each of these has different features and characteristics. Although awareness of all of these nuances is not required to understand the remainder of this thesis, it is appropriate to describe the most salient features of the computer that was used. The computer is a Digital Equipment Corporation Model PDP-8/I. The PDP-8/I is general purpose computer using TTL (transistor -transistor- logic) integrated circuit modules and parallel data transfer. The PDP-8/I is organized into a central processor, a core memory, and input/ output equipment facilities (10). Word size is fixed at 12 bits (binary digits), and core memory capacity for the machine used here is 8192 words. The machine operates in the binary number system and is capable of programmed arithmetic operations based on two's complement operations. By convention, the 12 bits are used to represent directly the numbers between -2048 and +2047. For expression of larger numbers, two 12 bit storage locations (double precision) can be used to represent directly the numbers between -8,388,608 and +8,388,607 or three 12 bit storage locations (triple precision or floating point) can be used to represent numbers between 0.999999E-615 and 0.999999E+615. The peripheral devices for the system used here include a teletype, a high speed paper tape reader and punch, and a magnetic tape unit. The computer's operations can be programmed either in machine language, a mnemonic language, or a language such as FORTRAN. Bussed interface connections to the central processor and various input/output features 4 are available for design of specific interfaces such as the one developed here. Specific features of programmed data transfer in the PDP-8/I used to develop this interface are described in Chapter III. II. BASIC LOGIC CIRCUITS A. Binary Operations and Digital Logic The circuits and computer operations to be described are based on the binary number system, which is a set containing two elements, one (1) and zero (0). Sometimes these two elements also will be referred to as high (1) and low (0), and in a logical sense (e.g., truth tables) high will correspond to "true" and low to “false". In electronic circuits the two states can be represented in many ways, for example a light on the console being on (1) or off (0), or a switch being up or down. Within the computer the two states are most frequently represented by voltage "levels", and in a computer with TTL circuits (such as the PDP-8/I, vide supra) specifically by a positive voltage greater than three volts gs, ground being high (binary l), and a ground potential (< 0.2 V) being low (binary 0). Although ideally suited for electronic circuitry, the binary number system is often cumbersome to use in writing. Hence, other systems are frequently employed as shorthand, and that procedure will be adopted here, with subscripts to identify the modulus (e.g., 9 = 10 118 = 10012). B. Flip-Flops The so-called flip-flop is a common circuit element which possesses the property of having only two stable output states - i.e., for TTL circuits the output of a flip-flop is either +5 volts, or 0 volts. 5 6 Moreover, the output of a flip-flop can be caused to change states (or "flip") by an appropriate signal (voltage) at its input. These properties of the flip-flop make it a convenient device for storing a single bit of information. Hence, a flip-flop can be set to the high state (+5 V), and until intentionally changed will save that binary 1 (remain at +5 V). Correspondingly, a set of twelve flip-flops can be used together to represent a single 12-bit word of information - for example, if all twelve flip-flops are set to the high state, they will store the word (number) 111 111 111 1112 (= 77778 = 409510). In fact, twelve such flip-flops constitute the memory element in the accumulator of the central processor of the PDP-8/I (such a group of flip-flops is often referred to as a register). C. The AND Gate The simplest digital logic circuit is the AND gate, so called because it performs the electrical analog of the logical operator, AND. Hence, the AND gate functions according to the truth table contained in Figure l. The AND gate's output is low (0 or false) unless both of its inputs are simultaneously high; then and only then is the output high (1+ 3 V)- The most commonly used symbol for the AND gate is shown in Figure 1. Of course, it is possible for an AND gate to have many inputs; in that case, the output is high if and only if all_of the inputs are high. 0. The NAND Gate This acronym comes from Not ABE, and thus its operation is obvious: the NAND's output is high unless all_inputs are simultaneously high, in which case the output is low. Figure 1. Symbol and truth table for the AND gate AND GATE INPUT OUTPUT SIDE SIDE A F B ——1 ‘MINPUT OUTPUT,“ A B F L L L L H L H L L H H H 9 The truth table and common symbol for the NAND gate are given in Figure 2. E. The OR Gate According to the truth table in Figure 3, the 0R gate's output will be high if either or both inputs are high, otherwise the output is low. The common symbol for the OR gate is also included in Figure 3. F. The Inverting AND Gate It can be noted from Figure 4 that the truth table for the so—called inverting AND gate is identical to that for the OR, and therefore the two circuits have identical logical functions. The common symbol for the inverting AND gate is included in Figure 4. G. The Inverter The inverter circuit shown in Figure 5 is included here partly for completeness, but also because it appears ubiquitously throughout the interface. The inverter's output is simply the opposite of its input. H. More Complex Circuits and Functions The basic elements above can be used in combination to provide the necessary control and communication between the experiment and computer that constitute the interface. Although in general each interface is unique to a given situation or application, some subsections are common to nearly all interfaces. Thus, to understand the interface described in the next chapter, it also is necessary to understand some of these more complex building blocks, such as digital-to-analog converters and device selectors. 10 Figure 2. Symbol and truth table for the NAND gate ll NAND GATE INPUT OUTPUT SIDE SIDE INPUT OUTPUT I I I" I" D I I" I l" l" I I I ‘11 12 Figure 3. Symbol and truth table for the OR gate 13 OR GATE INPUT OUTPUT SHDE SIDE A F 5 INPUT OUTPUT A a F L L L L H H H L H H H H 14 Figure 4. Symbol and truth table for the Inverting AND gate 15 INVERTWNG AND GATE INPUT OUTPUT SHOE SIDE A—o F B__*43 INPUT OUTPUT I I I" I" D I I" I I" I I I I" '71 16 Figure 5. Symbol and truth table for the Inverter 17 INVERTER INPUT OUTPUT EHDE EHDE A.___{) F INPUT OUTPUT A F L ; H 18 l. The Device Selector. To function usefully the computer must be able to communicate with several so-called peripheral devices (the experiment, the teletype, etc.). The only means of communication for a computer is by voltage pulses (so~called input-output pulses, or simply IOP pulses), and therefore some method must be used to insure that an IOP pulse reaches only a single device (e,g,, the teletype, but not the experiment). The feat is accomplished readily with an interface element called the device selector. Each peripheral device is identified by a unique six-bit code (note, therefore, one can have 26 or 64 different peripheral devices) and, when communication is desired, the program places this six-bit code in a special register (six flip-flops referred to as the memory buffer register). In essence, the device selector decodes the contents of this register, and routes an IOP only to the peripheral device that was coded. (Greater details of this operation are given in Chapters III and IV.) The basic elements of the device selector are shown in Figure 6. The gate, G1, is an AND gate, and therefore the output is high only when all six inputs are high. Thus, hardwire connections are made from the memory buffer register (and its complement which is simultaneously available), so that the six inputs to 61 correspond uniquely to the peripheral whose code appears in the memory buffer. The output of G1 is sampled by the NAND gates, 62, G3, and G4, and compared to the source of IOP pulses within the computer. In the event that an IOP pulse has been generated at the same time the proper code appears at the input of GI, an output pulse (just like an IOP, but now involving an input-output transfer, and therefore called an IOT) appears at the output of the NAND 19 Lopumpmm m0w>mv as» we mucwsm_w uwmwm .m mczmwm 20 3 .ATHADIJ mac. 5 . no m .8. mo , 8 t9 - l0. 3 Epsom 4mm MQSMQ NI.” /1 llllII 21 gate. [The POP-8/I can generate three different IOP's and therefore the device selector shown in Figure 7 contains three NAND gates. Inverters are included on the output of the NAND gates so that the interface designer has both the IOT and its complement at his disposal.] In summary, if, for example, 000 0012 (code for the teletype) appears in the memory buffer register flip-flops at the same time that the computer generates an IOP, then an IOT reaches the teletype (causing it to type a character, for example), but no IOT's reach any of the other peripheral devices. 2. The Bus Driver. Another common interface element which is referred to as the bus driver, is shown in Figure 7. This device is used to transfer data in parallel - 1,g,, 12 bits simultaneously. Since in the PDP-8/I a word is 12 bits, the bus driver consists of twelve inverting AND gates whose outputs are low when both inputs are low. By hardwiring one input in common between all twelve gates (see Figure 7) a data transfer results whenever this common or enable input goes from high to low (+3 V to ground). (The bus driver is also known as a signal gate.) 3. The Multiplexer. The multiplexer depicted in Figure 8 is simply a single pole, four position switch that can be operated electronically. The switches (basically FET transistors) are connected to a series of AND gates, so that coded inputs to the AND gates can be used to select uniquely the "switch position". The multiplexer shown in Figure 8 is used to switch analog signals into the A/D converter. 4. The Analog-tO-Digital (A/D) Converter. The use of transducers is commonplace in the chemical laboratory. The standard transducers are devices that convert some property (temperature, pH, etc.) to a proportional 22 Figure 7. Logic diagram for the Bus Driver 24 wampgwp_:z mcp Lo; Emcmmwu uwzogwo .m wczmwm 26 voltage which can in turn be read, plotted, etc. To make a digital computer a useful laboratory instrument a similar transformation is needed, namely the conversion of voltages (derived, for example, from the above transducers) into a digital equivalent. [In this case the term digital equivalent means a set of twelve flip-flops whose outputs of +3 V or O V correspond to the numerical equivalent of the input voltages.] The device which accomplishes this conversion is called an analog-to- digital converter. (Some transducers such as photomultiplier tubes and geiger tubes may already produce a digital output and thus will not require analog-digital conversion.) Since A/D converters are common to nearly every laboratory interface, it may be useful to describe briefly the way in which an A/D converter works. Actually there are many approaches to A/D conversion, and therefore only the successive approximations type used for this research will be described (Pastoriza, Model ADC 12 U, see Figure 9). A/D conversion by successive approximations is exactly analogous to weighing an object with a series of standard weights on an analytical balance. Thus, for a twelve bit A/D converter, twelve standard voltages are generated internally with precision resistors and then switched sequentially into the comparison amplifier, which also receives the input voltage (see Figure 9). The output of the comparison amplifier determines whether the reference voltage is greater or less than the input voltage, and thereby determines whether a given weighing voltage is left connected. The first comparison involves the largest standard reference voltage, and therefore corresponds to the most significant bit. Each succeeding reference voltage is then tested with the corresponding bit set high if the reference voltage is less than the input voltage, and set low if the reference voltage is greater than the input voltage. Since each of 27 3 NF uo< ~mnoe mNPLoumma .meLm>coo quwmvaop-mochm mcowumewxocaam m>wmmmou=m com Emmewu uwzucwu .m acamwm 28 29»on 2.8.. T0 E «3.58 85:03 TllozZOO — «do: I 24... — 92 3:3 JOKPZOO mmd mm: mmcmhm N. IIIIIIIIII N _ . I H I 4. .m!< £200 FDA—z. 2253 8.2.2 , mmbmm>zoo 4 ocoo mopmcmiopIFmpwmvu a Low Emcmmwu pwzucwu .o_ at=mea 32 (Xena! 4:53 / \ I wto «to :8 I Paaz_ 5.559. 33.85 5.2. uncut." ozaoco 3.2.2 — I 326 23.. , I Pampao 1* r 3.2;: Wo. ............ .2. _ I x5352 585 2298.5 I _Iuo§om I wozucmumx- Kuhmm>zoo 00.326, I 43:65 III. INTERFACE AND INSTRUMENTATION This chapter deals with the interface that was designed to provide data transfer and general two-way communication between the experiment and the computer. In designing the interface, the primary consideration was, of course, computerization of cyclic voltammetry; a secondary consideration, however, was to have the interface be of such general utility that other techniques could be computerized merely by changes in software (cf. Chapter IV) rather than changes in hardware. To understand the requirements of cyclic voltammetry, some familiarity with the technique is naturally required. Hence, for the sake of completeness, a brief description of cyclic voltammetry will be given prior to discussion of the interface itself. A. Cyclic Voltammetry Basically, cyclic voltammetry involves recording current at a stationary electrode as a function of an imposed potential that varies as a triangular wave (see Figure 11a). Consider a substance, 0, that can be reduced electrolytically to R; further assume that this reaction is reversible, and that the standard potential is E°. Then, at the beginning of a cyclic voltammetry experiment (t = O), the stationary electrode is initially at a potential, g1, which is very anodic of E3, so that no reduction of O to R occurs. Next, the potential is caused to vary linearly with time in a negative (reducing) direction. At time t_= A (cf. Figure 11), the direction of the linear scan is reversed (the rate of change of potential, 2, is held constant). 33 34 Figure 11a. Variation of electrode potential with time for cyclic voltammetry Figure llb. Cyclic electrolysis current for reversible charge transfer EIi) Current Electrolysis 35 i=0 fax tszx 120 60 0 -60 n(E-E°) Figure llb 36 Figure llb shows the variation of electrolysis current during the course of the potential variations just described. During the first leg of the triangle electrolysis current increases from zero, reaches a maximum (peak) and then decreases, this decrease resulting from depletion of O in the vicinity of the stationary electrode. Next, during the second leg of the triangle, the stationary electrode becomes more oxidizing, and consequently the R formed near the electrode is oxidized back to the starting material, 0. The current for the R_+ Q_portion of the current potential curve exhibits a minimum for reasons analogous to those described above for the cathodic maximum. In reality, Of course, most electrolyses are not as simple as the one discussed in connection with Figure 11. The most common complications are involvement of 0 or R (or both) in chemical reactions. For example, experiments described later in this thesis involve systems where the initially formed product of electron transfer (R) is chemically unstable, and spontaneously disproportionates. This complication leads to enhancement of the cathodic (reduction) peak current and simultaneous diminution of the anodic (oxidation) current. An extremely important feature of cyclic voltammetry is that complications such as these are easily and systematically detectable. There are basically three reasons for this. First, the experiment permits direct observation of both reactants and products (cf. polarography, where in general only reactants are observed directly). Second, the rate of voltage scan, 3, or really the duration of the experiment, can be varied over a wide dynamic range (ca. six orders of magnitude). This means, for example, that curves can be recorded in times much less than, comparable to, or much greater than the half-life of many coupled chemical reactions (such as disproportionation, vide supra). And third, theory for cyclic voltammetry has provided guidelines for the systematic 37 analysis and interpretation of cyclic data obtained with large ranges of scan rates. For example, one of these so-called diagnostic criteria (13) involves a plot of peak current divided by the square root of scan rate 1;, scan rate. In this case deviations from a horizontal line are indicative of chemical complications, and the morphology of the deviations is predictive of the exact type of complication (13). Hence, of the modern electrochemical techniques cyclic voltammetry is among the most useful and widely employed, and for these reasons the one on which this thesis focuses. More comprehensive discussions of cyclic voltammetry are available in the literature (13-53). B. Reguirements for the Interface The minimum requirements are that the computer be able to: (l) recognize (or cause) the start of a cyclic voltammetry experiment; (2) digitize and store values of cell current and potential; (3) operate for a wide and arbitrary range of scan rates; and (4) display the collected data rapidly and in convenient form. Of course, once stored in the computer a number of calculations can be performed on the experimental data. Based on these requirements, it is clear that the interface must include an A/D converter, and since at least two variables need to be digitized, the input to the A/D must be multiplexed (cf. II.H.3). [In principle two A/D converters could be used, but in practice that is seldom done since A/D converters are expensive compared with multiplexers.] Also, D/A converters that permit plotting of data stored in the computer's memory will be required. Finally, the interface must provide for controlled twg:_ay_transfer of data and information. These data transfers are described next, followed by a description of the actual interface. 38 C. Data Transfer with the POP-811 In general, three types of communication are required. The computer must be able to request a peripheral device to begin performing, the peripheral must be able to tell the computer when it has finished its task, and data (i.e., twelve bit words) have to be transferred (i.e., from peripheral to computer, and vice versa). The communication of commands from the computer to a peripheral already has been described in connection with the device selector (cf. II. H. 1). Communication of the peripheral's status involves use Of a skip facility, which is described next. 1. The Input/Output Skip Facility. In general, the computer can service (or be serviced by) only one peripheral at a time. Since execution of computer operation is usually very rapid (of the order of microseconds) compared with operation of a peripheral (of the order of seconds for a teletype), it is essential that the computer be informed when a peripheral has completed its task. Thus, each peripheral has a so-called busy/done flag (actually a flip-flop), which is in one logic state (low) during its operation, and the opposite logic state (high, or "the flag is up") when the operation is completed. The computer makes use of this flag yja_the skip facility. 0n the PDP-8/I this skip is a bus (connection) which, if driven to ground, will cause the computer to skip unconditionally the next instruction encountered in the current program sequence. This feature permits the testing of a peripheral's status as follows. First, the peripheral's busy/done flag is connected to one input of a NAND gate, whose output is connected to the skip bus. The other input of this NAND is connected to the output of a device selector (and hence to an IOT whenever the particular device's code 39 appears in the memory buffer register and a computer IOP is generated - see discussion under II. H. 1.). The program sequence is as follows: 1. Check the peripheral's flag and skip if it is up 2. Go back one instruction 3. Continue with the program During instruction 1, an IOT reaches the input of the NAND gate referred to above, but the output of the NAND gate stays high if the peripheral device has ggt_comp1eted its operation (its flag is down, or low). Hence, the computer moves on to instruction 2, which quickly (in about 1.5 microseconds) sends it back to check the peripheral's status flag again. If this time the flag is up (high) when an IOT from the device selector again reaches the other input of the NAND, the output goes low, driving the skip bus to ground, and causing the next instruction to be skipped. Since the next instruction is 2, the program gets out of its tight check loop, knowing that the peripheral has completed its task, and the computer is free to communicate with other peripherals. The final type of communication referred to above is the two-way transfer Of data, or words; this topic is discussed below. 2. Transfer of Data by the PDP-8/I. Computer controlled data transfers all take place through the special twelve bit register called the accumulator. The reason for this is that under program control, 40 data can be brought from the core memory to the accumulator, and similarly a word in the accumulator can be stored in core memory. Hence, for example, if the result of an A/D conversion can be placed in the accumulator, as a twelve bit word, then this datum can be transferred under program (software) control to core and saved. The interface, then, must accomodate the step involving transfer of the word from the A/D to the accumulator. This transfer is achieved as follows. The outputs of the A/D are connected through a set of level converters (inverters — see II. G.) to the input of the bus driver described earlier (II. H. 2.). Then, just prior to data transfer the accumulator is cleared (all twelve flip-flops are set to zero, or low, 113_a microinstruction - see discussion in Chapter IV). The so-called accumulator input bus will now transfer a logic level one to the accumulator whenever the corresponding accumulator input bus connection is driven to ground. Thus, if the enable input of the bus driver is made low by an IOT from the appropriate device selector, all other low bus driver inputs (recall the presence Of the inverters) will result in binary ones being transferred to the accumulator. High inputs to the bus driver during this operation result in zeros being transferred to the accumulator. For data transfer from the accumulator to a peripheral (such as a D/A converter), the desired word from core is placed in the accumulator (yja_software - see Chapter IV), and then, by essentially the reverse Of the above process, transferred to the peripheral. The three types of communication just described are summarized pictorially in Figure 12. D. The Actual Interface The actual interface that was finally designed for cyclic voltammetry is shown as a block diagram in Figure 13; a detailed logic print of the interface constitutes Appendix A of this thesis. 41 H\m-aoa mcp yo mmwpwfiwomm cmmmcmcp mumn umEEmLmoca mcu mo EMLmen xOOFm .N_ ULSSLL 42 >._._..=o¢02u2 >102w3 ucoo ~\m QQQ thWZth $36 QMEEQQOOQQ 43 mommLmHCw any we Emcmmwu xoopm .m_ mesmem 44 3.5.. 2325. :2...» 35323 ] 3......238 .33 3.32.... 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A photograph of one of these oscilloscope plots was shown in Figure 2l. Although this plot is relatively uninteresting, it suggests a reversible reduction uncomplicated by coupled chemical reactions (which is, of course, well known to be the case for cadmium). 2. Reduction of Thallium. As an example of a one electron reversible electron transfer, TlN03 in an aqueous electrolyte was examined. A typical cyclic voltammogram is shown in Figure 26 (points). Also included in Figure 26 is a theoretical stationary electrode polarogram (solid line) calculated from literature data for a reversible one electron transfer reaction. Again, the theoretical data were placed arbitrarily on the potential axis to coincide with the experimental peak potential. The experimental fit with theory corresponds to an apparent half wave potential of -0.475 V gs, S.C.E. which agrees well with the literature value of -0.48 gs, S.C.E. (6l). The experimental A E of 62 mV also agrees well with the P theoretical value of 59 mV for a reversible one electron reduction. To illustrate that the diagnostic plots displayed by the computer are also indicative of the number of electrons involved in the reduction, Figure 27 includes computer acquired diagnostic plots for both the reduction of cadmium (II) (curve A) and the reduction of Thallium (I) (curve B). The fact that thallium(I) also is reversible and uncomplicated, but involves only one electron, is clearly evident. 95 Figure 26. Cyclic voltammogram for the reduction of thallium. Line: theoretical Points: experimental Scan rate: 5 V/sec Electrolyte: l M. NaOH 96 «.30., ..m.o.m .m> m OED I 00 .0. 00.0.. 0' .0I Onén _ _ A _ oo oo o o .. O 100‘ O O O O 00 I O .J O 0 ll 0 O 0 O O OO O O 00 OO 000 O 0 000 O IJOO. loo. 01!‘| 97 Figure 27. Plot of computer diagnostic data for cyclic voltammetry experiments. A: CdSO4 in 0.05 M. Na2504 B: TlN03 in l M. NaOH 98 0.0. 0.. 9.0 m 0000000 0 0000000 0 0 4 00000000 0 00000000 0 0 _.0 N6 m6 (‘Z/l) A/d' v.0 m6 99 The tremendously improved quality and accuracy of the computer acquired data have been alluded to elsewhere in this thesis. Here, it is pertinent to point out that a plot of the type of Figure 2l would require about l00 man-hours to reach fruition under conventional methods of data acquisition and analysis, whereas with the computerized system a plot such as Figure 2l can be obtained in about four man-hours. 3. Reduction of Sulfonephthalein Indicators. This laboratory has recently been interested in the reduction of sulfonephthalein indicators. In particular, the reduction of phenol red was studied very extensively by Kudirka, and the reduction mechanism shown unequivocally to be (62): 0‘ OH OH + H (I H c+ ZHO-Q—c-t +Ie :HOQ—C. 0’ @305 @305 @803 (lo) (I) (II) ()H (3H .. _. _ (lb) HoG’gj/sg+|e _ HOG—$03 (II) (III) 100 F’ ()H "I (3" OIH (ll) ‘" (III) 0.1 0!! (Id) H0< >._c + "T -o HO-< >'—C-H @30- 63°53 3 (III) (IV) Kudirka also measured rate constants for Reaction lc using both electrochemical and nonelectrochemical methods. Kudirka obtained other extensive electrochemical data for phenol red to elucidate the mechanism according to the theory of Olmstead and Nicholson (52). Kudirka studied several other sulfonephthalein indicators in addition to phenol red, but much less extensively. In particular, no diagnostic plots were reported (although diagnostic data over small ranges of scan rates were reported), and in several cases he assumed a disprOportionation mechanism on the basis of classical polarographic data (62). The computerized system was therefore used to confirm the mechanism for reduction of the four indicators listed in Table V. lOI z a?» :nom o co - can n z u 0 so ”3303; .v ..0. :AV :.v v.. :nv n O ..m ..u apnea; Pommgoosocm umm —o-mmogxmoeogm uncaoasoo :nom _ :nom o ‘/ :fl.\ u . ”mgzpuacum :o 0 go .0 com Foamsnogopgu umm Focmcm nucsousou mcoumuwncH :_mpm;p;amcomF:m .> mpnmh 102 Of these, phenol red is the only one studied extensively by Kudirka; bromopyrogallol red has not been studied previously. The experimental approach was exactly the same as described above for cadmium and thallium, except that the total range of scan rates was different for each compound. The diagnostic data generated by the computer for each compound are shown plotted on the same graph in Figure 28. The morphology of these plots is precisely that expected for a disproportionation (52), and therefore it can be concluded that the general mechanism for reduction of each of these compounds is the same as for phenol red. Moreover, the fact that each of the curves is displaced along the abscissa reflects the fact that the rate of disproportionation is different for each compound. Indeed, the position of the curves for phenol red, chlorOphenol red, and bromocresol purple is consistent with the rate constants reported by Kudirka. In addition to obtaining diagnostic plots for each compound, the software described earlier (Section IV. C. 5.) was used to calculate rate constants for the disprOportionation reaction. These rate constants obtained from the computer are listed in Table VI together with values reported by Kudirka. The agreement is satisfactory and within the larger experimental error associated with Kudirka's measurements for fast scan experiments. The rate constant for bromopyrogallol red has not been reported earlier, but the value in Table VIis consistent with the structural differences between this molecule and phenol red. Figure 28. 103 Computer diagnostic plots for cyclic voltammetry experiments of sulfonephthalein indicators. l: Phenol red Chlorophenol red Bromopyrogallol red wa Bromocresol purple 104 0.00. 0.. ..0 0.. (Z/IIA/d' , 0.N 105 Table VI. Rate Constants of Sulfonephthalein Indicators Compound Rate Constant,a Literature,b M'I-sec'] M'I-sec'1 0 p = 6.25 Phenol Redc 0.341 E + 03 0.384 E + 03 0.337 E + 03 Chlorophenol Red 0.220 E + 04 0.250 E + 04 0.113 E + 04 Bromopyrogallol Redd 0.145 E + 05 0.154 E + 05 -- E Bromocresol Purpled 0.190 + 07 0.212 E + 07 0.20 E + 06 The sphericity factor was not determined for the electrode used in these experiments. Thus, rate constants are listed for a planar electrode (p = 0) and for a large spherical correction (p = 6.25) to indicate the magnitude of error involved with ignoring effects by sphericity in this case. b Reference (62). Bromopyrogallol red has not been studied previously. Aqueous solution, 0.20 M. acetic acid, 0.20 M. sodium acetate. pH = 4.8. d 25% (by weight) methanol-water, 0.10 M. citrate buffer, pH = 4.8. VI. COMPUTER CONTROLLED CLASSICAL POLAROGRAPHY A. Introduction The major objective of the thesis research was to develop and evaluate the computerization of cyclic voltammetry. Nevertheless, since classical (dropping mercury electrode) polarography is a useful adjunct to cyclic voltammetry, some preliminary work on computerization of classical polarography also was carried out. This work suggests some major advantages for computerized polarography; moreover, the approach developed illustrates the interactive use of a computer wherein the computer not only collects data, but actually controls the experiment. Hence, although preliminary in nature, this work is of sufficient interest that the results are included in this thesis. B. Classical Polarography and Possible Approaches As is well known, polarography involves measuring the current voltage curve for a dropping mercury electrode (dme). In principle, the technique requires potentiostatic measurements of current, but usually in practice the potential is scanned so slowly (l-5 mV/sec) that potential during the life of a single drOp is effectively constant. Hence, the experiment is controlled by the computer through use of a D/A converter to provide the applied potential. Obviously, a number of approaches are possible; the one described here was adapted in part because it requires no modification of the hardwire interface described earlier. (This fact further illustrates the versatility achieved by using software to control operation of the interface.) 106 107 l l. Control and Acquisition of Data. The simplest approach is to use one of the two D/A converters in the interface to apply the desired potentials to the dme through a potentiostat. In this way, the computer steps the potentials through the polarogram so that each current measurement is made at truly constant potential. Hence, at the start of the experiment the D/A converter's output is connected to the control point of a potentiostat (see Figure 29) and the D/A converter set to the initial potential for the experiment. Then, following each successful current measurement, the potential is advanced to a more negative value. For convenience, the initial potential and step size (or increment) are entered gjs_the teletype in reSponse to an inquiry from the computer. The computer then does the necessary arithmetic to convert the decimal values entered in millivolts to the proper binary words to be loaded into the D/A converter. [For example, the D/A converter output is 0 to ID V full scale, so that an initial potential of -0.5 V gs, SCE corresponds to one-twentieth of 77778, or 03l58. Also, the smallest incremental step corresponds to complementing the least significant bit in a twelve bit word, or 2.5 mV. This resolution is more than adequate for any polarographic experiment.] Thus, with a computer, operation and application of the potential is simple, and the major problem is measuring the current and synchronizing advancement of the potential. Of course, current could be measured continuously during the life of a drop, with the potential being advanced immediately following detachment of a drop. Alternatively, current could be measured at a fixed time during the drop-life. This latter approach is common, and usually accomplished with the aid of a mechanical drop-knocker, which ensures constant drop Figure 29. 108 Potentiostat for computer controlled classical polarography ”7330 DUO CE RE NE LR 10 KA, 1% 10 KA, 1% 50 KA, 1% 50 KA, 1% 50 KA, 1% 50 A ten turn potentiometer 1 KA ten turn trim pot control amplifier, Analog Devices 143 A current follower, Analog Devices 143 A inverter, Analog Devices 142 B current amplifier, California Electronics differential ampl. 175 counter electrode reference electrode working electrode load resistor ('1 l ., 9 So . 109 110 time for a dme. Unfortunately, a computer controlled drop-knocker would have required modification of the interface, and therefore an alternative approach was sought. This approach involves continual (actually, once every millisecond) measurement of current and comparison of successive values, drOp detachment being indicated by a current reading that is considerably less than the preceeding value (this locates drop detachment with an uncertainty of about two milliseconds, which is negligible since drop life is typically 5 seconds). Once the computer determines that the drop has detached, the computer's clock is used to time precisely a delay of 4.5 seconds, after which time the cell current is measured. By using a dme with a natural drop-time greater than 4.5 seconds, this approach produces a polarogram correSponding to a dme with a constant drop-time of exactly 4.50 seconds. When this approach was first attempted, it was found that the results were unreliable because of random spurious noise. Moreover, the interference of noise was effectively enhanced by the rapid digitization rate (33 KHz) available with the A/D converter. In other words since only 33 microseconds are required to digitize an analog voltage, a spurious noise Spike of very short duration (2 msec) could actually be accepted as the correct current (this effect is illustrated in Figure 30 which shows spurious noise causing a large error in measured cell current). This problem was circumvented by what amounts to time or ensemble averaging. This time-averaging is possible for a single polarographic experiment because the maximum rate of data acquisition is so large that many measurements of the current can be integrated over a time increment for which the true cell current is essentially constant. For example, 51210 measurements Figure 30. 111 Effect of spurious noise on dme current. A. Current gs, normal time scale B. Current gs, expanded time scale An A/D conversion could occur during the noise spike resulting in a serious error in recorded signal. 1,;30 1,;00 4.0 2.0 4.0 ‘— 2.0— 112 NOISE KSIONAL A ”'9- 5.0 0.002 Tl «E, SE 0. -|l- aapsec. NOISE SIGNAL B ‘4 0.002 secr- TIN£ 113 of current can be obtained in 15.5 milliseconds. This means that if current measurement is begun at 4.50 seconds into the drop-life, it is completed at 4.5155 seconds; over this time window the true cell current is constant within 0.054% (i.e., between i] = k(4.500)1/6 and i2 = k(4.515)1/6 the current has changed only 0.054%). Obviously, by averaging 512 values of current the influence of random noise is diminished dramatically. [The choice of 51210 measurements was not completely abritrary, since division by 51210 (= 29) with the PDP-8/I does not require a library software routine.] Thus, the control and acquisition involve the following operations: (1) measure current and compare successive values until drop detachment is detected; (2) delay 4.50 seconds; (3) make 512 measurements of cell current; _ (4) average the 512 readings, and store the result; (5) advance the applied potential by the specified increment; and (6) return to step (1) above. This approach provided for excellent control and acquisition of very accurate data. The software further provides for display of the data and some data analysis; these functions are described next. 2. Data Display. For reasons analogous to those described in connection with the cyclic voltammetry experiment, diSplay of experimental data is important because it gives an immediate estimation of the success or failure of the experiment. As with cyclic voltammetry, two diSplay modes are provided. The visual display is obtained with an X-Y plotter, which plots the data as they are collected. The X-axis of the plotter is connected directly to the digital-analog converter used to apply the potential to the electrochemical cell. 114 The other D/A converter is connected to the Y-axis and it is used to display the average value to the 512 current measurements. Thus, the “digital polarogram" is visible to the operator during the course of the entire experiment. A sample of such a polarogram is shown in Figure 31 where it is compared with the "actual" polarogram recorded in the conventional fashion. Of course, the operator also has the option of having the exact values of potential and current listed by the teletype. 3. Data Analysis. Data processing features were incorporated in the software package primarily to evaluate the efficacy of this approach. Hence, the only data treatment in the current version of the software is analysis according to the classical equation E = E1/2 + RT/nF 1n (Id-I)/I (l) where Id is the limiting current (cf., Figure 31), I is the current at potential E, fl_IS the number of electrons, E1/2 is the halfwave potential (cf., Figure 31), and the other constants have their usual meaning. In cases where Equation 1 is applicable, the implied plot of potential gs, log (Id-I)/I is the accepted way to determine El/Z (from the intercept) and g_(from the slope). The software accomplishes this analysis by a linear least squares regression of the data according to Equation 1, where values of the potential are assumed to be accurately known. To do this, the operator supplies the computer with three key potentials, namely the potential of the limiting current region, (E1), and the potentials bounding the rising portion of the polarogram, (E2 and E3) (see Figure 31). The computer then searches Figure 31. 115 Sample data display of computer controlled dme polarography. Id: limiting current E1/2: halfwave potential E]: potential of limiting current E2: potential bounding top of rising portion of the polarogram E3: potential bounding bottom of rising portion of polarogram Polarogram is for millimolar CdSO4 in 0.10 M. Na2504. Solid line: computer controlled polarogram Dashed line: conventional polarogram |,po MOI—r 30° — 2.0)— I.O 116 l 1 -0.40 -0. E2 - ’3‘ l J 1 50 -0060 - 0070 -0080 E vs. S.C.E. , VOLT s 117 the table of experimental current-potential data, locates and calculates the limiting current, and then calculates values of ln (Id-I)/I for all values of current between potentials E2 and E3. From the least squares analysis values of s_and El/Z are calculated and listed on the teletype. C. The Software Package for Classical Polarography Each of the features described above was combined into a single package which operates on the basis of extensive dialogue between operator and computer gis_the teletype. The entire operation is best described with the flow chart in Figure 32. Initially, the computer requests through the teletype the experimental values of load resistor, initial potential, final potential, and point separation (potential increment) that the Operator wishes to use. This initial potential is then applied simultaneously to the cell and the X-axis of the X-Y plotter. After receiving a signal from the operator, the program tests for drop detachment, then goes into its data collection routine. The average current is stored in memory and displayed on the Y-axis of the X-Y plotter. The potential is incremented and the data collection process repeated until the final potential is reached. The program then requests values for E], E2, and E3 and calculates and then plots ln (Id~I)/I gs, E on the X-Y plotter superimposed on the polarogram. Finally, the least squares values for s_and EJ/z are printed on the teletype. Table VII is an example of the teletype listing during execution of a typical experiment. 0. Discussion and Evaluation The polarography system as developed to date has proved to be very convenient. Operation is extremely simple, yet the system 118 Figure 32. Flow chart for computer controlled dme polarography 119 (;_ START T) INITIAL DIALOGUE J. I i J. I LOAD INITIAL LIMITING POINT RESISTOR POTENTIAL POTENTIAL SEPARATION E. s; L, L 1 CALCULATE POTENTIAL LOAD DACS APPLY E T0 CELL & X-AXIS k OF RECORDER .___{_TEST FOR DROP | DROP L"‘No OFF ? Yes DELAY 4.5 SEC 1 COLLECT & AVERAGE 512 CURRENT VALUES _.1 STORE AVERAGE CURRENT & POTENTIAL IN CORE 1 I a 8 120 C1 1 DISPLAY AVERAGE 1 .L___CUBBENI_QN_1;AXI§ [sINCREMENT POTENTIALI MORE POINTS ? No REQUEST REDUCTION POTENTIAL RANGE 1 Yés SEARCH DATA, CALCULATE PLOT LN (ID-I)/I gs, E AL LEAST SQUARES ANALYSIS OUTPUT 'N' & 'E1/2' LIST DATA Yes LIST ALL I vs. E DATA' L STOP No STOP ’0 121 Table VII. Sample Teletype Listing During a Computer Controlled DME Polarography Experiment DME POLAROGRAPHY DATEz6-9-7O SOLVENT: H20 ELECTROLYTE: 0.10 M. NAZSO4 REACTANT: 0.001 M. CDSO4 LOAD RESISTOR:10000 INITIAL POTENTIAL MV:30¢ LIMITING POTENTIAL MV:900 PT. SEPARATION MV:5 PRESS CONT TO START EXPT. E1 MV70¢ E2 MV650 E3 MV550 SLOPE: +0.7695312E+02 N =+0.1969999E+01 INTERCEPT =+0.4694141E+02 E1/2=-0.6099999E+00 122 provides considerable versatility and flexibility. In fact, since all parameters are set through the teletype in terms of English statements, the computerized system actually requires less expertise on the part of the operator than a conventional polarograph. To date the system has not been tested extensively, but the polarogram for the reduction of cadmium in Figure 31 agrees well with the polarogram obtained with a commercial instrument. The data analysis routine for this polarogram (Figure 31) gives a value of 1.97 for g, and an E1/2 of -O.610 V gs, SCE (the value from analog recording is -O.6ll V. gs, SCE). Presumably, of course, the computerized data are the most precise because of the precision of the A/D converter (0.1%) and because of the time averaging. Certainly the system described here could be improved considerably in terms of software without further changes in the interface. But even without further improvements, this system possesses very significant advantages over conventional polarographs. VII. CONCLUSION A general approach to the interfacing of a digital computer to laboratory experiments has been presented in this thesis. To aid in understanding the design of the interface, the basic logic gates. the interface components, and the features of data transfer within the interface have been discussed. A very versatile interface which can be used directly to computerize Virtually any measurement performed in a chemical laboratory has been described in detail. The computerized data acquisition system has been applied to cyclic voltammetry studies for the elucidation of electrolysis mechanisms and has resulted in vastly improved data collection and analysis capabilities. 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M., and Vianello, E., Electrochim. Acta, s, 905 1963 . Saveant, J. M., and Vianello, E., Compt. Rend., gss, 2597 (1963). Nicholson, R. S., and Shain, 1., Anal. Chem., s1, 178 (1965). Nicholson, R. S., and Shain, 1., Anal. Chem., s1, 190 (1965). 45. 46. 47. 48. 49. 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. 61. 62. 126 Olmstead, M. L., and Nicholson, R. S., J. Electroanal. Chem., lg, 133 (1967). Schuman, M. S., Anal. Chem., 31, 142 (1969). Schuman, M. 5., Anal. Chem., 52, 521 (1970). Saveant, J. M., and Vianello, E., Electrochim. Acta, lg, 1545 (1967). Nicholson, R. 5., Anal. Chem., s1, 667 (1965). Kudirka, P. J., M. S. Thesis, Michigan State University, East Lansing, Michigan, 1968. Olmstead, M. L., Ph.D. Thesis, Michigan State University, East Lansing, Michigan, 1968. Olmstead, M. L., Hamilton, R. 6., and Nicholson, R. S., Anal. Chem., 51, 260 (1969). Olmstead, M. L., and Nicholson, R. S., Anal. Chem., 31, 862 (1969). Vleek, A., in “Progress in Inorganic Chemistry", Zuman, P., ed., Vol. 5, Interscience, New York, N.Y., 1963, p. 211. Booman, G. L., Anal. Chem., gs, 213 (1957). Schwarz, N. M., and Shain, 1., Anal. Chem., ss, 1770 (1963). Underkofler, N. L., and Shain, 1., Anal. Chem., ss, 1779 (1963). Malmstadt, H. V., Enke. C. G., and Toren, E. C., "Electronics for Scientists", N. A. Benjamin, Inc., New York, N.Y., 1963. Ross, J. N., DeMars, R. 0., and Shain, 1., Anal. Chem., gs, 1768 (1956). Delahay, P., "New Instrumental Methods in Electrochemistry", Interscience Publishers, New York, N.Y., 1954, p. 130. Frishmann, J., Ph.D. Thesis, Michigan State University, East Lansing, Michigan, 1966. "Handbook of Analytical Chemistry", Meiter, L., ed., McGraw-Hill 800k CO” New York. N.Y., 1963’ p. 5'80. Kudirka, P. J., Ph.D. Thesis, Michigan State University, East Lansing, Michigan, 1971. APPENDICES APPENDIX A 5991c Print of the Interface The following diagram is a logic print of the interface presented in block form in Figure 13. Individual circuit cards are enclosed in dotted lines. The notations M 103, A 123, etc. refer to Digital Equipment Corporation Integrated Circuit FLIP CHIP Modules. The notations K 13, L 22, etc. refer to locations on the interface connector block while the notations A l, D 2, etc. refer to pin connections of the plug in modules. 127 128 m_ 2.. u: “a: u: :3. . . 132: u 35. «.3 _ pawn... in: 5. a x u a. U __::.._;.._:__;_:: .. u .5 .5 .00. Ana-:3 _ .hl r1. _ _. a! c» u: 42.: _ nu. ..> a: 4:: u _ L., .._. .._.. n E... .a .... - - ------ :-------_ 11 | I I I II I I I I I mIIIIIII.II1HIIII IIIIIIIIIIHIIIIII IIIIO.0_ “to. .LO. Ana-Io . W , « 111111u-111111»1o.1..-1--.- : .3“ L _ . ,_ _ .h. . _ . _ .. " IN‘O. . 3.. 22. . _ . an. a: _ / . _ 3.3:! n... . - - -----.£....-----L 1.. . _. _ _ v.3. . . _ _ . sec. _ . 3o... _ 2.... .._ . . APPENDIX 8 Software for chlic Voltammetry The following software was developed for the cyclic voltammetry experiment. The program instructions are presented in both octal and mnemonic form along with the corresponding octal core location of the instruction. The program is presented as a reproduction of the exact print-out listed on the teletype by the computer. The program is presented in the following form: Octal address Octal instruction Mnemonic in core code instruct1on 129 0000 0001 0002 0003 0004 0005 0006 0007 0010 0011 0012 0013 0014 0015 0016 0017 0020 0021 0022 0023 0024 0025 0026 0027 0030 0063 0064 0065 0066 0067 0070 0071 0072 0073 0074 0075 0076 0077 0100 0101 0102 0103 0104 0105 0000 0000 0000 0000 0000 7400 7200 5600 0000 0000 0090 0000 0000 0000 0000 0000 4000 4042 4200 4205 4217 4227 4234 4235 3352 0000 0001 6000 0000 0000 0000 0000 0000 0000 0000 0004 2400 0000 3152 3340 0000 0000 0000 0000 130 IPAGE ZERO CONSTANTS USED IIN VARIOUS SUBROUTINES *0 PRES: *63 DEED: MINI: CHIAS: CINPT: EXP: BAIS: BINP: ZERO: SKL: 0 IINTERRUPT 0 0 0 0 7400 IFPNT INPUT 7200 IFPNT OUTPUT 5600 IFPNT INTERPRETER 0 /USED BY MESAGE SUBROUTINE 0 /LOCo 10-17; AUTOINDEX 0 0 0 00 0 0 4000 IFCVI POINTER 4042 /MESAGE POINTER 4200 IIYPE I CHARACTER PT. 4205 ITY2 POINTER 4217 ITYCR POINTER 4227 ITYSP POINTER 4234 ITYTB POINTER 4235 ITYDIG POINTER 3352 IPRES CONT. PT. ILOC. 40-62 USED BY FPNT. 0 0001 6000 0000 0 0 0 0 0 0 0004 2400 0000 3152 /USED TO STORE BIAS READING 3340 ISTORE BIAS + INITL- POT- 0 0 0 0 0106 0107 0110 0111 0112 0113 0114 0115 0116 0117 0120 0121 0122 0123 0124 0125 0126 0127 0130 0131 0132 0133 0134 0135 0136 0137 0140 0141 0142 0143 0144 0145 0146 0147 0150 0151 0152 0153 0154 0155 0156 0157 0160 0161 0162 0163 0164 0165 0166 0167 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0200 0202 0000 0000 0000 0000 0003 2232 7343 0004 2701 5242 0014 3777 4000 SRH: DSR: SR: LR: P: MC: BC: MA: BA: T1: T2: RUFF: BUFFI: BUFFPT: CONC: N46: N11: N7: SSSSNNGSSGSQSS‘S‘GGGGSSGSGGSGSGG‘SSSGSSIS-$888 S S G U 2232 7343 0004 2701 5242 0014 3777 4000 131 /4096 0170 0171 0172 0173 0174 0175 0176 0177 0200 0201 0000 0000 0000 0000 0000 0000 1301 0000 4722 4407 132 T3: T4: 888588 ENTOR: 1301 IPOINTER BIN. PONTS: 0 1N0. OF DATA PTS: T0 FPNT: ENTER COLLECTED XLIST FIXTAB PAUSE XLIST I/DSEP PT1 3'8‘71 IBY ENTERING SCAN RATE: AMPLITUDE: IAND POINT SEPARATION: THE DELAY FOR IDATA COLLECTION WILL BE CALCULATED: IPROGRAM HILL COLLECT DATA VIA ANALOG /-DIGITAL CONVERTER: STORE DATA IN ICORE: THEN EITHER OUTPUT DATA OR ICALULATE IP/VCl/Z) VS LN V0 IF BLANK ICORRECTION DATA AVAILABLE RESULTS INILL BE CORRECTED FOR BLANK: IP/(VI/E) IRESULTS ARE ACCEPTED OR IREJECTED AND MAY BE AVERAGED BEFORE ISTORING FOR COMPUTER DIAGNOSTIC PLOT: IDISPROPORTIONATION K2 RATES ARE.. ICALCULATABLE IDIRECTORY l5'30: PAGE 0 POINTERS FOR SUBROUTINES l40’62: SPACE USED BY FPNT PACKAGE /102-1778 PAGE ZERO CONSTANTS /2008 MAIN PROCESSOR /4008 BIAS: PRINT: SR: AMP: I600: INITL: WRITE: START: /10003 DISPY [12008 DATA OUT /14008 FIND OUT} IS BLANK AVAILABLE /16008 LOCATE: PLACE: AND DECIDE l20008 DIAG. CRITERIA PART I3 FIND IP l22008 WHAT DO YOU WANT /24008 DIAG: CRITERIA PART II: ENTo: PLOT l26008 MSECT: DELAY CALCULATION : IP AVERAGE [27303 STARTING ROUTINE /30008 ELAMBDA AND TAU CALC. l32008 INSERT PGO: E SWITCHING CALC: I34008 DISPILOCATE ICO: IAO: ISO /36008 BLANK CORRECT ICO: 1A0: ISO /40003 UTILITY ROUTINES AND FPNT PACKAGE *200' BEGIN: PS: LOAD: UDLY: MDLY DACL JMS I INITL / PRINT INITIAL DIALOGUE FPNT 0202 0203 0204 0205 0206 0207 0210 0211 0212 0213 0214 0215 0216 0217 0220 0221 0222 0223 0224 0225 0226 0227 0230 0231 0232 0233 0234 0235 0236 0237 0240 0241 0242 0243 0244 0245 0246 0247 0250 0251 0252 0253 0254 0255 0256 0257 0260 0261 0262 5102 6170 0000 4736 4772 4405 4407 6154 0000 4766 4405 4407 6121 0000 4734 4405 4407 6116 0000 4735 4405 4407 6344 0000 4743 4405 4407 6347 5344 4357 6124 5347 4116 3355 6352 1064 0000 1045 7500 5253 5257 4724 1332 3331 5274 4407 5352 3355 2360 BIGOT: RESET: MSEC: USEC: 133 FGET ZERO FPUT T3 FEXT JMS I BIAS / READ BIAS AND INITL- POT. JMS I CONCT FIN FPNT FPUT CONC FEXT JMS I LOADT / REQUEST "LOAD RESISTOR" FIN FPNT FPUT LR / FPNT VALUE OF LOAD RESISTOR FEXT JMS I SRT / REQUEST "SCAN RATE" FIN FPNT FPUT SR IFPNT VALUE OF SCAN RATE FEXT JMS I AMP / REQUEST FIN FPNT FPUT A / FPNT VALUE OF AMPLITUDE FEXT JMS I PST /"POINT SEPARATION" FIN FPNT FPUT PS I FPNT VALUE OF POINT SEP. FGET A FDIV PS FPUT P FGET PS FDIV SR FMPY MTHO FPUT D IDELAY IN MSEC =(PS/SR)#(1000) FADD MIN1 / IS DELAY GREATER THAN 1 MSEC FEXT TAD 45 SMA JMP JMP JMS TAD "AMPLITUDE" IPTS = AMPLITUDE/POINT SEP. MSEC I YES: JUMP TO MSEC ROUTINE USEC / NO: JMP T0 USEC ROUTINE I SORT ICALCULATE MSEC DELAY DPT / POINTER TO MSEC DELAY SUB. DCA DELAY JMP RTN FPNT / CALCULATE USEC DELAY FGET D FMPY MTHO FSUB THIRT ICONVERT MSEC TO USEC Til-11.1 11 T11 Ill [.1111 0263 0264 0265 0266 0267 0270 0271 0272 0273 0274 0275 0276 0277 0300 0301 0302 0303 0304 0305 0306 0307 0310 0311 0312 0313 0314 0315 0316 0317 0320 0321 0322 0323 0324 0325 0326 0327 0330 0331 0332 0333 0334 0335 0336 0337 0340 0341 0342 0343 0344 0345 4363 6352 1367 0000 4737 7041 3741 1333 3331 1151 3153 4407 5124 0000 4737 3177 1177 7041 3323 1323 3725 4726 6301 5311 4727 4731 2323 5313 4730 4430 5742 0600 0000 2600 1370 0677 0540 1000 0000 0722 0711 0471 0506 0400 4367 0740 0720 1025 0521 0000 0000 RTN: PUSH: CONT: INITL: PTS: SORT: OUPT: START: DACL: DISPY: DEVAY: DPT: DPTU: SRT: AMP: BIAS: FIX: TIME: TU: SHOW: PST: A: 134 FDIV N75 FPUT D / DELAY IN MICROSEC. FADD HALF FEXT JMS CIA DCA TAD DCA TAD DCA FPNT I FIX I TU IINSERT IN UDLY SUB. DPTU DELAY / POINTER TO USEC DELAY BUFF / SET UP BUFFER BUFFPT IFOR DATA STORING FGET P FEXT JMS DCA TAD CIA DCA TAD DCA JMS EXSF / LOOK FOR EXPT. JMP JMS JMS ISZ JMP JMS JMS JMP 600 0 2600 1370 677 540 1000 0 722 711 471 506 400 4367 740 720 1025 521 0 0 I FIX 177 / STORE NO. 177 OF PTS. PTS I NO: DATA PTS TO COLLECT PTS I OUPT IPTS IN OUTPUT LDC: I START I PRINT "START EXPT." STARTING FLAG 0‘1 I DACL / COLLECT DATA PAIR I DELAY / DELAY UNTIL NEXT PTS /DATA COLLECTION CONT I DISPY / PREPARE FOR DISPLAY I PRES IOP DATA I SHOH/ DISPLAY DATA / MSEC POINTER / UDLY POINTER / POINTER FOR MDLY DELAY CONSTANT I POINTER FOR UDLY DELAY CONSTANT 0346 0347 0350 0351 0352 0353 0354 0355 0356 0357 0360 0361 0362 0363 0364 0365 0366 0367 0370 0371 0372 0400 0401 0402 0403 0404 0405 0406 0407 0410 0411 0412 0413 0414 0415 0416 0417 0420 0421 0422 0423 0424 0425 0426 0427 0000 0000 0000 0000 0000 0000 0000 0012 3740 0000 0004 3300 0000 0003 3600 0000 0563 0000 2146 3146 1150 0000 7300 1244 3245 4424 4421 2305 2440 0211 0123 4100 4430 4232 4424 4421 2305 2440 1116 1124 1456 2017 2456 4100 4430 135 0 PS: 0 0 0 D: 0 0 0 MTHO: 0012 /GREATER THAN 1000 3740 /TO REDUCE ROUNDING ERROR 0000 THIRT: 0004 3300 0000 /1305 N75: 0003 3600 0000 I705 LOADT: 563 /LOAD POINTER HALF: 0000 2146 3146 CONCT: 1150 I/A'IS’TI ISEP POLAROGRAPHY INTRO. POT: ISEP SUBROUTINES BIAS: PRINT: #400 BIAS: 0 CLA CLL TAD BUTT DCA BUTTPT TYCR TYMES / 2305 2440 0211 0123 5100 JMS I PRES JMS SEAD TYCR TYMES 2305 2440 1116 1124 1456 2017 2456 4100 JMS I PRES READ BIAS & INITL: SRR: AMP: PSS SET BIAS! / SET INITL. POTo! 0430 0431 0432 0433 0434 0435 0436 0437 0440 0441 0442 0443 0444 0445 0446 0447 0450 0451 0452 0453 0454 0455 0456 0457 0460 0461 0462 0463 0464 0465 0466 0467 0470 0471 0472 0473 0474 0475 0476 0477 0500 0501 0502 0503 0504 0505 0506 0507 0510 0511 4232 5600 0000 6543 6532 6531 5235 7300 6534 3645 2245 5632 0100 0000 0000 4424 4426 4421 0500 4426 4426 4421 2516 0356 1100 4426 4426 4421 0317 2256 1100 4424 5646 0000 4424 4421 2303 0116 4022 0124 0540 1526 5723 0503 7200 5671 0000 4424 4421 0115 READ: BUTT: BUTTPT: PRINT: SRR: AMP: 136 JMS READ JMP I BIAS 0 / ROUTINE TO COLLECT DATA SC2 I SET CHANNEL 2 ADCV / DO ADC CONVERSION ADSF/ WAIT FOR ADC FLAG JMP 0-1 CLA CLL ADRB / READ ADC BUFFER INTO AC DCA I BUTTPT ISZ BUTTPT JMP I READ 100 0 0 / SUBROUTINE T0 TYPE DATA READINGS TYCR TYTB TYMES 0500 / "E" TYTB TYTB TYMES / "UNC. I" 2516 0356 1100 TYTB TYTB TYMES 0317 / "COR: P' 2256 1100 TYCR JMP I PRINT 0 / PRINT ”SCAN RATE" TYCR TYMES 2303 0116 4023 0124 0540 1526 5723 0503 7200 JMP I SRR 0 / PRINT ”AMPLITUDE" TYCR TYMES 0115 0512 0513 0514 0515 0516 0517 0520 0521 0522 0523 0524 0525 0526 0527 0530 0531 0532 0533 0534 0535 0536 0600 0601 0602 0603 0604 0605 0606 0607 0610 0611 0612 0613 0614 0615 0616 0617 0620 0621 0622 0623 0624 0625 0626 2014 1124 2504 0540 1526 7200 5706 0000 4424 4421 2024 5640 2305 2001 2201 2411 1716 4015 2672 0000 5721 0000 4424 4431 2305 2056 4040 0401 2405 7200 4252 4421 0530 2024 5640 1617 5672 0000 4252 4421 2317 1426 0516 2472 PSS: I/9-1-70 2014 1124 2504 0540 1526 7200 137 JMP I AMP 0 / PRINT TYCR TYMES 2024 5640 2305 2001 2201 2411 1716 4015 2672 0000 JMP I PSS ISEP SUBROUTINES /LOAD: #600 INITL: UDLY: MDLY “PT. SEPARATION" INITL: WRITE:START 0 I SUBROUTINE T0 TYPE TYCR IINITIAL DIALOGUE / SEP DATA: TYMES 2305 2056 4040 0401 2405 7200 JMS 0530 2024 5640 1617 5672 0 JMS WRITE TYMES / EXPT. WRITE NO: TYMES / SOLVENT 2317 1426 0516 2472 0627 0630 0631 0632 0633 0634 0635 0636 0637 0640 0641 0642 0643 0644 0645 0646 0647 0650 0651 0652 0653 0654 0655 0656 0657 0660 0661 0662 0663 0664 0665 0666 0667 0670 0671 0672 0673 0674 0675 0676 0677 0700 0701 0702 0703 0704 0705 0706 0707 0000 4252 4421 0514 0503 2422 1714 3124 0572 0000 4252 4421 2205 0103 2401 1624 7200 4252 5600 0000 6032 4261 7300 1276 6046 5253 0000 6031 5262 6036 3276 1276 1275 7450 5273 5661 4424 5652 7563 0000 0000 4424 4421 2324 0122 2440 0530 2024 5600 WRITE: TYPE: LISN: BACK: CHECK: STORE: START: 0 JMS TYME 0514 0503 2422 1714 3124 0572 0 JMS TYME 2205 0103 2401 1624 7200 JMS JMP 0 KCC JMS CLA TAD TLS JMP 0 / KSF JMP KRB DCA TAD TAD SNA JMP JMP TYCR JMP 7563 0 0 TYCR TYME 2324 0122 2440 0530 2024 5600 138 WRITE S I ELECTROLYTE WRITE S / REACTANT WRITE I INITL LISN CLL STORE TYPE ITYPE UNTIL CR STRUCK SUBROUTINE READS KEYBOARD 0‘1 STORE STORE CHECK / CHECK IF CR STRUCK JMP OUT OF SUBROUTINE CONT: TO READ KEYBOARD BACK / YES: I LISN / NO: I NRITE S / "START EXPT." 0710 0711 0712 0713 0714 0715 0716 0717 0720 0721 0722 0723 0724 0725 0726 0727 0730 0731 0732 0733 0734 0735 0736 0737 0740 0563 0564 0565 0566 0567 0570 0571 0572 0573 0574 0575 0576 0540 0541 0542 0543 0544 0545 0546 0547 0550 5677 0000 7200 1320 3321 2321 5315 5711 0000 0000 0000 1340 3337 7200 1336 6136 6133 5330 2337 S325 7200 5722 0011 0000 0000 0000 4424 4421 1417 0104 4040 2205 2311 2324 1722 7200 5763 0000 6541 4346 6543 4346 5740 0000 6532 6531 139 JMP a / CLA TAD X DCA TX ISZ TX JMP 0‘1 / COUNT DOWN FOR DELAY JMP I UDLY / RETURN TO PROGRAM X: 0 TX: 0 MDLY: 0 I TAD DCA CLA TAD STIM ICLOCK CONSTANT FOR MSEC DELAY CECL / LOAD AND START CLOCK CSCF / SEARCH FOR CLOCK FLAG JMP 0’1 ISZ LOOP / REPEAT SET NUMBER OF LOOPS JMP CYCL CLA JMP I MDLY / RETURN STIM: 0011 LOOP: 0 TIM: 0 *563 LOAD: 0 TYCR TYMES 1417 0104 4040 2205 2311 3324 1722 7200 JMP I LOAD I START UDNY: MICROSECOND DELAY ROUTINE ICONSTANT FOR DELAY MILLISECOND DELAY SUBROUTINE TIM IDELAY LOOPS TO PROCESS LOOP CYCL: TO MA IN PROGRAM / "LOAD RESISTOR " I/SEP SUBROUTINES DACL AND DISPY FOR BLANKS I4'6‘71 *540 DACL: 0 / DATA COLLECTTION SCI / SET CHANNEL 1 JMS COLL SC2 ISET CHANNEL 2 JMS COU.' JMP I DACL COLL: 0 ADCV / ADC CONVERT COMMAND ADSF / WAIT FOR ADC FLAG 0551 .0552 0553 0554 0555 0556 0557 0560 1000 1001 1002 1003 1004 1005 1006 1007 1010 1011 1012 1013 1014 1015 1016 1017 1020 1021 1022 1023 1024 1025 1026 1027 1030 1031 1032 1033 1034 1035 1036 1037 1040 1041 1042 1043 1044 1045 1046 1047 1050 5350 7300 6534 6211 3553 6201 2153 5746 0000 6557 4424 4421 2305 2440 2520 4033 2240 1106 4002 1124 4060 7561 4005 3011 2440 0411 2320 3100 5600 7200 3323 1151 3153 1177 7041 3324 7200 1323 7040 3333 1323 7450 5252 5244 7200 6211 1553 6552 2153 #1000 DISPY: SEPT: CONT: PDT: JMP CLA CLL I CLEAR AC I READ ADC BUFFER CDF+10 I CHANGE TO DATA FIELD 1 ADRB o-I INTO AC DCA I BUFFPT I STORE DATA CDF+00 I CHANGE TO DATA FIELD 0 ISZ BUFFPT JMP I COLL 0 DACLXY I6557 CLEAR AC & BOTH TYCR TYMES I SET UP SR. 2305 2440 2520 4033 2240 1106 4002 1124 4060 7561 4005 3011 2440 0411 2320 3100 JMP CLA DCA TAD DCA TAD CIA DCA CLA TAD CMA DCA TAD SNA JMP JMP CLA CDF+ TAD I BUFFPT DALX ISZ BUFFPT I IF BIT 0=1 EXIT DISPY I DISPY I DETERMINE LOCATION OF DATA ZEROPT BUFF BUFFPT 177 I PTS XPTS ZEROPT I IS DATAM ZEROPT ZEROPT CUR PDT I PLOT E ON X AXIS 10 E OR I 1051 1052 1053 1054 1055 1056 1057 1060 1061 1062 1063 1064 1065 1066 1067 1070 1071 1072 1073 1074 1075 1076 1077 1100 1101 1102 1103 1104 1105 1106 1107 1110 1111 1112 1113 1114 1115 1116 1117 1120 1121 1122 1123 1124 1125 1126 1127 1130 1131 1132 1133 5234 7200 1553 6201 6554 2153 4327 2324 5334 7604 7500 5225 4424 4421 1725 2420 2524 4024 3120 0540 5240 0411 0107 5640 2431 2005 5540 7200 4725 1326 7440 5313 4722 5747 1320 7440 5265 4722 5721 7775 2000 1714 0000 0000 2356 7526 0000 7604 7510 5727 7041 CUR: HELL: RECK: M3: ZEROPT: XPTS: TELE: CHECK: DELAY: JMP CLA TAD CDF+ 141 CONT I PLOT I ON Y AXIS I BUFFPT 00 DALY ISZ JMS ISZ JMP LAS SMA JMP TYCS TYME 1725 2420 2524 4024 3120 0540 5240 0411 0107 5640 2431 2005 5540 7200 JMS TAD SZA JMP JMS JMP TAD SZA JMP JMS JMP 7775 CRIT DECI 0 0 2356 7526 0 LAS SPA JMP CIA BUFFPT DELAY I CONTROL RATE OF PLOTTING XPTS CONT I IF BIT 0=0£REPEAT3=18CONT. REPT S I TELE CHECK I -t RECK I DECIDE I OUTPUT I LIST ALL DATA COLLECTED M3 I -3 WELL IASK AGAIN I DECIDE I FIND M & B OF BLANK I CRITT I CALCULATE DIAG. CRITERIA T: 2000 DE: 1714 / DELAY CONTROLLED BY SR SETTING I DELAY 1134 1135 1136 1137 1140 1141 1142 1143 1144 1145 1146 1147 1150 1151 1152 1153 1154 1155 1156 1157 1160 1161 1162 1163 1164 1165 1166 1167 1170 1171 1172 1173 1174 1175 1200 1201 1202 1203 1204 1205 3344 1345 3346 2346 5337 2344 5335 5727 0000 7000 0000 1200 0000 4424 4421 1515 1714 0122 4003 1716 7200 5750 0000 7041 3143 2153 2153 6211 1553 6201 3146 1143 1146 5762 7200 3364 4763 4325 1151 3153 LOOP: CONST: COUNT: OUTPUT: DCA TAD DCA ISZ JMP ISZ JMP JMP 0 7000 0 1200 II3-22-71 IDATA OUPUT IN FPNT FOR 142 LOOP CONST COUNT COUNT o-l LOOP .-S I DELAY SEP EXPT IUNCORRECTED AND CORRECTED FOR IBLANK SOLUTION EFFECTS BY LEAST ISQUARE CORRECTIONS #1150 CONN: END: #1200 OUTPUT: TYCR TYME 1515 1714 0122 4003 1716 7200 JMP 0 CIA DCA ISZ ISZ S IMMOLAR CON: I CONN T1 BUFFPT BUFFPT CDF+10 TAD I BUFFPT CDF+00 DCA TAD TAD JMP CLA DCA JMS JMS TAD DCA T2 T1 T2 I END ZEROPT I FIND I "POTENTIAL CURRENT" SNITL ILOOK FOR E SHIT. BUFF ISTORED DATA LOCATION BUFFPT 1206 1207 1210 1211 1212 1213 1214 1215 1216 1217 1220 1221 1222 1223 1224 1225 1226 1227 1230 1231 1232 1233 1234 1235 1236 1237 1240 1241 1242 1243 1244 1245 1246 1247 1250 1251 1252 1253 1254 1255 1256 1257 1260 1261 1262 1263 1264 1265 1266 4310 1357 3371 1360 3372 1364 7040 3364 1364 7450 5241 5222 4424 4350 4301 4407 6373 3771 1772 6170 5373 1072 3064 0000 4406 2153 5313 4426 4350 4301 4407 2067 4121 6143 0000 4406 1063 7640 5263 4426 4407 5143 2170 0000 4406 2153 1153 1355 7710 CONT: POT: CUR: DOES: DONT: 143 JMS SET TAD CPI DCA A1 I127 FOR MC TAD CP2 I 132 FOR BC DCA Bl TAD ZEROPT IIS DATAM E OR I CMA DCA ZEROPT TAD ZEROPT SNA JMP CUR JMP POT TYCR ICALCULATE AND OUTPUT POTENTIAL JMS BRING IDATA FROM FIELD 1 JMS ENTER FPNT FPUT Y I FPNT VALUE OF POTENTIAL FMPY I A1 I LEAST SQUARE CORRECTION FADD I Bl FPUT T3 I Y=AX +83 Y=I:X=E FGET Y FADD CINPT FMPY MIN1 FEXT FOUT ISZ BUFFPT JMP CONT TYTB I CALCULATE AND OUTPUT CURRENT JMS BRING IEXTRACT DATA FROM FIELD 1 JMS ENTER FPNT FSUB CBIAS I SUBTRACT BIAS POTENTIAL FDIV LR FPUT T1 FEXT FOUT I OUTPUT UNCORRECTED CURRENT TAD 63 IIF 63808BLANK CORRECT SZA CLA IDOES 63 = 0 JMP DONT INO: DO NOT BLANK CORRECT TYTB IYES: BLANK CORRECT FPNT GGET T1 FSUB T3 FEXT FOUT ILEAST SQUARE CORRECTED CURRENT ISZ BUFFPT TAD BUFFPT TAD KEEPI SPA CLA 1267 1270 1271 1272 1273 1374 1275 1276 1277 1300 1301 1302 1303 1304 1305 1306 1307 1310 1311 1312 1313 1314 1315 1316 1317 1320 1321 1322 1323 1324 1325 1326 1327 1330 1331 1332 1333 1334 1335 1336 1337 1340 1341 1342 1343 1344 1345 1346 1347 1350 1351 5271 5274 2370 5213 5776 1361 3371 1362 3372 5271 0000 4420 4407 4165 3075 0000 5701 0000 1100 4301 4407 6067 0000 1101 4301 4407 2067 6072 0000 5710 0000 1152 3153 4350 4756 7710 5336 1146 5331 7344 1153 7041 3355 1146 4756 7710 5725 1146 5331 0000 6211 HERE: REPLAC: ENTER: SET: SWITL: AGAIN: PLACE: BRING: JMP JMP ISZ JMP JMP TAD DCA TAD DCA JMP 144 HERE ICORRECT 1ST USING MC & BC REPLAC ICORRECT 2ND USING MA & BA OUPT I TOTAL PTS. COLLECTED CONT I CRITT AP1 A1 AP2 I140 FOR BA Bl HERE 0 IBIN DATA TO FPNT POTENTIAL FCVT I DO BIN TO FPNT CONVERSION FPNT FDIV N7 I DIVIDE BY 4096 FMPY EXP I MULTIPLY BY TEN FEXT JMP 0 TAD JMS FPNT I ENTER 100 I BIAS ENTER FPUT CBIAS GEXT TAD JMS FPNT 101 I BIAS + INITIAL POTENTIAL ENTER FSUB CBIAS FPUT CINPT FEXT JMP 0 TAD DCA JMS JMS SPA JMP TAD JMP CLL TAD CIA DCA TAD JMS SPA JMP TAD JMP 0 I SET BUFF1 BUFFPT BRING I ENDT CLA IIS E2*4095 N11 N7 JMS SUB FPNT FGET FEXT NPP JMS SUB ISZ COUNT I NO. OF DIAG. PTS JMP I DIPUT 0 ISTORE BIN N0. IN FIELD I JMS I FIX CDF+10 2525 2526 2527 2530 2531 2532 2533 2534 2535 2536 2537 2540 2541 2542 2543 2544 2545 2546 2547 2550 2551 2552 2553 2554 2555 2556 2557 2560 2561 2562 2563 2564 2565 2566 2567 2570 2571 2572 2573 2574 2575 2576 3764 6201 2364 5722 4772 4430 1367 7041 3371 1365 3364 4354 6552 7200 4354 6554 4770 2371 5340 7604 7700 5333 5762 0000 6211 1764 6201 2364 5754 2322 4367 3000 3000 3213 0000 1127 0000 1000 3135 3200 2151 2155 PLOT: REP: FETH: PUMP: FIX: IP: MAD: LNVT: COUNT: DELAY: XCOUNT: DISPY: IPCT: LNV: IPT: MTO: DCA CDF+ ISZ JMP JMS JMS TAD CIA DCA TAD DCA JMS DALX I PLOT LN V ON CLA JMS DALY JMS ISZ JMP LAS SMA JMP JMP 0 I CDF¢ TAD 158 I IP 00 IP I SUB I DISPY I PRES IPREPARE COUNT FOR DIAG. PLOT XCOUNT MAD IP FETH IDIAG PLOTTING X AXIS FETH I PLOT IPI(V1I2) 0N Y AXIS I DELAY XCOUNT REP I BIT CLA PLOT+2 I PUMP GET BIN N0. 10 I 1P 1=1 TO EXIT DISPLAY FROM UPPER FIELD CDF+00 ISZ JMP 2322 4367 3000 3000 3213 0 1127 0 1000 2135 3200 2151 2155 IP I FETH 2600 2601 2602 2603 2604 2605 2606 2607 2610 2611 2612 2613 2614 2615 2616 2617 2620 2621 2622 2623 2624 2625 2626 2627 2630 2631 2632 2633 2634 2635 2636 2637 2640 2651 2642 2643 0000 4407 5676 2255 0000 1045 7710 5211 5221 4407 5676 2260 0000 1045 7710 5244 5232 1271 3674 4407 5676 0000 4673 7041 3675 5600 1272 3674 4407 5676 3263 0000 4673 7041 3675 5600 159 II3-9-71 IMSC3 IROUTINE TO DETERMINE PROPER DELAY ICONSTANTS FOR OBTAINING ACCURATE IMILLISECOND DELAYS: TWO ICONSTANTS ARE NECESSARY FOR EACH IDELAY. IDELAY STIM IISEC-40SEC 143 I100MSEC-ISEC 11 I50MSEC-100MSEC 4 IIMSEC-50MSEC 0 #2600 MSECT: DELAY PER PASS I0 MSEC 1 MSEC 0.5MSEC 0.1MSEC 0000 FPNT FGET 1 OT FSUB N100 FEXT TAD 45 I IS D GREATER THAN SPA CLA JMP NUTHER INO JMP WOW I YES FPNT FGET I DT FSUB N50 FEXT TAD SPA JMP JMP TAD DCA FPNT FGET I DT FEXT JMS CIA DCA I TIME JMP I MSECT TAD N4 DCA I STIM FPNT FGET I DT FMPY N2 FEXT JMS CIA DCA JMP I00 MSEC NUTHER: 45 I IS D GREATER THAN 50 MSEC CLA FAST INO FOUR I YES N11E I STIM WOW: I FIX FOUR: I FIX I TIME I MSECT 2644 2645 2646 2647 2650 2651 2652 2653 2654 2655 2656 2657 2660 2661 2662 2663 2664 2665 2666 2667 2670 2671 2672 2673 2674 2675 2676 2700 2701 2702 2703 2704 2705 2706 2707 2710 2711 2712 2713 2714 2715 2716 2717 2720 2721 2722 3674 4407 5676 3266 0000 4673 7041 3675 5600 0007 3100 0000 0006 3100 0000 0002 2000 0000 0004 2400 0000 0011 0004 4367 0736 0740 0352 0000 7200 1721 4420 4407 6143 5727 4143 3324 6722 5102 6727 0000 7001 3721 4733 5700 2351 2501 FAST: N100: N50: N2: N10: NIIE: N4: FIX: STIM: TIME: DT: I12-2-70 IIAVGT. IPROGRAM *2700 IAVG: COUNT: NPP: 160 DCA I STIM FPNT FGET FMPY FEXT I DT N10 JMS I FIX CIA DCA I TIME JMP I MSECT 0007 3100 0000 0006 3100 0000 0002 2000 0000 0004 2400 0000 11 4 4367 736 740 352 TO AVERAGE IP FOR IENTERING INTO DIAGNOSTIC PLOT 0000 CLA TAD I COUNT I NO. FCVT FPNT FPUT FGET FDIV FMPY FPUT FGET FPUT FEXT IAC OF TRIALS T1 I T3T TI N20 I MULT: BY 20E6 SCALE FACTOR I NPP ZERO I U3T IACCUMULATED IPIVII2 DCA I COUNT I RESET COUNTER JMS I DIPUT I STORE AVG. DIAG: DATA JMP I IAVG 2351 2501 2723 2724 2725 2726 2727 2730 2731 2732 2733 2734 2735 2736 2737 2740 2741 2742 2743 2744 2745 2746 2747 2750 2751 2752 3753 2754 2755 2756 2757 2760 2761 2762 2763 2764 2765 2766 2767 2770 2771 2504 0031 2304 5500 2373 7200 3765 4407 5102 6766 6767 6770 6771 6756 0000 4772 4757 3360 1360 1361 7650 5764 1360 1362 7650 5763 5330 2373 2356 0000 7455 7475 2323 1400 3537 3600 3603 3606 3611 161 DIPUT: 2504 N20: 0031 2304 5500 T3T: 2373 ISTAR I3'II-71 IROUTINE ENTERED FROM MONITOR ITO DECIDE WHETHER TO START IEXPERIMENT OR TO CONTINUE IEXPERIMENT- ROUTINE WILL CLEAR ICOUNTER: AND CURRENT ISUMMATION LOCATIONS OF DISP: IAND PEAK CURRENT AVERAGE IROUTINE #2730 START: CMA DCA I COUNTI FPNT FGET ZERO FPUT I ICOT FPUT I IAOT FPUT I ISOT FPUT I TAUT FPUT I T33T FEXT JMS I TYPEST JMS I TELE DCA KEEP TAD KEEP TAD CKI SNA CLA IWAS S TYPED JMP I BEGIN IYES BEGIN NEW EXPT TAD KEEP TAD CK2 SNA CLA IWAS C TYPED JMP I CONT / YES CONTINUE EXPT JMP START I NO RESTATE QUESTION T33T: 2373 IAVERAGE LOC: FOR IP/VI/2 TELE: 2356 KEEP: 0 CKI: “323 CK2: '393 CONT: 2323 BEGIN: 1400 COUNTI: 3537 ICOT: 3600 IAOT: 3603 ISOT: 3606 TAUT: 3611 2772 3754 TYPEST: TYPES *3754 3754 0000 UYPES: 0000 3755 4424 TYCR 3756 4421 TYMES 3757 2431 TEXT ITY 3760 2005 PE 3761 4023 S 3762 4024 T 3763 1740 O 3764 2324 ST 3765 0122 AR 3766 2440 T 3767 0340 C 3770 2417 TO 3771 4003 C 3772 1716 ON 3773 2411 TI 3774 1625 NU 3775 0540 E 3776 7200 :I 3777 5754 JMP I TYPES II3-22-71 ELAM IE LAMBDA SEARCH IPROGRAM TO SEARCH POTENTIAL IDATA FOR SWITCHING POTENTIAL IAND SEARCH CURRENT DATA FOR /0.85 IP TO LOCATE E ZERO ITO CALCULATE TAU *3000 3000 4714 LAMBDA: JMS I SWITL IFIND LOC. OF E SWITCH. 3001 1715 TAD I KEEPT 3002 7041 CIA 3003 3312 DCA ELAMC 3004 7201 CLA IAC 3005 1312 TAD ELAMB 3006 3313 DCA ILAMC 3007 6211 CDF+10 3010 1712 TAD I ELAMB 3011 6201 CDF+00 3012 4576 JMS I ENTOR 3013 4407 FPNT 3014 6307 FPUT EL 3015 0000 FEXT 3016 6211 CDF+10 3017 1713 TAD I [LANE 3020 6201 CDF+00 162 3021 3022 3023 3024 3025 3026 3027 3030 3031 3032 3033 3034 3035 3036 3037 3040 3041 3042 3043 3044 3045 3046 3047 3050 3051 3052 3053 3054 3055 3056 3057 3060 3061 3062 3063 3064 3065 3066 3067 30 70 3071 3072 3073 3074 3075 3076 3077 3100 3101 3102 4576 4407 2067 4121 6304 5716 3323 6173 0000 1152 3153 4275 4576 4407 2067 4121 2173 0000 1045 7710 5234 1317 1153 3153 4275 4576 4407 6146 0000 4730 4407 5307 2146 4116 3727 6320 0000 4424 4673 4406 4674 5726 3372 3335 0000 2153 6211 1553 6201 2153 CONT: RETURN: LOCATE: JMS FPNT FSUB FDIV FPUT FGET FMPY FPUT FEXT TAD DCA JMS JMS FPNT FSUB FDIV FSUB FEXT UAD SPA JMP TAD TAD DCA JMS JMS FPNT FPUT FEXT JMS FPNT FGET FSUB FDIV FMPY FPUT FEXT TYCR JMS FOUT JMS JMP GTAU THTA 0 ISZ CDF+ TAD 163 I ENTOR CBIAS LS 150 I ICPO N85 T4 I CURRENT AT E'0 BUFFI BUFFPT LOCATE I ENTOR CBIAS LR T4 I (I - IEO) 45 CLA I IS I GREATER THAN IEO CONT I N0 M3 I YES SUBTRACT 3 FROM BUFFPT BUFFPT BUFFPT LOCATE I ENTOR T2 IE'0 I ESWT EL T2 SR I TAU=