t . u, .. . L , . t , )a 4L... 5.... .9 I»! t I... I ..v $5.! . m. .... IX 1. . n D .9 Bit 9.!) 9L . ,v . u l ‘5 sh.» ... ...: .I it. . and: . ...»... . . § 5. I L. 0.. > . ‘ a l . .3... . I utnr’t..¢a. ..theaAflgc ...}. ?. u n v 562...}. r I. 1“. 51.537.3‘ Pin" .- “WWW.“ ht . a»)... .7. ~. .u .I 9 p x» o. 72. ...L 1...... A;\« Aggyr-deptfi “guiuévtmfint « shfibfifi‘ifihfi. « Clint. .slfififa . «i phi. En .. . ... a. hvdfiihm‘nmus :uvllt. \ . guav.‘ it 1:71,” .6 {EM}. AiMakfs. .%‘a.f . ..Htfitvou‘.}%n?. “N. ”2.... \t fix . mg. p.11 .. ._ ..t: 3575!» ...... .gfl... ..IApr§svo:ib.-.I\§ 7.? “tusgltyélu q... tw.2J:!{Lul¥ 1hr: t..§..£ifi.~>fi}‘b "...-...;snfld. . s . . . iv -, I 94: Vf’t‘ £35.. 31’! 3%.)?! IlsKtO. , E, .1. 54 ‘5 .. , 1?. {Eng N0. 3.522. t.. y! 7):...5Ebtiffll s . 9.. . . . A t. . Lfipé .92-; .. fig cit-El ’ut-J.‘ , tiliff....9¥ y u. 2. .. .. . t... I it .- 1? . 1% In! strz..5n6. .... ......kllt p, h. u . v ...... ...y i .... «(v é ;. z. ... ..‘Nwwzfl‘i‘gomVxhbtflvfIBiflhohflfifltfllifihOMnlblNuahi‘KNA .3.§v}1bu§-HM .Uehlhtulutifsndnvsdulr . 1 I .. .... . . I .... 99......» -‘ 3.1 A. u» 3. VIII §l «Fig .I. h {fingvg . H55}?! .38. 4%.. :5 . .stIs xcin‘tbxt :.I.{vv’.n3!f.b.zi .... I a. s .9. at. 9:. ... ..§.bbw%:.§1dé ... g p gt tits I a «zitavt O thk‘fil I’lllsrf“ . .. to.» 133‘. . ~ . .. l... . vb»... r .... r In“ .1 «rigs Dr . IV 1%!) tuft fit—lo. fl. A. hint}! . .. .I itng: ... t ‘ c siztaftisprarlhf Si....{..yrrfr.$. .iafnvi-h .... . 2.4 h..fl§‘2..r. ...... tangy .. u in .N9 . . 1. $23 hgx.‘ ..wz A. L .2!“ . pk . i I . t key! phi-1;: {£7alxt.‘ Pigs-r?! 1.1.. fill?! .1, {4% Pg ‘3...» $5.! u Inql Rd ‘S r .p 0 . Kn. Iii}!!!E..\\x¢)fptf~$rl.§~vsf$tig ft ’ I- if . 1., .. u. . 0.! u r; .r\ x. if it ut.’f£‘i§h£f£§?lffir f-!.&§z§ to. Cf. til?£\ b .00).! ef.5...ru)6bv.zg 5:91.... E4053}... 07;.3quéhu; ti... .Fyofkig‘x .2. c E I. “.21.... .3 n 9. .1 .a:£.flf.1|¥|¥t0n\~!rriv§§tbfir .. 9| .li lylysl‘y‘ r1) 5. u 1.15 8154‘. 52. ”fig-tnt&x’v it n» r: ‘ .. in" I .xtl lllllt '. Ill-f”, Us: I “.’§£ Ii . Libttkjhv2?.lhifitikxtblvt:vrikfuszzihri{1E1 a... K furlggii v LIA£04LEHLFIILV ‘0. \.~A.O£9!E. 2PE:€;I.?35~.£4§IE£I~ ifiFII-rria‘r. It. s r stst . .... , #5 ugfigg .....v .5 a......ri...!i!{...!éarvi...ny....z.-fi$)fuvp:rtfl+nvlfinut. . $."Wiht’ryfiauo; «...u a .. #3:?“ .81....3 {than £0. .3»... 2:! ufvvl.‘t(l‘.vv. Iro¢~ki¥ 3. pl: 5.? I. «)9 II. a. .114“: ..I' 19-79....3139 «nag it’sé‘.‘ \. fit... {ff}. $7.. )t. .Ovflt: r) urV‘fnt’ths-ftbrrl.290}f:.i§|t91.§l§£o~v¢ f . N‘. 1.9:.Iaanllinlh . 3‘! fig-L5 I; ‘91:..i'grgii’5 \uvl?!...Killuuiit...:;:¢:E:\f.rfi.-unflk~y§‘tqi‘b¢ rfiv’ I: . .. '- thllffir. g fik.vvfh1|b.;rx.l'lrfiiti ...ll’ul °§£PJ§OL . grin ‘t’h‘uvlh . I v 3.1!. i. ”twp. ...At.’ \. :9 ......i‘s.‘ $235.5.l...’ in»: .. ugh)?! ’th‘nmmuvrulvr‘a6v‘o prurifhnllfl trial... viii”?! 3.‘ \ ...! t n. .rflflsuf‘. . t E‘f‘fflfgf .‘r’rditfhtfryfs {it}! ...: ...".L ,. :I‘I.‘ ’ighfl’VIbEIf-it' U A iv}; 0". g‘n‘b’YJJ‘INQWNV .P .4? iii... . Lf. ..r’irlv... .. gritty). bitty...ng .. . .3... 2? (Egyflbi . .. x . F1379. . \. ... 2...”; Mjwflirbfifhriii$Lfif ; i‘g Afr» a HHFH??..A££-l9lil.hh£§.. ... .. I... :1 >01 7'; 7.1;...» Ir “9:50.... Ettlr thruiltrahvrbflrbrtn In! ”, ";£tt’lh" t; r....::lfé&i‘§§£ to. .l 7“: 3f, (5":hw I; I f, Ar-ftkftl‘gi; 5::f5t3156 viié‘. $4.01: iaErErtha‘flI-t5f1’p; ”indict-.00 .16).: ‘0 Ifif‘ ...... $15,!) a. tiff I}! Gallblx.‘ helm?!" 310;? .r I .: timinafnrzmwnfinfl ......l’fifx 5‘05}. ’rxh.’»|¢-Oil 1.5.15; ”4.1.335”; . .“li-ing .7“. Ir; :3 ‘vtrntinxf’ D... 0.. a”... {i . o . . 5...! u. .- . - , )3 . ...oth it? t :33: e....t.$.i§ .2... §§....otl§.fidu2rt .....uu ..ut:%t£..n.f.-.$xi-. , . . 1.3 Milksl L L . . Q . s. . , . . . . . .h . U a '. v . . .l.t...2Avr.ut.{f . .... wills 2.... .ll...a.fl.¢...i:f m...»....w..?¢ttrrt.xstf. ...... . . {iii .... LID)...“ (Fintirflfm , 571 Eu!» :1 15:31.»): , ,rnirsrr. . ..- 1ft¢....ft!. {(f‘ vfrr 7‘ i . t 5 II- . . I | in... it . n . .‘g s gn‘litt:u‘h~. itfi . . .5! 6 . On! It! . §3.§ :1 £21.15... z u z . . Sunni gifififlnm\ 3% 3i 3“.3.\ o. u . Lu! . h. . 311;;3. ~1§1 I1. I... r ... it . if n ) . r ¢£I95FI§§ . grrhll‘bglflrfllgig ...; W 0"): v .54 . s. 2.13.1.1 3X4iis ...-gnu“... . . 3’3, 73 534.4)... ‘ .3£§v§\¢i... . . ....T 73?-.353331 ......x t 3.-.)... . . ...}. _ -..q 1.2.3.33. ..I..... -.. ., .. . . , ... _- 3.5611... ll‘ \ , . .91. A ..t x .. .v!!! Al‘s). . . . a. t . Iii. ‘ 1 ... . 1.. iii-31?. . ... .1. I . 0313;3333v‘33 a . )1 . . . .. ......mjt ..N 31.3.1013 ilegl!azn).\. .. . I . ...”...n. ‘4‘ I“1(‘UHu . 1C. . .‘i- . . .‘nu h .I. . ‘ \...|‘\‘§.Q.!.§\.. I. . . . i f... n ...... -..... .. ...: . a ‘1... . ... v . . .Q‘Li~’nn \ .. . . ...-I ; .-.. . \.K.A \ n v? .r. 3... .. a . ... . q {.12}... . . .. ”“5520 I . ;v.-.\..tr .....K‘ ..- . I .. T. 7!...» . 0... flit}. . .-. , v...¢‘.xv J‘v’n . 15.... . cl.r..n..».. . . .. q.;.p.f....-..:........-. J .. 5... . . . ....‘,u.lI . ...».....t > ..1 . .. .L. x . r. . . A . x. . . ... in .. ..w i . .. .I. 5.9%.. .... \nr . ... v: \ . .,.. I) 7.7. [)ate , 3 1293 00085 lIBRARY Michigan State University H l This is to certify that the thesis entitled SYMBOLIC LINEAR ANALYSIS PROGRAM presented by VIVEK JOSHI has been accepted towards fulfillment of the requirements for M. S . degree in Elec . Engr . a2/2/ / [j 0 Major professor 8/21/87 0—7639 MS U is an Affirmative Action/Equal Opportunity Institution MSU LIBRARIES m RETURNING MATERIALS: Place in book drop to remove this checkout from your record. FINES will be charged if book is returned after the date stamped below. «a? AUG 1 0 2001 01 16 0 3, SLAP: Symbolic Linear Analysis Program By Vivek Joshi A THESIS Submitted to Michigan State University in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE Department of Electrical Engineering 1987 Copyright by VIVEK JOSHI 1987 ABSTRACT SLAP: Symbolic Linear Analysis Program VIVEK J OSHI A symbolic linear circuit analysis program is developed. The program incorporates four modules. The first module writes the nodal equations of a circuit defined to it in a particular format. The second module computes the transfer function of the circuit from the matrix nodal equations. The third module identifies any filter functions present. The filter parameters are also identified if a filter function is present. The fourth module helps in reducing the error due to finite gain-bandwidth-product (GBWP) of an operational amplifier. DEDICATION I would like to thank my parents for putting up with me during my teenage years and college years iv ACKNOWLEDGMENTS I would like to thank Dr. Wierzba for his guidance and help during my research. I would like to thank Dr. D.P. Joshi and his family for providing me with help whenever I needed it during my college years. I would like to acknowldge the Michigan REED grant which allowed me com- plete the project on time. Table of Contents LIST or TABLES .............. .................................................................................... vi LIST or FIGURES ................................................................................................... vii I. PREVIEW OF RESULTS AND BACKGROUND INFORMATION .............. 1.1 Introduction ........................................................................................... 1.2 Problem Statement .................................................. 1.3 Solution Approach ................................................................................. WQNF-‘F‘ 1.4 Organization of Thesis .......................................................................... II. LINEAR CIRCUIT ANALYSIS USING NULLATORS AND NORA- TORS .......................................................................................................................... 10 2.1 Introduction ............ L .............................................................................. 10 2.2. Nullator and Norator ............................................ 10 2.3 Modelling of Dependent Sources using Nullors ..I ............................... 11 2.4 Nodal Equations of Nullator-Norator Circuits ..................................... - 19 2.5 Modeling of Voltage Source and Inductor ........................................... 23 2.6 Example ................................................................................................. 24 FILTER FUNCTION IDENTIFICATION ................................................................ 31 3.1 Introduction ..................................................................................................... 31 3.2 Low Pass Filter ..................................................................................... 31 3.3 High Pass Filter ..................................................................................... 32 3.4 Band Pass Filter .................................................................................... 33 3.5 Band Stop Filter .................................................................................... 34 3.6 All Pass Filter ......................................................................... ' ............... 36 3.7 Example with Filter Function Identification ........................................ 36 ERROR ANALYSIS DUE TO GBWP ..................................................................... 43 ‘ 4.1 Introduction ........................................................................................... 43 vi 4.2 Methodologies of Error Reduction ....................................................... 43 4.3 Generalized Error Analysis using the Wilson-Bedri-Bower Approximation ................................................................................................ 45 4.4 Example ................................................................................................. 51 FUTURE RESEARCH .............................................................................................. 63 5.1 Introduction ..... 1. .................................................................................... 63 5.2 Future Research and Topic of Interest ................................................. 63 APPENDIX A ............................................................................................................ 65 Writing Input Files for SLAP Modules ........................................................ 65 BIBLIOGRAPHY ...................................................................................................... 78 vii LIST OF TABLES 2.1 Input to the matrix writing program, Module 1 .............................................. 28 2.2 Prompts and Responses'for Module 1 ............................................................. 28 2.3 Output of Module 1 ....................................... . ................................................... 29 2.4 Prompts and Responses for Module 2 ............................................................. 29 2.5 Output from Module 2 ...................................................................................... 30 3.1 Input to Module 1 ............................................. _ ................................................ 3 8 3.2 Output from module 1 ...................................................................................... 38 3.3 Input to module 2 .............................................................................................. 39 3.4 Prompts and Responses for module 2 .............................................................. 39 3.5a Output from module 2 ...................................................................................... 4O 3.5b Output for module 3 .......................................................................................... 40 3.6 Output from module 3 ...................................................................................... 41 4.1 Input to module 1 .............................................................................................. 54 4.2 - Output from module 1 ...................................................................................... 55 4.3 Prompt and Responses for module 2 ......................................... I ..................... 56 4.4 Output of module 2 used as input to module 4 ........................ 57 4.5 Determinant with B**2 and higher order terms suppressed ........................... 58 4.6 Prompt and Responses for module 4 to find error in t ................................... 61 4.7 Error in t ............................................................................................................ 61 4.8 Prompt and Responses for module 4 to find error in q ................................... 62 4.9 Error in q ........................................................................................................... 62 viii LIST OF FIGURES 1.1 Error in natural frequency as a function of design frequency ........................ 1.2 Error in the selectivity factor as a function of design frequency ................... 5 1.3 Error in the selectivity factor as a function of selectivity factor .................... 2.1 N ullator and Norator Symbol ........................................................................... 12 2.2 Voltage Controlled Current Source Model ...................................................... 14 2.3 Voltage Controlled Voltage Source Model ...................................................... 15 2.4 Current Controlled Current Source Model ....................................................... 16 2.4 Current Controlled Voltage Source Model ...................................................... 17 2.5 Voltage Source and Inductor Model ................................................................ 25 2.6 Circuit Generated from Tow-Thomas Biquad ................................................. 27 4.1 Circuit Generated from Tow-Thomas Biquad ................................................. 53 Al.1 Circuit Symbols ............................................................................................... 67 A12 Circuit Symbols ............................................................................................... 70 A13 Circuit Symbols ................. , .............. 7 ....... ' ..... ..... 72 A1.4 Circuit Symbols ............................................................................................... 74 ix CHAPTER I Preview of Results and Background Information 1.1 INTRODUCTION Circuit analysis is an integral part of circuit design. It gives the designer room to experiment with different components to realize a particular circuit. Unfortunately as circuit realizations get more complicated it becomes very tedious to perform circuit analysis by hand. As an aid computer analysis packages, such as ECAP and SPICE were developed in the 1960’s and 1970’s. These packages perform complicated circuit analysis on a computer in a fraction of time of what it would take to do by hand. There is always a new or-better program that is being developed that eases circuit analysis or improves on speed and accuracy. For example, PSPICE developed by Microsim Corporation is a version of SPICE which runs on a personal computer. In addition, to the standard features of SPICE, PSPICE has graphics, cunent sensing and Monte Carlo analysis. PSPICE as well as other programs place emphasis on numeric analysis, that is the elements have numeric values that the program uses to compute the circuit variables. The problem in using numeric circuit analysis is that the element values are combined in the final answer. This makes it difficult to evaluate the effect an element has on the total circuit response. The ultimate solution to this problem is to obtain a symbolic analysis. Unfor- tunately symbolic analysis is notorious for generating large amounts of results. How- ever, a symbolic analysis package written for a particular class of problems can be useful since many complicated circuits have relatively simple design equations. Since the software is designed for a specific application, it is important for the user to have a thorough understanding of that application. Furthermore, since there are usually an infinite number of component selections for a given circuit, the output of a symbolic program will not be the final step and the user must complete the design. 1.2 Problem Statement Since the late 1960’s, the use of active elements in filter design has become more and more involved. As chip fabrication and design procedures improved, the cost of realizing an op-amp on a chip decreased and the use of op-amps in filter design has increased. Op-amps have been used extensively in hybrid active filters where the op- amp is connected to a ceramic substrate containing passive components. Op-amps have also been used for realizing switched capacitor active filters where the entire filter is fabricated on a single chip. An ideal op-amp has infinite gain and infinite bandwidth. The IC op—amp, of course, has finite gain and finite bandwidth. In a resistive feedback configuration, the bandwidth of an op-amp circuit can be extended by trading off the gain. Essentially the product of gain and bandwidth remains constant and is referred to as the gain- bandwidth-product (GBP in Hz.). One way to get more bandwidth is to cascade dupli— cate circuits. The cost of this approach lies in the increased number of circuit ele- men IS . In active filters, the effect of GBP is that the design poles (and zeroes) are shifted. Besides this, additional poles are introduced which can cause stability prob- lems. Active filter transfer functions are usually expressed as the product of second order equations. There are two terms in the denominator of a second order transfer function, f0 and Q0. Since the non-ideal op-amp shifts the desired poles, this results in a new value of f0, f0 and a new value of Q0, Q0. It has been shown that for the Multiple-Input-Biquad of Fleischer and Tow [9] using matched op-amps. Af0 _ f0 f0 ‘- GBP (1) AQo _ 4Qofo '22? — GBP (2) Since Afo =on - f0 and AQO = éo - Q0, therefore solving for f0 and Q0 with the appropriate approximations yields: fo = —L (3) f0 1 + GBP ~ Q0 = —- 4 Q0 1 _ 4Q ofo ( ) GBP Equation 3 is plotted in Figure 1.1 to show how the actual frequency changes with respect to the desired frequency. Equation 2 is plotted in Figures 1.2 and 1.3 to Show the dependence of Q0 on the selectivity factor and the natural frequency of the circuit. These figures were obtained by using the GBP = 1.00E+O6 (a typical value for a 741 OP-arnp). The Multiple-Input-Biquad is a three op-amp active filter and the errors found with equations 1-4 are small compared to one and two op-amp active filters. As in the case of resistive feedback amplifiers, adding more op-amps results in a wider range of performance. Hence the product of f0 and Q0 must be traded off in order to keep the circuit stable, since it can be noted from equation 4 that Q0 approaches infinity as 4chO approaches GBP.’ oo+mF hhnhbb mo+mw moamsconm oohmoo ¢o+mF hip-nbEi- b —Pbp-PP ri- oooF —-Pbt n b 00? —n-blpb P b F OF —nbpb.-L - P oomAV Figure 1.1: Error in natural frequency as a function of design frequency mocoflwofim eohmmo mo+mp mo+m2 ¢o+mp Door 03 OF F T emu a min . . - - on o r ,. 2:" a To 1 t r T rm: . r t f ... A T .. T .. room .. 4 r r L. T T r i Tome .. T i r uh. P - rub-nu nil? —h—L EH r-tP- P b —:-nbhlb r —:~:P- P Figure 1.2: Errorin the selectivity factor as a function of design frequency neuomm magfioofiom Uohmom oohm 00.8 0060 oodm 09mm oodm 00.0 p L “Ill? ll? '— L L l— ILl 1P 1— Ll h L L \.. m .... .NEHHH DIE .x\ m dam—mu.“ «In cm H. .Nmmu—oflflom ole mm ... o . 533...... To n. .Naomfld Ole on H. mm H. om ..... mm m o: m. .. n? w oi m of m. o: m L. of .. - CON 109193 pamesqo tar Joined in Figure 1.3: Error in the selectivity factor as a function of selectivity factor Recently, a systematic procedure [24] has been proposed for generating active filter circuits which uses an existing seed circuit. From a single seed circuit, thousands of new circuits can be generated. For each of these circuits equations 1—4 needs to be determined again. The time required to compute these equations manually is on the order of four hours. Clearly,'with thousands of circuits this is a hard task. In the Multiple-Input—Biquad, counting the 0p-amps and the passive components there are eleven symbolic elements. In other biquad circuit structures, there may be as many as fifteen to twenty symbolic elements. At present there are five symbolic circuit analysis programs, SNAP [16], VLACH [13], MECA [17],CORNAP [19] and SLIC available for this purpose. CORNAP does not really allow for any symbols. It just produces the transfer function using the symbol s for it’s frequency. The number of variables allowed is too few to be effectively used for the scope of this problem. For example VLACH [13] allows for only ten voltage sources, five symbolic elements and forty elements. 1.3 Solution Approach The purpose of this research is to develop a Symbolic Linear Analysis Program (SLAP) which would provide the analysis to generate formulas like those obtained in Equations 1-4. Symbolic manipulation can be performed for multiplication, addition and subtrac- tion with concatenation of strings. Then term reduction 'is done by comparison. Divi- sion is far more complicated especially for term reduction because of the need for a common factor. Also, a large amount of storage is wasted since at least twice the amount of memory has to be set aside. Therefore, division must be avoided. Without division, the inverse of a symbolic matrix can not be obtained. Thus matrix techniques which require an inverse such as LU decomposition will not be helpful. In SLAP, the nodal admittance equations of a circuit are first formed. This involves forming a matrix using addition and subtraction. A recursive technique is then used to compute the determinant of the admittance matrix. In order to determine the transfer function Crame'r’s Rule is used. Error analysis is performed by solving for the general form of the answer and searching for the appropriate terms in the deter- minant. In a similar manner, transfer function identification is performed to find the ideal design equations. The programming language chosen was C. The reason being that C is an extremely versatile language and C has the advantage of being perhaps the most port- able language. FORTRAN was rejected because it does not have a flexible method for handling the string manipulations involved and FORTRAN does not support recursive calling of a function. PASCAL allows for strings manipulation and recursive calling, but its portability is a very seribus drawback. For example, a program written in PAS- CAL for the VMS operating system can not be compiled on the UNIX operating sys- tem. The only limitations of the program developed are the amount of computer memory and computer speed. 1.5 Organization of Thesis The remainder of the thesis is organized in the following manner. In Chapter 2 the writing of nodal equations and the formulation of the transfer function are dis- cussed. The circuit elements used in the program are identified in Appendix A. An example is given showing the input and output format alongwith a sample run of the program. Chapter 3 describes the filter identification program. Also presented are the van. ous filter types available and an example is worked out using the program. The pro- gram of Chapter 2 can be used to write the file which is the input to this program. Chapter 4 discusses the error analysis according to the Wilson-Bedti-Bowron Approximation. A new derivation is worked out completely where op-arnp matching is not assumed. The various error terms and their significance are discussed. An example is done to show the working of the program. Chapter 5 states the conclusions and discusses further research topics for extending the program. CHAPTER II Linear Circuit Analysis Using Nullators and Norators 2.1 INTRODUCTION Given a specific circuit with element values, then it may be tested by using SPICE or other numeric programs. However, a circuit designer needs to select the component values to meet some design criteria. In order to do this the formulas for the design parameters must be found. This is a tedious process and requires some skill in writing and selecting the equations. This chapter deScribes a technique for systematically formulating the nodal equa- tions of any linear active circuit. 2.2 Nullator and Norator A short circuit has a voltage which is zero and a current which is arbitrary. By arbitrary it is meant that the value is determined the circuit in which it is used. An open circuit has zero current and a voltage which is arbitrary. Combining both of the properties of zero voltage and zero current results in a new circuit element called a nullator [25]. The circuit symbol for a nullator is presented in Figure 2.1a. A voltage source has a specified voltage and an arbitrary current. A current source has a specified current and an arbitrary voltage. The combination of both arbi- trary current and arbitrary voltage is also a new circuit element and is referred to as a norator [25]. In Figure 2.1b, the circuit symbol for a norator is shown. 10 11 An ideal op-amp can be modelled using a grounded voltage-controlled- voltage- source with a gain of A, where A approaches infinity. The controlled source draws zero input current and has an arbitrary output current. In a stable closed loop circuit, the output voltage of the controlled source is finite and determined by the circuit in which it is used. Since the output voltage is the product of the sensing voltage and infinity, then for a finite arbitrary product the sensing voltage must be zero. Thus the ideal op-amp has zero-voltage-zero-current at the input terminals and arbitrary current and arbitrary voltage at the output terminal with respect to ground. This is modelled with a nullator and a grounded norator. 2.3 Modelling of Dependent Sources using Nullors Besides modelling of an ideal op-amp, nullators and norators can also be used to model controlled sources [25]. Voltage-Controlled-Current-Source (V CCS): A VCCS is given in Figure 2.2 along with a nullator-norator-conductor model. The current entering the input terminals of Figure 2.2b is zero because of the nullators. With a voltage drop of zero across each nullator, the drop across the conductor is V1 and thus the current through 'this conductor is ngI. With no current going through the nullators, the current in both norators is forced to be ng1. Therefore, 12 = ngI. The voltage V2 is the sum of the voltages across the norators and the conductor. Since the drop across a norator is arbitrary, this sum is also arbitrary. Voltage-Controlled-Volrage-Source (VCVS) 12 +7 \/i—-l VJ?“ E Figure 2.2 a) Nullator Symbol b) Norator Symbol 13 A VCVS and a nullator—norator-conductor model are presented in Figure 2.3. For Figure 2.3b, the input current is zero due to the nullators. The current in the one mho conductor is Vl*1. This current is forced to flow through B because the nullators prevent any current from entering the leaving the loop which contains the two conduc- tors. Thus the voltage across 3 is VllB. This voltage is transferred to V2 with the nul- lator connected to B. The current 12 is the current in the norator across the output ter- minals. Thus 12 is arbitrary. Current-Controlled-Current-Source (CCCS) In Figure 2.4, a CCCS and a nullator-norator-conductor model are shown. For Figure 2.4b, the input voltage is across a nullator, and this by definition is zero. The current I 1 flows into the one mho conductor and the voltage is transferred across a. Thus 12 = ([1 * l)/a = all. The output voltage V2 is the sum of the norator voltage and the voltage across a. Therefore V2 is arbitrary. Current-Controlled-Voltage-Source (CCVS) A CCV S is shown in Figure 2.5 along with a nullator-norator-conductor model. The input voltage in Figure 2.5b is zero and the current [1 flows through 3 creating a voltage drop of 11/3. This voltage is transferred to V2 by using the two nullators. The current 12 is the current of a norator and is therefore arbitrary. 1.2 Nodal Equations of Passive Circuits In order to be able to analyze a circuit with a computer it essential that the circuit be described in an equation form. Given a passive circuit with independent current 14 Q ”Li? Y~’-"‘ gm Figure 2.2 a) Voltage Controlled Current Source b) Nullor model of a VCCS 12 < 13c Va 5d "d lS I1 I— ———————— 1 12 3% > I j é <30 + l I + l .I V‘ I i Vt/B| V2 1 l I | b—T i It 5d 1— ________ _J It b6: .0 Figure 2.3 a) Voltage Controlled Voltage Source b) Nullor model of a VCVS V27" 16 Figure 2.4 a) Current Controlled Current Source b) Nullor model of a CCCS I ______ acfi >1 J— _1 132%“ + I I + I l , I I VI I I./g I V. I I ‘ | l bk I J 4 d Figure 2.5 a) Current controlled Voltage Source b) Nullor model of a CCVS 18 sources, it is possible to form the circuit equations by inspection. This technique uses simple summation of terms and does not require an understanding of circuit equations. This can be programmed and is as follows: ALGORITHM l [25]: 1) 2) 3) 4) 4a. 4b. 5) If an (n+1) node network is composed of RLC elements and independent currents sources, then the following steps may be used to form the nodal equa- tions for the circuit. A reference node is selected and labeled as node 0. All other nodes are labelled sequentially from 1 to n. The node equations contain a current vector 1 of dimension n x 1 : where the i’hcomponent, i,- is defined as the sum of the currents flowing into the 1"” node from the independent current sources. The nodal admittance matrix Y" x "=[yij] has dimension n x n and may be writ- ten by inspection: y“ is the sum of the admittances connected to node i. yij is the negative sum of the admittances connected between nodes i and j. Therefore the nodal equations of the network in matrix form are: I = Ym x V 2.1 where V is a column vector of unknown node voltages, of dimension n x 1 and is represented as : l9 2.4 Nodal Equations of Nullator-Norator Circuits In the last section, equations were formed for passive circuits by inspection. If controlled sources or ideal op-amps are included in the circuit then decisions on which equations to write have to be made. This is extremely difficult to program. However, an algorithm for the formulation of circuit equations by inspection for norators contain- ing nullators and networks does exist. Since controlled sources and op-amps can be modelled with nullators, norators and conductors, then this algorithm would allow for the formulation of equations for all linear circuits. ALGORITHM 2 [25]: If an (n + 1) node network is composed of RLC elements, independent current sources and m—nullatorsjm-norators, then the following steps may be used to form the nodal equations for the circuit. 1) With all of the nullators and norators open circuited, form the nodal equations using Algorithm 1. The result is of the form: I=Ynan 2) For a nullator between nodes d and j, add column j to column d of the matrix Yn x 3. Delete column j from Y" x n and delete vj from the voltage vector V. 3) 4) 5) 6) 20 Search through the remaining nullator node connections and replace every occurrence of node j with d. For a nullator between nodes e and ground, delete column e from the admittance matrix Y" x n and delete v, from the voltage vector V. Search through the remaining nullator node connections and replace every occurrence of node e with 0 which signifies the ground connection. For a norator between nodes f and )2, add row It to row f of the admittance matrix Y" x n and the current vector 1. Delete row h from the matrix Y")( n and the current vector I . Search through the remaining norator node connections and replace every occurrence of node h with f. For a norator between nodes g and ground, delete row g from the admittance matrix Y" x n and the current vector 1. Search through the remaining norator node connections and replace every occurrence of node g with O which signifies the ground connection. Repeat steps 2-5 for the remaining (m - 1) nullators and norators. For each nullator the number of columns is reduced by one. Similarly for the case of the norator the number of rows is reduced by one. Therefore, for m-nullators and m-norators, the number of columns and rows is reduced by m. The nodal equa- tions for the circuit therefore reduce to: I = Yot—m) x (n—m)V Proof: Replace the nullators and norators in the circuit with open circuits. Consider two nodes of the circuit and the corresponding nodal equations. 21 Vd =0. Let a nullator be inserted between nodes d and j with a voltage v = 0 and i 1) Since v = Vd — vi = 0 and i = 0, then the entries are modified as follows: 'dnxl Vd Vd This reduces to: 22 2) If a nullator is inserted between nodes e and ground, then by a similar argu- ment as above v, = 0. This results in each entry in column e of Ynx n being multiplied by zero. Thus column e of Y" x ,, is deleted and v, is removed from v. 3) Let a norator be inserted between nodes f and h with a voltage v = arbitrary and i= arbitrary. Then the entries for rows f and h are modified as follows: . zif- i 2i,,+i In ‘nxl --------- V r --------- f ......... VI; h _________ . .nxntu If row It is added to row f, then the above matrix equation reduces to: I' q 2'} “*1 XII: In]... f+h ————————— r IN)“: If V}: - d Hence the arbitrary (unknown) value of i is eliminated from the equations by adding rows f and h. The value of v may be neglected since it does not directly enter into the node equations. 4) If a norator is inserted between nodes g and ground, then i will appear only in row g of I. Since i is arbitrary this equation has an additional 23 unknown. Furthermore, for each norator there is a nullator and this nulla- tor has reduced the number of columns by one. Hence, this row is not needed to solve for the remaining unknowns. Therefore, row g can be neglected. 2.5 Modeling of Voltage Source and Inductor: A voltage source is not included as an element in Algorithm 2. This is due to the fact that currents are summed at every node and the current through a vol- tage source is an additional unknown. However, most circuits are driven by a voltage source and it would be convenient not to do a source transformation, where a voltage source and a conductor connected in series are converted to a current source with a conductor in parallel. An independent voltage source can be modelled as shown in Figure 2.6a. The idea of a current source feeding a 10 conductor is used to develop the nec- cessary potential. The nullator has zero current through its nodes and zero vol- tage across its terminals. Therefore, the voltage developed across the conductor is of the value v and is also developed across the norator. During programming of this element the value of the voltage source is set to i internally in the pro gram. The program can be used to find the transfer function as the program sets the value of this voltage source to unity internally. If a different value is desired the program can be easily modified to handle different values. The symbol for the ideal voltage source is given in Appendix A1.2 while its equivalent nullor model is given in Figure 2.6a. 24 An inductor is also an element that has to be uniquely handled. Since admittance is used to form the nodal equations, then an inductor can not be used as such without introducing division. Using a special symbol for Us is an alter- native but this would cause very long terms to appear in the final answer since at this time the program- is unable to cancel the l / s *s terms. A capacitor has an admittance which is a string of terms and an inductor can be simulated using a capacitor, conductors and nullators-norators. Thus using a simulated inductor as a model for an inductor is a convenient way of avoiding performing division. The simplest model for a simulated inductor is given in Figure 2.6b. 2.6 Example This technique for reduction and forming of the nodal equations is used in one of the modules of SLAP. The nodal equations are written by the software and the simplifications due to nullators and norators are then performed automat- ically for the user. Another module of SLAP finds the symbolic determinants of the numerator and denominator of the transfer functions of the circuit. This pro- gram also gives the user an option to write out files for use with other modules of SLAP. An example is presented which illustrates the concepts described in this chapter. The user can use the programs at any step if the files are prepared in the proper order for that module. The circuit given in Figure 2.7 was obtained by op-amp relocation[23]. First we need to obtain the transfer functions of this circuit using ideal op-amps. The input file for Module 1 of SLAP is shown in Table 2.1 (see Appendix Al.2 on help in constructing this file). This module formulates the node 25 Figure 2.6 a) Voltage Source N ullor Model b) Inductor N ullor Model equations: I = Ym x V and prepares an output file which is used by module 2. The prompts and responses for the example are given in Table 2.2. The output file, "ideal.2" is created and the file'contents are listed in Table 2.3 (see Appendix A1.3 on how to write this file). Module 2 uses the file "ideal.2" as an input and has a variety of outputs. The prompts and responses for this example are presented in Table 2.4. The output file, "ideal.3" is listed in Table 2.5. Figure 2.7 Circuit Generated from Tow-Thomas Biquad 28 5 6 Table 2.1 Input to the matrix writing program, Module 1 % a.out **** INFORMATION ABOUT THE INPUT FILE ***** Please input the file name you would like to use ideal.1 You have chosen to use file : ideal.1 Please answer Y or N to proceed Y . **** INFORMATION ABOUT THE OUTPUT FILE **** Please input the file name you would like to use ideal.2 You have chosen to use file : ideal.2 Please answer Y or N to proceed Y Table 2.2 Prompts and Responses for Module 1 29 COO-b +1 -Gl-sC1 0 -G5 -G6 -G2 -sC2 ‘63 Table 2.3 Output of Module 1 t a.out **** INFORMATION ABOUT THE INPUT FILE ***** Please input the file name you would like to use ideal.2 You have chosen to use file : 1deal.2 Please answer Y or N to proceed Y **** INFORMATION ABOUT THE OUTPUT FILE **** Please input the file name you would like to use ideal.3 You have chosen to use file : idea1.3 Please answer I or N to proceed Y Does the circuit contain any non-ideal operational amplifiers? Please answer y or n only n Would you like to see the numerator terms? Please answer y or n only Y Would you like to prepare a file to check the transfer function(s) for any valid filter functions? Y Please input the file name you would like to use 1deal.4 You have chosen to use file : ideal.4 Please answer Y or N to proceed Y Table 2.4 Prompts and Responses for Module 2 3O -Gl-SC1 0 -G5 0 -G3 -G4 H O O O I C) N I U) 0 M O DENOMINATOR IS -SC2*SC1*G4 -SC2*G4*Gl-GS*G3*GZ numerator for V2 is SC2*G6*G4 numerator for V4 is -G6*G4*G2 numerator for V6 is 66*G3*62 numerator for V7 is -SC2*SC1*G4 “SC2*G4*Gl-GS*G3*G2 Table 2.5 Output from Module 2 V2 V4 V6 V7 CHAPTER III Filter Function Identification 3.1 INTRODUCTION The purpose of a filter is to pass a band of signals and block the undesired sig- nals. Filters are described in the frequency domain by unique transfer functions in 3. These transfer functions can be further simplified into a product of second order or biquadratic denominators. This. chapter describes the basic biquad transfer functions for low pass, high pass, band pass, band reject and all pass filter. Module 3 of SLAP identifies these transfer functions and extracts variables such as f0, Q0 and H0 in terms of the circuit elements. 3.2 Low Pass Filter: The transfer function obtained for the case of a low pass filters is of the form: , 2 H0030 = 52 + (coo/Q0» + (03 H“) 3.1 It is observed that as the quantity s tends to zero the denominator tends to (0% and the transfer function tends to H0. On the other hand if the quantity 5 tends to infinity the denominator tends to infinity and the gain of the transfer function tends to zero. The magnitude of the transfer function is expressed as: 31 32 1 lb" )l G< ) ”3&3 3 32 = (1) = . (1w ((9% - £052 + (Cocos/Q0)2 The low and high frequency response can be approximated as: Ho for (n < (00 IHUCON = 3.3 [100%le for (0 > (Do It is seen from equation 3.2 that at the cut-off frequency the value of gain [H(iw)| = HOQO. As is shown in Figure 1.1 and 1.2, the finite GBP affects the observed 030 and Q0. The increase in Q0 will cause larger gains at the cut-off fre- quency. This results in amplification instead of attentuation at high frequencies and might even saturate the op-amp leading to undesireable results. 3.3 High Pass Filter: The transfer function obtained for the case of a high pass filter is of the form: H(s) = H032 3.4 s2 + (coo/Q0» + m3 It can be observe that as the quantity 3 tends to infinity the gain of the transfer func- tion tends to H0 and as s approaches zero the transfer function tends to zero. The magnitude of the transfer function is written as: 1 H3034 7 H' = G = 3.5 I M (0’) (mg - W + (mo/Qo)2 The circuit response at high and low frequencies can be approximated as: 33 ‘ Homz/mg for a) < 000 ”100)” 2 H0 for O) > (00 36 L It is observed from equation 3.5 that at the cut-off frequency the value of gain |H(im)| = HOQO. As was observed in the case of low pass filter, the errors due to finite GBP may lead to an unsuitable filter at the cutoff frequency. 3.4 Band Pass Filter: The transfer function of the band pass filter is of the form: H co H(s) = 32 + (ZED/25:): (03 3.7 The magnitude of the transfer function can be written as: .1. |H(ico)| = 0(0)) = H3m(m3/Q5) 2 3.8 (m3 - (02)2 + (cowo/Qo)2 The low frequency response and the high frequency response can be approximated as: How/(Q0030) for (I) < (1)0 WOO)” .2 {Homo/(Qow) for (o > (no 3'9 It is observed from equation 3.8 that at the center frequency, (00, the value of the gain |H(im)| == Ho. The selectivity factor Q0 can be written as: (00 = —— 3.10 (02—031 Q0 where (02 and (01 are the frequencies at which the magnitude response is 3dB down from H 0. 34 The errors in Q0 and (no can play havoc with the design. A very large value of observed Q0 obtained alongwith a shifted design frequency would mean that the circuit could completely miss selecting the signal it was designed to pass. 3.5 Band Stop Filter: The second order transfer function of a band-stop filter can be written as: mksfl H(s) = 52 + (mo/Q0) + (113 3.11 The gain of this transfer function is: I NI!— 2 fiW-fl 2 2 3.12 (00) 2 2] 0 a) —(o + —— [1’ is] Depending on the values of (.02 and (no, there are three possible cases: IHUCON = 0(0)) = b Case 1.: Rewriting the above equation with (.00 = (02 for low and high frequencies we see that: H0 for co 052 3.14 35 Since (00 < (0,, the value of [H(ico)| is greater at low frequencies than at high fre- quencies. At 0), and too: for (o = co, 0 |H(iC0)| = 3.15 HoQo[ . - cod/<06 f°’ ‘° = “’0 Since (00 < 0),, we note that |H(ioo)| ~ H0Q0m2/w0 at a): (no. This is an error of 2010g10Q0 dB from the low frequency asymptote. Thus H(s) has some properties of a low pass filter and a notch filter and is referred to as a low pass notch filter. Case 3.: Rewriting the above equation with (00 > (o, for low and high frequencies we see that: How? lmo for (n < (o, |H(iw)| ~ 3.16 for (0 > (00 Since (no > 0),, the value of |H(j(1))| is greater at low frequencies than at high fre- quencies. At 0), and (00: [H(iw)| = [m 3.17 4 ”0% Since (no > (0,, we note that |H(j(o)| == HOQO at (o = (no. This is an error of 2010g10 Q0 (13 from the high frequency asymptote. Thus for 030 >coz, H(s) has some properties of a high pass filter and a notch filter and is referred to as a high pass notch filter. 36 As in the case of the band pass filters, the errors in (no and Q0 can greatly alter the desired frequency 0),. 3.6 All Pass Filter: All pass filters ideally pass a signal from a frequency range of zero to infinity. The phase of the signal is shifted in accordance with the phase characterstic of the filter. The transfer function of an all pass filter is of the form: 32 - (mo/Q0)? + 00(2) H(s) = H 3.18 052 + (mo/Q0)? + (0(2) The magnitude of the transfer function can be expressed as follows: |H(ia))| = 0(0)) = H0 3.19 The gain is therefore a constant over the whole frequency spectrum. The phase on the other hand is: / .(.,=-2*m...[_<°.ge£g.] 3.20 (00 — 0) In this case the errors in Q0 and (00 will alter the desired phase response. 3.8 Example with Filter Function Identification Module 3 of SLAP is used to determine some of the symbolic quantities of a second order transfer function. Continuing with the example of Section 2.6, module 2 is run again but this time answering "y" to a check for valid filter functions. The prompts and responses are listed in Table 3.4. The output for module 2 for this case is listed in Figure 3.5a. Module 3 is run with the output file from module 2, "ideal.4". 37 This file is listed in Table 3.5b. The prompts and responses for module 3 are listed in Table 3.7. The output of this module is listed in Table 3.8. Using the information obtained we can now obtain the ideal design equations for the bandpass filter. .' 1 1 m _ 050302 ‘2' _ R4 ‘2' o - G4C2C1 - R5R3R252C1 ' _-———— - — Solving for Ho we find that Solving for Q0, we find that 38 Table 3.1 Input to module 1 0009 -G1-sCl -G3 Table 3.2 Output from module 1 39 Table 3.3 Input to module 2 ‘3 a.out ***' INFORMATION ABOUT THE INPUT FILE ***** Please input the file name you would like to use ideal.2 You have chosen to use file : ideal.2 Please answer Y or N to proceed Y **** INFORMATION ABOUT THE OUTPUT FILE **** Please input the file name you would like to use ideal.3 You have chosen to use file : ideal.3 Please answer Y or N to proceed Y Does the circuit contain any non-ideal operational amplifiers? Please answer y or n only n Would you like to see the numerator terms? Please answer y or n only Y Would you like to prepare a file to check the transfer function(s) for any valid filter functions? Y Please input the file name you would like to use ideal.4 You have chosen to use file : ideal.4 Please answer Y or N to proceed Y Table 3.4 Prompt and Responses for module 2 4o % a.out **** INFORMATION ABOUT THE INPUT FILE ***** Please input the file name you would like to use ideal.4 You have chosen to use file : ideal.4 Please result Y or N to proceed Y **** INFORMATION ABOUT THE OUTPUT FILE **** Please input the file name you would like to use ideal.5 You have chosen to use file : ideal.5 Please result Y or N to proceed Y Table 3.5a Output from module 2 Denominator: 3 -sC2*sC1*G4 -sC2*G4*Gl -GS*G3*GZ V2: 1 +sC2*GG*G4 V4: 1 -G6*G4*GZ V6: 1 +G6*GB*GZ V7: 3 -sC2*sC1*G4 -sC2*G4*Gl -GS*G3*GZ .END Table 3.5b Output for module 3 41 There exists a band pass filter at : V2 The value (H0*omega0/QO) is The numerator is . 66*64*C2 The denominator is : -G4*C2*C1 **********fiifi*ffitfii***i**tt*t*t**ti*iitiiiiititti The value of (omega0)**2 is The numerator is : -GS*GB*G2 The denominator is - -G4*C2*C1 **i******itifiiitiiiifiit***********fi*********tt**** The value (omegaO/QO) is : The numerator is : —G§*GI*C2 The denominator is : -G4*C2*Cl itit*iiiititititif!!!****t************************ There exists a low pass filter at : V4 The value (H0*(omega0)**2) is The numerator is - -G6*G4*G2 The denominator is —G4*C2*C1 *fitfiitifiiiii*****i*********if!*tiittiitiitittiitt The value of (omega0)**2 is The numerator is —GS*GB*GZ The denominator is -G4*C2*C1 ift**i*ifiiiiiiiiii****fi**ifiii*t****************** The value (omegaO/QO) is The numerator is : -G4*GI*C2 The denominator is : -G4*C2*C1 Table 3.8 Output from module 3 42 titfiitittttttttiiti*fiititiiiitiifiittiitti***tttti* There exists a low pass filter at : V6 The value (H0*(omega0)**2) is The numerator is 66*GB*GZ The denominator is -GQ*C2*C1 *****iiiii*******ti*ttfiiii*ifttiittfititititiiiitii The value of (omega0)**2 is The numerator is -GS*G3*GZ The denominator is -G4*C2*C1 *tttit*****i*******************ttrirttiiiiittiifiii The value (omegaO/QO) is The numerator is ' -Gs*Gl*C2 The denominator is —G4*C2*C1 tititfiitfiiitiittttiifittii*ittiiiiittitiititiiiiiti There exists no filter function at : V7 Table 3.8(contd) Output from module 3 CHAPTER IV Error Analysis due to GBWP 4.1 INTRODUCTION In this chapter, a correlation is made between errors in active filters and the cir- cuit component values. A design example is given showing the use of the software to essentially eliminate these errors. 4.2 Methodologies of Error Reduction: Even though the multiple op-amp biquads tended to perform better than their sin- gle op-amp counterparts still the errors due to the non-ideal' op-amp cannot be reduced. It has been demonstrated in [5] that an important parameter in this respect is the gain-bandwidth product (GBWP = 21tGBP) and when excessive demands are made on it, high Q0 performance will be limited to low frequencies and high frequency per- formance will be limited to low Qo’s. To overcome this dependency on GBWP, a parameter the deigner has no control over, the following methods have been proposed [7]: l. Placing an external trimming capacitor across a resistor [3]. 2. Using identical op-amps having matched GBWPs [4-6]. 3. Using matched resistors in such a manner that matched op-amps are not required 0 [7-9]. 43 With the advent in current VLSI technology it is possible to realize a complete circuit on a single chip instead of an op-amp on a chip. The short-comings of the first method are: a. Capacitors of very small capacit ance can only be realized on a chip and even then a large amount of 'chip area is used. b. This method also does not provide temperature compensation since the trimming capacitance and the GBWP’s differ in their temperature coefficients. The second and third methods presented above have been gaining popularity. It is easier to match opamp GBWP’s to an extent if they are realized on the same chip. If on the other hand the designer has to use different op-amps(i.e. those not realized on the same chip) then the third method is definitely attractive. In general the third method is more attractive since matching resistors is easier than trying to match _ GBWP of op-amp’s. Also laser trimming of resistors can be performed to match resis- tors leading to the realized circuit having better performance even at high Q’s and (1)0. Before we can use any of these methods, we need to get some handle on why the GBWP’s cause errors. Using ideal op-amps the form of the denominator of a biquad is: 32 + 20-3 + (1)3 4.1 Q0 The roots of this equation are the poles of the transfer function. If each opcamp is approximated by a first order equation in s then the realized transfer function is of order two plus the number of op-amps . In finding the roots of this equation one finds that the original roots are shifted and the remaining roots are located very far away in the left half plane. In the following section a method is presented for calculating the change in (1)0 and Q0 due to the element values and GBWP. 45 4.3 Generalized Error Analysis using the Wilson-Bedri-Bowron Approxima- tion[1,2,6] For an arbitrary configuration realizing a second-order function the, denominator polynomial caribe expressed as: we = s2 af2(A) + s Bf1(A)+ mu) 4.2 where a, B and y are constants determined by the passive components in the circuit. f0(A), f1(A) and f2(A) are functions of the open loop gain A of the operational amplifiers. These functions would tend to value of 1 if the op-amp has infinite gain. For the case of ideal op-amps the design equations may be defined by the natural fre- quency: f( ) i °° 2 (3)0 = —1—- = -Y—O—- 4.3 To Olf2(°°) and the selectivity factor, Q0 is defined as: .1. [a 'on(°°)f2(°°)] 2 Q = .— 4.4 ° 13mm) The gain dependent functions may be expressed as: f.-(A) =f.-(°°)[ 1 + R.-(A) ] 4.5 where Ri(A) is the 2"" remainder function. Since for the ideal case we lmow that R10”) = 0, the remainder function can be written as: N nil- N N ”U" "£12,...,N R'(A) = — + — + + -————- 4.6 where N is the total number of amplifiers employed in the circuit design. The bilinear 46 nature of the network requires that all the repeated-suffix coefficients ("ifi’njkb'") are zero. Since for a practical operational amplifier the open loop gain is much greater than one at the operating frequency,(for example the 741 op-amp has an Open loop gain of 200,000 and its gain-bandwidth-product is lMHz) then to a first approximation all the higher order terms in 'R;(A) can be neglected. In order to simplify the notation let: "i A EM: __J_ _le Then D(s) = 701(3), where A Dt(S)=32L2[1+2]+Sw1 [HUA—l 0)oQo (00 Adopting a one-pole representation for an operational amplifier gain: Azm. I 84-030]: 1 {— l 4.7 b .8 4.9 where A0,- is the Open loop dc. gain, cow is the open-loop 3dB bandwidth and Aojmoj = GBWPj is the gain-bandwidth-product. Therefore substituting for A j in equation 4.10 we note: ni =2—__ nij(S+—_(D_oj) i=1 Aojwoi fli:.s'§ "if + NE A Flewoj' FIAU Let "i "i n: A GBWP N th n. n 1. Th —< US ote at GBWP A0 4.10 4.11 4.12 47 1 "2 "2 . 1 "1 "1 = — 1+ + — + S 1+ + — 01(3) 520)?) [ SGBWP A0] cooQo [ SGBWP A0] "0 "o + — 4. + [1 SGBWP + A0] 13 Multiplying and collecting the terms, we have: 1 "2 1 "2 030 "1 D = 3 — + 2 — 1 + -— + — I“) 5 [mg GBWP 5 [0’3” A0 Q0 GBWP] l 1 "1 "o "o +s— —+ +0) +1+— 4.14 [(00] [Q0 Qvo OGBWP] [ Ao] . . . 1 _, "o . Multiplying equation 4.17 throughout by —— ~ 1 - — transforms equation 4.17 o 1 + — A0 to: n0 1 no 1 no no +1+_ _1'_ —+ + +1 4.15 [ A0] s[m0][ AO][Q0 Q0 A0 wOGBWP] Since the open loop gain of an operational amplifier is usually very high, then the quantities :1— : 10'5and—15- = 10-10 can be neglected. If we let the term in the square 0 A0 brackets equal D2(s), then with the above approximation in mind we have: 9’0 "1 "o _ 3_1_ "2 _1_ f}. _. __ D2(s)-s [(0%][GBWP]+32[(03][1+A0 + Q0 GBWP A0 48 1 l "0 "0 "o ”[Ell'Q—J l 0vo ”’“GBW ‘ Qvo] +1 4’16 Equation 4.16 can be factored as: 02(5).= [31: + 1] [527:3 + S-(b-IE- + l] 4.17 0 0 0 where 1: is the auxiliary time constant, (ho is the realized natural frequency and Q0 is the realized selectivity factor. Equation 4.17 can be rewritten as: as: A .. T 02(5) = [51: +1] szT%+s-Q.—o +1 4.18 0 where To is the realized natural period. We will assume that To = T0(l + Ar) and —1- : —1—(l + Aq), where A: and A4 are the fractional shifts in the design values of 00 90 the frequency and selectivity factor due to finite GBWP, i.e., At < 1 and Aq < l. Mul- tiplying the terms in the equation 4.18 yields: a“ r“ D2(s)=s31:7%+32—.2-+7% +s1:+—..0- +1 4.19 Q0 Q0 Substituting for the terms f0 and Q0 in the equation 4.19 yields: 3 2 2 2{TT0 2 2} Dz(s)=stT(1+2At+A t)+s —Q—(1+At)(1+Aq)+T0(1+2At+Ar) o T + {r + 22-9-0 + A:)(1+ Aq)}+ 1 4.20 0 D2(s) is simplified by using the approximation that At and A4 are less than one. 49 17T0 D2(s) = 3172(1 + 2At) + :'{-Q—(1 + A: + Aq) + T30 + 2A:)} 0 . 1 T° } + r+—(1+A:+Aq) +1 4.21 Q0 . Comparing the coefficients of s3 in equation 4.19 and equation 4.24 yields the follow- ing equality: n2 121nm =12 . I 0( ) 0[GBWP] 422 or t = Comparing the coefficients of s2 in equation 4.19 and equation 4.24 "2 GB WP ' yields the following equality: To "2 1 "1 "o 1:—1+Ar+A +T21+2At=T21+—+ -— 4.23 QO( q) 0( ) 0{ A0 ToQo GBWP A0 Dividing the equation by T3 yields: 1 T0% (l+At+Aq)+(1+2At)= 1+£2-+ 1 n1 —:9- 424 A0 TOQO GBWP A0 ' Neglecting the quantity (Ar + Ag) in the left hand side of equation 4.24. This yields: 2102-34» 1 "1 —fl-- " 425 A0 ToQo GBWP Ao ToQo ' Replacing t by its value found, equation 4.25 yields: A, _ .l .."3. + 1 "1 _ fl - "2 1 ‘ 2 A0 TOQO GBWP A0 GBWP TOQO 1 "2 no 030 "1 ”2 ___ _ _ _ _ + __ .. 4.2 A’ 2 {A0 A0} 2Q0{GBWP GBWP} 6 Comparing the coefficients of s in equation 4.19 and equation 4.24 yields the following 50 equality: 1+E(1+A,+Aq)=r —1—+ "1 +i "0 - "0 427 Qo ° Q0 (2vo T0 GBWP 0vo Q0 . "1 Q0 "0 "0 —+l+.At+ =1+-—-+— -—- 4.2 T01 - A4 A0 To GBWP A0 8 Aq=—-+———-—-—1:—At 4.29 Expanding the known quantities in equation 4.32 and rewriting the equation yields: A =£L+_Q_°_"£___’.‘9__&_£___l_.’iz___"2. ‘7 A0 To GBWP A0 To GBWP 2 A0 A0 (00 "1 "2 - — —-— 4. 2Qo {GBWP GBWP } 30 "1 1’10 l"2+_Q_0 "0 _ "2 A0 2 A0 2 A0 To GBWP GBWP _ 1 "1 _ "2 431 ZQOTO GBWP GBWP ' and finally the error in Q0 due to non-ideal effects in the operational amplifier: A _."_1___1_.fl_l.’12_+mQ .1... "2 4 A0 2 A0 2 A0 0 ° GBWP GBWP ‘90 ”1 "2 - - 4. 2 zoo [GBWP GBWP] 3 From equations 4.29 and 4.35 we can observe that both A: and Aq have terms dependent upon the gain-bandwidth-product of the amplifiers. It is also observed from equations 4.29 and 4.35 that Aq is dependent on the error in natural period At. 51 Since the quantity cooQo is usually a large number, equation 4.35 is dominated by the term: "0 "2 — - 4. (000°[GBWP GBWP] 33 n0 2 GB WP GB WP Q0 is greatly reduced. If this term were eliminated then the term then the error in If it is possible to select the components such that 0)0 Q0 n . [ G BIIVP - G gilt/P] would dominate the error. However this is the term that "1 GBWP GB WP At and Aq would be very small. In the above discussion the term GBWP appears. dominates the error in At. Thus if it is possible to select then both "i GB WP Recall from equation 4.15 that is a summation of terms. If the Op-amps are matched then the individual GBWP’s appear as a common factor and the matching described could then be performed. The final terms in equations 4.29 and 4.34 have a l/Ao term. Since A0 is of the order of a hundred thousand, these terms have no measurable effect. 4.4 Example TO illustrate how the Wilson-Bedri-Bowron approximation can be used to design a low error circuit, consider the example Of Section 2.6. This time we need to perform the analysis with non-ideal Operational amplifiers modelled as a voltage controlled vol- tage source of gain A]. Since 1 /A,- appears in the answers if the node equations are formed, 1 / Ai was defined as B; for the VCVS given in Appendix Al.2. 52 The source file for the circuit of Figure 4.1 must be prepared with ideal Op-amps replaced by the non-ideal op-amps. This file is listed in table 4.1. Module 1 is run again and its output file is listed in table 4.2. The prompts and responses for module 2 are listed in table 4.3 while the relevant output from this module is listed in table 4.4. The output format is the determinant found, the number of terms, one term per line with the ".END" statement as the last line. The determinant output Of module 2 is presented in table 4.5. Equation 4.11 uses the terms in the determinant which have the order of B; less than or equal to one. Higher order terms of B,- are neglected. From table 4.5 it is possible to factor and group terms to match equation 4.11. The results are as follows: 0(5) = 'Y 02(8) = 32(C2CIG4X1 + N2) + (CzG4GI)(1 + N1) + GsG3Gz(1 + N0) 4.34 03 1 1 1 Gs N = + — + — + -— + 4.35 2 (14.13 A3 A2 A1 04/13 - _ G805 + Gg + G6 + _1__ 1 G4G1A1 04/13 0141 A1 G C G C G + _1. + _1_ + 3 + 1 7 + 1 2 4.36 .42 A3 G4A3 C20142 €201.42 G G G G G G G G NO=__3_ __7_ _7_4_1_ _4__+_1_+1 41 4.37 0342 G241 05030242 0342 Az A1 G50342 Replacing A,- by GBWP/s, then f0 At = [N - N ]— 4.38 1 2 2% A4 = [N1 - Nzono — A! 4.39 ThusAt=Oanqu=Owhean -N2=OandN0—N2=O G C G C G 0805 6 1 7 1 2 4.40 _ = + —— + + N1 N2 G4GSllblGBWP1 GIGBWPI CzGIGBWPZ CZGIGBWPZ 53 ‘ ’\/\/\/——'1' U 4 i U" l + 4— L11. ”I? II 9.9“ Figure 4.1 Circuit Generated from Tow-Thomas Biquad 54 Table 4.1 Input to module 1 55 OOOOO+O\ +GG+Gl+sC1+GS -Gl-sC1 0 0 0 -GS 0 -GZ I +GZ+G7+sC2 +G3+GB+G4 -G4 +1 +81 0 0 0 0 Table 4.2 Output from module 1 56 % a.out **** INFORMATION ABOUT THE INPUT FILE ***** Please input the file name you would like to use thesis.2 You have chosen to use file : thesis.2 Please answer Y or N to proceed Y **** INFORMATION ABOUT THE OUTPUT FILE **** Please input the file name you would like to use thesis.3 You have chosen to use file : thesis.3 Please answer Y or N to proceed Y Does the circuit contain any non-ideal operational amplifiers? Please answer y or n only Y Would you like the B**2 and higher order terms removed? Please answer y or n only Y Would you like to prepare a file to run the error analysis? Please answer y or n only Y Would you like to see the numerator terms? Please answer y or n only n Please input the file name you would like to use thesis.4 You have chosen to use file : thesis.4 Please answer Y or N to proceed Y Table 4.3 Prompt and- Responses for module 2 57 Denominator: 24 -sC2*sC1*Ga*B3 -sC2*sC1*G4*BB -sC2*sC1*G4*B2 -sC2*sCl*G4*Bl -sC2*sCl*G4 -sC2*sC1*GB*B3 +sC2*G8*GS*Bl -sC2*GB*Gl*BB -sC2*G6*Gs*Bl -sC2*G4*Gl*B3 -sC2*G4*Gl*BZ -sC2*G4*Gl*B1 -sC2*G4*Gl —sC2*G3*G1*B3 -sC1*G7*G4*BZ -sC1*G4*GZ*B2 -GB*GS*G2*BZ -G7*GS*G3*BI -G7*G4*Gl*82 -GS*G4*G2*B2 -GS*GB*GZ*BZ -GS*G3*GZ*BI -GS'GB*G2 -G4*62*GI*BZ .END Table 4.4 Output of module 2 used as input to module 4 58 o> m> v> m> N> H> mm NQquaNUa¢Ut~OamoemOIHmamwamuamosmmumo«moamol Us«Oaholamamwemoamolmmamwanutmolmmumoav0uHum: mmuvwa>U«~Umtmm«HOaMUuNOmaHOaVOhNUOIHmsHOuvumemlmmhHU«¢o«mUm1 IaQamOamomem+mmamU«Homamoml Immav0«domsmoml mm«®U«H0m«NUMI mH zOE Mr. V1 a a b b) Figure Al.2 Circuit Symbols 71 CCV is the element identifier for a current controlled voltage source. The four nodes are labeled as shown in the figure A1.2b. The model that is inserted for this element is shown in Chapter 2. The program does not care if the identifiers xx are unique or not as it supplies those identifiers itself by sequentially numbering the CCV’s. Voltage Controlled Voltage Source (see Figure Al.3a) VCVxx a b c d VCV is the element identifier for a voltage controlled voltage source. The four nodes are labeled as shown in the figure A1.2c. The model that is inserted for this element is shown in Chapter 2. The program does not care if the identifiers xx are unique or not as it supplies those identifiers itself by sequentially numbering the VCV’s. Current Controlled Current Source (see Figure Al.3b) CCCxx a b c d CCC is the element identifier for a current controlled current source. The four nodes are labeled as shown in the figure Al.3a. The model that is inserted for this element is shown in Chapter 2. The program does not care if the identifiers xx are unique or not as it supplies those identifiers itself by sequentially numbering the CCC’s. 72 S s m V C C V C d c d 4+ V: 5 24.: V2 :3 I! I< < .1 llllllll :4 .L _ B _ J _ W _ _ L. _ _ _ _ m _ __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ F lllllllll L .L llllllll 1L I1) 1) P+ V: L a b A: V1 E \w/ a b b) Figure Al.3 Circuit Symbols 73 Non ideal Operational Amplifier NOAxx a b c NOA is the element identifier for a non-ideal amplifier. The nodes are numbered as shown in the figure 2c. This element is modelled as a voltage controlled voltage source with node d set to 0 therefore, the user has to supply only three nodes. Node a is the non-inverting input, node b is the inverting input and node c is the output. A "Bxx" is inserted as an element that is actually the inverse of the ideal gain of the amplifier. The program supplies the xx identifers as well as the B identifier. Nullor Combination (see Figure A1.4 a) NNxxabcd NN is the element identifier for a nullor combination in which all four the nodes are floating. Figure Al.3b shows the connections Of this element. xx is any alphanumeric string. The program ignores xx. Ideal Operational Amplifier (see Figure A1.4c) OAxxabc OA is the element identifier for an ideal op-amp. The first two nodes are the input nodes and the last node is the output node. Node b is the inverting terminal, node a is the non-inverting terminal and node c is the output terminal. The fourth node is set to zero internally in the program. The model is the same as Of Figure Al.3b with the differences talked about above. 74 a C of 4.) a) b d of #4) 13) Figure A1.4 Circuit Symbols OTA 0A 75 Operational Transconductance Amplifier (see Fig A1.4b) OTAxx a b c OTA is the element identifier for an operational transconductance amplifier. It has been modelled as a VOItage controlled current source inside the program. Ths model is shown in Chapter 2. Node connections are the same as that of a VCCS, with the following exceptions. Node (1 is the invering input, node b is the non-inverting input and node c is the output. Node d for the case of a VCCS is set to zero within the program. Also the xx identifier is rejected by the program and it gives the same symbol as that for a VCCS counting up from one. General Information For all devices when writing their connections the convention followed is that the very first node is the "positive" node, followed by the "negative" node. For four ter- minal devices the third node is the "positive" node which is then follOwed by the "negative" node. The current sources have the first node as the one into which current is flowing and the second node is the node from where the current is flowing from. Although no checking is done but it is recommended that the user reserve a ground node as "0". Also the user should number all nodes consecutively in the circuit. If this is not done‘then the user will get a big matrix of symbolic entries which he/she can do without. In order to use the determinant program it is important that the the matrix does not have a row or column of zeroes as that would lead to the determinant being zero. If the user desires to increase the length of the individual strings for each element, the varibale TERML should be set to the desired length accordingly. 76 ALL) File Format for Module 2 Module 1 creates a file which can be used as the input to module 2. The user can create his/her own file to use module 2 ( the determinant module) to solve the sys- tem of equations: I = Yw V The first line is the number of rows, n of the square matrix, I’m. The next n lines are the input vector 1. The matrix Y m, is listed by rows, i.e., the next It lines are row one, the following n lines are row 2 and so on and so forth. The final n lines are elements of the unknown vector V. A1.4 File Format for Module 3 The second module creates a file that is compatible with this program. If the user answers with a "y" to the question: "Do you want to see the numerator terms?" the program generates an output file for this program. The file can be created indepen- dently Of any program. The first line should be a term identifying the next string entries. The second line should be the number of terms in the string. The rest of the lines should contain the terms specified above. Repeat this procedure till all the terms have been entered. The last line should be ".END" 77 ALS File Format for Module 4 The file format is similar to that for module 3. The second module can be used to create a file compatible with this program. The circuit description in the second module must contain non-ideal op amp definitions. The user should then answer prop- erly the questions in the second module an a file for this module would be automati- cally created. If the user wants to create the file personally the following instructions should be followed. The first line should be a descriptive term.(the program neglects this term) The second line should contain the number of terms in the string followed by the string written term by term. The last line should be ".END". BIBLIOGRAPHY [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] BIBLIOGRAPHY G. Wilson, Y. Bedri and P. Bowron, "RC-Active networks with reduced sensi- tivity to amplifier gain-bandwidth-product," IEEE Trans. on Circuits and Sys- tems, CAS 21, pp. 618-626, September, 1974. P. Padukone, J. Mulawka and MS. Ghausi, "An Active-RC biquadratic section with reduced sensitivty to Operational amplifier imperfections," Journal of The Franklin Institute, Vol. 310, No. I, pp. 27-40, July, 1980. LC. Thomas, "The biquad-I. Some practical, design considerations," IEEE Trans. Circuit Theory, Vol. CT -18, pp. 350-357, 1971. D. Akerberg and K. Mosberg, "A versatile RC building block withinherent com- pensation for the finite bandwidth of the amplifier," IEEE Trans. Circuit Syst., Vol. CAS-ZI. pp. 75-78, 1974. W.B. Mikhael and BB. Bhattacharyya, "A practical design for insensitive RC- active filters," IEEE Trans. Circuit Syst., Vol. CAS-ZZ, pp. 407-415, 1975. M. Reddy, "A insensitive active RC filter for high Q and high frequencies," IEEE Trans. Circuit Syst., Vol. CAS-23, pp. 830-845, 1976. L.T. Bruton, "Multiple-amplifier RC-active filter design with emphasis on GIC realizations," IEEE Trans. Circuit Syst., Vol. CAS-25, pp. 830-845, 1978. R. Tarmy and MS Ghausi, "Very high-Q insensitive active RC networks," IEEE Trans. Circuit Theory, Vol. CT -I 7, pp. 358-366, 1970. RE. Fleischer and J. Tow, "Design formulas for biquad active filters using three Op-amps," Proc. IEEE, Vol. 61, No. 5, pp. 662-663, May, 1973. KL. Geiger, "Parasitic pole approximation techniques for active filter design," IEEE Trans. on Circuits and Systems, CAS-27, pp. 793-799, September 1980. IA. Svoboda, G.M. Wierzba and T.Reynolds, "Op-amp relocation, the comple- mentary transformation and stability," Proc. 29‘" Midwest Symp. on Circuits and 73 [12] [13] [14] [15] [16] [17] [13] [19] [20] [21] [22] 79 Systems, August, 1986. GM. Wierzba and J .A. Svoboda, "An op-amp relocated bandpass filter with zero center frequency sensitivity to the gain-bandwidth-product," Proc. 29’” Midwest Symp. on Circuits and Systems, pp. 28-32, August, 1986. J. Vlach and K. Singhal, Computer methods for circuit analysis and design, van Nostrand Reinhold Electrical/Computer Science and Engineering Series, 1983. LC. Chen and RM. Lin, Computer aided analysis of electronics circuits, Pren- tice Hall, New Jersey, 1975. L.W. Nagel and DO. Pederson, SPICE( Simulation Program with Integrated Cir- cuit Emphasis), University Of California, Berkeley, Memorandum ERL-M382, April, 1973. RM. Lin and GE. Alderson, SNAP-A Computer Program for Generating Sym- bolic Networks Functions, Memorandum TR-EE70-16, Purdue University, Indi- ana, August 1970. L0. Chua and RA. Medlock, MECA-A User Oriented Computer Program for Analyzing Resistive Nonlinear Networks, Memorandum TR-EE69-7, Purdue University, Indiana, April, 1969. T.E. Idleman, F.S. Jenkins, W.J. McCalla and DO. Pederson, "SLIC-A Sirnula- tor for Linear Integrated Circuits," IEEE J. Solid State Circuits, (Special Issue on Computer-Aided Circuit Analysis and Device Modelling), Vol. SC-6, pp. 188-203, August, 1971. C. POttle, CORNAP User Manual, Ithaca, N .Y.:Cornell University, School of Engineering, 1968. W.D. Stanley, Digital Signal Processing, Reston Publishing Company, 1975. J.V. Wait, L.P. Huelsman and G.A. Korn, Introduction to Operational Amplifier Theory and Applications, McGraw-Hill Book Company, 1975. CS. Lindquist, Active Network Design with Siganl Filtering Applications, Steward and Sons, 1977. [23] [24] [25] 30 GM. Wierzba, "Op-amp relocation: A topological active network synthesis," IEEE Trans. on Circuits and Systems, CAS-33, pp. 469-475, May, 1986. GM. Wierzba and J.A.Svoboda, "A comparison of circuits generated by Op-amp relocation," Proc. 28‘" Midwest Symp. on Circuits and Systems, pp. 800-804, August, 1980. L.T. Bruton, RC -Active.Circuits Theory and Design Prentice Hall, 1980. MICHIGAN STATE UNIV. LIBRARIES llMWWIWillllllllllHlllllllllll 31293030854160