, . I V ,, .V V . _ t V . V . , V, , r ... , ......... 2...,
. ... V. . . , . . . , . .. .. .... V. ..V. L... .
L . . V . V. , . . . ‘ , . , . V V, .... ... L...
V. . A .. V V . v . .. ,V . . . . .. . . .. ..
V... V. .. . . V .. . . ‘ V V. V .. .......
. ...: . , . . V V V. V. . . , , V .T. .,...A ...:Z.
. . A AV . . .......:.

 

 

 

 

,Vz. .. .. .V..
.
...
._
w,
m
..
v
..
.
n
v
.,
n
v
v
.
_.
v
u
w.
u
a
H,
1‘
u
m,
n
.9
.
1

 

 

 

 

IC

945 i grew
Mimi}iiifliflfliimfijil

i
2 £3 37

 

 

 

This is to certify that the
thesis entitled

A Rapid Charge Pulse Polarizer for

Controlled—Potential Electroanalysis
presented by
Norman Earl Penix

has been accepted towards fulfillment
of the requirements for

ph D degree in Chemistry

Z gig;

Major professox

Date 27 q

0-7639 MS U is an Affirmative Action/Equal Opportunity Institution

PLACE IN RETURN BOX to remove this checkout from your record.
To AVOID FINES relum on or before date due.

DATE DUE DATE DUE DATE DUE

  
  

  
    
   

‘ usu Is An Affirmative Action/Equal Opportunity Institution

A RAPID CHARGE PULSE POLARIZER FOR
CONTROLLED-POTENTIAL ELECTROANALYSIS

By

Norman Earl Penix

A DISSERTATION
Submitted to
Michigan State University
in partial fulfillment of the requirements
for the degree
DOCTOR OF PHILOSOPHY

Department of Chemistry

1989

 

L904 ao‘aq:

ABSTRACT
A RAPID CHARGE-PULSE POLARIZER FOR
CONTROLLED-POTENTIAL ELECTROANALYSIS
By

Norman Earl Penix

A microcomputer-controlled charge-pulse polarizer has been developed
for controlled-potential electroanalysis. In this polarizer, discreet charge
packets are added as needed to achieve or maintain the desired potential.

‘The polarizer consists of five modules in addition to the microcomputer.

These are the potential comparison module, the potential step injector, the
potential maintenance injector, the control module, and the potential
measurement module. The advantages of charge pulse polarization over the
conventional analog (continuous current) polarizer are the complete
separation of the charging current from the Faradaic current, the elimination
of potential control errors due to solution resistance, the digital acquisition of
the Faradaic charge, and the integration of the Faradaic current.

A comparison of a conventional analog potentiostat and the
charge-pulse polarizer has been performed. Staircase cyclic voltammograms
obtained by the charge-pulse polarizer demonstrates it ability to completely
eliminate errors due to ohmic drop from the voltammograms and the its
ability to completely separate the charging current from the Faradaic
current. The total Faradaic charge is obtained by counting the number of
quantitative charge injections required to maintain the potential for the

 

 

Norman Earl Penix

duration of the step. The measured Faradaic charge obtained by the
charge-pulse polarizer is shown to increase for decreasing scan rates. The
linear dynamic range obtainable for by the polarizer for a constant injection v
capacitance was determined to be 2.5 X 103

 

To Susan, Brandon, and Liselotte

with all my love

ACKNOWLEDGMENTS

I would like to thank Professors Chris Enke and Stanley Crouch for all
of their guidance, tutelage, and understanding. I am deeply indebted to Dr.
Thomas Atkinson, Dr. Bruce Newcome, and Martin Raab for teaching me the
subtleties of electronic design and for listening to my ideas and helping me to
realize them.

Special thanks go to Enke group members past and present for their
friendship. Special thanks to Ronald Lopshire for editing this dissertation, to
Dr. Peter Palmer who kept me sane in the middle of the night, to Dr. Adrian
Wade for his compassion when my project was not working, and to Christine
Evans for assistance with "simple" chemical problems.

My deepest appreciation and love go to my beautiful wife Susan
without whom this dissertation would never have been completed. _ Finally, I
would like to thank my children Brandon and Lislelotte for being patient and
understanding when daddy didn't come home in the evenings.

TABLE OF CONTENTS

List of Tables .......................................... viii
List of Figures .......................................... 11:
Chapter 1
Introduction ................................... 1
Overview to Dissertation ........................... 2
Chapter 2
Potentiostatic Control ............................. 3
Charge-Pulse Polarization .......................... 9
General Method for Potential Control ................. 14
Design Goals .................................. 18
Chapter 3
Introduction ................................... 19
The Microcomputer .............................. 19
Description of the Polarizer ........................ 22
The Comparison Circuit .......................... 24
The Potential Maintenance Injector .................. 28
The Potential Step Injector ........................ 30
The Analog-to-Digital Converter ..................... 32
The Control Module ............................. 34
Software ..................................... 52

Chapter4 .
Introduction............................., ..... 5 8

Analog Circuit Calibration ......................... 58
Calibration of the Maintenance Injectors ............... 61
Error Assessment ............................... 71
Chapter 5
Introduction ................................... 7 9
Materials ..................................... 7 9
Experimental Procedure .......................... 82
Scan Rate versus Peak Height ...................... 85
Efl‘ect of Charging Current ......................... 8 7
Effect of Ohmic Drop ......... . ................... l .90
Concentration Study ............................. 93
Conclusions ................................... 93
Closing Comment ............................... 96
Appendix A.1
FORTH Control Software ......................... .98
Appendix A.2
Data Analysis Software .......................... 108
List of References ....................................... 113

Table 3.1
Table 3.2
Table 4.1

Table 4.2

LIST OF TABLES

Hardware addresses of the polarizer interface ............ 38
Important FORTH words and their functions ............ 56
Comparison of the maintenance injection capacitance and

switch charge per injection for the two methods of

calibration .................................... 76

Table of error analysis for the charge-pulse polarizer
obtained by propagation of errors ..................... 78

viii

 

Figure 2.1
Figure 2.2

Figure 2.3
Figure 2.4

Figure 2.5
Figure 3.1

Figure 3.2
Figure 3.3
Figure 3.4

Figure 3.5
Figure 3.6
Figure 3.7

Figure 3.8
Figure 3.9

Figure 3.10
Figure 3.11

Figure 3.12
Figure 3.13

Figure 3.14

LIST OF FIGURES

Cell equivalent circuit for the three electrode cell ........... 5

Eigfil‘ified Schematic of a modern three potentiostat with
lequivalent circuit shown in the feedback loop ......... 7

A block diagram of Goldsworthy and Clem' s
"digiopotentiostat" .............................. 10

A block diagram of the charge-pulse polarizer designed by

Hourdakis and Enke ............................. 12
Potential control by charge pulse polarization ............ 15
Block diagram of the microcomputer-controlled charge-
pulse polarizer ................................. 20
Detailed block diagram of the charge-pulse polarizer ....... 23
Comparison circuit of the charge-pulse polarizer .......... 25
Maintenance injector schematic of the charge-pulse
polarizer ...................................... 29
Schematic of the potential step injector ................ 31
Schematic of the analog-to-digital converter ............. 33
Detailed block diagram of the charge-pulse polarizer

control module ................................. 35
Schematic of the device select logic ......... A ........... 37
Schematic of the double buffered demultiplexer for the
reference DAC .................................. 39
Schematic of the demultiplexer for the maintenance
injector DAC. ................................. 40
Schsmatic of the twelve to eight bit multiplexer for the

......................................... 4 1

Schematic of the potential step injector control logic ........ 43
Timing diagram of the potential step injector

control logic ................................... 44
Schematic of the potential maintenance injector control

logic, step timing logic, and the injection counters. . . . . . . . . .46

Figure 3.15

Figure 3.16
Figure 3.17
Figure 3.18
Figure 3.19
Figure 4.1
Figure 4.2

Figure 4.3
Figure 4.4
Figure 4.5

Figure 4.6

Figure 4.7

Figure 4.8

Figure 4.9

Figure 4.10

Figure 5.1

Figure 5.2

'I‘imin diagram of the potential maintenance injector

contrologic ....... 47
Schematic of the ADC control logic .................... 48
PAR 303A reference fault detection interface ............. 48
Par 303A dislodge/dispense control interface. . _ ........... 50
PAR 303A N2 purge interface ....................... 50
Calibration circuit using a precision capacitor ............ 63

Calibration of the leakage current represented by the
slope of potential versus time for a 0.985 pl“ capacitor ....... 64

Calibration of the leakage current represented by the
slope of potential versus time for a 0.0997 uF capacitor ..... 65

Calibration of the leakage current represented by the
slope of potential versus time for a 0.0332 uF capacitor ...... 66

Calibration of the leakage current represented by the

slope of potential versus time for a 0.0102 11F capacitor ...... 67

Calibration curve for the positive potential maintenance
injector using the integrator feedback configuration with
a 0.985 uF capacitor .............................. 70

Calibration curve for the negative potential maintenance
injector using the integrator feedback configuration with
a 0.985 uF capacitor .............................. 71

Calibration circuit using a cell equivalent circuit with a
precision resistor in the feedback loop of the control .
amplifier ...................................... 7 2

Calibration curve for the positive potential maintenance
injector usin the cell equivalent circuit configuration
with a 454.7 9 resistor ........................... 74

Calibration curve for the negative potential maintenance
injector using the integrator feedback configuration with

a 454.7 k!) resistor ............................... 75
Description of charge-pulse staircase clic voltammetry

with an expanded view of the potenti control ............ 84
Peak charge versus scan rate“2 for a 5 mM Cd012

solution in 0.1 M KNO3 supporting electrolyte ............ 86

Figure 5.3

Figure 5.4

Figure 5.5

Figure 5.6

Figure 5.7

The effect of charging current on conventional analog
voltammogrlams at scan rates of: a) 20 mVs'1;b) 50 mVs1;

c) 100 mVs‘1;d) 200 mVs'1;e) 500 mVs1 ................ 88
The effect of charging current on charge-111p

voltammograms at scan rates of: a) 20 mVs 1'6 ,b) 50 mVs'1;

c) 100 mVs '1,d) 200 mV8'1;e) 500 mVs1 ................ 89

The effect of ohmic drop on conventional analog
voltammograms at scan rates of: a) 50 mVs1
b) 100 mVs1, c) 200 mVs1;d) 500 mVs 1 ................ 91

The effect of ohmic drop on 1charge-pulse voltammograms
at scan rates of: a) 50 mVs'1;b) 100 mVs1, c) 200 mVs1
d) 500 mVs1 ................................... 92

Dynamic range of the polarizer for a 1054 pF
maintenance injection capacitor represented as
log10(charge) versus log10(concentration) ............... .94

CHAPTER 1
INTRODUCTION

Conventional controlled potential electroanalysis is limited by errors
caused by the presence of the electrode double layer capacitance and the
resistance of the cell solution. It is the goal of this research to eliminate
these errors through the use of the relatively new technique of charge pulse
polarization. .

Charge pulse polarization is a technique which may be used to control
the potential of an electrochemical cell thrOugh the rate of injection of
discreet charge packets into the cell. In this technique the electrode double
layer serves to store the injected charge which may then be used by a
Faradaic reaction. The charge is then replenished by another injection as
required by to maintain the desired potential. By counting the number of
injections required to maintain the cell, the charge consumed by the Faradaic
reaction can be obtained. In addition, the potential of the cell is measured
between charge pulses when the cell is at open circuit thereby eliminating
errors in the measurement of the cell potential due to solution resistance.

The polarizer, which was designed as part of this research, has been
used to perform charge-pulse staircase cyclic voltammetry. The resulting
voltammograms prove that the polarizer completely eliminates the errors due

to charging current and ohmic drop.

1 Overview of the Dissertation .

Chapter two briefly introduces potentiostats. The causes of ohmic
drops and charging currents and the problems that are discussed. In
addition, the concept of potential control by charge pulse polarization is
explained and the design goals for the polarizer are given.

Chapter three describes the charge-pulse polarizer. This includes the
controlling microcomputer and the individual components of the polarizer. A
description of the control language, polyFORTH, which is used with the
microcomputer is given including a discussion of how the language works; the
programming language used for data analysis, C, is also presented.

Chapter four details the steps required in the balancing of the analog
circuitry and the adjustment and characterization of the charge injectors.
The values obtained in the characterization of the injectors are reported
along with a discussion of the analytical quality of the polarizer.

A comparison of the charge-pulse polarizer with analog potentiostatic
control for cyclic voltammetry is presented in chapter five. The results of
experiments which were designed to test the ability of the polarizer to
eliminate charging current and ohmic drop errors fiom the voltammograms
are given. These results are compared to the results fi'om identical
experiments performed using an analog potentiostat. The linear dynamic
range obtainable with a given set of charging capacitors is presented along
with a discussion of the effect of scan rate on the peak charge obtained. In

addition, some closing comments about the polarizer are given.

CHAPTER 2
BACKGROUND AND HISTORICAL

The typical electrochemical apparatus used for controlled potential
electroanalysis consists of a potentiostat with a three electrode cell in the
electronic feedback loop of the control amplifier. The three electrode cell
consists of a working electrode, an auxiliary electrode, and a reference
electrode. The working electrode is the electrode at which the
electrochemical reaction being investigated occurs. The reference electrode
provides a constant potential with respect to the solution and thus provides a
means of measuring the difference in potential between the working electrode
and the solution. As a measuring device only, the reference electrode does
not conduct an appreciable amount of current. The auxiliary electrode is
added to complete the complete the feedback loop. Of necessity, an
electrochemical reaction must occur at the auxiliary electrode which is
opposite is sense, but equal in rate to that occurring at the working electrode.

Typically the working electrode and electrolytic solution are chosen
such that the electrode behaves as an ideally polarizable electrode, IPE, over
the voltage range of the electrochemical experiment (with no analyte
present). An IPE is an electrode at which no charge transfer between the
working-solution interface occurs regardless of the imposed potential. The
difi'erence in potential between the electrode and the solution occurs abruptly
at the electrode-solution interface. This non-conducting contact between the
solution and the electrode has the properties of an electrical capacitor. The

3

capacitance it exhibits, known as the double layer capacitance, is dependent
upon the surface area of the electrode and the ionic strength of the solution in
the cell. This double layer capacitance is difi‘erent from a usual capacitor in
that the double layer capacitance is potential dependent (1). When a redox
couple is added to the electrochemical cell, the electrode double layer
capacitance can be discharged by the Faradaic reaction. The current that is
added to the cell to maintain the potential is equal to current due to the
Faradaic reaction.

Another aspect of the electrochemical cell is that the solution has a
finite resistance. This resistance can be separated into two categories. The
resistance between the auin'liary and the reference electrode, Re, and the
resistance between the reference and working electrode, R“. In addition, the
resistance of the reference electrode is called Rr. The Faradaic reaction acts
as a time and potential-dependent resistor capable of discharging the double
layer capacitance and is denoted as Zf. A cell equivalent circuit which
illustrates these characteristics is shown in Figure 2.1.

Potential control of an electrochemical cell is predicated on the ability
to measure accurately and precisely the potential difference between the
working electrode and the solution. While it is impossible to measure the
absolute potential of the working electrode with respect to the solution, it is
possible to measure the potential difference between the working electrode
and the reference electrode. The potential measured at the reference
electrode with the working electrode at common, is equal to the negative of
the potential of the working electrode-solution interface plus the constant
potential of the reference electrode-solution interface. When a reaction is

occurring in the cell, a finite current must be present. The product of this

' 5

Auxilldry Electrode

   

Reference
Electrode

   

 

 

 

Working Electrode

Figure 2.1 Cell equivalent circuit for the three electrode cell.

' 6

current, i, and the finite solution resistance, Ru, causes the measured
potential to be in error by an amount equal to iRu.

When the potential of the cell is varied in a systematic fashion, several
additional problems are encountered. These problems are caused by the
current required to charge the double layer capacitance when the potential is
changed. The observed cell current is the sum of the charging current and
the Faradaic current. Thus the Faradaic current can not be determined
accurately by simply measuring the total cell current. Another complication
of the double layer capacitance is the finite time required to charge the
capacitance to a new potential value through the solution resistance. This
limits the maximum rate of electrode potential change achievable. An ideal
step function change is not possible.

To overcome the problem of ohmic drop much work has been done in
the development of potentiostats(2-38) and electrochemical cell design(39-57).
The performance and stability of various designs has been extensively
studied(39-56). An excellent review of the different designs was given by
Schroeder(37). The modern potentiostat evolved from the potentiostat
configuration originally designed by DeFord(2). An additional compensation
circuit using positive feedback has been added to compensate for ohmic drop
errors(51). Figure 2.2 depicts a simplified potentiostat with a cell equivalent
circuit, shown in the dashed lines, in the feedback loop(57). Amplifier 0A1,
the control amplifier of the potentiostat, sums the input voltages and applies
an output voltage, Vo, such that the reference voltage, Vr, is equal but
opposite in sign to the summed input voltages. Amplifier 0A2 is a voltage
follower which prevents the feedback circuit from drawing an appreciable

amount of current from the reference electrode. Amplifier 0A3 is a current

dos “nuance.“
on... 9 8.55 3.28 339550 :8 a £5 2385589 8.33 Eaton. a mo cams—0:8 veg Sum N. N 0.59m

 

onotoofi \\
9.3.83.

\

 

     

 

_
_
_
_
_
_
_
_
’

  

cuckoofi
oocouovom

 

/

I
onotoofi I:
tszxi

 

 

8

to voltage converter which converts the total cell current into a voltage for
subsequent measurement. In addition, a potetnial proportional to the cell
current is returned to 0A1 as part of the feedback loop. This portion of the
feedback loop is the positive feedback mentioned earlier. It is called positive
feedback since the output potential is of the same sign as that applied to the
input of the control amplifier.

The stability of the potentiostat using positive feedback is governed by
the nonideality of the potential control amplifier and the phase shift in the
electrochemical cell. These parameters have been extensively analyzed by
Smith(16-18), Bewick(52), Booman(51), and Pilla(46). It has been shown that
a potentiostat can be unstable at 100% compensation and that
overcompensation(52) can occur using positive feedback. In addition, the
distributed parameters of the potentiostat, such as stray capacitance can
cause it to oscillate at a point far less than total compensation.

In addition to the improvements in the potentiostat, many different
excitation waveforms have been developed to reduce the amount of charging
current in the measured cell current(58-62). These waveforms are either
pulsed DC signals or AC signals superimposed upon a DC signal. These
techniques are based upon two main assumptions. The assumptions are that
the potential of the cell can be rapidly stepped to a difl‘erent potential and
that the double layer capacitance is independent of potential over the voltage
range the potential is pulsed. Since neither of these assumptions can be
completely met, it is impossible to totally separate the charging current from

the measured cell current.

 

Charge Pulse Polarization .

Charge pulse polarization is a technique in which charge pulses are
used to control an electrochemical cell. The control fimction achieved can
implement most any of the typical electrochemical techniques employed in
electrochemical analysis. The technique of charge pulse polarization was
developed concurrently in independent laboratories by Delahay (63,66-70)
and Reinmuth (64,65). The basis of the coulostatic technique is to step the
potential of the electrochemical cell by the rapid injection of a known
quantity of charge followed by returning the cell to open circuit and recording
the potential decay. The resulting decay curves are extrapolated back to time
zero using equations developed by Delahay (66), Reinmuth (65) and others
(71-88). Several workers have used a compilation of the recorded decays to
reconstruct voltammograms from a series of potential steps. The source of
charge used in these experiments were from timed constant current sources
(71,76,83,85,86-88) or capacitive discharge (78-82,84).

An alternative to conventional potentiostatic control of an
electrochemical cell is potential control by charge pulse polarization.
Potential control by charge pulse polarization is accomplished by injecting
charge of appropriate polarity whenever the cell potential deviates from the
desired control potential.

Five polarizers which use charge pulse polarization have been
developed previously. The first polarizer developed for potential control was
the "digiopotentiograter" of Goldsworthy and Clem (89). This polarizer was a
hybrid of a constant current polarizer and a charge-pulse polarizer. Figure
2.3 is a block diagram of this digiopotentiograter. The potential control is
through the addition of discreet charge pulses. A constant current source is
also connected to the cell so that a significant number of counts would be

'10

 

“baggage? peso as 35538 no asses 3% < ”a seam

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 82.3. 353 .235
... 3.2.6 32.6 .235 m + JV
J uUmDOm hzummno
izzupowzmfinmm .2228
mOhOufiz ..osuonEoo .Otcoo
«0.8qu 205.0qu 3.5.8.5 39:005.
ZOmhounm kzummao 35:6 8.32.6 A 8:230”.
qummoo hzfimzoo
._.Z<.FmZOQ ouman l
9.3.531 /
\ /
+ v /
0.00.. d
w<_m hawk—m0 Iv OZ_N.._._O_D _
oz< l _
82533 _
”65$.th mmwwmwfiw 4 \\
29:on sl ezummno 8:3.
puawmmmw hzfimzoo 3.2358
823a shaman...“
+

11‘

used in the potential maintenance. This constant current source limits the
ability of this technique to completely compensate for the resistive effects of
the electrochemical cell. . I

Hourdakis and Enke (91,92) developed the first true charge-pulse
polarizer for controlled potential analysis. This polarizer used capacitive
discharge to inject charge into the cell. A block diagram depicting the
functional units of this polarizer is shown in Figure 2.4. This polarizer was
developed as a general purpose electrochemical instrument and was used to
perform polarography at a dropping mercury electrode, DME. Polarography
was accomplished using this polarizer by allowing the mercury drop to
expand to a given volume before applying charge to the electrode. Since the.
area of the mercury, drop is continually increasing, the capacitance is
increasing; this leads to a decrease in the ability to completely separate the
charging and Faradaic currents. With this polarizer the potential of the cell
was measured between pulses when no current is present in the cell;
therefore, the effect of ohmic drop was completelyeliminated. This polarizer
was under computer control, and the injection rate was limited by the
software used in deciding whether another injection was needed and if so
what polarity.

Two polarizers of similar design were built independently by Lii and
Enke (93,94) and Schreiber and Last (98,99). The difference between these
two polarizers are the microcomputer control systems and the excitation
functions generated. Schreiber and Last used their polarizer for anodic
stripping voltammetry by applying a waveform consisting of many potential
step experiment and monitoring the decay for a short time followed
immediately by another potential step. The Faradaic charge was obtained by

measuring the cell voltage six separate times on each pulse at three different

 

12

6&th

was mEstom an canon anew—Son 83m smudge on... we gum. “—85 4 «N 9:65

 

 

 

 

 

2m._.m>m

H2m2mm3m<m§

uo<50>

 

 

 

 

mmMHDmEOoOmoi

 

 

...-fiHfilr—l % 95

 

 

 

 

 

 

 

 

13

gains and calculating the double layer capacitance. This polarizer was
limited by the speed at which the controlling microcomputer could process
the acquired voltages and calculate the charging voltages for the injectors.
This limited the rate of charge injection which is directly related to the
maximum concentration which could be analyzed.

The polarizer of Lii and Enke (93,94) was used in several different
modes. They are controlled charge, controlled current, controlled potential,
open circuit, and combination modes. These waveforms were accomplished
by software control of the charge injection system. Engerer (95,96) used the
polarizer designed by Lii for staircase cyclic voltammetry. The staircase
generated by this polarizer was not able to completely eliminate the effects of
the charging current since the cell potential was trimmed to the desired
potential by the addition of charge which was attributed to the Faradaic
' reaction. The maximum rate of injection, which is limited by the response of
the control microcomputer, combined with the maximum charge injection the
switch could tolerate, limited the overall dynamic range of the polarizer.

Mikkelsen and Purdy (90) developed a charge-pulse polarizer for
coulostatic detection in flow injection analysis based on the injection of a
timed constant current pulse. The design was similar to that of Nieman (86-
88) which was used for potential decay measurements. The polarizer was
digitally controlled by an. IBM© PC and had a maximum injection frequency
of 38 us. The excitation waveform applied was a charge pulse based DC
potential. The limited injection rate and the relatively large minimum
charge injected by each injection limits the usefulness of this polarizer for
dilute solutions..

'14

General Method for Controlled Potential Electroanalysis

Figure 2.5 illustrates a typical diffusion controlled experiment in
which the cell potential is maintained by a charge-pulse polarizer. Since the
injection of the charge pulses is a discrete process, a control window is
defined in which the potential is maintained. In Figure 2.2, it is assumed
that the cell potential has just been changed, is within the control window,
and the cell is at open circuit. Further it is assumed that a diffusion-
controlled Faradaic reaction can occur at this potential but no reaction has
occurred as yet. Since the cell potential has become more negative, a
corresponding decrease in the ratio of oxidized species to the reduced species
at the electrode surface occurs. This change in the surface concentration
ratio produces a net reaction current which is equal to the rate of diffusion of
the oxidized species to the electrode surface. Since the cell is at open circuit
between charge injections, the charge required by the reaction current comes
from the electrode double layer which causes the cell potential to drifl:
positive, toward the control window threshold. As the potential of the cell
drifizs more positive, the surface concentration ratio of oxidized species to
reduced species increases, thereby decreasing the surface concentration
gradient of the oxidized species and reducing the net reaction current. When
the cell potential crosses the threshold, a charge injection is triggered. This
injection occurs very rapidly causing a rapid change in the electrode potential
equal to qs/Cdl, where qs is the standardized amount of charge injected and
Cdl is the double layer capacitance. The magnitude of qs is chosen to provide
a potential change smaller than the magnitude of the control window.

Between injections there is no current through the cell; therefore, the

'15

Estonia—on 3:5 09% 3 33:8 Raccoon ad warm

0:5

 

 

 

. Boosts

H 3.580

m 4

cozoo_c_ l\
09050

.2228 .828

 

32:23. :co

 

 

3——+

loltuelod

‘16

potential of reference electrode is an accurate measure of the working
electrode potential and allows accurate potential control unaffected by the
Faradaic current. .

If the control window is small, the cell potential is approrn'mately
constant during the time the potential is maintained. For successive
injections, the time required for the cell potential to decay through the
control window threshold increases because the diffusion layer thickness is
increasing as the potential is maintained. Thus, the decreasing frequency of
charge injections is analogous to the decreasing current in a potential step
experiment performed with a conventional analog potentiostat.

I11 order to maintain the potential of the cell within the control
window, the polarizer must be able to adjust the rate of charge injection to
that required by the rate of charge depletion from the double layer; and the
polarizer must be able to adjust the magnitude of the charge injection
depending on the concentration of the analyte in solution. For a given size
charge injection, the rate of charge injection is analogous to the magnitude of
the normal analog current since current is the integral of charge with respect
to time.

The charge consumed by the Faradaic reaction, during the potential
maintenance period, can be measured by counting the number of
standardized charge injections required to maintain the cell potential for the
entire period. This eliminates the need to sample the current at one or
several points during the maintenance period and provides for a digital
method of measuring the extent of the Faradaic reaction. The total Faradaic
charge is obtained by multiplying the number of injections by the amount of
charge injected per injection. This quantity can then be converted to the
average Faradaic current by dividing the total charge injected by the time

17

1 over which the potential was maintained. This average Faradaic current is
equivalent to the integrated Faradaic current over the entire time the
potential was maintained.

To achieve a varying potential experiment (any of the voltammetries), -
a method is needed to change as well as maintain the set potential. Three
distinct possibilities for changing the set potential are: (1) a linear potential
ramp, (2) a non-uniform step ramp, or (3) a uniform step ramp.

In a linear potential ramp, the cell potential is constantly varied with
time. This gives rise to the charging current which is a function of scan rate
and double layer capacitance. Since the charging and Faradaic currents
occur simultaneously, they cannot be distinguished experimentally.
Additionally, since the double layer capacitance is not constant with respect
to voltage, the Faradaic and charging currents cannot be separated
mathematically. Using a linear ramp to change the potential would negate
the polarizer's usefulness and therefore was not used. I

The other possible choices for changing the desired control potential of
the cell involve using step functions to approximate a potential ramp. Step
ftmctions are used with potentiostats to reduce the effects of charging current
by allowing sufficient time to pass before sampling the current, since the
charging current decays more rapidly than the Faradaic current. By using a
charge impulse large enough to step the electrode to its new control potential,
the potential of the cell is changed very quickly. If the number of standard
charge injections required to maintain the potential are now counted, the
separation of charging charge and Faradaic charge is perfectly achieved.

The magnitude of the potential step function generated by‘ the
polarizer can be either uniform or non-uniform. A non-uniform step function

would result from the addition of a constant amount of charge for each step.

18

As the double layer capacitance changes with electrode potential, the size of
the step will vary. Since the Faradaic current measured is a function of all
previous step voltages and times, the voltammograms obtained will deviate
from the theoretical shape and magnitude and thus will be more difficult to
interpret.

A uniform potential step function can be obtained by adjusting the
amount of charge injected at each step to compensate for the changing double
layer capacitance. The size of the step injections can be varied by
determining the amount of capacitance from the previous step and correcting
the amount of charge injected by a correction factor. Another method by
which the size of the step injection can be varied is to dynamically adjust the
voltage which charges the injection capacitors. This can be accomplished by
measuring the difference from the control potential after each injection,
amplifying this difference and using the amplified difference as the charging
voltage.

Design Goals .

The design goals for the charge-pulse polarizer in this work are: (1) to
be able to add rapidly a preset and known quantity of charge at an
automatically controlled rate to maintain the cell potential, (2) to add a
variable amount of charge at a predetermined times to step the potential, (3)
to count the number of injections made during potential maintenance, (4) to
monitor and control the cell potential without the need for an analog to
digital conversion, and (5) to increase the speed of its control logic thereby
increasing the dynamic range of the system. These goals were chosen such
that the benefits of charge-pulse polarization are achieved and yet retain the
flexibility to perform a variety of voltammetric techniques.

CHAPTER 3
THE CHARGE-PULSE POLARIZER

In this chapter, a complete description of the charge-pulse polarizer
which was developed is presented. The goal of the instrument is to control
the potential of an electrochemical cell without having to compensate for
charging current or ohmic drop in the measured voltage. All major parts of
the design are discussed: the microprocessor, the charge injection system, the
voltage measurement system, and the software for the data acquisition and

manipulation.

The Microcomputer

Figure 3.1 is a detailed block diagram of the microcomputer system
and the charge-pulse polarizer. The microcomputer designed by Bruce
Newcome (15) is based on the Intel 8088 16 bit internal 8 bit external
microprocessor. The same board contains 8 Kbytes of RAM and 8 Kbytes of
PROM, two USARTS (Universal Synchronous Asynchronous Receiver
TransmitterS), and an interrupt controller. The system is readily expandable
through a mother board/backplane arrangement known locally as the "Bruce
Bus" (1). This extension of the CPU bus allows user modules (interface
circuits) access to the CPU bus and provides for connector space to remote

devices. The microcomputer and polarizer consist of 4 mother boards.

19

Saigon 3390935 vc=§:o9u8=nfi8obmfi on... me away M85 H.” 8de

 

 

 

 

xwa xwa
om<I >mm04m ._<z_2mn:. ._.< 29

E

d

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

'20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EjoEzoo 55526
xma mQ_In_<mO ICE—3m
‘ Ar “
art: 4
$558 5% $2895; :28
x 1w r .v N r 1 v
C it. A? ....
L fi L fl
4 r 4 it
50.6 83%
P6 $052 ”.3: in“ 833

 

 

 

 

'21

The first mother board is the miCrocomputer described above. The
second mother board, an extension of the CPU bus only, contains an
additional 16 Kbytes of RAM, a Shugart Associates Standard Interface
(SASI) for disk controllers, and an address decoder. The SASI module is a
subset of the Small Computer Standard Interface (SCSI) which was
developed by Shugart Associates. This module controls the communications
between the microcomputer and the disk controller. The disk controller is a
DTC S35 controller and is capable of supporting a combination of two 5
Mbyte SA 600 series Winchester type disk drives, four 8 inch SA 800 series
floppy drives, or one SA 600 and one SA 800. The address decoder is an
integral part of the microcomputer design; it provides the necessary device
select pulses to immement memory mapped control modules. By using one
address decoder for each mother board, total board space on each module can
be decreased since the address decoding function does not need to be
duplicated for each module.

The third mother board contains the control module of the polarizer
and an address decoder module. The control module for the polarizer
provides an interface between the analog portion of the polarizer and the
microprocessor. In addition to providing the interface, all timing and control
pulses are generated on this module. The functions of the control module are
explained in detail later. The address decoder serves the same function as
before.

The fourth mother board contains an additional 16 Kbytes of RAM, a
difi'erential transceiver module, a real-time clock (RTC), and an address
decoder. The transceiver module is used to transmit a subset of the CPU bus
to a similar transceiver module (reconstructing the CPU bus) housed in the
graphics subsystem. The graphics subsystem also includes a 9-inch Ball

22

(monitor and a Matrox 256 X 256 graphics display board. This system
provides a 256 by 256 dot display, each individually addressed. Timing of
various components can be controlled by the real time clock which has a
resolution of 0.1 millisecond. The RTC can be programmed to generate '
output pulses at ten-fold intervals from 1 ms to 1 day. This is not sufficient
for the step timing but can provide accurate delays between repeated

experiments and information on the time required for various processes.
DESCRIPTION OF THE POLARIZER

The polarizer was designed in the same manner as the microcomputer
in that each functional unit is a separate module. This facilitates
modifications to the design of the polarizer. The individual medules which
form the polarizer are shown in Figure 3.2. They are the comparison circuit,
the potential maintenance injector, the potential step injector, the control
logic, and the analog to digital converter. The comparison circuit is
responsible for monitoring the potential of the electrochemical cell between
charge injections and for returning the results to the control module. In
addition, the Comparison circuit generates the reference voltage (setpoint
potential) for the control window as well as the control window. The charge
injection system is comprised of two separate injectors, the potential step
injector and the potential maintenance injector. The potential step injector is
specifically designed to change the potential rapidly from one setpoint to
another. The maintenance injector is designed to maintain the cell potential
within a given control window about the setpoint potential for the duration of
the potential step. The control module generates all of the necessary timing

and control signals used throughout the polarizer and serves as a remote bus

7

23

      
 
  

+.

INJECUON
AMPUFER

 
    
    

ANALOG
SECTION
fidflf
SECTION

STEP
INJECTOR

     
 
     
 
   
 
  

          
  

 

    
  

   
  

MAmTEN- ANALOG
ANCE TO NGWAL
INJECTOR

CONTROL
MODULE

BRUCE BUS

  
   

MICRO—
COMPUTER

Figure 3.2 Detailed block diagram of the charge-pulse polarizer.

’24

for the exchange of information between modules. In addition, this module is
the sole interface to the microcomputer system. Figure 3.2 indicates the flow
of information through the polarizer. It is important to note that the analog
functions of the polarizer are completely separated from the microprocessor
through the control logic. Additionally, the analog to digital converter is used
only for calibration of the various components and not in the actual

experiments.

The Comparison Circuit

The comparison circuit is crucial to the operation of the polarizer. By
performing a hardware comparison of the cell potential to the desired control
window, the polarizer can control the electrochemical experiment without the
need for an analog to digital conversion. Furthermore, the cell potential can
be controlled more precisely since the rate of charge injection can be
increased by eliminating the delay added by the microprocessor decision loop.
By eliminating the microprocessor from the control loop, the overall total
electrical noise is reduced as well.

Figure 3.3 is a schematic of the comparison circuit. This circuit is
comprised of a 12 bit digital to analog converter (REFDAC), Analog Devices
AD 565A; a fast track-and-hold amplifier (THl), Analog Devices HTC 050.;
two voltage followers (0A1 and 0A2); an inverting amplifier (0A3); a voltage
follower with gain (0A4); and two voltage comparators (0A5 and 0A6); and
resistors R1 - R14. Voltage follower 0A1, an Analog Devices AD 380, is used
to buffer the reference electrode potential. This device was chosen for its low
input bias current and high full power bandwidth. The remaining
operational amplifiers 0A2, 0A3, and 0A4 are Precision Monolithics Inc.
0P7 7 amplifiers and the comparators 0A5 and 0A6 are National

'25

 

:53 +

mp!

 

 

 

 

OE

, £3539 owing 05 mo $3.5 canton—coo ad charm

 

 

 

 

 

 

’26

Semiconductor LF311's. After input buffering of the reference electrode by
0A1, the reference potential is gated by TH1 just prior to a charge injection.
Since ’I‘Hl inverts the reference potential a unity gain inverting amplifier,
0A3, is used to restore the reference potential to its original sign. By gating
the reference potential the large potential excursion due to the initial
response of the cell operational amplifier to the charge injection is not sensed
by the comparison circuitry. This eliminates the need for wide bandwidth
response of all the components in the comparison circuit. The set potential
(V 31)) is obtained fi'om the REFDAC which is bufl‘ered by 0A2 and connected
to R3. The gated reference potential is connected to R4 after inversion by
0A3. Resistors R3 and R4 are matched 10 k9 precision resistors and R5 is a
500 Q trim potentiometer. Resistors R3-R5‘ form a voltage divider which
when properly balanced has a midpoint voltage, VMp, given by equation 1.

VMP = [(Vsp - VREFX R3 + (XR5)/( R3 +R4 +R5)] - VREF (1)

The quantity or is the fraction of R5 which is between Vsp and the center tap
of R5. The voltage VMp is then amplified by 0A4 which is configured as a
voltage follower with a gain of 11. This voltage is called the difference
voltage VDIF and is used by the potential step injector and the voltage
comparators. The voltage VDIF is compared with common by comparators
0A5 and 0A6 which are configured as a window comparator with the window
uniform about circuit common. The output of the comparators is connected to
the control logic and is used to determine if the cell potential is within,
greater than, or less than the control window. Since VDIF is amplified by
0A4, the voltages which are compared can be larger than the desired control
window. Comparators 0A5 and 0A6 can thus be used without hysteresis

27

1 which enables them to respond more rapidly to changes at their inputs and
eliminates the error in potential control due to the additional voltage added
by hysteresis. I

From Equation 1, it can be seen that the output of the voltage divider 4
will be zero only if the network is balanced under conditions where the two
inputs are equal in magnitude and opposite in sign. Any deviations in this
condition will cause the output to have a nonlinear gain as the input voltage
increases.

The window threshold voltages are generated by a voltage divider
network which consists of resistors R8 — R12. Resistor R12 is a 500 Q ten-
tum potentiometer which is used to adjust the size of the control window.
The control window voltage, relative to the negative supply voltage, can be
calculated using the equation for a voltage divider. Equations 2 and 3 are the
equations for the positive threshold and the negative threshold respectively.

v+th = [(v+ . V_) ( R10 + Re)/( R10 + R11 + Re)] (2)
V_th = [(V+ - V_) R10 /( R10 + R11 + Re)] (3)

The quantities V + and V_ are provided by the power supply and Re is the
equivalent resistance of R8, R9, and R12. The value of Re is given by
equation 4, where aR12 is the fraction of R12 which is not shorted out by the

center tap.

Re = 1/( 1/(R8 + R9) + 1/aR12) (4)

28

By adjusting the value of Re the operator can adjust the size of the control
window. Using this configuration, the comparison voltage is always near
common and the comparison window is nominally symmetric about common.
By maintaining the control window near common, the need for amplifiers
with extremely fast bandwidths is eliminated while still maintaining a very
rapid response time to changes in the cell potential.

The Maintenance Injector

The maintenance injector is responsible for maintaining the cell
potential within a given control window for the duration of the step. This is
accomplished by the rapid injection of equally sized charge pulses at a
variable rate which is governed by the rate of the Faradaic reaction at the
working electrode. The schematic of this injector is shown in Figure 3.4. The
injector consists of: a 12 bit digital to analog converter (INJDAC), Analog
Devices AD 565A; three operational amplifiers (0A7, 0A8 and 0A9),
National Semiconductor LF 411; four switches (Sl - 4), Harris HI 381, four
resistors (R15 - 18), and two calibrated capacitors. In addition, the cell
amplifier (0A10) is an Analog Devices AD 380. The charging voltage is
obtained fiom INJDAC which is configured to provide a 0 to 5 volt unipolar
output with an accuracy of 0.00061 volts. The output of INJDAC is then
bufl'ered by 0A7 to provide a stable voltage source for 0A8 and 0A9 which
generate the two charging voltages which are equal in magnitude but
opposite in sign. The outputs of 0A8 and 0A9 are connected to the calibrated
capacitors through 81 and 82 respectively. The outputs of 0A8 and 0A9 are
isolated from the switches by R17 and R18, 100 Q resistors, to prevent the
amplifier output from being affected by the large change in the capacitive
load due to the opening and closing of the switches The calibrated capacitors

‘29

mmm>

gauges oaiabuuafi 05 mo Bug 380.2: 850332 in oar“

 

 

 

 

U<n=.z_

 

 

30

are then connected to the summing point of the cell amplifier, OA10, through
S3 or S4, respectively. Having both a positively and negatively charged
capacitor available to inject charge into the cell without delay increases the
versatility and control of the maintenance injector. Timing of the switches is
such that 400 us before any injection switch is closed, the corresponding
charging switch is opened. This prevents the charging voltage from ever
being connected directly to the cell. The "on" resistance of the switches is less
than 30 ohms and does not seriously afi'ect the discharge or charging time of
the capacitors. The large "off" resistance of the switches, greater than 3 G9,
prevents a significant amount of current from leaking into the cell.

The Potential Step Injector .

The potential step injector was designed to provide an efficient
mechanism for changing the cell potential from one setpoint potential to
another. The potential step must occur rapidly so that the shape of the
voltammogram is not distorted by a change in the diffusion profile. In
addition, the maintenance injector should not be used to trim the potential to
the desired setpoint since the charge injected by the maintenance injector is
considered to be used only in replenishing the charge consumed by the
reaction. If the maintenance injector is activated before the desired potential
is achieved, the complete separation of the charging and Faradaic currents is
not possible. To accomplish the potential step, the injector injects a variably
sized charge pulse at a constant rate. The size of the charge pulse is
determined by the amplified difference between the cell potential and the
setpoint potential which is then used as the charging voltage for the injection
capacitor. By dynamically adjusting the charging voltage, the cell potential

is stepped in a rapid yet controlled manner.

’31

330? 93m 33:33 05 .«o ofldfivom mam earn

 

93. 102.;

 

 

 

 

32

The schematic for this injector is shown‘in Figure 3.5. The circuitry
consists of an 8 bit multiplying digital to analog converter (IDAC), National
Semiconductor 0830; two operational amplifiers OA11 and OA12, two
switches SS and $6, and two resistors R17 and R18. The amplifiers and ~
switches are the same as those used in the maintenance injector. The
charging voltage is obtained from VDIF of the comparison circuit which is
connected to the reference input of the IDAC. The output of the IDAC is
amplified by OA11 and buffered by OA12. This buffered voltage is used to
charge the step injection capacitor through S5. Switch SS connects this
capacitor to the cell amplifier. In this configuration, the IDAC is being used
as a current switch which allows. the operator to select the desired gain for
the charging voltage before the experiment begins. The design of this
injector allows the charging voltage to be dynamically adjusted as the double
layer capacitance changes. This enables the cell to be charged in an efficient
manner without intervention from the microprocessor or the use of repetitive

ms to determine the exact charge needed.

Analog To Digital Converter

An analog to digital converter (ADC) was included in the design of the
polarizer as a means to calibrate and verify proper operation of the polarizer.
Figure 3.6 is the schematic of the ADC module. The converter is an Analog
Devices HAS 1200 which has a conversion time of 2 us. A fast conversion
speed allows the operator to check the cell potential by software control at
anytime along the potential curve. To insure that the input signal is stable
and within the operating range of the ADC, two operational amplifiers (0A13
and OA14) and a track and hold amplifier (TH2) are incorporated. These

components are of the same type described previously. The reference

33

£3358 Efifiéfiofig 23 .«o ofigvom 0.»... 3de

 

 

 

oo<

NIP

 

 

 

 

 

m?
«2

‘34

potential is buffered by OA13 and connected to OA14, a summing amplifier
with a gain of 2, through resistor R21. Trim potentiometer R22 is used to
provide a constant offset of 5 volts to the summing point. This allows the
ADC to be used in the unipolar mode on a zero to -10 volt scale. This is the
scale which ofl'ers the greatest protection from an overload. In addition, the
reference potential is amplified by a gain of 2. The output of OA14 is clipped
to 13 volts by a zener diode (Z1). This voltage is then input to the THZ where
the signal is held prior to a conversion to insure a stable voltage. This is

necessary since the ADC is a successive approximation type converter.

The Control Module

The control module which resides on the third mother board of the
microcomputer provides the interface for the analog functions of the polarizer
and generates all timing and control pulses used throughout the polarizer.
Figure 3.7 is a block diagram showing the functional components of the
control module. These components are the device select, the data bus
demultiplexer, the data bus multiplexer, the potential step control logic, the
potential maintenance control logic, the step timing logic, the injection
counters, the analog to digital converter interface, and the PAR 303A control
logic.

The control module is a memory mapped peripheral to the
microcomputer and decodes a selected range of addresses to be used as device
selects. This is similar to the manner in which the standard chip select
module of the Bruce Bus functions (15,16), except that the decoding scheme is
carried out such that sequential addresses can be used to trigger events with
reproducible timing. The device select decodes an address field of 512 bytes
into eight 64 byte segments. Whenever any address within a given 64-byte

'35

    

.3333 3.518 Esta—a $3969.30 23 no 833% “—33 @3339 p.” 9:53

            
           

muhamzoo
tomoi

mam mosmm

      

02.22.
mm.“

mumps-300

cuxflnfiaaz 20:02.2.

man SRO

       

cux3n=4=2un
man (.20 ,

 

         

             

         

   

..oEzou ..oEzoo .5528 .6528
03 33 as. Btu 332222:
.3532 .3529.

          

          

         

«Chou-.2.
tuba
45.5.52:

20m.
l¢<m300
ghzuhon.

anyhow—.2.
u0<2u
lbzza

36

segment is written on the address bus of the microprocessor an output pulse
is generated. The eighth 64-byte segment is further decoded into eight 8-byte
segments which are qualified by the read and write strobe from the
microcomputer. By qualifying these eight 8-byte segments, an output pulse
is only generated when a valid read or write operation is occurring. This
prevents stray output pulses from being generated by the device select. The
first two 8-byte segments are further decoded into sixteen l-byte segments
which are used to trigger individual devices on the control module. Figure
3.8 is a schematic of the device select function of the control module. Table
3.1 contains the description and address(s) of each functionality.

In addition to address decoding, the control module provides several
types of data multiplexing and demultiplexing for the different analog
. modules. Data for the reference DAC is double bufi‘ered and demultiplexed
from 8 to 12 bits and all 12 bits must be simultaneously written to the DAC.
The schematic for this circuit is shown in Figure 3.9. By using double
buffering, the reference value can be updated prior to issuing the command to
start a new step. This allows the microcomputer to setup the next step
during the interrupt which handles the data collection. The data for the
maintenance injector DAC needs only to be demultiplexed and written
simultaneously to the DAC. This method of demultiplexing allows the
processor to change the value of any charge injection by simply writing new
data to the control module. Since the microcomputer can change the
charging voltage at any time during an experiment, a wide variety of
difl‘erent experimental waveforms are possible. The schematic for this type of
demultiplexing is shown in Figure 3.10. The ADC generates 12 bits in
parallel and the data must be multiplexed onto the eight bit CPU data bus.

sag seen 83% was orgasm a... charm

 

 

 

 

 

 

'37

 

 

 

 

 

 

 

 

 

 

 

 

 

v
m A A m2
b: 1 8:01 m+
E: n 8:01 s . .
no: 1 8:0‘ o 3<
B: I 8:
m m+
V v
n .
8:011 s N A W n:
8:.0l o 2 o< F
8:0l1 n 0 m+
2102 o
8:0l1 v 2 ~< . .
8:0II m 0 «2
5:0] N 3 [.02
8:0! _ S m+
8:0l o E I» x l.
5.
5:0! 5 8: s m+
8:01 o 2 3 8:0i w 2 3 . . cl.
8:0II n 0 3:0l m 0
9.02 2.02 02
3:01 v 2 ~< 8:0! v 2 3.
3:0] n 0 880|1 n 0 m+
8:011 m B I? 8801 N 3 - olr.
6:0l . .8 '09.. 9.801. .8 I» lg 3
8:01 0 E 880L o : [.039

 

 

 

 

 

 

 

 

 

 

 

 

 

 

m...

 

 

38

TABLE 3.1. Hardware addresses of the polarizer interface.

F100
F101
F102
F103
F104
F105
F106
F107
F108
F109
FICA
FICB
F100
FICD
FICE
F10F

F1D0
F1D1
F1D2
F1D3
F1D8
F1D9
FlDA
FlDB
FIEO
F1E1
F1E2
F1E3
F1E8
F1E9
FlEA
FlEB

START
REFDAC L
REFDAC H

INJDAC L
INJDAC H
IDAC

SAMPLE

ON

OFF

LATCH DATA H
LATCH DATA L
PURGE

STOP PURGE
DISLODGE/DISPENSE

ADDRESS OF 8254-1-1
ADDRESS OF 8254-1-2
ADDRESS OF 8254-1-3
8254-1 CONTROL REGISTER
ADDRESS OF 8254-2-1
ADDRESS OF 8254-2-2
ADDRESS OF 8254-2-3
8254-2 CONTROL REGISTER
ADDRESS OF 8254-3-1
ADDRESS OF 8254-3-2
ADDRESS OF 8254-3-3
8254-3 CONTROL REGISTER
ADDRESS OF 8254-4-1
ADDRESS OF 8254-4-2
ADDRESS OF 8254-4-3
8254-4 CONTROL REGISTER

~39

 

01
DZ
03
D4
05
D6
D7
DB

 

 

TTTTTTT

OE

 

 

 

 
 

REFDAC L

 

 

09

D10
D11
D12

TTTT

 

0E

 

 

 

 

 
 

REFDAC H

   

Figure 3.9 Schematic of the double bufl'ered demultiplexer for the
reference DAC.

40

 

D1

D8
D3
D4
D5
D6
D7
D8

TITTITT

 

 

 

 

INJDAC L

 

 

D9

D10
D11
D12

TTTT

 

 

 

   

INJDAC H

Figure 3.10 Schematic of the demultiplexer for the maintenance injector DAC.

41

 

74LS
244

 

 

TTTTTTT

 

 

74LS
244

 

 

NINTH

 

         

+LIMIT
-LIMIT

DATA READY

Figure 3. 11 Schematic of the twelve to eight bit multiplexer for the ADC.

42
Furthermore, the data must be latched for later acquisition by the CPU. The
schematic for this function is shown in Figure 3.11.

Timing for the potential step injector is generated by four counters on
two Intel 8254 Programmable Interval Counter Timers and associated logic.
The schematic for the timing and potential step control logic is shown in
Figure 3.12 and the resulting timing diagram in Figure 3.13 A potential step
is initiated by issuing the STEP command which writes the F10016 onto the
address bus. Counter 1 is programmed for mode 5, interrupt on terminal
count, and delays the start of the step until the output of the REFDAC has
settled to the desired voltage. A typical delay time for this counter is 4 us
which corresponds to a count of 1416- The STEP commands stops the
maintenance. injector and resets all other counters. After counter 1 generates
an output pulse, counter 2 is triggered and generates a pulse which latches
the output of the comparison circuit. One half clock cycle after the values are
latched the control logic determines if a step injection pulse is needed. The
determination is based on the value of the two control signal from the
comparison circuit. If either signal is low, step charge injection is needed.
This generates a pulse which sends the comparison circuit into hold mode
and in turn triggers counter 3 to start counting. Counter three provides a
delay while the charge is being injected into the cell by the potential step
injector. When the counter reaches the end of count, counter 4 is started.
The end of count from counter three also toggles a flip flop which reset
counter 3 and prevents the charging voltage from being connected directly
into the cell. Counter 4, provide the timing for the recharging of the step
injector based on the difference voltage derived from the comparison circuit
and a delay for the reference electrode to settle before the comparison circuit

compares the cell with the reference DAC.

43

a»... .888 438.5 no... 3333 B... .... £333 a .m 2&5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

one
3:0 53.. G
v 9, J <
50 0 o o
G K O
.0. v3 Div 0 0 8
o no;
8 o a I» a
m
a» A
mu .Yluv o
o
m. _Iu a... a o a a ..O 5.....-
m , . m
> A c\ A flamers. .
.65 01 }
52.2. OT 0 o o o m A
09.5.0 GI 20 _.|o .... o 5.2+ (
0
5:3 W ,
93.23 l0 2... 53. o\ A 4
[I ....

 

 

 

8
3pm
...umwc

6%.: 33:8 ~38? 93m 13:33 23 .«o 8895. mafia. ma .m ensure

 

 

53.5 «$368 . _ L
.38 :oo Llll.
.5307: Hommm ]

mag 60...: . Lulll...

 

2.35 H ..-

 

nLEEI L
fiEE+ _
32353. x025 Ill—Illlll. ..IIIIIJ
3.8 93 . ulnlllrll
moum 5

300—0 22%

45

. When both comparator outputs are true at the end of the delay time,
ENABLE is generated. This signal stops the injection of charge by the
potential step injector and activates the potential maintenance injector.

The timing of the maintenance injector is different from that of the
step injector since smaller quantities of charge are injected thereby
eliminating the need for a delay time between injection and comparison. The
ENABLE signal also starts the timing of the potential step by counters 5 and
6. Counter 5 is programmed to be a divide by n counter, and its output is the
clock input for counter 6. Counter 6 is programmed to be in mode 5 which
generates an interrupt on terminal count. At terminal count the output of
counter 6 goes LO which toggles a flip flop and generates the interrupt to the
processor. This flip flop is necessary since the interrupt controller on the
CPU is edge triggered but level sensitive. This means that the edge triggers
the interrupt controller, but the level must be maintained until the computer
acknowledges the interrupt. The interrupt is reset by the STEP command
which starts the next step or by the end of the programmed waveform. The
schematic for the maintenance injector control and timing logic is shown in
Figure 3.14 and the timing diagram is shown in Figure 3.15. The logic for
the injection counters is also shown in Figure 3.14.

The control of the analog to digital converter is designed to function
under a variety of conditions. To achieve this flexibility the ADC control
module is driven by a device select generated by the microcomputer. This
limits the time during which an analog to digital conversion can occur, since
the microcomputer has to be active. The schematic for this function is shown
in Figure 3.16. The device select trigger a flip/flop which generates the hold
pulse for the track and hold amplifier TH2. Additionally, the device select is
inverted and used as the trigger for the ADC. The data ready signal

46

.2358
:33er 25 6:: 6B..— mfifiu 93¢ 6%.: 38:8 :83? 8:33:38 3:98: 33¢ oflaaofim 3d 953m

            
      

€35.32.
8 PUNHZ-l

52.2? 355+ “:92:

mezzo!

10.23
3.55200

..z. awhm

'47

£33m 0.39500
30:53 38%
.8398 ammmm
:Boomfi ammmm

30.37
098:0!
flail
“8.3?

03:50...
$53 +

:85: x85
«38:

6&3 15:8 :33? 85:8:38 13:33 :5 we 8:536 g 3 .m warm

 

 

 

 

 

 

 

 

 

 

 

 

 

ILIIEIIJ

L _ r
_II

#030 Egg

48

 

S / H I} j’>o——-D£NCODE

;- D QF———DT/H

DR D——{>o—? R
RSTD—J I

 

 

 

 

 

Figure 3.16 Schematic of the ADC control logic.

PAR 303A

REF_FAULT 5*}
+5 5

D /Q—D|NT 09
R
STARTD-J

 

 

 

 

 

 

 

Figure 3.17 Schematic of PAR 303A reference fault detection—interface;

'49

generated by the ADC is used to latch the data into the data latches in the
multiplein'ng function described earlier and also used to reset TH2 into the
tracking mode. If the need arises for the ADC to function during a given
experiment, the device select can be replaced by a hardware generated signal
which would have the required timing. The only constraint is that only one
conversion per step is allowed unless the microcomputer is capable of storing
the data during the step.

Additional control circuitry is required when the polarizer is used with
a PAR 303A. The additional functions which need to be controlled are the
reference electrode fault sensing, the dislodge/dispense cycle for the mercury
drop, and the nitrogen purge. Figures 3.17, 3.18, and 3.19 respectively are
the schematics for these additional control functions. Fortunately, in cyclic
voltammetry the only function which needs to be active during a
voltammetric run is reference fault sensing, and this function serves as an
error condition to the microprocessor. The reference fault signal occurs when
the reference electrode potential exceeds :1: 4.5 V. When the reference fault
signal goes HI, a flip/flop is triggered which generates an interrupt to the
processor. This interrupt stops the charge injectors and returns the system
to go to open circuit. In addition, the processor activates a task which
notifies the user that an error has occurred.

The dislodge/dispense and purge control functions can occur only when
the microprocessor is active, thus eliminating additional timing logic. A
dislodge/dispense sequence for the SMDE is initiated by writing an F100 16
on the CPU bus. This address is decoded and triggers a. one-shot monostable
multivibrator. The output pulse of the monostable is logic 0 for 50 us. This
pulse initiates the dislodge/dispense sequence which is part of the PAR 303A.
To perform experiments which employ a DME the necessary software could

50

+5

70 K0

 

DISLODGE D—C A1 R

5d A2 C I
PAR 303A

+5 3 /0 ——_D Dislodge\Dispense

0.01,;

 

 

 

 

Figure 3.18 Schematic of Par 303A dislodge/dispense control interface.

I PURGE C‘fi
ct PI- “ 'L ' PAR 303A

64 up . u/o ° ° PURGE

RTcD—‘c'oonoaos "c "commas '° >5

SPURGE

: T a

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 3.19 Schematic of PAR 303A N2 purge interface.

51

be incorporated into the interrupt handler and a new drop A
dislodge/dispense sequence for the SMDE is initiated by writing an FICC 16
on the CPU bus. This address is decoded and triggers a one-shot monostable
multivibrator. The output pulse of the monostable is logic 0 for 50 us. This
pulse initiates the dislodge/dispense sequence which is part of the PAR 303A.
To perform experiments which employ a DME the necessary sofiware could
be incorporated into the interrupt handler and a new drop could be dispensed
between steps. In addition, timing of other parameters would need to be
adjusted to account for the drop growth since the PAR requires a' maximum
of 250 ms for a large drop to form. T

Purging the cell with nitrogen is easily controlled by the
microprocessor since this function can only occur between experiments when
. the processor is active. The purge valve is always either purging the solution
by bubbling N2 through the cell or providing a positive atmosphere of N2 over
the solution in the cell. Timing of the purge cycle is accomplished by using
the Real Time Clock module on the CPU bus programmed to generate output
pulses at 1 second intervals. These clock pulses are then counted by an
asynchronous ripple counter constructed of two 74LS 190 decade up/down
counters. The ripple count output of the second counter provides a clock
pulse to the D flip/flop, 74LS74 which disables the counter and stops
bubbling N2 through the solution. To purge the cell, a simple write to the
appropriate hardware device select activates the solution purging cycle. The
purging will continue until the counter reaches terminal count, and then the
valve is switched such that a flow of N2 is maintaining an inert atmosphere
above the cell. The purge cycle can also be terminated by software. This is
accomplished by writing the appropriate device select address on to the CPU

bus.

52

Software A

The software for the collection and subsequent analysis is divided into
two distinct categories. The microprocessor acquires and controls the
polarizer using programs written in the language polyFORTH (17). Data
analysis and reduction occur in an IBM AT by programs written in C which
runs under PC DOS.

FORTH is a multi-level language and operating system which is used
exclusively on the microprocessor (17 ,18,l9). FORTH is characterized by four
major elements: the dictionary, the stack, the interpreter, and the assembler.
The dictionary occupies most of the memory space. It is a list of 'words', each
of which is a program which can include any other dictionary entry. New
entries can easily be added to the dictionary which makes FORTH an
extensible and versatile language. One minor fault with FORTH is that
already defined words can be redefined thereby changing the effect of all
subsequent words that include that word in their definition. For this reason
extreme care must -be used in naming new words.

Four separate dictionaries are maintained, and each can contain
functions of the same name, but with drastically different meanings. Two
push-down stacks are also maintained. The first, the parameter stack,
provides an efficient mechanism for transferring numbers from one word to
another. The second stack, the return stack, is used for internal flow from
word to word. This stack can also be used as temporary storage; however,
extreme caution must be used to restore this stack before another word is
called.

If the return stack is changed, the system will crash and all data is
lost. FORTH is fundamentally an interpretive language. Two interpreters

53

are available. One works in the usual manner, simply passing text strings
and looking up each word in the dictionary; the other interprets strings of
absolute memory addresses by executing words which contain addresses of
the next word. This threading provides for a faster execution speed as each
word does not have to be located as in a conventional interpreter. FORTH
also includes an assembler, which allows the user to define words on the
assembly language level for even greater execution speed. Such words are
necessary for low level control and interrupt driven devices.

FORTH was chosen for this application for many reasons. It is a very
compact language/operating system using only 8 Kbytes of memory for the
kernel. FORTH is extensible, a great advantage when software modifications
are required due to changing experiments or hardware modifications.
FORTH is highly portable. FORTH is relatively fast and eficient. Well-
written FORTH programs compare favorably with software written strictly in
machine-language (about 85 %). Since FORTH is extensible, it can grow to a
high-level language. Programming productivity is much greater than
machine-language, and yet overall speed is not reduced as in other high-level
languages such as FORTRAN or C.

In addition to the basic defining words supplied with FORTH,
additional words have been added to the dictionary which control the
polarizer and perform disk access. As an example, a listing of five words

involved in storing data to the disk in a binary format follows:

54

VARIABLE lBLOCK I

:SBUFFERGGPREVDUP2+ROTSWAP! l;

:N_BYTES(->#bytes)BOOO@2* 1+OD*40+;‘

: N_BLKS ( - # blocks) N_BYTES 400 IMOD SWAP 0> IF DROP 1+ THEN;

: STORE>DISK ( -> # blocks) N_BLKS DUP 4 SWAP - 0> IF DROP 0 DO
SBUFFER I lBLOCK 0 + I 2* 4 + PREV + ! LOOP lBLOCK 6 +
lBLOCK ! FLUSH THEN ;

The first word lBLOCK is a variable definition. When a variable
definition is called the address of the variable is placed on the top of the
stack. This allows any following word to read or alter the contents of
lBLOCK directly. SBUFFER stores the value 6 at the memory location
pointed to by the system variable PREV and again at the memory location of
PREV + 2 using the FORTH definition "I". This word initializes the disk
bufl‘ers so that the next available bufl‘er starts at BOOO. N_BYTES reads the
contents of B00016 with the 6 definition and multiplies the value by 2, adds
1, multiplies by 0D16, and adds 4016- N_BLKS executes N_BYTES which
returns to the top of the stack the number of data points stored during the
experiment. The number of bytes returned by N_BYTES is divided by 400
using the command lMOD which returns the integer divisor on the top of the
stack with the remainder below it. SWAP changes the order of the stack
such that the remainder is now on the top. The statement 0> IF performs a
conditional jump to the THEN statement if the tested value is false. If the
tested value is true, the number is removed from the stack by the FORTH
definition DROP and 1 is added to the divisor. STORE>DISK is the only
routine that would normally be typed by the operator. It uses N_BLKS to
determine the number of blocks used and checks to see if less than four disk
bufl'ers were used. If the condition is true, a loop is entered which stores the

55

diskbufi'ers to the disk block pointed to by the address in lBLOCK. This loop
continues until the disk bufi‘ers which were used for the data acquisition are
written to disk. T

Since the time required to store a given buffer is considerably longer
than the time required to perform the experiment, we are limited to the four
disk buffers in which to store all acquired data. This has not been a problem
since each buffer can contain 2 Kbytes of information. Table 3.2 is a listing
of the most frequently used and highest level words written for the operation
of the polarizer along with their functions. The most intricate word
developed is the interrupt service routine which reactivates the processor and
starts a new step. Appendix A.1. is a complete listing of all FORTH code
required to run the polarizer.

Since FORTH is integer based and the use of the floating point kernel
is extremely cumbersome, the data are uploaded to an IBM AT via a serial
connection. A switch box is used to switch the serial line between the
terminal and the IBM computer. The data are logged to the fixed disk of the
IBM computer by using a ' terminal emulation package named EM,
copyrighted by Diversified Computer Systems. _The data are sent to the IBM
computer in ASCII format.

Once the data have been transferred to the IBM computer, data
reduction can occur. These routines are written in Microsoft© C and run on
the IBM AT. The data reduction routines read the header, the first 64 bytes,
to determine the various parameters of the experiment. The data are then
read in, point by point, converted to real values and stored in a file with a
name which is contained in the first word of the comment field of the header.

Since each experiment has a unique data file, each method has a separate

56

TABLE 3.2. Table of FORTH words and their function.

DISK_STATUS
NRAMP

PRAMP

SETUP_COUNTERS
LOAD_COUNTERS
ARM_INT
SAVE-INT-MASK
ADC.VOLTS

INTR8

' INTR9

Shows the status of the disk bufl‘ers.

Calculates the REFDAC values for a ramp which
initially scans in the negative direction.

Calculates the REFDAC values for a ramp which
initially scans in the positive direction.

Writes the control word to th counters.
Writes the timing data to the counters.
Arms the interrupt controller.

Saves the interrupt controller status.

Converts the ADC value into a voltage using the
math coprocessor.

Interru t routine which reactivates the processor,
stores e data, and updates REFDAC.

Interrupt routine which reactivates the processor,
returns the cell to open circuit, and issues an error
message to the operator.

Highest level word which clears the buffers, writes
the data header, sets up the scan, starts the first
(glitz? and upon completion of scan stores the data to

57

routine to read the data in and calculate the charge used to maintain the step
and the control voltage for each step. The exact equations used to calculate
the charge are given in later chapters. The reduced data are then passed to
PLOT, a device independent plotting routine written by Drake Deidrich (20)
and myself which plots the output on either the monitor, the plotter, or the
Postscript© compatible printer. Appendix A2 is a complete hating of all
programs written in C for use with the polarizer. A brief explanation of the

individual ftmctions is included with the program listings.

CHAPTER 4

CALIBRATION OF THE CHARGE-PULSE POLARIZER

Careful calibration of the polarizer is essential to accurate performance
of the instrument. However, once completed, the calibration need only be
checked periodically to insure preper operation. The calibration of the
polarizer includes balancing of the analog circuitry and the adjustment and
characterization of the charge injectors. This chapter will detail the analog,
adjustments chronologically starting with the operational amplifiers, track
and hold amplifiers, digital to analog convertors and the comparison
circuitry. Once the analog circuitry is balanced the leakage current can be
measured and the total charge injected by the maintenance charge injectors
can be calibrated.

ANALOG DEVICE CALIBRATION

Particularly crucial among the analog adjustments are those in the
comparison circuit where the cell potential is being 'monitored and the
reference potential and the control window are generated. The need for such
precise calibration is that during a given experiment, the system never
makes an analog to digital conversion; the control system accuracy is based
on the assumption that the comparison circuit is accurately comparing the
current cell potential with the desired setpoint potential. However, before
the comparison circuit can be trimmed, several other analog devices must be

58

‘59

balanced. The current to voltage convertors OA2 and OA7 ( see Figures 3.4)
at the outputs of the REFDAC and INJDAC, respectively, are the first
devices to be balanced. The gain on the feedback loop of the amplifier is
temporarily increased by placing a 1 Mn resistor in the feedback loop and a
10 k9 resistor at the inverting input. The inverting input of the operational
amplifiers is disconnected from the DACs and grounded. The output of the
amplifiers is then balanced by adjusting the balance potentiometers which
are associated with the operational amplifiers. The cell amplifier OA10 was
also balanced in this manner. The voltage followers 0A1, 0A9, OA12 and
OA13 (see Figure 3.3, 3.4, 3.5, 3.6) are adjusted by disconnecting the non-
inverting input and connecting it to circuit common. The gain of the voltage
followers is then temporarily increased by putting a 1 Mn resistor between
the amplifier output and the inverting input and a 10 k9 resistor from the
inverting input to circuit common. As with the other amplifiers, the output is
then balanced to 0.0000 V by adjusting the balance potentiometer. Once the
operational amplifiers are balanced, the remainder of the analog devices can
be trimmed.

The following order for calibration is important since it provides a
means whereby the system is self-consistent. The first fimctionality to be
trimmed is REFDAC. The digital inputs to REFDAC are set to all zeros by
the microprocessor, and the zero adjust potentiometer is adiusted until the
output is -2.500 V. The microcomputer then sets the digital inputs to all
ones, and the gain adjust potentiometer is adjusted until the output voltage
reads +2.4988 volts on a digital multimeter. This process is repeated until no
further adjustments are needed. A linearity check may be made by
incrementing the digital inputs from zero to full scale and recording the

60

output at each step. Once calibrated, REFDAC is used to“ generate all other
calibration voltages used. INJDAC is adjusted by the same procedure.

The track and hold amplifiers TH1 and TH2 (see Figures 3.3 and 3.6),
are balanced by disconnecting their analog inputs and connecting them to
system common. In addition, the track/hold inputs are disconnected fi'om the
microcomputer and connected to a function generator. The function
generator is set to generate a Tl‘L square wave at a frequency of 200 KHz.
While TH1 and TH2 are being gated by the frequency generator, the pedestal
offset is adjusted to 0.000 V by the offset adjust potentiometers. By using
this procedure, the pedestal offset can be trimmw while preventing the droop
rate of 5 mV sec"l from affecting the results.

The output of REFDAC is then connected to the TH1 input, and the
ADC encode signal is connected to the function generator (see Figure 3.6). As
in the prior procedure, the function generator is set to generate a 200 KHz
TI‘L square wave. The output from the ADC is displayed on a logic analyzer,
and the offset adjust potentiometer is adjusted until the output flickered
equally between 111111111111 and 111111111110 for a REFDAC input of
+2.500 V. The output of REFDAC is then set to -2.500 V, and the full scale
adjust potentiometer is adjusted until the display flickers between
000000000000 and 000000000001.

The next circuit to be balanced is the voltage divider network which is
part of the comparison circuit (see Figure 3.3). This must be done very
carefully. For this procedure an externally balanced summing amplifier with
a gain of exactly -1.0000 is used to generate a voltage of equal magnitude but
opposite sign of the REFDAC output. The REFDAC output is connected to
the buffer amplifier 0A4, and the inverted output is connected to the
reference input buffer 0A5. The network is then balanced by adjusting the

61

trim potentiometer, R5, so that the output of 0A4 is 0.0000 V. The balance of
the voltage divider network is then checked by changing the value of
REFDAC and verifying that the output voltage remains 0.0000 V. This is an
extremely accurate. test of the balance since the output voltage will vary as a
function of the input voltage if the two inputs are not equal in magnitude but
opposite in sign. For example, if the divider is balanced with one input at
1.000 V and the other input at -0.995 V, the balance point for R5 will be at
224.3 9. If each input voltage is then increased by 1.000 V, the new balance
point would be at 237.1 (2. The voltage error caused by this difference would
be -24.95 mV at the input to 0A4.

The voltage comparators ( see Figure 3.3) are balanced by connecting
the inverting and the non inverting inputs to the circuit common, and the
. balance potentiometers are adjusted until the comparators are on the verge
of oscillation. Complete balancing of the comparators is not necessary since
the circuit design uses the internal hysteresis as a means of stabilizing the
response of the comparators.

Finally, the window voltage (see Figure 3.3) is adjusted to the desired
value by using a digital multimeter to measure the output voltages of the
window generating voltage divider as R18 is adjusted. For this work, the
window voltage was adjusted to i2.5 mV. A

CALIBRATION OF THE MAINTENANCE INJECTORS

In order to know accurately the amounts of charge injected, it is
necessary to know the leakage current through the injection switches, the
capacitance of the charge injectors, and the amount of charge injected each
time the switches are activated. Precision capacitors could be used; however,

they are very expensive and would still require calibration to insure the

'62

capacitance from the circuitry would be accounted for in the total capacitance
of the injector. To avoid buying several precision capacitors which would
need recalibration, capacitors with relatively high tolerances which are stable
with respect to changes in frequency and temperature can be standardized to
the necessary precision.

Before the injection capacitance can be calibrated, the leakage current
from the injection switches must be determined. This current is due to the
finite ofi‘ resistance of the analog switch and from the input offset current of
the cell operational amplifier. To determine the overall leakage current of
the injection system, it is necessary to insert a known capacitor in the
feedback loop of the cell amplifier, as shown in Figure 4.1. In this
configuration, the cell amplifier is configured as an integrator where the
output voltage is related to the input voltage by equation 4.1.

-1

V = — idt . (4.1)
out Of

A jumper wire is used to short out the feedback loop, such that the initial
voltage is 0.000 V. By measuring Vout as a firnction of time, the leakage
current can be obtained. A linear regression of equation 4.1 should yield a
line with an intercept through the origin if the integrator is started at
0.000 V.

Experimental data for four different known feedback capacitors are
shown in Figures 4.2 through 4.5. The results fi‘om fitting the data to
equation 4.1 yielded a leakage current of -12.2 :t 0.1 pA with a coefficient of
correlation of 1.00 for each of the feedback capacitors. However, the data did
not go through the origin as expected. The offset in the data was due to the

 

 

 

 

 

 

 

' 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VREF
@
POLARIZER F _
+
V

Figure 4.1 Calibration circuit using a precision capacitor.

. £ng
a: mwmd a you 083 333 13:33 me one? 25 ha 6353.52 3958 $2 on... .«o Rani—£30 «.... 9:53

Amv oEE

Ago—om _ COME coma 0mm

— b

- h

— p — b

O
n
.m.
[N06
n...
1
A
- m.
1..
9
Q0
lmod a
\./
(At

 

 

Fwod

. . #3393
h: 536 a you can. «38> 13:33 no one? an... 3 35833 32.80 $333 2.... mo 83925.5 ma. 939m

 

Amv can?
Sam com: 83 com 2:. o
— _ — n p b — n p p — _ . p — n . p — b _ _ o
co
O
n
.m.
[do n
1
A
. m.
«I?
. e
no
{No a
)
... A
x. (

 

66

Amv m8?
ooom

coma OONH
P p F L _ . p — — b — —

b p -

own

— —

.333an
m1 «356 a .8.“ 2B» 332' 33:33 ma 33¢ 05 3 $388.23.” 30kg ams—ao— ofi .8 gawk—mic v6 warm

 

(A) asenoA mime

‘67

£3838
m1 N3 :6 a you 08% «35> Ransom mo 23% on... .3 Egg? 30.58 @9393 3... he coma—£10 mi 0%

 

Amv m5;
ooom com: com” com oov o
P p — h — _ — _ _ _ — p _ p — _ k . — P. _ p _
3 o
O
n
«....
[H d
n
1
‘ A
I m.
1|
9
Q0
xv . IN 3
£ )
A
(

 

68

injection of stray charge caused by removing the jumper wire. An attempt to i
use a switch instead of a jumper wire failed since the switch increased the
measured leakage current.

Once the leakage current has been measured, the calibration of the
total injector capacitance and the charge injected by the switch can be
performed. The same integrator configuration used for the leakage current -
measurement can be used to calibrate the maintenance charge injectors. The
calibration procedure consists of using the maintenance injectors to step the
voltage of the integrator capacitor a known amount. This is accomplished by
setting the DAC_DELAY counter to a large value and issuing the STEP
command followed immediately by STOP and MAINT_ON. Using this
procedure, the setpoint potential is updated through the STEP command;
however, the potential step injector is prevented from injecting charge. The
maintenance injectors are then started and the potential is stepped to the
setpoint potential by the maintenance injectors. The number of injections
needed to step the potential 3 known amount is recorded. This procedure is
repeated for a range of charging voltages for both the positive and negative
injectors. The injector capacitance and charge injected by the switch are then
calculated from equation 4.2.

Qout = (Vinj Cm NW) + <st NW) + 61,,“K t) (4.2)

The quantity Vinj is the voltage to which the injection capacitor is charged,
cm is the unknown capacitance of the charge injector, Ninj is the number of
injections needed to step Vout from the initial voltage to the setpoint, Q“, is
the charge injected by the switch when the charge driver changes state, and
ileak is the value determine previously. The quantity Qout is obtained by

'69

multiplying Vout by the feedback capacitance Cf. Equation 4.2 is based on
four assumptions: 1) the charge on the injection capacitors is transferred
quantitatively to the feedback capacitor; 2) only one charge injector is used;
3) the leakage current is known; 4) the capacitance of the feedback capacitor
is known precisely. A plot of (Qout - ileaktyNim' versus Vinj should yield
calibration curves which are linear where the slope is equal to the Cinj and
the intercept is st. ‘

The results of this calibration procedure where the charging voltage
ranged from 1.250 to 0.400 V are shown in Figures 4.6 and 4.7. The
integrator feedback capacitance was independently measured to be 0.985 uF
and the injector capacitor had a nominal value of 1000 pF. Linear regression
of these curves yielded injection capacitances of 1054 pF and 1056 pF and
switch charges of -36.3 p0 and 20.3 pC for the positive and negative injectors,
respectively.

An alternative method of calibration which eliminates the need for a
known capacitor in the feedback loop can be used. The feedback loop for this
calibration procedure consists of a resistor and capacitor in series and a
precision resistor in parallel with the capacitor as shown in Figure 4.8. This
circuit forms the classical cell equivalent circuit for a three electrode cell (21).
In this configuration, the precision resistor provides a constant load on the
feedback capacitor. In order to maintain the potential, the polarizer must
replace the charge which is depleted from the capacitor by the precision
resistor. This is accomplished by using the maintenance injectors to inject
equal sized charge injections at a variable rate so that the potential of the
feedback capacitor is maintained to within i1 mV of the setpoint potential. If
the voltage on the feedback capacitor, Vout: is considered to be constant, the
value for Qout is given by equation 4.3.

70

. useas .1 £3. a E usage 8
32313?8§&3§a23m£§2§5gfiofiagfifl§fidfifi822§338:£%3uyh5aafiEMWO “Sizaflm

CC mmcfio> .8325

an own mug may buy may 0A. LEO

. _ _ 21m:

_

— —

 

(3) uonoeful / 38.1qu indino

 

FQOIWNA

71

.53? m8... a £3 segues
x3333 Saw—«33 on... go: :33? 8:83:38 33:33 33 o: 05 .8.“ 3.30 85:5me Ev earn

A>V mmmfio> heuomEH |

TH 0A md md 5.0 $6 Dd To
_ p _ . _ . _ _ _ _ _ _ . GalactV

_

 

(O) SUOITOSFUI / BEIGE“) qu'an

 

'72

 

 

 

VREF ' “ “

 

 

 

 

 

 

 

 

POLARIZER L _

 

 

 

 

 

 

 

' . b tion circuit using a cell equivalent circuit with a
Figure 4 8 grtléiézn resistor in the feedback loop of the control
amplifier.]

73
Qout = out tstep /_ Rf (4.3)

The quantity Rf is the precision resistor in the feedback loop, twp is the time
duration of the potential step, and Vout and Qout are the same as in the
previous equations. The quantity Qout is then used in equation 4.2. This
procedure is repeated for several charging voltages and the resulting data
plotted. A linear least squares fit of the data provide the values of Cini and
st for the charge injectors.

Two benefits of this method are that the same control software used in
a typical voltammetric experiment can be used in the calibration procedure,
and the need of a precision capacitor is eliminated. Instead of a precision
capacitor, a precision resistor which is less expensive and more readily
available can be used for the calibration procedure. Since resistance is an
more easily measured than capacitance, the result from this calibration
procedure should provide a more accurate means of measuring the amount of
charge per injection.

The calibration curves obtained by this procedure are shown in Figures
4.9 and 4.10 for the positive and negative injectors, respectively. The values
for the feedback capacitor and load resistor were 0.985 111‘ and 464 kn,
respectively. The setpoint potential was maintained for 65,536 us. The
results of the linear regression of equation 4.2 yielded values for Cinj and Q“,
of 1055 pF and -36.8 p0, and 1057 pF and 21.4 pC for the positive and
negative injectors, respectively.

The results from the two calibration procedures for two sets of
injection capacitors are shown in Table 4.1. The values obtained for the
injection capacitance are consistent regardless of the method used for

calibration. Moreover, the value obtained for the switch charge is consistent

O

"74

£333.: 3 bsvuv : 5MB :eugdmu:8
339:". 3:25:50 :8 ofi «Em: uBoon8:::3:wufi 33:32— 3389 2: now 3.50 5383250 ma. warm

QC mmcfio> mcwmpcno .8335

PA 04 DA $4 m4 NA a; CA ad
F _ p _

 

_ . _ _ p L . p b . — _ Cfilmo.m
. . O
. m.
. .m
181:3 1.
- O
w
[moummc 1
Q0
1 a
V
18ch .m.
a
r 0
H...
0
181%.: u
S
- \aw
(

 

[molmmq

75

_ .8338 GM Nina. a 5m? nouaudoo
Jamaica uSauwflnm 05 «59.. ~38? 85:33“:— Enoaon guano: on» you 3.50 acngamao 3 .v 0&3

CC mwmfio> mawmpmno .8392:

 

mr QT 3.. NT 2.. 3: OT QT 3..
__________L_____ molmo.ml
O
- n
11
Imonmm.T ,m
I an?
O
Imcnmo.T u.
, 9
I J
90
:8:me b
, m
[moummgu m
U.”
u O
.. [moumogn w
r \qw
(

 

lofilmodl

76

 

 

 

 

 

 

. . n 3803
Dana moan 0:8 . m 8a Euamoz
on we”. a. Sm . 96.8. mg Sm “38.3

2538
E can
0a 3a . ma SS 0.. «on an 82 “383
95332
on 3». mg 33 on ”.8- ma E3 “383
, . 333$
mg 82
0330 $9385.30 0995 8:58.230
imam 858:: :35.” 858?
53:0 ezmqgmbam 3mm 852397:

, doflg m
mo 52:08 2.5 3... you 533? .89 «NBA... Angie and Sawing 9:803 23 mo :8. Saw .3. mama?

’77

even for the two different sets of injection capacitors used. Based on this
information and the ease with which the second calibration procedure can be
performed, the second method was used periodically to check the calibration
of the polarizer.

Error Assessment

The analytical usefulness of an instrument is based upon the relative
precision and accuracy with which the data can be acquired. In order to
assess the accuracy of the polarizer, an estimation of the relative systematic
error in the charge delivered to the cell by the charge injectors must be made.
A propagation of the systematic error was performed for each of the
calibration procedures previously described using the equations which define
the output charge, Qout to the measured voltage. The resulting expression of
the error are shown in equations 4.4 and 4.5 for the integrator and the cell
equivalent circuit, respectively. _

(ESQ/Q) = (EV/V) + (St/t) + (mf/Cf) (4.4)
(5Q/Q) = (5V/V) + (St/t) + (BRfIRf) (4.5)

The systematic error in each of the components was estimated. The
estimated error for the measurement of the output voltage of the control
amplifier was :l: 1/2 LSB. This corresponds to an error of 0.000612 V for a
twelve bit ADC with a voltage span of 2.5 V. The estimated relative error
was 0.1 % for both the standard resistor and the standard capacitor. These
are the rated values of the components. The systematic error in the timing of
the step is due to the delay between the end of the step and the acquisition of
the voltage by the ADC. The worst case error based upon the known clock
frequency of the timing device is one count for a step of 65,536 us. This
corresponds to a relative error 7.6 X 107, which is negligible. The results of

78
the propagation of error, for an output voltage of 0.800 V, are given in Table

4.2. The results show that the most significant source of systematic error is
the accuracy to which the standard capacitor or resistor is known.

Table 4.2 Table of error analysis for the charge-pulse polarizer obtained

by propagation of error.
Leakage Integrator Equivalent
Current Circuit
0.18 % 0.18 % 0.18 %

The precision of the charge-pulse polarizer can be obtained
experimentally by replicate calibrations and also by the propagation of the
random errors. The relative standard deviation of 40 replicate scans for each
calibration procedure was calculated. The calculated relative standard
deviation is 0.1 % and is independent of the. calibration procedure. This
value agrees with the value obtained by a propagation of the random error,
where the precision of the standard is assumed to be zero and the errors in
the voltage and time are the same as those given previously. The value
obtained by the propagation of error is 0.077 %. This value is governed by
the quantization error of the ADC. Thus the charge-pulse polarizer is
capable of injecting a known quantity of charge with a precision of 0.1 % and
the potential can be measured and controlled to within 0.612 mV.

CHAPTER 5
A COMPARISON OF CHARGE-PULSE AND ANALOG
POTENTIOSTATIC CONTROL FOR CYCLIC VOLTAMMETRY

INTRODUCTION

Cyclic voltammetry is a controlled potential electroanalytical technique
where the potential ramp is reversed at some predetermined value and
proceeds back to the starting potential where it reverses again. This
technique, typically the first experiment performed in an electrochemical
analysis (23,24), was chosen to illustrate some of the important characteristic
differences between charge-pulse polarization and conventional analog
potentiostatic control. The characteristics examined and compared include
charging current, iR drop, scan rate, and changes in concentration. Cyclic
voltammetry was chosen since the effects of charging current and iR drop are
easily seen and can be clearly distinguished.

MATERIALS

The chemicals used for this study were ACS reagent grade CdC12 and
KN 03. These chemicals were used without further purification. The stock
solution for the supporting electrolyte was 1 M KNO3 and the cadmium stock
solution was 0.1 M CdClz. All subsequent solutions were prepared by serial
dilution in large volume flasks to minimize weighing and volumetric errors.
The water used in the dilutions was deionized water from an "in-house"

reverse osmosis type deionizer followed by distillation.

79

80

The mercury for the mercury electrode. was triply distilled and was
subjected to further chemical pretreatment. The chemical pretreatment was
that suggested by the SMDE manufacturer, Princeton Applied Research (25).
The pretreatment consists of placing equal volumes of mercury and 10% ‘
sodium hydroxide in a 1 liter flask. Tank oxygen is then passed into the
mercury by a disposable Pasteur pipette for a period of 12 hours. Extreme
caution must be used and no open flames are allowed. The mercury is rinsed
with deionized water, and the procedure is repeated using 10% nitric acid.
Again the mercury is rinsed with deionized water and the excess water
removed. After the excess water is removed, the mercury is filtered through
a paper filter which has a pinhole at the center into a clean polyethylene
container. Any residual scum or water will remain on the filter paper.

To eliminate the reduction of oxygen and subsequent changes in pH of
the analyte solution, the nitrogen used to purge the solution was passed
through two gas scrubbing towers. The procedure used was adapted from the
procedure suggested by PAR (26). The first tower contained a solution of
vanadous chloride and amalgamated zinc, and the second tower contained 0.1
M potassium nitrate, the supporting electrolyte. The vanadous chloride
solution is prepared by boiling 2 grams of ammonium metavanadate with 25
ml of concentrated hydrochloric acid and diluting the solution with 250 ml of
water. The solution produced contains vanadium in several higher oxidation
states and should be blue or green in color. The diluted solution is then
transferred to a gas scrubbing tower, and 10 grams of amalgamated zinc is
added. The solution will retain its original color until nitrogen is bubbled
through it, at which point it will turn purple. The solution will revert back to

a blue or green solution upon exhaustion but can easily be rejuvenated by the

81

addition of a few drops of concentrated hydrochloric acid. If the acidity is too
low a precipitate will form. The precipitate can then be redissolved by the
addition of 10% hydrochloric acid.

Glassware used in this study. was cleaned by rinsing with tap water
and soaking for 24 hours in a strong solution of Alconox followed by rinsing
with deionized water. After a thorough rinsing, the glassware is then soaked
in 6 M HNO3 for 24 hours. After soaking, the glassware is again thoroughly
rinsed with deionized water. All glassware is then dried in an oven for 24
hours at 70° C. The glassware is stored under aluminum foil to prevent dust
fi'om settling onto the surface of the glassware. The only exception to this
procedure is for the glass capillary. It was cleaned according to the
manufacturer's instructions by aspirating 6 M HN03 for 5 minutes followed
by aspirating deionized water for 30 minutes. After cleaning, the capillary is
dried by aspirating air for several hours.

The electrode used throughout this comparison study was a PAR 303A,
Princeton Applied Research, Princeton, New Jersey. The PAR 303A is a
Static Mercury Drop Electrode (SMDE) which delivers a known volume of
mercury down the capillary by using a solenoid between the reservoir and the
capillary to interrupt the flow of mercury. When the capillary is energized,
by either the front panel push button or by remote control from the
controlling instrument, the mercury is allowed to flow down the capillary
until the desired drop size, selected by the front panel, is obtained.

The potentiostat used to obtain the conventional voltammograms, for
comparison to those obtained by the charge-pulse polarizer, was a PAR 364,
Princeton Applied Research. The internal waveform generator was modified
by M. Raab (27), such that the polarographic analyzer was capable of
generating a linear cyclic potential waveform. The scan rates of the PAR 364

‘82

are 500, 200, 100, 50, 20, 10, 5, 2, 1 mV s'l. While these scan rates are not
extremely fast, under certain conditions the. effects of charging current and
ohmic drop can be observed. A

EXPERIMENTAL PROCEDURE

The procedure for operating the PAR 364 in the cyclic voltammetric
mode is given below. The starting potential is set by selecting the sign of the
of the starting voltage, the range (0,1, or 2 volts), and the appropriate value
on the calibrated dial for millivolts. The operating mode is set to DC and the
scan direction is negative. The cell switch is set to off. The turn-around
potential is set by a 20 turn potentiometer which reduces the normal 1.5 V
ramp generated by the PAR to the value selected by the potentiometer. This
potentiometer is not calibrated and thus requires the use of several potential
scans to adjust the turn around potential to the desired voltage. Once the
turn-around point is set, the potentiostat is ready for use. The scan is
initiated by setting the cell switch to "Init.", pushing the button labelled
"Ready", and then changing the cell switch to "Scan". The range for the
electrometer can be set by the "Current Range" switch. Immediately after a
scan, the cell switch should be returned to the off position. This disconnects
the potentiostat from the cell.

The operation of the polarizer requires the input of various
parameters. These parameters include the starting potential, the tum-
around potential, the number of steps to be used, the charging voltage for the
maintenance injectors, and the timing parameters for the charge injectors.
Careful selection of the timing parameters and the charging voltage for the
injectors are needed to optimize the results of the polarizer. If the timing
between pulses is too long or the charging voltage is not large enough, the
polarizer will be unable to maintain the cell potential during the Faradaic

83

reaction. If, on the other hand, the voltage is too large or the timing between '
pulses is too short, quantitative transfer of the charge on the injection
capacitors will not occur and the results will be meaningless. Once the
proper values are entered, the parameters are loaded into the control logic of
the polarizer; and the experiment is initiated by a START pulse fi'om the
microcomputer. The only intervention by the microcomputer occurs at the
end of each step when an interrupt generated by the control logic signals the
microcomputer to acquire the data.

The cyclic waveform generated by the polarizer is a staircase waveform
as depicted in Figure 5.1. The potential scan starts at an initial potential
where no Faradaic reaction is occurring. The potential is then stepped in a
uniform manner until a predetermined turn-around potential is reached at
which time the potential is then stepped back to the initial potential. The
expanded view illustrates how the charge-pulse polarizer controls the cell
potential. A specified small control window is generated in which the desired
control potential exists. Whenever the cell potential crosses a window
threshold, a uniform charge pulse of constant size and appropriate polarity is
injected into the cell in order that the cell potential is restored to the control
window. The rate of the maintenance charge injection is entirely determined
by the rate at which the Faradaic reaction consumes charge from the double
layer. The potential is then stepped by the potential step injector through
the addition of variable sized charge pulses at a constant rate until the new
desired control potential is achieved.

The experiments were performed by switching the SMDE between the
PAR and the polarizer by means of a switchbox. This was easily
accomplished since both instruments connect to the SMDE via a 25 pin

D subminiature connector. The solution was purged with N2 for 30 minutes

-84

_ . 55:8
33:33 3... mo Bo? 39898 no 55 gonna—33> one? 88:35 83.35 me new «689 ad 3&3

 

 

tops) I. I I .I. .
Hdogvcoo doficuwou .ogvcou

IIIIIIIIIII aw>

33:30.”. :8

     
  

 

 

'85

between experiments. The order of the experiments was to purge the
solution, obtain voltammogram with the PAR 364, dislodge and dispense a
new drop, purge the solution for 30 minutes, and obtain a voltammogram
with the polarizer. This method allowed the use of the same solution for each

scan in the comparison study.

PEAK HEIGHT VERSUS SCAN RATE

In conventional controlled potential electroanalysis the measured cell
current, which is the summation of the charging and Faradaic currents,
increases as the scan rate increases. This increase in the measured cell
current is due to two factors. The first factor is the increased charging
current needed to change the cell potential more rapidly. The second factor is
the increase in the concentration ratio at the electrode surface due to a
shorter time for depletion of the analyte from the electrode surface. In all
cases, the charging current increases at a more rapid rate than does the
Faradaic current thereby increasing the error in the measurement of the
Faradaic current.. In stark Contrast to potentiostatic control, the measured
charge increases with decreasing scan rate. The increase in the measured
charge is due to the integration of the charge consumption by the Faradaic
reaction during the entire potential maintenance period. Therefore, with
charge pulse polarization, the longer the step is maintained the further the
extent of the reaction causing a greater amount of charge to be consumed and
increasing the measured charge. Figure 5.2 is a plot of cathodic peak charge
versus (scan rate)'1/2 where the step height was held constant at 3.66 mV and
the duration of the step was varied.

86

Pm

b
m

.3» 83% message. m"02M S 3 a :33...

«510 m a .8.“ «2.38 58 may"? swan... 3.qu «a 9:63

F

Ambc 375% 2.8.0.

o m w m m H.
____ _ _ _ . _ _

O

\.
I
(gOIX) HDHVHD )IVEId QIGOHivo

\

l
C0

 

I
‘3‘

'87

EFFECTS OF CHARGING CURRENT

Charging current arises from the need to change the extent of
polarization of the working electrode. The charge which goes toward
polarizing the working electrode is not related to the concentration of the
analyte in solution and is therefore an error term when it is included in the
measurement of the cell current. When a significant amount of charge is
required to charge the double layer capacitance, the resulting
voltammograms have a continually changing baseline and tend to take on an
overall box shape. With charge pulse polarization the competition between
the charging current and the Faradaic current is replaced by an equality of
charging and Faradaic current since the Faradaic current occurs by the
discharge of the double layer capacitance. To illustrate this, two series of
voltammograms were obtained for a solution of 10 pM Cd012 in 0.1 M KNO3.
The first series was obtained using a PAR 364, in linear sweep mode, at scan
rates of 500, 200, 100, 50, 20, and 10 millivolts per second. The resulting
voltammograms are shown in Figure 5.3. Notice the non-zero baseline and
the overall box shape to the voltammogram. The second series of
voltammograms, shown in Figure 5.4, was obtained by the charge—pulse
polarizer, using a staircase waveform, at the same scan rates as the previous
series. This series of voltammograms does not have the characteristic box
shape which was seen in the first series of voltammograms. In addition, the
baseline for each of the scans in this series was zero. The comparison of
these two series of voltammograms clearly demonstrates that the
charge-pulse polarizer eliminates the effects of ' charging current in the
resulting voltammograms.

88

Current ( 11A)

 

-0.2 -0.4 -0.6 -O.8 ' -1.0

Potential vs Ag/AgCl (V)

Figure 5.3 The efl'ect of charging current on conventional analog
voltammo at scan rates of: a) 20 mVs'l; b) 50 mVs'l; c) 100

mVs'l; d) 00 mVs‘l; e) 500 mVs'l.

89

Max's—com Ao ”aha:

 

 

com #52: o3 8x5 8cm Swain N «goofing?
Sun—53> 339 «no no 3955 . we 80% 25 v6 953%
E Swims. 3 33:88 :8
at h: m... m... v... Q:
A _ q - J _ . J . T . m
D
. . - m...
...}... O
I .. 1 H m
1 0..
- S
I J 0 VA
r i I
o.
..l I HI L

 

 

 

I-
p—
b
—
u-
—-
h-
r—
h
—
p—
N
I

‘90

EFFECT OF OHMIC DROP

The ohmic drop across the uncompensated resistance between the
reference and working electrodes causes the peak potentials of a
voltammogram to shift in the direction of the potential scan. For solutions
where significant amounts of current is present in the cell, this potential shift
can become quite large, i.e., several hundred millivolts. To illustrate this
effect, two series of voltammograms were obtained for a solution of 5 mM
Cd012 in 0.1. M KNO3 with scan rates of 500, 200, 100, 50 mV/s.. The first
series was obtained with the PAR 364 (see Figure 5.5) and the second series
of voltammograms was obtained by the charge-pulse polarizer (see Figure
5.6). These conditions were chosen to accentuate the effects of ohmic drop on
the voltammograms and are not typical of those used in an optimized
analysis. Notice in Figure 5.5, the voltammograms acquired by the PAR, that
the peak potentials for the cathodic reaction are shifted to more negative
potentials as the scan rate increases and that the peak potentials for the
anodic reaction are shifted to more positive potentials. From the shift in
peak potentials obtained With the PAR, the uncompensated solution
resistance was calculated to be approximately 300 9. For the
voltammograms shown in Figure 5.6, the series obtained by the charge-pulse
polarizer, the peak potentials are not shifted by increasing scan rate as in the
first series of voltammograms. This is the expected result, since the cell
potential is monitored between charge injections when the cell is at open
circuit and no current, or charge, is being applied to the cell. The
concentration of the supporting electrolyte can be reduced without error until
the solution resistance prevents charging of the double layer capacitance in a
time that is short compared to the step duration. Where very low supporting

92

.m>E com Gm -m>fi com 8. . .n>E 2: hp .158 on As uo 3.3..
53 as maduuoEES—3 SEQ. saunas so 96 ego mo fiche 25. w. m menu—m

E now/<3 E 83:35

. _ . _ p _ _ _ . _ _ OAUJ.N

 

 

.Iomél

 

 

 

ole

(o) 901 X peweFUI 931911;)

Current ( ILA)

'91

 

 

 

 

 

 

 

F I I I I I I
A
160 - -
120 P "
80 - I "
40 '- \ -1
f ‘—

0 ' -
-40 - . '-
-80 - -
~120 - -
'160 l" d

4 1 l l 1 1 l
-0.2 -0.4 -O.6 -0.8 -1.0

Potential vs Ag/AgCl (V)

Figure 5.5 The efl‘ect of ohmic drop on conventional analog
voltammograms at scan rates of: a) 50 mVs'l;
b) 100 mVs'l; c) 200 mVs‘l; d) 500 mVs'l.

93

. electrolyte concentrations are used (10'4 M or lower) a cell amplifier with

high output voltage compliance should be used.

CALIBRATION CURVE

To demonstrate the analytical usefulness of the charge-pulse polarizer
a series of CdClz solutions ranging from 1.0 IIM to 2.0 mM with supporting
electrolyte concentration of 0.01 M KNO3 were analyzed using a constant
value for the injection capacitance. The resulting cathodic peak charge was
plotted versus analyte concentration and a linear regression performed. The
regression yielded a regression coefficient of l.000. Figure 5.7 illustrates the
linear dynamic range of the polarizer for a constant capacitance by plotting
the log of charge versus the log of concentration. This dynamic range is for a
specific set timing parameters and injection capacitors. By changing these
parameters, the linear dynamic range can be shifted from to higher or lower

concentrations.

CONCLUSIONS

The maximum rate at which the potential of an electrochemical cell
can be stepped is governed by the maximum charge per injection and the
mam'mum rate at which the charge-pulse polarizer can successively inject
charge. The maximum charge per injection is given by Qmam = Climax/RM
where Vmax is the maximum output voltage of the cell amplifier, Ra is the
solution resistance between the working and auxiliary electrodes, and tinj is
the time required for each injection. The maximum repetition rate for charge
injections is 100 kHz. This includes the time required for the injection of the
charge, the comparison of the reference electrode potential to the desired set
point potential, and recharging the potential step injection capacitor. In this

94

.Adoflchuoodoovfimfi
«33> Agvoumfi 3 3:88.?" ..3838 .338?
8333:? an 33 a .3.“ scum—32— 23 mo owns." can he 983m

9: x .88 nossbcmocoo

 

       

(o) 6OI X 931mm

3+5 82 2: S H
—.—.#L— p h F————_— b _ —-h%P-— — — —-_—~_ - b _ .H
won
"[2:
”Icon:
F

 

$01.”:

'95

work, the 5 mV steps typically used were achieved in about 100 us. At this
time, integration of the Faradaic current begins.

The minimum charge which can be accurately measured by the
charge-pulse polarizer is dependent upon the accuracy and precision to which
the charge injection is known, the number of injections used, and the
magnitude of the charging voltage. For quantitative measurements, at least
100 counts should be injected at the voltammetric peak and the charging
voltage of the injection capacitor should be 0.1 V. These values correspond to
an error of 1 %. With a 1054 pF injection capacitor, this corresponds to a
Faradaic charge of 6.94 nC over the step interval. For a step duration of 50
ms (scan rate of 100 mV/s) this is an average Faradaic current of 0.139 ILA.
Of course the detection limit would be much lower. Use of a smaller injection
capacitor could extend measurement of the system to still lower
concentrations. A

The Faradaic current measured in charge-pulse polarization has no
exact parallel in analog voltammetry. In charge-pulse polarization the
Faradaic charge is determined by the charge injection controller keeping
track of the amount of charge injected rather than by independently '
measuring the current as in an analog potentiostat. With charge-pulse
polarization the total accumulated charge over a step is determined rather
than sampling the instantaneous current during the step. Since the
accumulated charge is the integral of the Faradaic current over the entire
step, an improvement in signal/noise is achieved. The measurement of the
Faradaic charge begins immediately after the potential step is complete -
much sooner than in an analog potentiostat. The average currents (total
charge divided by step time) determined by the charge-pulse polarizer are
generally greater than the instantaneous currents measured by an analog

96

potentiostat. Since the charge-pulse polarizer. integrates the charge for the '
duration of the step, the sensitivity of the measurement increases with
decreasing scan rate - opposite to the trend observed with analog
potentiostats.

The resolution to which the charge-pulse polarizer can control the
potential of an electrochemical cell is given by AV = Qinj/Cdl where Qinj is the
size of the maintenance injection. The accuracy to which the controlled
potential is known is dependent upon the magnitude of the potential
difference between the setpoint and the control window limits. For example
in a cathodic scan, the potential of the electrochemical cell would be
controlled about the negative limit of the control window but the recorded
voltage would be the setpoint potential. If the value of AV is nearly equal to
the difference in the control window limits, the control and setpoint
potentials would be nearly identical. In our experiments potential control

was maintained within 0.3 mV resolution.

CLOSING COMMENT

From the data shown in this chapter, charge-pulse polarization is a
superior alternative to conventional analog potentiostatic control for
controlled potential electroanalysis. This is especially true when the cell
conditions are such that charging current and/or ohmic» drop cause errors in
the resulting voltammograms. To increase the charge-pulse polarizer's
ability to rapidly step the cell potential or to use very dilute supporting
electrolyte, a cell amplifier with high output voltage compliance should be
used. The development of a cybernetic control system, for the charge-pulse

'97

polarizer, which is capable of optimizing the selection of the charging
capacitor and the charging voltage could obviate the need for conventional
potentiostats in all but a few cases.

APPENDICES

APPENDIX A.1

The software listed in this appendix is the instrument control code for
the charge-pulse polarizer. The software is written in polyFORTH and

assembly language.

BLOCK 1050
0 1050 1061 THRU HEX 42A LOAD 42D LOAD 423 LOAD 42E LOAD

1 HEX 42F LOAD 430 LOAD 431 LOAD
2 12 IINJECT. ' 20 DAC- DELAY!
3 30 ISETTLE !

4 20 DAC-SETTLE !

5

6

7

8

9

10

11

12

13

14

15

BLOCK 1051 1
0 ( SHOWS THE STATUS OF BLOCK BUFFERS AND UPDATE FLAG)

1 MATH 0 DRIVE

: ?BLK DUP 255 = IF DROP ." --" ELSE 5 U.R THEN ;

( SHOWS BLOCK NUMBER OR DASHES TO INDICATE EMPTY)
: ?OFFSET DUP 127 AND DUP 127 = IF DROP 0 3 U.R ELSE 3 U.R

THEN ;

: ?FLG ?OFFSET 128 AND 128 = IF ." 1" ELSE ." 0" THEN ;
( 1 INDICATES UPDATE FLAG SET)

: DISK_STATUS CR ." INDEX " PREV 0 5 U.R PREV 2+ 6 5 U.R
CR ." BLOCK # OFFSET FLAG" PREV 12 + PREV 4 + DO
CR I C@ ?BLK 8 SPACES I 1+ CO ?FLG 2 +LOOP ;

2

3

4

5

6

7

8

9

10

11

12

13

14 ( SHOWS WHAT PREV IS SET TO )
15

98

99

BLOCK 1052
0( SYSTEM CONSTANTS AND INTERRUPT VARIABLES ) HEX

1 ( Constants which are addresses of counters are lower case)
2 F1C0 CONSTANT GO F109 CONSTANT OFF

3 FIGS CONSTANT ON F107 CONSTANT Convert

4 F1D2 CONSTANT Idelay F104 CONSTANT Vinj

5 F1C6 CONSTANT Idac FlCA CONSTANT LATCH

6 B040 CONSTANT WRD F1E3 CONSTANT Get-counts
7 F1D0 CONSTANT Dac_delay F1D1 CONSTANT Dac_settle
8 F1D2 CONSTANT Isettle F1D8 CONSTANT Iinject

9 F1D9 CONSTANT Qinject FlDA CONSTANT Qcharge

10 F1E0 CONSTANT -Counts F1E2 CONSTANT +Counts
11 F1E8 CONSTANT HSteptime F1E9 CONSTANT LSteptime
12 F1C1 CONSTANT RDAC F103 CONSTANT RDACZ
13 VARIABLE VADC 0 VADC ! .

14 VARIABLE DPTR 0 DPTR !

15 DECIMAL

BLOCK 1053

0( IN ITIALIZE VARIABLES ) HEX

1 VARIABLE VINIT VARIABLE VFINAL VARIABLE #_STEPS

2 VARIABLE ISE’I'I‘LE CVARIABLE IDAC CVARIABLE CFLG 0 CFLG C!
3 VARIABLE VINJ VARIABLE STEP-SIZE VARIABLE SWEEPRATE

4 VARIABLE LSTEPTIME VARIABLE VSTAT VARIABLE STEP_#

5 VARIABLE STEPDAC 3EC ALLOT STEPDAC 3EC ERASE 0 STEP_# !

6 VARIABLE HSTEPI‘IME VARIABLE DAC_DELAY VARIABLE QINJECT
7 VARIABLE QCHARGE VARIABLE IINJECT VARIABLE DAC_SE’I‘TLE
8 VARIABLE +COUNTS VARIABLE -COUNTS CVARIABLE +STAT

9 CVARIABLE -STAT

10 VARIABLE NAME B000 CONSTANT HEADBUF

11 CVARIABLE #BLK CVARIABLE BLKOFF VARIABLE #_CNTS

12 VARIABLE N-FREE VARIABLE K-FREE

13 VARIABLE 'FRE-BLK VARIABLE #_BLKS

14
15 FE81 CONSTANT INT-MSK VARIABLE SAV-MSK

BLOCK 1054
0 (THIS BLOCK WRITES DATA FOR THE EXPERIMENTS ) HEX

1 r
2 ( :WRITE-DATA 400 0 DO I 8000 + OFFF SWAP ! 2 +LOOP ;

3 : WRITE-EOF 3FE B000 + 1388 SWAP! ; )

4 : N ORM'S-FILE 504E NAME ! ; : KAT'S-FIL 4648 NAME ! ;

5 DECIMAL

6 : KATHY K-FREE ;

7 : Norman N-FREE ;

8

9 : FRE-BLK 'FRE-BLK O EXECUTE ;

10 :WHO ." NORM =1/KAT =2 " 1KEY DUP 49 - 0: IF ['1 Norman

11 'FRE-BLK ! DROP N ORM'S-FILE ELSE 50 - 0: IF ['1 KATHY

12 'FRE-BLK! KAT'S-FIL THEN THEN ;

13 : GET-FREE 0 BLOCK DUP 10 + 6 N-FREE ! 20 + O K-FREE ! ;

14 : FREE-BLOCK 0 BLOCK 10 + N-FREE 6 SWAP ! 0 BLOCK 20 + K-FREE 6

15 SWAP ! UPDATE FLUSH ;

100

BLOCK 1055
0 ( THIS BLOCK WRITES THE DATA FROM THE DISK BUFFERS TO HDISK)

1 DECIMAL

: BLK# ( «BLOCK OFFSET) FRE-BLK O 256 /MOD 128 + SWAP ;

' NBLKS #_CNTS 0 120 /MOD SWAP 0: NOT IF 1+ #_BLKS ! ELSE
#_BLKS ! THEN ;

'STORE-IT#_BLKS@0DO BLK#PREV421*++C!PREV521

* + + C! FRE-BLK 6 1+ FRE-BLK! FLUSH LOOP;

‘DQQQOIhWN

10 HEX ‘
11 : ?VSTATIC FlC7 CO DROP 10 0 DO LOOP FICA O
12 OFFF AND VSTAT! ; DECIMAL

13

14

15

BLOCK 1056
0 ( EXPERIMENTAL SET-UP ROUTIN ES )
:Y/N. " ENTERYOR N " KEY ;
:CHECK-IT Y/N 89: IF. " ENTER CORRECT VALUES ” ELSE THEN;
° .."INPUT " ENTER THE VALUE OF " ;
: INPUT-PARAMETERS PAGE "INPUT ." STEP SIZE " INPUT STEP-SIZE !
CR "INPUT ." HIGH WORD OF STEP TIME " INPUT HSTEPTIME !
CR "INPUT ." LOW WORD OF STEP TIME " INPUT LSTEPTIME !
CR "INPUT ." CHARGING DAC " INPUT VINJ !
CR "INPUT ." CURRENT CONTROL " INPUT IDAC C!
CR "INPUT ." FINAL VOLTAGE " INPUT VFIN AL !
10 CR "INPUT ." LARGE INJ. DELAY " INPUT ISETTLE C! CR
11 ." INITIAL VOLTAGE " VSTAT O 6 U.R CR ." IS INITIAL VOLTAGE OK
12 " Y/N 89 = NOT IF CR ." ENTER INITIAL VOLTAGE " INPUT VINIT !

13 ELSE THEN ;
14
15

CDCDQGOIhNNl-fi

BLOCK 1057

0(
1 : SWEEP-RATE STEP-SIZE O STEPTIME 6 12207 SWAP M‘l SWEEPRATE ! ;

2 ) : ?#STEPS VFINAL 6 VINIT O - STEP-SIZE 6 IMOD SWAP 0: NOT IF
3 ." VFINAL WILL BE OFF BY 1 STEP SIZE " THEN #_STEPS ! ;
4

5 : CHECK-PARAMS ." INITIAL VOLTAGE " VINIT @ 6 U.R CR

6 ." FINAL VOLTAGE " VFINAL O 6 U.R CR

7 ." STEP SIZE IN DAC UNITS " STEP-SIZE O 6 U.R

8 CR ." STEP TIME IN COUNTS " HSTEPTIME O 6 U.R

9 CR ." STEP TIME IN COUNTS " LSTEPTIME O 6 U.R

10 CR ." LARGE INJECTOR DELAY" ISETTLE CO 6 U.R

11 CR ." CURRENT INJECTOR CONTROL DAC " IDAC CO 6 U.R
12 CR ." CHARGING DAC " VINJ O 6 U.R CR ;

13

14

15

101

BLOCK 1058 .
0 ( STEP CALCULATION ROUTINES) _
1
: UP-RAMP STEP-SIZE O STEP_# 0 * VINIT O + ;
: DOWN-RAMP STEP-SIZE @ #_STEPS G 2* STEP_# 6 - * VINIT 6 + ;

; RAMP #_STEPS 6 2* 2+ 0 DO I #_STEPS G - DUP 0< IF UP-RAMP
!STEP I STEP_# ! DROP ELSE 0: IF UP-RAMP !STEP I STEPJ !
ELSE DOWN-RAMP !STEP I STEP_# ! THEN THEN LOOP 0 STEP_# !
10 100 #_STEPS @ 4 * 2+ DO I STEPDAC + 0 SWAP! 2 +LOOP;
11 : DRAMP #_STEPS @ 2 "' 2+ 0 DO I #_STEPS G - DUP 0< IF DOWN-RAMP
12 !STEP I STEP_# ! DROP ELSE 0: IF DOWN-RAMP !STEP I STEP_# !
13 ELSE UP-RAMP !STEP I STEPJ ! THEN THEN LOOP 0 STEP_#! ;
14 : LIST-STEPDAC #_STEPS @ 2* 1+ 0 DO I 2* STEPDAC + G U. CR LOOP

15 ; DECIMAL

2

3

4

5 : !STEP STEP_# 6 2" STEPDAC + ! ;
6 .

7

8

‘0

BLOCK 1059
0 ( TEST2 BLOCK) DECIMAL

: ?WHO WHO GET-FREE ;
: ?INPUT BEGIN INPUT-PARAMETERS PAGE CHECK-PARAMS YIN 89 = END ;

: ?READY ." HIT ENTER WHEN YOU ARE READY TO RUN "
BEGIN 1KEY 13 = END ;

: SAV-INT-MSK INT-MSK CO SAV-MSK C! 01 INT-MSK C! ;

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

BLOCK 1060
0 : INPUT_PARAMETERS INPUT STEP SIZE " INPUT STEP-SIZE !

l ." INPUT CHARGING VOLTAGE " INPUT VINJ ! CR ." INPUT

2 FINAL VOLTAGE " INPUT VFINAL ! CR ." INPUT HIGH WORD OF STEP
3 TIME " INPUT HSTEPTIME ! CR ." INPUT LOW WORD OF STEP TIME "

4 INPUT LSTEPTIME ! CR ." INPUT DAC DELAY TIME " INPUTDAC_DELAY
5 ! CR INPUT DAC SETTLING TIME " INPUT DAC_SE'I'I‘LE !

6 CR ." INPUT I INJECT TIME " INPUT IINJECT ! CR

7 ." INPUT CELL SETTLING TIME" INPUT ISETTLE ! CR ." INPUT CHARG
8 ING TIME " INPUT QCHARGE ! CR ." INPUT Q INJECT TIME " INPUT

9 QINJECT ! CR ;

10

11

12

13

14

15

' 102

BLOCK 1061

0 HEX . '

1 : SETUP_COUNTERS 3A F1D3 C! 72 F1D3 C! B2 F1D3 C!
3A F1DB C! 7A F1DB C! BA F1DB C!
30 F1E3 C! BO F1E3 C!
3A FlEB C! 7A FIEB C! ;

(II-F0359

.

GCODEW>BOOSUB 1 lsUBOPOPOHI 1MOVB 1PUSHO IMOVB
7 1 PUSH NEXT : LC! 0 W>B ROT DUP ROT SWAP C! C! ;

8

9 ASSEMBLER F4 OPC HLT FORTH

10

11 ' HLT CONSTANT HALT

12 .
13 FFFF HSTEPTIME ! FFFF LSTEPTIME ! FFFF +COUNTS ! FFFF -COUNTS !

14 20 DAC_DELAY ! 20 QCHARGE ! 20 QINJECT ! 10 DAC_SE'I'I‘LE !
15 10 ISETTLE ! 40 IINJECT !

BLOCK 1062

0 HEX

1 : LOAD_COUNTERS Dac_delay DAC_DELAY LC!
Dac_settle DAC_SETTLE LC!
Isettle ISETTLE LC!
Iinject IINJECT LC!

Qinject QINJECT LC!
Qcharge QCHARGE LC!
~Counts ~COUNTS LC!
+Counts +COUNTS LC!
HSteptime HSTEPTIME LC!
LSteptime LSTEPTIME LC! ;

Swmqmmhww

11

12 : FILL EMPTY-BUFFERS B3FE B000 DO 00 I ! 2 +LOOP ;
13

14 FORTH DECIMAL

15

BLOCK 1063

0 ( THIS IS RETURNING 2 * THE ADC VALUE) HEX ASSEMBLER

1 CREATE <ICOUNTER>

2 0 PUSH 1 PUSH 2 PUSH W PUSH

3 CE #B Get-counts MOV

4 +Counts 2 MOV B +Counts 0 MOV B +Counts 0 HI MOV B

5 -Counts 2 HI MOV B -Counts 1 MOV B -Counts 1 HI MOV B
6DPTRWMOV OWRDW)MOV 2#WADD 2WRDW)MOVB
7WINC IWRDW)MOV 2 #WADD 2HIWRDW)MOVB
8WINC OFFOMOVBOOSUB Convert OMOVB 1 18% 1 lsUB
9LATCHOMOV 0FFF#0ANDON1MOVB .

10 OWRDW)MOV2#WADDVINJOMOVOWRDW)MOV 8#WADD
11 W DPTR MOV 90 #B HALT MOV W POP 2 POP 1 POP 0 POP STI
12 IRET

13 <ICOUNTER> 08 INTERRUPT

14

15

103

BLOCK 1064
0 ( CALIBRATION CODE USING INTERRUPT HANDLER FOR LINEAR RAMP)
1 HEX

2 CODE SLEEP HLT NEXT
3 : RUN 1 STEP_# ! STEPDAC O RDAC ! RDAC2 CO DROP #_STEPS 0 DO

4 GO CO DROP SLEEP F4 HALT C! #_STEPS O S’I‘EP_# O - 0: IF
5 01 INT-MSK C! THEN LOOP BOOO 100 DUMP ;

6
7
8
9
10
11
12
13
14
15

BLOCK 1065
0 HEX

1 .
2 : LIST-DATA CR 6 PREV ! 6 PREV 2+ ! BLOCK B3F6 AFF6 DO 3 1 DO I

30A*J+DUPO5U.RZ+ DUPO5U.R2+7 1DO DUPCO 5U.R 1+
4 LOOP DROP LOOP CR 14 +LOOP ;

5
6CODEBFLIPOPOP1 ISUBOIHIMOVBOHIIMOVBFFFF#

70MOV 1 OSUBOPUSH NEXT

8 FORTH
9 : LIST-COUNTS CR 6 PREV ! 6 PREV 2+ ! BLOCK B400 B000 DO

10 I DUP O 5 U.R 2+ DUP CO 5 U.R 1+
11 DUP O 5 U.R 2+ DUP CO 5 U.R
12 1+ DUP O 5 U.R 2+ O 5 U.R CR 10 +LOOP ;

13
14 : LIST-ALL CR 820 800 DO I U. CR I LIST-COUNTS CR LOOP ;

15

BLOCK 1066
0 HEX ASSEMBLER
1 CREATE <ICOUNTER> 0 PUSH 1 PUSH 2 PUSH

2 W PUSH CE #3 Get-counts MOV
3 +Counts 2 MOV B +Counts 0 MOV B +Counts 0 HI MOV B

4 -Counts 2 HI MOV B ~Counts 1 MOV B ~Counts 1 HI MOV B
5DPI‘RWMOV OWRDW)MOV 2#WADD 2WRDW)MOVB
6WINC 1WRDW)MOV 2#WADD 2HIWRDW)MOVB
7WINCSTEP_#0MOVOWRDW)MOV2#WADD

8 W DP'I‘R MOV STEP_# W MOVWWADD STEPDAC W) 0

9 MOV 1 # STEP_# ADD 0 RDAC MOV 0 RDA02 MOV B

10 90#BHALTMOV WPOP 2POP 1POP 0POP STI

11 IRET

12
13 <ICOUNTER> 08 INTERRUPT

14
15

104

BLOCK 1067
0 CODE SLEEP HLT NEXT ' SLEEP CONSTANT HALT

1 : RDAC! F1C1 ! F103 CO DROP; : GO F1C0 CO DROP ;

2 : ISTEP( OFFSET ) STEPDAC + O RDAC!

3 G0 10 0 DO I DROP LOOP SLEEP F4 HALT C! ;

4 : STAIRCASE #_STEPS O 2* 1+ 0 DO OFF CO DROP I U. I2 "' ISTEP

5 LOOP OFF CO DROP 01 INT-MSK C! ; :ARM-INT 00 INT-MSK C! ;

6 HEX ASSEMBLER CREATE <ICOUNTER>

7 0 PUSH 1 PUSH 2 PUSH W PUSH CE #3 Get-counts MOV

8 +Counts 2 MOV B +Counts 0 MOV B +Counts 0 HI MOV B

9 -Counts 2 HI MOV B -Counts 1 MOV B -Counts 1 HI MOV B

10 DPTRWMOV OWRDW)MOV 2#WADD 2WRDW)MOVB
11WINC 1W'RDW)MOV 2 #WADD 2HIWRDW)MOVB

12 W INC W 1 MOV STEP_# W MOV W W ADD STEPDAC W) 0 MOV 1 W MOV
13 0 WRD W) MOV 2 # W ADD W DPTR MOV STEP_# INC 90 #B HALT MOV
14 WPOP 2 POP 1 POP 0 POP STI IRET

15 <ICOUNTER> 08 INTERRUPT FORTH

BLOCK 1068
0 CODE SLEEP HLT NEXT ' SLEEP CONSTANT HALT VARIABLE CADC

1 0 CADC ! VARIABLE ADCVAL 100 ALLOT

2 ( TEST HANDLER 4-26-88 ) HEX ASSEMBLER

3 CREATE <ICOUNTER> 0 PUSH 1 PUSH 2 PUSH

4 W PUSH CE #3 Get-counts MOV

5 +Counts 2 MOV B +Counts 0 MOV B +Counts 0 HI MOV B

6 -Counts 2 HI MOV B -Counts 1 MOV B -Counts 1 HI MOV B
7DPTRWMOV OWRDW)MOV 2#WADD 2WRDW)MOVB
8WINC IWRDW)MOV 2 #WADD 2HIWRDW)MOVB

9 W INC W 1 MOV +COUNTS 0 MOV 0 +Counts MOV B 0 HI +Counts MOV B
10 -COUNTS 0 MOV 0 -Counts MOV B 0 HI -Counts MOV B

11 STEP_# W MOV W W ADD STEPDAC W) 0 MOV 1 -W MOV

12 0 WRD W) MOV 2 # W ADD W DPTR MOV STEP_# INC 90 #B HALT MOV
13 FlCA 0 MOV CADC W MOV 0 ADCVAL W) MOV 2 # CADC ADD

14 WPOP 2POP 1POP OPOP STI IRET

15 <ICOUNTER> 08 INTERRUPT FORTH

BLOCK 1069

0 ( TEST HANDLER 4-26-88 ) HEX ASSEMBLER

1 CREATE <ICOUNTER> 0 PUSH 1 PUSH 2 PUSH

2 W PUSH CE #8 Get-counts MOV

3 +Counts 2 MOV B +Counts. 0 MOV B +Counts 0 HI MOV B

4 -Counts 2 HI MOV B -Counts 1 MOV B -Counts 1 HI MOV B
5DP'I‘RWMOV OWRDW)MOV 2#WADD 2WRDW)MOVB
6WINC IWRDW)MOV 2 #WADD 2HIWRDW)MOVB
7W INC STEP_# 0 MOVOWRDW) MOV2 #WADD

8 W DP‘I‘R MOV STEP_# INC 90 #B HALT MOV

9 WPOP 2POP 1POP OPOP STIIRET

10 <ICOUNTER> 08 INTERRUPT FORTH

11 CODE SLEEP HLT NEXT ' SLEEP CONSTANT HALT

12 :RDAC! F101 ! F103 CO DROP;

13 : 18TEP( OFFSET) STEPDAC + O RDAC! SLEEP F4 HALT C! ;

14 : STAIRCASE #_STEPS 0 DO OFF CO DROP I ISTEP LOOP 01 INT-MSK C!

15 ; :ARM-INT 00 INT-MSK C! ;

105

Q

BLOCK 1070

0 HEX

1

2 VARIABLE KNT 0 KNT !

3 : RDAC! F101 ! F103 CO DROP ; : GO F100 CO DROP ;

4 : 18TEP( OFFSET ) STEPDAC + O F101 ! F100 CO F103 0!
5 1 KNT +! SLEEP F4 HALT 0!;

6 : STAIRCASE #_STEPS O 2* 1+ 0 DO I 2 * ISTEP

7 LOOP ;

8 : ARM-INT 00 INT-MSK 0! ;

9 : CSTAT FlEB FIDO DO CE 3 I + ! 8 +LOOP;
10:LCSTAT40D018*F1D0+30DODUPI+30DODUPCOU.
11 LOOP DROP 0R LOOP DROP LOOP ;

12

13

14

15

BLOCK 1071

OzGETDATAB250B048 DOIB+OI8-3+O-U.8+LOOP;

1 20 QCHARGE ! 8 QINJECT ! 50 IINJECT ! 10 DAC_SE’I‘TLE !

2 10 ISETTLE ! 8 DAC_DELAY! '

3 18 ISETTLE ! 28 IINJECT ! 8 DAC-SETTLE !

4 60 QCHARGE ! 10 QINJECT ! 20 DAC-DELAY!

5 : SHT 0 DPTR ! 0 STEP_# ! FILL ARM-INT ;

6 : ONE SHT STAIRCASE B040 210 DUMP ;

7 610 VIN IT ! 20 #_STEPS ! 20 STEP-SIZE ! RAMP LIST-STEPDAC
8:FILADCOCADC!1000DOOIADCVAL+!2+LOOP;

9 : IS SHT FILADC lsTEP ADCVAL O U. 8040 20 DUMP ;

10 : GETADCVAL FICA O OFFF AND ; DECIMAL SVARIABLE CONADC
11 0.00125 CONADC S! 0.0 2.5 F- SCONSTANT TEMP

12 2.0 SCONSTANT TWO 5.0 SCONSTANT FIVE

13 :VOLTS__ADC GETADCVAL >N CONADC SO F“ TEMP FSWAP F+
14 TWO F* FIVE F+ 5 F. ; :VOLTS GETADCVAL >N CONADC SO F"

15 TEMP FSWAP F+ TWO F’" 5 F. ;

BLOCK 1072
0 HEX ( CODE TO VIEW CALIBRATION DATA 6-2-88 )

1VARIABLEK

2:SBUFFER66PREV DUP 2+ ROT SWAP! !;

3 : SBLOCK EMPTY-BUFFERS SBUFFER BLOCK ;

4:CSTK! KO2+0O70=IFFFFFKO!THEN KO5+CO70=
5IFFFFFKO3+lTHEN KO2+CO30=IFKOO1+KOITHEN
6KO5+0O30= IFKO3+O1+KO3 +!THEN;
7:-MAXFFFFSWAP-;

8: READ-DATABOOOO ."VINJ = "U. CR B400 8040 DOICST

9 IO:MAX7U.R12+CO7U.RI3+O-MAX7U.RI5+0O

10 7U.R16+O7U.R(32601BO40-8/2*+O0FFFAND5U.R
11 ) CR8+LOOP ;

12:20READ 200DO I 800+ SBLOCK READ-DATA CR 0R LOOP;
13

14

15

106

BLOCK 1073 -
0 : VOLTS GETADCVAL >N CONADC SO F" TEMP FSWAP F+ 5 F. ;

1:>VOLTSCRCR820D080DOJI+ADCVAL+O0FFFAND >N
ZCONADC SO 1“" TEMP F+5F.2+LOOP 0R8+LOOP;

3

4 DAC-DELAY = 20

5 ISETTLE = 20

6 DAC_SE’I‘TLE = 28
7 IINJECT = 12 QCHARGE = 60 QINJECT = 10
8

9

10

11

12

13

14

15

BLOCK 1074

0( START AT VINIT AND GO DOWN THEN UP STEP CALCULATIONS )

: DRAMP STEP_SIZE O STEP_# O * VINIT O SWAP - ;
° URAMP STEP_SIZE O #_STEPS O 2* STEP_# O - * VINIT O SWAP - ;

: !STEP STEP_# O 2* STEPDAC + ! ;

~105thth

' NRAMP #_STEPS O 2* 2+ 0 DO I #_STEPS O - DUP 0< IF DRAMP
8 !STEP I STEP_# ! DROP ELSE 0: IF DRAMP !STEP I STEP_# !

9 ELSE URAMP !STEP I STEP_# ! THEN THEN LOOP 0 STEP_# !

10 100 #_STEPS O 4 * 2+ DO STEPDAC I + 0 SWAP ! 2 +LOOP;

11
12
13
14
15

BLOCK 1075

OHEX ‘
1:WRITE_ADCCADCO 0DOADOVALI+OB260I+!2+LOOP;

2: INC _VINJVINJO 10+DUPDUPF104! 10 B000!VINJ!;
3: 20 _RUNS 20 0 DO ONE INC _VINJ WRITE_ADC 88001 + PREV4 +!
4 DISK—STATUS INPUT DROP FLUSH LOOP;

- 107

VARIABLE ZZ 2 ZZ ! HEX ASSEMBLER

CREATE <INT8>
O PUSH
1 PUSH
2 PUSH
3 0 MOV
W PUSH
CE #3 Get-Counts MOV
FlEO # 3 MOV
2 # ZZ MOV
BEGIN
>R
2 # 2 MOV
BEGIN 3 ) 0 MOV B
0 WRD W) MOV B
W INC '
2 DEC
0< END
R>
3 INC
ZZ DEC
0< END
FlEA # I MOV
2 # 1 MOV
BEGIN I ) 0 MOV B
0 WRD W) MOV B
W INC
1 DEC
0< END
STEP_# I MOV
2 # I ADD
STEPDAC I) 0 MOV
0 WRD W) MOV
2 # W ADD
W DPTR MOV
0 F101 MOV
MAX_STEP DEC
0< IF
90 #B HALT MOV
THEN
W POP
I POP
2 POP
1 POP
0 POP
1 F100 MOV B
IRET
<INT8> 08 INTERRUP‘I‘ FORTH

108

APPENDIX A2
The software written for data analysis and elementry plotting are
given. The source code is written entirely in the 0 programming language.

*/ (NC I“

#include <stdio.h>

#include <std1ib.h>
#include <math.h>

#define n_steps var[O]
#define vinj var[ 1]
#define capsize var[2]
#define i_inj var[3]
#define i_settle var[4]
#define dac_settle var[5]
#define dac_delay var[6]
#define q_inj var[7]
#define q_charge var[8]
#define h_step var[9]
#define l_step var[10]

#define com_len var[l 1]
#define BELL printfl"\007");
main 0

I

/*

counts which cause a negative voltage are
negative counts, these are the first set of
numbers to be read from the file.

*I

int var[ll * sizeoflint)];

int i, pos_cnts, neg_cnts, vdac, stat_pos, stat_neg;

int l_cnts, 1_time,l_stat ;

float qout, volts, vinj_pos, vinj_neg, cappos, capneg,\
posofl'set, negoffset;

char string[80], instring[80], outstring{80], comments[60];

FILE *finstream, *foutl *fout2;

printf‘(" \nEnter the input filename >> ");
gets( string);

finstream = fopen(string, "r");

printf(" \nEnter the output filename >> ");
gets( string);

finstream = fopen(string, "w");

/*

109

Read the header information in the data file

*/ '
for (i = 0; i <= 11; ++i)

fscanflfinstream, "966x", &var[i]);

P
Read the comment field and determine if there is a comment.
Ifa comment exists use the first word in the comment field
as the output file name.

*I
if (com_len)

fscanflfinstream, "‘58", string);

I" strcpy(instring, string);
strcat(string, ".dat"); .
foutstream = fopen(string, "w+a"); */
fgets(comments, com_len, finstream);

)

It

If no comment is present, then prompt user for filename.
*/
else
I
fgets(comments, 61, finstream);
/* BELL
printf(" \nEnter the output filename >> ");
gets( string);
strcpy(instring, string);
strcat(string, ".dat");
foutstream = fopen(string, "w+a"); */

I”

Read the data from the input file and manipulate it.
*/

n=m=0;
for(i = 0; i <= (n_steps * 2); ++i)
{

fgets(string, 81, finstream);
sscanflstring, "%4x %4x %2x %4x 962: %4x %2x %4x",\
&vdac, &pos_cnts, &stat_pos, &1_time,\
&1_stat,& neg_cnts, &stat_neg, &l_cnts );
I.
change the vinj to real numbers
*I
vinj_neg = ((float) vinj * 5.00 I 4096.0) + 2.5 ;
vinj_pos = ((float) vinj "‘ 5.00/ 4096.0) + 2.5;
P
increment the count values by one since the counter represents
( count - 1 )
*I

pos_cnts += 1;

110

neg_cnts += 1;
l_time += 1;
l_cnts += 1;

/* .
Check the count values for a zero count by looking at the status byte
*/
if( stat_pos == 0x70 && neg_cnts < 0xb00)
(
pos_cnts = 0;
qout_neg += ( vdac "' (5.00/4096.0) - 2.5) * time) I ( ohms * neg_cnts);
++n;
}
if( stat_neg == 0x70 && neg_cnts < 0xb00)
I
neg_cnts = 0;
qout_pos += ( vdac * ( 5.00/4096.0) - 2.5) * time)/ (ohms * pos_cnts);
++m;
l
}
qout_neg '= qout_neg/ n;
qout_pos = qout_pos I m;

fprintf! foutl, "%g,%g\n", qout_neg, vinj.neg);
fprinth fout2, "%g,%g\n", qout_pos, vinj_pos);
P
Print the output file without header information
*/

fPlot the output data files
lplot1(foutstream);
fCIose all files and end.
lfclose(finstream);
fclose(foutstream);

)

111

*I LSQUARE.0 I‘-

#inc1ude <stdio.h>
#include <stdlib.h>
#include <math.h>

#define ARRAY_SIZE 100

main(argc, argV)
int argc;
char*argv[ ];
I
I“ Define variable for the program "7
char fname[80], fname2[15], string{80];
float x[ARRAY_SIZE + 1], y[ARRAY_SIZE +1], avex, avey;
double xysum, xresz, sumx, sumy, a, b, xsum, ysum, Syx;
double yline, yres, xsqr, Sintercept, Sslope;
double sqrtO;
double pow();
int count, i, j;

I“ Set up file pointers for optional output devices */
FILE *instream, ‘outstream;

I* printf("\n Enter the input filename ? => ");
instream = fopen(gets(fname), "ra"); ’I
instream = fopen(argv[1], "ra");
outstream = fopen(argv[2], "a");

l‘ printf("%s\n”, fname); *I
xsum = 0.0;
ysum = 0.0;
xsqr = 0.0;

i = 0;

/"' Read in the data an calculate the x[i] square, xsum and ysum *I
for(count = 0; count <= ARRAY_SIZE; ++count)
{

if ((fscanflinstream, "%e, %e", &x[countl. &y[count])) == 2)
{
xsum = xsum + x[count];
ysum = ysum + y[count];
xsqr = xsqr + (x[count] * x[count]);
++i;
)

else
break;

1
/* Calculate the average value of x and y *I

avex = (xsum I i);
avey = (ysum I i);

xres2 = 0.0;
xysum = 0.0;

'112

I* Calculate the the variances in x and y and the z residuals
and the sum(variance in x * variance in y) *I

for(j = 0; j < i; ++j)
I
sumx = 1:6] - avex;
sumy = yIj] - avey;
xres2 = xres2 + (sumx * sumx);
xysum = xysum + (sumx * sumy);

/" Calculate the slope and the intercept for the regression line *I

b = xysum I xres2;
a = avey — (b * avex);

I* Calculate the deviations from the regression line ‘I
yres = 0.0;

for (count = 0; count < i; ++count)

I
yline = (b * x[count]) + a;
yres = yres + pow((vIcountl -yline), 2);
l
I” Calculate the statistic Sny */
Syx = sqrtQ/res/ (i - 2));
/* Calculate the error in the intercept and the slope *I

Sslope = Syx/ sqrt(xre32);
Sintercept = Syx "' sqrt(( xsqr/ (i "' xres2)));

I” Print the Slope and error, and the intercept and error ‘/

fprintfloutstream, " %s\n\
\nSlope ............. %6.4G\
\nSlope error ....... %6.4G\
\nIntercept ......... %6.4G\

\nIntercept error... %6.4g"\
, argv[1], b, Sslope, a, Sintercept);
fcloseallO;

LIST OF REFERENCES

REFERENCES

1) Grahame, D. 0 Chem Rev, 1947, 41, 441.

2) DeFord, D. D., Division of Analytical Chemistry, 133rd Meeting, ACS,
San Francisco, 1958.

3) Staicopoulos, D. N. Rev. Sci. Instr. 1961, 32, 176.
4) Wadsworth, N. J. Analyst, 1960, 85, 673.
5) Hickling, A. Electrochim Acta 1961, 5, 161.
6) Kelley, M. T.; Jones, H. 0.; Fisher, D. J. Anal. Chem. 1960,32, 1262.
7) Kelley, M. T.; Jones, H. 0.; Fisher, D. J. Anal. Chem. 1959, 31, .1475.
8) Arthur, P.; Vander Kam, R. H. Anal. Chem. 1961, 33, 765.
9) Booman, G. L.; Holbrook, W. B. Anal. Chem. 1963, 35, 1793.
10) Buck., R. P.; Eldridge, R. W. Anal. Chem. 1963, 35, 1829.
p 11) Ewing, a. w.; Brayden, J. H. Anal. Chem. 1963, 35, 1826.
12) Lauer, G.; Schlein, H.; Osteryoung, R. J. Anal. Chem. 1963, 35, 1789.
13) Morrison, 0. F. Anal. Chem. 1962, 345, 1584.
14) Murray, R. W. Anal. Chem. 1963, 35, 1784.
15) Schwarz, W. M.; Shain, I. Anal. Chem. 1963, 35, 1770.
16) Smith, D. E. Anal. Chem. 1963, 35, 1811.
17) Smith, D. E. Anal. Chem. 1963, 35, 602
18) Smith, D. E.Anal. Chem. 1963, 35, 610.
19) Underkofler, W. L.; Shain, I. Anal. Chem. 1963, 35, 1778.
20) Bewick, A.; Fleishmann, M.; Liler, M. Electrochim. Acta. 1963, 8, 89.
21) Mattsen, J. M.; Linford, H. B. Anal. Chem. 1962, 34, 142.
22) Harrar, J. E.; Stephens, F. B. J Electroanal. Chem. 1962, 3, 112.

23) Il-Igé'gan J. E.; Stephens, F. B. Pechacek, R. E. Anal. Chem. 1962, 34,

24) Booman, G. L.; Holbrook, W. B. Anal. Chem. 1965, 37, 975.

113

114
25) Rogers, H. R..Rev. Sci. Instr. 1965,37, 866.
26) Miiller, R. H. Anal. Chem. 1964, 36, 123A.
27) Wood, K. I. Anal. Chem. 1965, 37, 442-.
28) Birman, P. Power Supply Handbook, Kepco, Inc, Flushing, NY, 1965.

29) Brown, E. R.; McCord, T. G.; Smith, D. E.; DeFord, D. D. Anal. Chem.
1966, 38, 1119.

30) Will, F. G. Electrochim. Acta 1968, 14, 749.

31) Bezeman, R.; McKinney, T. S. Anal. Chem. 1969, 40, 1560.

32) Bottei, R. S., Boczkowski, R. J. J Chem. Ed. 1970, 47, 312.

34) Britz, D. Brocke, W. A. J Electroanal. Chem. 1975, 58, 301-311.

35) Deroo, D.; Diard, J. P.; Guitton, J. Le Gorrec, B. J Electroanal. Chem.
Intel-facial Electrochem. 1976, 67, 269-276.

36) Schroeder, R. R. in "Computers in Chemistry and Instru-mentation," Vol.
2, "Electrochemistry," Mattson, J. 8.; Mark, H. B.; MacDonald, H. 0.,
Eds., Marcel Dekker, New York, 1972, Chap.10.

37) Schroeder, R. R.;Comput. Chem. Instrum. 1972, 2, 263.

38) Bard, A. J .; Faulkner, L. R. Electrochemical Methods Fundamentals and
Applications; John Wiley & Sons: New York, 1980; p 569.

39) Bewick, A.; Fleishmann, M.; Liler, M. Electrochim. Acta. 1959, 1, 83.
40) Bewick, A.; Fleishmann, M.; Liler, M. Electrochim. Acta. 1963, 8, 89.
41) Durst, R. A.; Ross, J. W.; Hune, D. N. J Electroanal. Chem. 1964, 7, 245.

42) Harper, K. A.; Casimir, D. J .; Kinnersley, H. W. J Electroanal. Chem.
1965, 9, 477.

43) Aggen, J. R.; Chambers, J. Q.; Adams, R. N. J Electroanal. Chem. 1963, 5,

44) Schroeder, A. J .; Schain, I. Chem. Instrum. 1968, 1, 233.
45) Bewick, A. Electrochim. Acta 1968, 13, 825.

46)Il’i11(1)a5, A. A.; Roe, R. B.; Herrmann, C. C. J Electrochem. Soc. 1969, 116,

47) Bezeman, R.; Anal. Chem. 1972, 44, 1781.
48) Pilla, A. A. J Electrochem Soc. 1971, 118, 702.

115

49) Lamy, 0.;Malaterre, P. J Electroanal. Chem. Inter-facial Electrochem'
1971, 32, 137.

50) Garreau, D.; Saveant, J. M.; J Electroanal. Chem. 1972, 35, 309.

51) Booman, G. L.; Holbrook, W. B. Anal. Chem. 1965, 37, 975.

52) Bewick, A.; Fleischmann, M Electrochim. Acta 1966, 11, 1397.

53) Tacussel, J. Electrochim. Acta 1966, 11, 437.

54) Bewick, A.; Brown, R. O. J Electroanal. Chem 1967, 15, 129.

55) Yamitzky, 0. J Electroanal. Chem. 1974, 51, 207-210.

56) Yamitzky, 0.; Friedman,Y. Anal. Chem. 1975, 47, 876-80.

57) Roe, D. K. in Laboratory Techni ues in Electroanal tical Chemistry

Iliggiinger, P. T. and Heineman, . R. Eds.; Marcel ekker: New York,

58) Barker, G. 0.; Gardner, A. W. Z. Anal. Chem. 1960, 79, 173

59) Breyer, B.; Gutmann, F. Trans. Faraday Soc. 1946, 42, 645.

60) Christian, G. D. J. Electroanal. Chem. 1969, 23, 1.

61) Roe, D. K. in Laboratory Techni ues in Electroanalytical Chemist ;
Ifgigiinger, P. T. and HeinemaanN. R. Eds.; Marcel Dekker: New ork,

62) Bard, A. J .; Faulkner, L. R. Electrochemical Methods Fundamentals and
Applications; John Wiley & Sons: New York, 1980; p 569.

63) Delahay, P. J Phys. Chem. 1962, 62, 2204.

64) Reinmuth, W. H. Anal. Chem. 1962, 34, 1272

65) Reinmuth, W. H.; Wilson, 0. E. Anal Chem. 1962, 34, 1159
66) Delahay, P.; Ide, Y. Anal. Chem. 1962, 34, 1580.

67) Delahay, P. Anal. Chim. Acta 1962, 27, 90.

68) Delahay, P. Anal. Chim. Acta 1962, 27, 400.

69) Delahay, P. Anal. Chem. 1962, 34, 1267.

70) Delahay, P. Anal. Chem. 1962, 34, 663.

71) Weir, W.; Enke, 0. G. J Phys. Chem. 1967, 71, 275.

73) Weir, W.; Enke, C. G. J Phys. Chem. 1967, 71 , 280.

116
74) Kurdirka, J .; Abel, R.; Enke, C. G. Anal. Chem. 1972, 44, 425.
75) Kurdirka, J.; Abel, R.; Enke, C. G. Anal. Chem. 1972, 44, 309.
76) Katzenberger, M.; Daum, P. H. Anal. Chem. 1975, 47, 1887.
77) Aramata, K; Delahay, P. Anal. Chem. 1963, 35, 1117.

78) Astruc, M.; Bonastre, J .; Royer, R. J Electroanal. Chem. Interfacial Chem.
1972, 33, 211.

79) Astruc, M.; Bonastre, J. J Electmanal. Chem. 1972, 40, 311.
80) Astruc, M.; Bonastre, J. J Electroanal. Chem. 1972,36, 435.

81) Aggruc, M.; Bonastre, J. J Electroanal. Chem. Intel-facial Chem. 1973, 43,
1 .

82) Astruc, M.; Bonastre, J. J Electrochim. Acta 1970, 15, 369.

83) Daum, P. H. Ph.D. Dissertation, Department of Chemistry, Michigan
State University, East Lansing, MI., 1978

84) Hahn, B. K. Ph.D. Dissertation, De rtment of Chemistry, Michigan
State University, East Lansing, ., 1978

85) Kurdirka, J M. Ph.D. Dissertation, Department of Chemistry, Michigan
State University, East Lansing, MI., 1978

86) Reiss, J. J .; Nieman, T A.” Anal. Chem. 1983, 55, 1236-1240.
87) Barnes, A. 0.; Nieman, T A. Anal. Chem. 1983, 55, 2309-2312.
88) Trubey, R. K., Nieman, T. A. Anal. Chem. 1986, 58, 2549-2554.
89) Goldsworthy, W. W.; Clem, R. G. Anal. Chem. 1972, 44,1360.
90) Mikkelsen, S. R. ;Purdy, W. 0. Anal. Chem. 1987, 59, 244-247.

91) Hourdakis, S. E. Ph.D. Dissertation, Department of Chemistry, Michigan
State University, East Lansing, MI., 1978

92) Hourdakis, S. E.; Enke, C. G. unpublished communication.

93) Lii, 0. 0. Ph.D. Dissertation, Department of Chemistry, Michigan State
University, East Lansing, MI., 1982

94) Lii, 0. 0.; Enke, C. G. unpublished communication. ‘

95) Engerer, R. E. Ph.D. Dissertation, Department of Chemistry, Michigan
State University, East Lansing, MI., 1984

96) Engerer, R. E.; Enke, C. G. unpublished communication.

117
_97) Schreiber M. A.; Last, '1". A. Anal. Chem. 1981,53, 2095—2100.

98) Schreiber, M. A. Ph.D. Dissertation, Deeartment of Chemistry,
University of Virginia, Charlottesville, a., 1982

99) Last, T. Anal. Chem. 1982, 54, 2327. '
100) Newcome, B. H. REV. SCI. INSTRUM. 1984, 12, 2017.

10 1) N ewcome, B. H. Ph.D. Dissertation, Department of Chemistry, Michigan
State University, East Lansing, MI., 1983

102) Rather, E.; Brodie, L. USING FORTH; FORTH-79 STD. ed., Forth Inc.,
Third ed., Rosenberg, 0. Ed (1981).

103) Moore, 0. BYTE 1980, August, 76.

104)1193godie, L. Starting Forth; Prentice Hall: Englewood Clifl‘s, New Jersey,
1. .

105) Deidrich, D., personal communication, 1988.
106) Bard, A. J .; Faulkner, J. R., op. cit., 272.

107) Laitinen, H. A.; Harris, W. E. Chemical Analysis; McGraw-Hill, New
York, 1975, p. 534 et. seq.

108) Bard, A. J .; Faulkner, J. R., op. cit.

109) Kissinger, P. T. and Heineman, W. R. Eds.,op.cit.

110) Model 303 Static Mercury Drop Electrode 0 rating and Service
Manual; E.G.&G. Princeton Applied Researc : Princeton, New Jersey,
1978. p.III.4. '

111) Model 303 Static Mercury Drop Electrode 0 rating and Service
%azréual i1EéG.&G. Princeton Applied Researc : Pnn' ceton, New Jersey,

. p. . .

112) Raab, M., Michigan State Univeristy, personal communication, 1988

"IIIIIIIIIIIIIIIII