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LIBRARI ES

llllllllllllllllllllllllllllllllllllll‘Illll

3 1293 00908 195

ll

 

 

 

 

This is to certify that the

thesis entitled

An Investigation of Methods of Evaluating
Plasma Etch Damage on Silicon

presented by

Venkatesh P. Gopinath

has been accepted towards fulfillment
of the requirements for

 

Master's degree in Electrical
Engineering

 

D. K. W/

Major professor

Date 7/21/ /9/

0-7639 MS U i: an Affirmative Action/Equal Opportunity Institution

 

‘ Ll-‘EERARY
Michigan Sufi
University

 

 

 

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sill}
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M80 Is An Affirmative Action/Equal Opportunity Institution
exams-nun

 

 

 

AN INVESTIGATION OF METHODS OF EVALUATING
PLASMA ETCI-I DAMAGE 0N SILICON

By

VENKATESH P. GOPINAT H

ATHESIS

Submitted to
Michigan State University

in partial fulfillment of the requirements
for the degree of

MASTER OF SCIENCE

Department of Electrical Engineering

1991

ABSTRACT

AN INVESTIGATION OF METHODS or EVALUATING PLASMA
ETCH DAMAGE 0N SILICON
By
VENKATESI-I P. GOPINATI-I

Plasma etching is widely used in the industry to achieve low damage and smaller
line widths. The major forms of damage due to etching can be in the form of shallow and
deep surface disruptions leading to anomalous device behavior of the devices subsequently
formed. Energetic ions can cause substrate damage in the form of interface states and
dopant compensation. UV and X-ray radiation can lead to the formation of electron-hole
pairs which can lead to non ideal C-V characteristic and shift in threshold voltage in MOS
devices. Some of these efi‘ects are reversible by annealing, however, these efl‘ects are still
harmful when high temperatme annealing cannot be done on the wafer.

The particular etch procedure used in this investigation was SFélAr plasma etching
of silicon in which plasma was formed by a microwave electron cyclotron resonance (ECR)
source. However the emphasis was on a comparison of evaluation methods rather than on
the etching process. The etching parameters were not varied.

This thesis applies five different methods to evaluate damage to silicon substrate
. that occurs due to plasma etching. Of these methods, three (current vs. voltage, capacitance
vs. voltage and Deep Level Transient Spectroscopy) were applied to compare the charac- 1
teristics of Schottky Barrier diodes formed on the surface of etched and unetched silicon.
In addition preliminary results of two chemical spectroscopy methods (Auger and XPS) are
briefly reporwd.

The most significant insight into the efi'ects of plasma etching for the particular
etching condition used here was provided by the ON measurements which pointed to a sig-

nificantdopantcompcnsationbeneaththe sin-faceofthe wafer.

The method perhaps most mentioned in the literature, I-V evaluation of Schottky
barrier diodes, did not show significant changes in etched vs. unetched samples. This may
indicate small surface effects for the etching process evaluated.

The etched samples showed a measurable change in the transient capacitance mea-
surements used for the nus method, indicating up to about 1013 states /cm3 after etching,
but the results were not interpretable as a Single energy trap level.

XPS and Auger measurements were conducted in order to determine the concentra-
tion of impuritieslt was noticed that fluorine is present in large quantities in the wafer even
after surface sputter. Fluorine has been previously known to cause carrier reduction under
ion implantation in semiconductors and may be the reason for the CV results on Schottlry
diodes. However, hydrogen, which is not detectable by either of the above methods, is also
known to cause a similar efl‘ect in semiconductors. The obvious some of fluorine is the
etching gas SF5. A source of hydrogen is less apparent but may be acetone which is a con-
stituent in the conducting graphite paint applied on the back of the wafer during etching.

ACKNOWLEDGEMENTS

I wish to express my sincere appreciation to Dr. Donnie K. Reinhard for the guid-
ance given in the course of this graduate study. I wish to extend my gratitude to Brian D.
Musson for his invaluable help with fabrication and etching of the samples. I wish to thank
Dr. Tim Grotjohn for patiently answering my questions and clarifying my numerous
doubts. I also thank Dr. Jefl'rey Ledford and Javid Kalantar for their help with XPS and
Auger measurements. Gratitude is also extended to Steve Blosser for his help in fabricating
the device holder. Finally I wish to thank my wife, Sheba, without whose support and help

this thesis could never have been completed.

TABLE OF CONTENTS

List of Tables
List of Figures
Chapter 1 Introduction
1.1 Problem Statement and Objectives
1.2 Thesis Organization
Chapter 2 Background
2.1 Introduction
2.2 Plasma etching
2.3 Damage due to Plasma etching
2.4 Overview of DLTS
2.5 Schottky Barrier Diode overview

2.5.1 Introduction
2.5.2 Capacitance - Voltage measurement

2.5.3 Current - Voltage measurement

2.6 Chemical Spectroscopy methods
2.6.1 Introduction
2.6.2 XPS overview
2.6.3. Auger Electron Spectroscopy
Chapter 3 Experimental Methods
3.1 Introduction ,
3.2 Description of SBD fabrication

viii

coat-x334:

l4
14
16
17
18
18
19

22

22
22

3.3 Etching procedure
3.4 DLTS experiment
3.4.1 DLTS setup
3.4.2 Measurement procedure
3.4.3 Measurement details
3.5 Description of IN and CV measurements
3.5.1 Introduction
3.5.2 I-V measurement details
3.5.3 C-V measurement details

Chapter 4 Results
4.1 Introduction
4.2 C—V characteristics before and after etching
4.3 r-v characteristics before andafteretching
4.4 XPS and Auger measurement results

4.5 DLTS measurement results

Chapter 5 Conclusions
5.1 Introduction
5.2 Summary of Major Results
5.3 Directions for Future Research

Appendix A Instrumentation required
Appendix B Source code
Appendix C PISCES input files

Bibliography

25
25
28
29
32
32
33
33

35
35
35

is

67
67
67

70
73
83
85

Table 1
Table 2
Table 3
Table 4
Table 5

LIST OF TABLES

Connection modes of HP4280a CV meter
XPS results of Silicon surface

XPS results after 1 minute sputter

XPS results after 3 minute sputter

DLTS experimental results

31
52
55
57
65

Figure 2.1
Figure 2.2

Figure 3.1
Figure 3.2
Figure 4.1
Figure 4.2
Figure 4.3
Figure 4.4
Figure 4.5
Figure 4.6
Figure 4.7
Figme 4.8
Figure 4.9
Figure 4.10
Figure 4.11
Figure 4.12
Figure 4.13
Figure 4.14
Figure 4.15
Figure 4.16
Figure 4.17
Figure 4.18

LIST OF FIGURES

Capacitance transients for majority and minority canier traps
Energy band diagram of metal p-type semiconductor contact
Steps involved in the fabrication of etched and unetched diodes
Block diagram of the DLTS interconnections

Plotofl/szs. Vforthelargediodeformcdon unetched silicon
Plot of I/C2 vs. V for the small diode formed on unetched silicon
Variation of doping vs. distance in the unetched diodes

Variation of capacitance on unclean surface

Plot of no2 vs. v for the large etched diode

Plot of we2 vs. v for the small etched diode

Variation of doping vs. distance in the large etched diode
Variation of doping vs. distance in the small etched diode

I-V plots of etched and unetched diodes

PISCES simulation plot of uniform and non-uniformly doped diodes
XPS plot of the surface of the etched semiconductor

XPS plot of the surface after 1 minute of sputtering

XPS plot of the smface after 3 minutes of sputtering

Auger “line scan” of sample

Capacitance transients of an unetched diode

Capacitance transients of an etched diode

DLTS plots for various tlltz for an unetched diode

DLTS plots for various tlltz for an etched diode

Chapter 1

Introduction

1.1 Problem statement and objectives

The present trend in integrated circuit fabrication is toward higher circuit densities
leading to requirements of smaller line widths. In this regard, most conventional wet etch-
ing methods stand at a disadvantage due to their inherent lack of directionality. This has led
to the increasing use of dry etching methods in which plasmas provide the reactive chemi-
cal species required for etching. Plasma etching techniques allow precise process control
and with appropriate operating conditions are highly directional thus leading to higher cir-
cuit densities. However dry etching techniques are not altogether without drawbacks.
Amongst the possible deleterious efl'ects of plasma etching are canier reduction, introduc-
tion of deep states and electrostatic damage of thin insulating films [1].

This thesis compares several difi'erent experimental methods for determining dam—
age associated with plasma etching. The particular etch procedure used in this investigation
was SFG/ Ar plasma etching of silicon in which the plasma was formed by a microwave
electron cyclotron resonance (ECR) plasma source [2]. There exist a number of methods
which allow one to check for the occurrence of plasma etch related damage, contamination,
or defects. In this thesisfive difi'erent methods were chosen and applied to the same etching ‘
processes. The emphasis therefore is on a comparison of evaluation methods rather than on
the etching process. The etching parameters were not appreciably varied.

Three of the evaluation methods involved the formation of Schottky barrier diodes.
Thesediodes were choseninparticularforthisexperiment becauseoftheirsimplicity and

ease of fabrication. Most of the electrical characteristics of the SBDs can be directly corre-
lated to the structure of the underlying silicon wafer. The chief evaluation methods associ-
ated with the Schottky barrier diodes were the current vs. voltage (I-V), capacitance vs.
voltage (C-V) and Deep Level Transient Spectroscopy (DLTS). The bulk of the thesis is
concerned with these three evaluation methods. In addition, two preliminary experiments
with chemical spectroscopy methods, X— ray Photoelectron Spectroscopy (XPS) and Auger
Electron Spectroscopy (ABS), were used to determine the chemical composition of the
wafer after etching. Each of the first three methods associated with Schottky banier diode
is sensitive to a different form of defect. A type of defect which causes a major change in
the characteristic of one of the measurements may hardly effect the other two.The chemical
spectroscopy methods were used to explore explanations for the results of the first three
methods in terms of the wafer’s chemical composition, thus obtaining additional insight
into the electrical behavior of the devices formed on it. The thesis compares the nature and
amount of information provided by each method in terms of the analysis of etching damage.
A PISCES simulation was also conducted to confirm some of the unexpected I-V results.

1.2 Thesis Organization

This thesis presents insight into some of the commonly applied methods used to
study effects of etching on semiconductors.

Chapter 2 provides the background details of plasma etching and associated etching
damage. The underlying concepts of DLTS, XPS and Auger methods and a short overview
of the Schottky Banier Diode are also presented.

Chapter3describesthedifierentexperimental methodsconductedonthe samples.
Sections 3.2 and 3.3 describe the fabrication and etching details of the Schottky Barrier
diodes. Section 3.4 describes in detail the experimental setup and procedure ofthe DLTS

measurements. Finally, Section 3.5 describes the electrical measurement conducted on
diodes.

The results of the afore mentioned experiments are detailed in Chapter 4. The chap-
ter ofi‘ers speculation on the results of the measurements in terms of chemical composition,
using information from the results of XPS and Auger methods.

F‘mallyChapterSsummarizestheworkofthisthesisandpoints outareaswherefur-
ther work can be done.

Chapter 2

Background

2.1 Introduction

This chapter provides a brief overview of the various experimental methods con-
ducted during this thesis. Sections 2.2 and 2.3 introduce the concepts of plasma etching and
associated damage. Section 2.4 provides a detailed introduction to the concepts of DLTS.
A brief overview of the Schottky banier diode and its electrical characteristics is provided
in Section 2.5. Concepts of the chemical spectroscopy methods like XPS and Auger are
introduced in Section 2.6.

2.2 Plasma etching

Etching can be broadly classified into two categories, wet and dry. Wet etching
(purely chemical), with some exceptions, has no preferred direction, leading to isotropic
properties and undercutting of the mask. Higher circuit densities require low defect densi-
ties and precise process control, both of which are lacking in wet etching. Ideal ion
enhanced plasma etching (dry) produces an anisotropic profile[ 1 ]. Therefore as device sizes
continued to shrink, dry anisotropic etching methods became preferable to wet isouopic
‘ ones. This, however, led to new variables and new types of defects associated with ion bom-
bardment and other plasma efl’ects. This chapter will briefly introduce plasma etching and
its related effects [1]. ' I

The simplest form of plasma reactor consists of two parallel plates in a chamber
filled with a gas at pressures of approximately 0.01 to 1 Torr. When a voltage of sufficient
magnitude is applied to the plates, ionization occru's forming a plasma which emits a char-
acteristic glow. The applied voltage may be AC or DC. Most typically in parallel plate reac-
tOI'S. an RFfrequency is applied. Reactive species includingions andradicals areformed

due to this electrical discharge. Semiconductor wafers exposed to this environment com-
bine with the reactive species and form volatile products thus leading to etching. The
plasma chemistry can be chosen such that the reactive species do not react with the masks
and the substrate holder. Plasma etching is similar to wet etching in that both of them react
selectively with the desired material thus removing it. A major advantage of plasma etch-
ing, as will be seen, lies in the capability to control the direction of etching.

In plasmas used for etching the extent of ionization of the gas is small. Usually less
than 1% of the species are ionized. The plasma contains equal numbers of positive and neg-
ative species. The positive species are generally positive ions and the negative species
include electrons and in some cases negative ions. The flow of current however is domi-
nated by electrons because among all the charged particles present in the plasma they are
the lightest and hence the most mobile. Since the transfer of energy between two particles
is most efficient when the masses of the interacting species are comparable, the electrons
inmotion losevery littleenergytothe surrounding matter. Thus itcanbeconsideled that
the efl'ective temperature of the electrons is much higher than that of the surrounding gas.
The elevated electron temperature allows formation of high temperature type reactions in
a low temperature neutral gas leading to formation of free radicals. In the absence of plasma
the formation of radicals would require temperatrnes of thousands of degrees kelvin.

Although the amount of pontive and negative charge is the same, charge imbalance
willoccurdue tocharge diffusion intothe wallsandrecombination atboundary surfaces.
This tends to deplete the charge in the adjacentgasforming a thin boundary layerorsheath.
The electrons being the lightest difl’use the fastest leading to a charge separation and the
development of a plasma potential relative to the walls. The plasma can now be considered
as a series combination of an extremely conductive central glow and a less conducting
sheathaefmemostofmepmenflfldropappeamacmssmesheathisvdmgewcel-
crates the positive ions towards the surface leading to near normal incidenceThe magni-
mdeofthisvoltageplaysacriticalroleinthedegreeofanisotropyandtosubstratedamage.

Although current etching procedures used in integrand circuit fabrication are pre-
dominantlyRFreactu's, thereisappreciable interestin rm'crowaveECR plasmareactors

suchastheoneusedinthisresearch.'l‘hetheoryandpracticeofECRreactorshasbeen
reviewed by Asmussen and only brief features will be described here [3]. Because of the
resonant coupling of electromagnetic energy to the plasma electrons, and because of mag-
netic confinement, these discharges are highly eflicient. Consequently, high plasma densi-
ties (on the order of 1012 lcm3) are obtainable at low pressures (less than or equal to 1
mTorr) with relatively low electric fields and therefore low sheath potentials (on the order
of 10 V). This combination of properties results in the ability to achieve anisotropic etching
with low damage and high selectivity. Examples of current interest in ECR etching include
the etching of gate polysilicon in which high selectivity and low damage is crucial [4] and
the etching of III-V and II-VI compounds whose surfaces are highly sensitive to damage
by energetic ions [5,6].

Plasma etching can be divided into four distinct methods as described below.
1) Sputtering involves the process where the ion Strike the surface of the semiconductor
with enough energy to cause the ejection of surface atoms, much like a high pressure water
drill. This process lacks selectivity and is generally associated with significant substrate
damage.
2) Chemical etching occurs where the gas species reacts spontaneously with the surface.
The gas is chosen such that the components of the gas sebctively react with the surface
forming a volatile product. Here plasma assists the etching by forming the reactive etchant
from the gas. Forexample NF3 inplasmaleadstotheformationofFatomswhich reacts
selectively with silicon. Selectivity is inherent in this process since fluorine reacts strongly
with silicon forming SiF4. However this process is similar to wet etching in directionality.
3) Ion enhanced energetic etching occurs when the high energy ions act as catalysts during
theetching.Agasischosen such thatneuualradicalsontheirowncannotleactwith the.
surfacetoformavolatileproduct. Howeverwhenthesurfaceisexposedtohighenergy
ions. thereactivityofthe surface tothegasincreases, leadingtoionassistedetching. This
processisdirectional sincetheionswhich hitthesrnfaceperpendicularlyenhancethereac—
dvityoromythosennraceammsAtmomtempaannecmuinedoetnotmactwimancon
butwhenthe surface isexposedtohighenergyions, siliconchlorideisformedrapidly.

4) Inhibitor ion crdranced etching consists of inhibitors and etchants. The etchant used in
this case reacts spontaneously with the substrate. The role of the inhibitor lies in enhancing
selectivity by forming a thin film on the side walls thus preventing undercutting.

2.3DamageduetoPlasrmetching

Wafers placed in plasma environment are exposed to particle bombardment. If the
particle energies are sufficiently high, this may cause both shallow and deep surface disrup-
tion, altering the electrical characteristics and thereby the behavior of the devices formed
on this surface. Damage can be in the form of atomic displacements due to ion impact or
formation of electron-hole pairs due to UV or X-ray radiation. The efl'ects of this damage
can manifest itself in a number of ways including, for example, a change in the C-V char-
acteristicofthedeviceorasashifiinthresholdvoltageinMOS transistors. Damagedueto
plasma etching can be broadly classified into reversible and irreversible efiects. Reversible
effectsarethosewhichcanberemovedbysomeformofpostprocessing, normallyinthe
form of thermal annealing. Annealing as a form of damage control will be efl'ective only as
long as other wafer properties are unafl'ecwd. This technique is less useful when applied to
technologies where shallow junctions are critical because the temperatures involved in
annealing cause impurity motion and permanently change the characteristics of the wafer.
Difficflfiesdsoansewhwexuemelygoodnnfwechamtaisficsmedesiredummefm-
mation ofthin oxide gates. Irreversible efl'ects are seen when contamination occurs due to
the deposition of sputtered reactor material onto the surface of the semiconductor. Electro-
static damage of thin insulating films is another irreversible efl’ect of plasmaetching. The .
gate insulator may not be able to withstand the voltage developed across it during etching.

Compensationofdopantsisalsoreportedasatypeofplasmaetchdamage. Studies
conductedonSchottky barrierdiodesformedonetchedsmfacesbyConstantineetal[4]
mdicamamducdmmcufiaconcenuafloninmenear-nnfwemgionofmtypeGaAsafter
emhinglhisefl'ectwasucfibedmmeindifiusionofamnflchymogenfiommeplasma

resulting in the deactivation of Si dopants in GaAs. Studies conducted by Heddelson et al
[7] also showed dopant deactivation in both n—type and p-type silicon when hydrogen was
present in the bombarding species. It was also noticed that this efl'ect was more pronounced
in p-type material. In the case ofp-type material dopant deactivation was noticed even
when hydrogen was not introduced intentionally.

2.4 Overview of DLTS

Deep Level Transient Spectroscopy (DLTS) is a high fi'equency capacitance ther-
mal scanning method first introduced by D.V. Lang [8]. The technique displays the pres-
ence of traps in differential capacitance as negative or positive peaks as a funcrion of
temperature. The peak reflects the thermal emission properties of traps, activation energy,
concentration profile etc. The theory behind this technique assumes exponential capaci-
tance vs. time transients. An alternative method, luminescence, can be used with consider-
able success in the study of shallow centers but is not very successful in characterizing deep
traps.

Some definitions are in order before the theory behind DLTS can be explained.
Deep traps: Traps found to occur nearer to the center ofthe band gap.

Electron traps: Traps present in the upper half of the band gap i.e. closer to the conduction
band. In steady statethesetrapstendtobeemptyofelectronsandthuscapableofcapnuing
them.

Hole traps: Trapspresentin the lower halfofthe band gap i.e. closerto the valence band.
In steady state these traps tend to be full of electrons and thus are capable ofcapturing
holes.

Pulsed bias capacitance transients: The capacitance vs. time transient that occurs after a
shortwidthbiaspulsehasbeen appliedtoasteady statecapacitor.

Intrinsic latticedefectsorimpmityatomscaninuoduceuapstatesinthemiddleof
megapflhepmsenceofdeepuapsmakesmejumdmcapacimweaconmhcawdfuncdm

of bias voltage and measurement frequency. If the time constant of the trap is low enough
tofollowthebiasvariationandthesmallAC signalusedtomeasurecapacitance, then the
background doping concentration N, can be replawd by (Nb + N.) where N t is the concen-
tration of deep trapsHowever if the time constant of the trap is so large that it cannot follow
the changes in either bias voltage or measuring signal, no efl‘ect on capacitance is observed

Ifthe depletion region of a Schottky barrier diode contains deep traps and the capac-
itance is changed rapidly, the traps, because of their finite response time, will not be able to
respond to this change instantaneously. Information about trap energy and response time
can be obtained from the capacitance transient resulting from the bias pulse. Consider a
SBD fabricated on n-type silicon with donor type traps below the Fermi energy level and
therefore unionized. If the diode is suddenly reverse biased, the capacitance will decrease
abruptly because of the increase in the depletion layer width. Initially the depletion region
will expand. incorporating an increased number of the donor traps. However as time passes
sincethedonortrapsarenow abovetheFermilevel, theywillbeemptiedoutresultingin
an increased density of positive charge and thus reducing depletion region widths. The
resulting change in capacitance, measured as a function of time can be used to characterize
traps present in the semiconductor. A short review of Schottky barrier diodes and their C-
V and I-V characteristics is given in Section 2.5.

In this DLTS discussion we will consider the transients occurring after a reverse
biased junction capacitance is momentarily forward biased. The sample, a Schottky barrier
diodeorapfijunctiondiodedsreversebiasedlongenoughtobring thetrapspresentinthe
depletion region to the steady state conditions. For example, electron traps, if any, are now
' emptied by the reverse bias. The sample is then given a biasing pulse, the value ofwhich
dependsonthetypeofthenapbeingexaminedflherennnofthecapacimncemitsreverse.
biased value at various instances of time forms the basis of Deep Level Transient Spectros-
copy. Thevalueofthereverse biasedjuncdoncapacitanceislabefledascw'IheDLTS the-
ory consists of plotting the values of (C(t1)- C(t2))/C.. versus temperature. The sign of the
capacitancechangedependsuponthenanlreofthenap.

ThetheoryofDLTS aspresentedbylangisexplainedintermsofaheavilydoped

10

p+njunction. The theory assumes thatin such ajunction underreverse bias mostofthe
depletion region will be in the lesserdoped area, i.e. the 11 region, and the capacitance tran-
sients will be mainly due to the characteristics of the lightly doped region. However a
Schottky barrier diode is also well suited for such an explanation because all of the deple-
tion region is formed in the semiconductor. Let the thermal capture and emission rates for
electrons be c1 and e1 respectively and the same for the holes be 0; and Q. In the quiescent
reverse bias state all of the observable states are in the depletion region, therefore the cap-
tureratesarezero. 'I‘heoccupationlevelisdeterminedbythethermalemissionrateseland
ea. The steady state occupation of a trap is given by
at =103/(91WIN ' (1)

where n1 is number of electrons present in the trap and N is the concentration of the trap.
Therefore electron traps have a value of n1 close to zero and hole traps have n1 nearly equal
to N. Thus according to Eq. (1), an electron trap has e1>> 92 while the contrary is true for
a hole trap. The emission rates depend exponentially on the energy difference between the
trap level and the corresponding band, conduction band for electrons and valence band for
holes. A bias pulse causes a change in capacitance by changing the steady state occupation
of the trap i.e. the trap concentration is no longer given by Eq. (1). As the trap concentration
returns back to the value given by Eq. (1) the capacitance returns to its equilibrium value.

The actual change in capacitance would depend upon the way the bias pulse efl'ects
the trap i.e. if the concentration of the trap decreases as a result of this pulse, as it does for
a hole trap, the value of the capacitance shows anincreasing transient. The change in capac-
itanceduetoelectrontrapsisquitethecontrary sincetheoccupancyofthetrapisincreased
bythebiaspulse. ‘I‘hisleadstotwotypesofbiaspulses,oneforelectrontrapsandtheother
forholetraps. Thebiaspulse forelcctron trapsforwardbiases thejunctiontothemaximum
possibleextentso astosaturatethen'apspresentinthedepletionregionandishencecalled
aninjection pulse. Thepulseusedtoobserve hole traps momentarilyreduces thebiasacross
thediodeandinjectsonlyminoritycarriersi.e.tendstoemptythetrapsofallelectrons'lhe
twopulsesandtheirefl'ectondevicecapacitanceisshowninfigme 2.1.Therateconstant
ofthecurve forelectronuapswillbenearlyequaltoel andthatofholetrapsisez. Assum-

11

 

 

 

 

 

 

 

 

 

 

 

 

o _
DIODE
BIAS
-V3 _
i , MAJORITY
_ CARRIER
TRAP
Casi... “it we
A r...
i —‘—->
o ----- _‘
DIODE INJECTION
BIAS PULSE
-vg _,
DIODE "—1
CURRENT _
j CARRIER
__ TRAP
DIODE ““5 ct >> 02
CAPACITANCE

    

exp ('91!)

 

 

Fi 2.1.Capacitancescu'ansientsfqrma -andminori carrier a
sun: inp-type Schottkybarrier (111$? ty up

 

12

ingthatthecapttne (recombination) ratesofthetrapsaremuchlargerthantheiremission
rates, the steady state electron occupation of the same trap timing the bias pulse can now
. be written as
u1 = [Oz/(CIWIN (2)
where c1 and 02 are the electron and hole capture rates respectively. The effect of an injec-
tion pulse is to introduce a large enough number of electrons, overwhelming the trap emp-
tying process and thus making c1>> q. The efl‘ect of a majority (in this case, holes) carrier
pulseistodotheopposite.Theconcentrationofau'apcan beobtaineddirectlyfromthe
capacitance caused by the bias pulse. The relationship for a diode would be
N=2<AC/o(Na)' (3)
where N is the trap concentration, AC is the capacitance change at time t = 0 due to the bias
pulse and N3 is the background doping of the Schottky diode or the lesser doped side of a
pn junction diode as the case may be.

ThemainfeatureofDLTS is theabilitytosetaratewindow suchthatthemeasure-
ment apparatus shows maximum sensitivity for transients with rates that fall in this win-
dow. The emission rate is related to the temperature by the following equation

6,. = (0( V1 ) Nat/gt)! cXP(-AEIkT) (4)
where o is the carrier capture cross section, Nd] is the efl'ective density of states in the car-
rier band, (v1) is the mean thermal velocity of the carrier, g, is the degeneracy of the trap
level, AB is the trap activation energy and x = l (2) for an electron (hole) trap. The above
equationcanbedrawnasastraightlineplotoflnexvs. lfI'whoseSlopewouldbeAE/k.
The main assumption behind this is that all other factors in Eq. (4) are independent of tem-
perature. In fact, however, these parameters do vary with temperatures and so the value of
activationenergyisnotaveryaccurateone. - .

AplotofC(t1)-C(t7)vs. temperaturegoesthroughapeakwhent, theinverseof

the transient rate constant, is of the order of tl-tz. The value 1w, the rate at which maxi-
mum C(t1) -C(t7) is experimentally observed, and for exponential transients with infinites-
imally short gate widths is given by

rm 8 (tl-t7)/[ln(t1/t7)]. (5)

13

The emission rate (inverse of rum) at the peak of C(tl) - C(tp) can be used along
withtemperaturetogetonepointonthelnexvs.Tplot.Otherpointsareobtainedsimilarly
fromotherscans with diflerentvalues oftl and t2. Thisvalueofpeakmaximumcan be used
to measure trap concentrations from Eq. (3). The rate at which the thermal scan is done and
the direction in which it is done does not efl‘ect the shape or position of the DLTS peaks as
longasthe temperanuemeasurementdevicereadstheuuedevicetemperamreandthe sam-
pling does not distort the signaL

Inordertogetsomepointsonthelnexvs. 1/I‘plotone willhave todoanumberof
DLTS scans with difl'erent values of t1 and t2. The values of t1 and t2 can be varied in three
different ways:

(1)t1 is fixed while t2 is varied

(2) t2 is fixed while t1 is varied

(3) Both t1 and I; are varied with t1/t2 fixed.

The easiest of these methods is (3) since tlltz remains constant making it easier to calculate
rm.

It should always be kept in mind that the above theory is valid for traps with expo-
nential transients. This can however be used for relative comparisons of samples with non-
exponential transients but the formulae listed earlier no longer apply. Concentration profil-
ing of majority (hole) carrier traps are straight forward. A number of DLTS scans are done
with majority canier pulses of varying height up to a maximum value just below injection.
A plot of signal height vs. majority carrier pulse height is plotted and this data is used to
calculate canier concentrations. The procedure for a minority, in this case an electron trap,
is a little more complicated. It involves two pulses, the first of which is the normal sauna-
tion injection pulse and the second a majority canier pulse of variable amplitude which
empties the trap. A series of scans is made with progressively larger majority carrier pulses
but unlike before, the signal destruction is plotted vs. pulse voltage and the concentration
is given by ‘

N<t+o=Nm cpr-(lflr+e1)ta <6)
whaetcisdwwidmofmesecmrdmajaitycarnapulsefllismehokmcombinafionm

14

ofafilledtrapandN(t)istheconcentrationoffilledtrapsattimetafterthestartoftheinjec-
tion pulse. This method of using two pulses to profile minority carrier traps is detailed in
[9].

DLTS scans can be made Sensitive to difl’erent type of traps by adjusting the width
ofthebiaspulsetosuitthecapturerateofthetrap. Ifthetrapunderscrutinyisafastrecom-
binationcenter, thewidthofthebiaspulsecan bemadeverysrnall suchthatonly the faster
traps get filled and the slower will not be appreciably filled. The resulting DLTS signal can
besafely assumedasbeingduetothefastertrapsandthuscanbeprofiled.

The DLTS method while being an extremely versatile one is not without its inherent
drawbacks. It is incapable of detecting minority (electron traps on a p4ype background)
carrier traps in Schottky barrier diodes. The method behind profiling the minority nap is to
have a sufficiently large and wide injection pulse that injects electrons into the depletion
region. In the case of metal-semiconductor contacts, forward currents do not inject any car-
liers andhence the technique fails. The method also fails when the capture rateezis so large
that the trap empties itself before the measurements can be taken. Such cases can be profiled
using a combination of DLTS and other methods.

2.5 Schottky Barrier Diode overview
2.5.1 Introduction

Schottky barrier diodes are usually fabricated by depositing metal layers on chem-
ically cleaned semiconductor surfaces. When a metal and a semiconductor are brought in .
contact such that charge can flow between them, the Fermi levels line up and depending
uponthedopingofthesemiconductnr,thenatm'eoftheinterfacestatesandtheworkfunc-
tionofthemetal,alectifyingcontactcanbeformed [10]. Anexamplebanddiagramofan
ideal metal- p-type semiconductor interface is as shown in Figure 2.2. Figure 2.2 (a) shows
the vacuum levels and Figure 2.2 (b) shows the actual interface. The quantity O3 is called

15

we v 59
55 883383 090.3 .5 88:8 308 .«o «8.53.. v53 .88..» 888E .Nd oBuE

a 3

 

 

 

 

 

 

l6

thebarrierheightandunderidealconditionsdependsonlyupon thedopingofthe semicon-
ductor and the metal work function. In real interfaces however, localized surface states may
lead to pinning of the Fermi level and the barrier height would no longer be a simple func-
tion of the metal and semiconductor work functions. The fabrication of SBDs is fairly sim-
ple in terms of the number of fabrication steps, though care should be taken to ensure that
clean surfaces are maintained. This allows one to study the efi'ects of various processing
steps on the semiconductor by examining the IN, C-V and DLTS measurements of a SBD
formed on that surface.

2.5.2 Capacitance - Voltage measurement

The change of capacitance of a reverse biased Schottky barrier diode with voltage
can be used to determine the junction height of the metal-semiconductor contact. The basic
assumption is that the semiconductor has uniform background doping and that all of the
impurities are ionized. This method is used only in reverse bias because when a diode is
forward biased the capacitance is shunwd with a large conductance.

The depletion region capacitance of a diode can be considered equal to that of a par-
allel plate capacitor separated by the width of the depletion region and having the semicon-
ductor as dielectric.This capacitance is given by

C=s [esthltzcvt+Vt-kr/q))1"2 (7)
where Nb is the background doping, 8, is the permittivity of the semiconductor, Vi is the
contactpotential, VRisthereversevoltageandSistheareaofcross section ofthediode
[10]. In thisequation it has been assumed that an appreciable oxide interface layerdoes not
existandthatthesemiconductoris uniformlydoped. Ifin theaboveequation l/Czisplotted
vs. vR, the result is a straight line with a slope of 21(Sze,qN3) and an intercept on the volt-
ageaxisofVoawi-kth). 'l‘heslopecanbeusedtocalculatethedopantconcentrationand
theintercepttocalculate banier-height. 'I‘hebanierheight is given by

¢Bn '3 (0% + ¢n 4' m (8)

l7

°Bp = (E: " who) (9)
wherefigis theenergygap and¢3pisthe barrierheightas seen bytheholes. Thekaactor
comes due to the contribution of majority carriers to the space charge. Eq. (8) does not
include efl'ects due to image force barrier lowering.

In the case where background doping varies with distance into the semiconductor,
the plot of NC2 vs. Voltage is not a straight line. The slope at any point in the characteristic
can be usedtocalculater(W),whereWisthedistance into the semiconductorandis
given by

w = (zegvi - VRl/qNb) 1’2 (10)
where Vi is the built in voltage and is calculated from the intercept of the slope with the V

axis.

2.5.3 Current - Voltage measurement

The current in a SBD formed on high mobility semiconductors like Si or GaAs is

due to emission of electrons over the barrier and is given by the relation

I = Io [eXP(qV/nk1') -l] (11)
where

h=SA'T2exp(wm (12)
and n is the diode ideality factor, A‘ is the modified Richardson constant v is the applied
bias and all other symbols are as defined earlier. For forward biases in excess of approxi-
mately 3kT/q, a plot of In I vs. V gives a straight line. The value of 10 is the intercept of this
line on the I axis. Ifall othervalues inEq. (12) areknown, the value oftba can then be
calculated The value obtained this way is the zeta bias barrier height and includes the
image forceefi‘ectonthebarrier. Thevalue ofnisoneforanidealSchottky barrierdiode,
wherethebarrierheightisindependentofbiasandthecurrentfiowisonlyduetothermi-
Mceufission.Facmrstakengleaterthmmemethebiasdependenceofbarfier
height. electron tunmling through the barrier and carrier recombination in the depletion

18

region. Carrierrecombination causing an increase in u is an important factorin Si diodes
with doping concentrations less the 1015 cm'3 because of relatively large depletion layer
widths. Indevicesoperatingunderhighinjectionconditionsanincreaseinuisduetothe
enhancedminority carrierdrift in the quasineutral region caused by thedriftfield. The
value of It also increases from unity due to the field dependence of barrier height. This field
dependence arises eitherdue tothepresenceofthe insulating interfacial layerordueto
image force lowering of the barrier. Since a part of the applied voltage appears across the
interfacial layer, the banier height becomes voltage dependent. The interfacial layer also
causes the zero bias barrier height to be lower than it would be in the absence of this layer.

The thermionic emission theory predicts that under reverse bias, the reverse current
shouldsaturatetothevaluelogiveninEq(12).Thissanlrationisnotobservedinpr-actical
diodes, rather the reverse current is seen to increase with reverse voltage. This is caused in
part due to the dependence of barrier height on bias. Other phenomena that cause this are
the tunneling ofelectrons fi'omthe metal intothe semiconductorconduction band andthe
electron-hole pair generation inside the depletion region. For large barrier heights and low
dopant concentrations, the injection of minority carriers from the semiconductor into the
metal may also be important.

2.6 Chemical Spectroscopy methods

2.6.1 Introduction

Chemical spectroscopy techniques are often used to explain the efiects of processe
mgmmeelecuicflcharactaisficsofadevicemtamsofchmgesmchemicflcomposi-
tion.Itislmownthateventracesofcontaminantslikesodiumcancauseaverylargechange
intheelectrical behavioroftllefabricateddevice.1hespecuoscopymethodsplovideaway
of detecting contaminants which may have been introduced during fabrication.

19

2.6.2 XPS overview

X-ray Photoelectron Spectroscopy (XPS) [l 1] involves the adsorption of photons
resulting in the prompt emission of photoelectrons from the excited atom. All electrons
with a binding energy below the X-ray photon energy may be emitted.The resulting photo-
electron spectrum has characteristic peaks corresponding to chemical elements and their
associated compounds, which may be compared with available charts. Shifts in the peak
shapesandpositionscanbeusedtoyieldbondinginformation.Theseshiftscanbeusedto
distinguish between, say, silicon bonded to silicon and silicon bonded to oxygen. The pho-
toelectrons have an escape depth of 5-30 0 A for most conducting materials thus allowing
for surface sensitive analysis. It is the combined advantages of high smface sensitivity,
chemical bonding determination and non-destructive analysis capability that makes this
technique so attractive for surface analysis. XPS is also less susceptible to sample charging
than other ion and electron based techniques used for analyzing nonconducting polymers.
This allows for analysis of polymers used in lithography of semiconductor and organic res-
idues picked up during processing or packaging. Unlike other ion-beam techniques, XPS is
non-destructive and has no inherent depth profiling capability. Even angle resolved XPS is
limited to near surface region. Sequential ion beam sputtering can be used to remove layers
ofthematerialandthenXPS measmementscanbedonetoobtainaqualitativedepthpro—
file. Itshouldbekeptinminddratdaflobtainedbydfismeansmaynotbeveryaccmate
due to the distortion of the true chemical bonding environment caused by the energetic ion
beam used for sputtering. Recent developments in XPS have allowed analysis of small
' areas with computer controlbd analysis. Small spot size is achieved by collimating the X-
ray beamto aregionofapproximately 150nm Howeverthiscauses low fluxrates ,
leading to increased counting time. To avoid surface contamination most XFS equipment
operate in an ultrahigh vacuum environment.

Surface analysis by XPS is often done by irradiating the sample with mono-ener-
getic photons andexamining the electrons emitted. Mg Ka (1253.6 ev) orAl K at (1486.6
ev) arecormnonlyusedX—ray somees'l'heseirradiatedphotonscausephotoionizationof

20

the atoms in the surface region of the sample, resulting in emission of two types of elec-
trons, photoelectrons and auger electrons. The probability of interaction of these emitted
electrons with matter far exceeds those of the photons. Therefore even though the phomns
can penetrate up to tens of microns, theemitted electrons can escape outof only tens of ang-
stroms. The electrons leaving the surface region are detected by an electron spectrometer
accordingtotheirkinetic energy. 'I'heanalyzerisoperatedwithinafixednarrowrange
referred to as “pass energy”. Therefore, the narrower the region, the higher the resolution
of the energy scan. Scanning for difi'erent energies is accomplished by electrostatically
retarding the electrons before they reach the detectors. This retardation voltage may be var-
ied between zero and the incident photon energy. For a typical surface where the surface
composition is unknown, a wide scan “survey spectrum” of the surface is obtained and then
a narrower detailed scan for selected peaks is done.

2.6.3 Auger Electron Spectroscopy

A focussed electron beam impinging on a specimen causes numerous beam speci-
men interactions to take place. This results in electron signals and X-rays being produced.
Auger Electron Spectroscopy (ABS) [1 1] measures the energy of the Auger electrons emit-
ted from the first few atomic layers of the material. The AES techniqlw for chemical sur-
facesis basedon theAugerradiationlessprocess. lnpractice, a specimen is bombarded
with a focused beam of electrons in ultrahigh vacuum. Incident electrons ionize atoms in
the material, creating vacancies in their inner electron shells. As the ionized atoms relax to
a lower energy state, these vacancies are filled by electrons from a lower energy shell. The
transitiontoalowerenergystateisaccompaniedbytheemissionofenergyintheformof
an x-ray photon or an “Auger electron”. This phenomenon was first described by Pierre
Auger who noticed this transition while working with x-rays.

TheeminedAugaelecuonsaredetectedbyanelecnonspecuomewrandtheir
enagiesmmeaaued.1hedisuibufionofAugadecuonenagiesammcordedasAuga

21

specuLThesespecmcmsistofpeaksdemfingspedficAugaebcuonwergiesmmemml
energy distribution produced by the incident beam. The energies of Auger electrons are
characteristic of the emitting elements. Thus peak identification leads to determination of a
sample’s surface elemental composition. Unlike XPS, ABS allows the use of a very small
probing beam, on the order of l umeter in size. However, XPS is better suited for obtaining
bonding information.The two methods are often used in a complementary fashion.

 

Chapter 3

Experimental Methods

3.1 Introduction

This chapter describes the methods used to fabricate Schottky barrier diodes as well
as the methods for performing DLTS, C—V and I-V measurements on these diodes for
etched and unetched specimens. In addition, the etching procedure and etching conditions

are described.
3.2 Description of SBD fabrication

For this research, 3 inch diameter p-type silicon wafers, with resistivities between
6 to .18 Gem, corresponding to a background doping of approximately 7 x1014 cm'3 to 2
x1015 cm'3, were selected Bach wafer was initially cleaned with boiling rca, followed by
a degrease etch and a demetal etch to remove organic and metallic contaminants. The wafer
was then oxidized at 1000° C temperature to grow a 2000°A thick oxide layeron both
sides. The oxide on the back was stripped using a bufi‘ered oxide etch. The sample was then
placedinadiffusionfm'nacewithaboronsourcefor20minutessoastoallowashallow
but high concentration boron doping on the entire back of the wafer, thus forming a p"
layer. The residual boron glass on the surface was stripped using a borosilicate etch. The
sample was then metallized in an electron beam aluminum evaporator forming a 4500°A
thick layer of aluminum on the back. Good ohmic contact was ensured by annealing the '
sample for20minutes at4(X)°Cin an annealing furnace. Next, theoxide layeron the front
surface ofthe waferwas stripped using a bufi'ered oxide etch and halfthe sample, obtained
after cleaving the wafer along a (100) crystallographic axis, was selected for plasma etch-
lng.

Immediately before the plasma etching, the samples were dipped in 9:1 DI:I-IF

22

23

solution to remove any native oxide. This was done because silicon tends to react sponta-
neously with the oxygen in the air to form a “native” oxide. Then the samples were rinsed
for one minute in running DI water and subsequently dried with a vapor phase IPA rinse.
After etching one half of the wafer, both the unetched and etched samples were rinsed in
running de-ionized water and dipped in 9:1 Dlzl-lF solution to remove any native oxide
growth. The samples were then cleaned with boiling TCB followed by an acetone, metha-
nol and two minute DI rinse. The samples were dried using vapor phase IPA. The unetched
and etched samples were then immediately placed in the electron beam evaporator and the
setup was pumped down to 10'.7 torr. Aluminum was evaporated using a shadow mask with
holes of 1.8 and 2.6 mm diameter, to form Schottky barrier diodes. The aluminum evapo-
rated onto the surface was approximately 2400 °A thick.

It should be particularly noted that extreme care was taken to avoid any external
contamination and to ensure that the two Schottky diode samples (etched and unetched)
were identical except for the damage/efl'ects of the plasma etching. This was done to ensure
that the results of subsequent measurements on the Schottky diodes fabricated on the two
surfaces can be subject to reliable relative comparisons. The characteristics of these difier-
ent types of diodes are discussed in chapter 4. It will be seen that the extra clean control
samples, henceforth labelled type A, show remarkable uniformity and near ideal C-V char-
acteristics.

The flow chart in Figure 3.1 shows the various fabrication steps involved in the fab-
rication of the diodes. Detailed explanation of the various processes and chemicals used in
the above fabrication can be obtained from Reinhard [12]. Another set of diodes was fab-
ricated for which the degrease and demetal etch steps as well as the native oxide removal
step prior to metallizing was omitted. These diodes, labelled type B, showed non-uniform.
electrical characteristics. The electrical characteristics of these diodes are included in Sec-
tion4.2toemphasizeupontheimportanceoftheomitted steps.

 

Wafer
6-18 fl—cm

i

I Degreaseand

 

Demetal etch

 

 

oxidation at'
I DI31’0“) deg C I

 

 

Oxidefi stripped
off back I

 

 

Boron Diffusion i
on back

 

 

 

7 Metallization
of back

F

I stri‘pm oxide I

i i

 

 

I
Etch

5% SF6, -20V
0.8 mtorr, 280 watt

 

 

 

 

 

 

Remove
native Ioxide

 

 

he ”:W"

I Aluminium Evaporated on Front Using Mask I

i

I Measurements I

 

 

 

Figure 3.1 Steps involved in the fabrication ofthe etched and unetched diodes

25

3.3 Etching Procedure

The particular MPDR 325 plasma source used for this study has been described in
some detail by Musson [13]. The etching gas used in the experiment, SFg’ has been shown
byHopwood [l4] tohave ahigheretchratethanCF4. This has been speculatedto be
because ofthe availability of higher number of neutral fluorine atoms in the plasma. The
gases used in this experiment typically consisted of small fractions of SF5 mixed with
Argon. InordertoprovideaDCbias, the backofthewaferwascoated with a graphite based
conducting paint to ensure good electrical contact to the aluminum wafer holder which was
uncooled. For most of the reported results, three 3 inch diameter wafers were simulta-
neously etched in the MPDR 325 at 0.8 mer, biased at -20 volts DC, and was placed 15
cm downstream with 5% SF6 for approximately 15 minutes. Since the thrust of this
research was a comparison of analysis methods, emphasis was not placed on systematically
varying the etching conditions. When the etching was complewd, microwave power and
SF5 flow were halted but the argon was allowed to flow for approximately one minute to
help remove residual sulfur or fluorine. A more detailed description of the etching setup and
procedure can be obtained in Musson [13]. The graphite paint on the back ofthe wafers
could be easily removed using an ultrasonic bath of acetone. A type B sample was also
etched in the same plasma source but under different conditions.

3.4 DLTS experiment
3.4.1 DLTS setup

TheDLTS setupusedinordertoconducttheexperimentisinterconnectedasshown
in Figure 3.2. The whole setup has been programmed and controlled via the Hewlett-Pack-
ardlnterface Bus (HPIB). Abriefdescliptionofthevariouscomponentsandtheirintercon-
necfion is given as follows.

I) Displex refrigeration systan: This is a closed cycle refrigeration system employing

 

-‘un

3300:5825 ”SO 05 mo Bahama. x8:— N.m onE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

995 900
88.3me
x Sofie—m 8.3:

u“ \
r. aeoecoim

.895. 290 _ a 3: on

Rn huge—oh _ 0m 3w .5

0.956
>396 838 §R§e> .832 >.U 8:550 8—?—
<vmoom= lawn; <8? mm <22 m:
NIH H S V_ cm 25 _
880550 8.5

 

 

:

I 38.60 \

 

27

helium as a working medium. The system is capable of variable refrigeration between room
temperature and 10 01c The system consists of

a) The compressor module which includes a one cylinder, hermetic, oil cooled compressor
designed for use in commercial air conditioning systems. Heat developed by during com-
pressionisrejected byaheatexchangerwrappedaround thecase and securedwith high
thermal conductivity epoxy.

b) The expander module which is the refrigeration producing mechanism in the system. It
hasareciprocatingexpanderwhichisgasacnratedandgasloaded.

c) A calibrated SI 400 diode (manufactured by Scientific Instruments) whose voltage vs.
temperature characteristics are accurately known for a biasing current of 100 uamperes.
d)A 500nm heatercoil toheatthe sampletotherequired temperature.

2) Vacuum pump: The vacuum pump is required to form a good working vacuum below 5
mTorr to reduce thermal heat transfer from the sample to the case and allow efficient func-
tioning of the Displex system.

3) HP 4280A 1 Mil: C-V meter: This instrument is capable of capacitance, capacitance vs.
voltage andcapacitance vs. time measurements. In this case it is used in the C-t mode
wherein it is capable of sampling rates up to 10 useconds using an external pulse generator
and up to 10 ms using its internal pulse generator. In the “fast” transient measurement mode
the instrument is capable of measurements with up to 10 femtofarad resolution. The instru-
ment ofi‘ers up to 14 combinations of grounded or floating connection modes and a choice
of internal or external pulse bias some

4) HP 6634A DC power supply: This single output power source is capable of an output up
to 100voltsat 1 ampereclnrentThisisusedtoconuolthevoltageacrosstheheaterunitto
arrive at the desired temperature. _ _
5) HP 3457A programmable multimeter: This is used to measure the voltage across the cal-
ibrated SI diode. The software running on the PC converts this voltage to its equivalent tem-
perature and programs the power source accordingly.

6) Tehronix577curvetracer:'lhecmvetracerisoperatedintheDCmodeandsuppliesa
biasemrentoflOOuampmesreqrfiredforcmfuncfiodngofdreSImdiode.

“um-:11?

"'V'r-ul—r‘ r “1..., t.

28

7) HP 6218C DC bias source: This source sets up the quiescent conditions of the sample
by supplying a reverse bias voltage of 6 volts across the sample. Further details are given
in Section 3.4.3 under measurement details.

8) HP 1915A variable transient time output: The pulse generator is used in those measure-
mentsrequiringthesamplingratetobefasterthan 10ms. Thepulse generatorformspart
of the “connection mode 14” circuit detailed later. The pulse source is used in the external
widthmodeaftersettingitsoutputvoltage t06vppand0vofi'set. Theoutputofthis source
isterminatedinaSOohmfeedthroughloadsoastopreventanychangesintheimpedance
the HP 4280A secs.

9) IBM PC with 640 K RAM, is used as the control and programming center of this setup.
The PC is equipped with a HPIB control card. The software requirements are a Microsoft
C compiler version 5.1 and a HPIB command library version 1.1 or higher. The software is
writtenin Cand acommented listing oftheprogramformsAppendix B. The software has
beencompfledusingtheabovecompflermdhnkedwimmecomandfibmrthedemik
ofthe measurement setup is given in the Section 3.4.3 and detailed instructions to repeat
the experiment are given in Appendix A.

3.4.2 Measurement procedure

Thecryogenicunithasnotemperanueconu'olassuch.1hetempemmremeasme-
ment and control is in the form of a calibrated diode and a heater element present inside the
cryogenic unit. In view of this, the cryogenic unit is allowed to cool down to its lowest tem-
perature, reaching approximately 400K forthe vacuum pump used in this study. The 81400.
calibrated diode has an operating current of 100 uamperes which is supplied by the curve
tracer. The voltage across the diode is measured and converted to its temperature equivalent
by the controlling software. Temperature control is achieved by changing the voltage across
the internal heater element from the programmable voltage source and continuously mon-
itoringthevoltageacrossthediode.'I‘hesoftwareiscapableofmaintainingthesampleata

w-!‘. Who—'\n—m wha‘.r'__17

29

mmpmauuewimmtmnginor2°xorthedesimdvaue.Whenthedenredtempemuueis
reached,theC-tmeterisprogrammedtotake sixreadingsin intervalsoftl.

The software written for the purposes of this research requires an input file contain-
ing the number of readings to be taken and the respective temperatures at which these mea-
surements are to be made. The minimum difl‘erence between successive readings has to be
atleast2°K.Inorderthatthereadingsbetakenmosteficiently,therequiredtemperatures
shouldbeinanincreasingorderofmagniurdefilhesoftwaregoesthrough fiveiterations
before takingareadingthusenslningthatthetemperanlreiswithintheallowedmargin.The
readout is automatically written into a file and the filename of which is in increasing numer-
ical order, thereadout at the first temperature being written into filename“0”. A typical run
of the software for a set of 46 readings between 65 0K and 280 0K takes approximately 6
hours. The software has been made eflicient in the sense that it “remembers” the previous
heater voltage requirements to reach the earlier temperature and increments this value to '
efliciently reach the next higher temperature. This is the main reason why it is most eflicient
totakereadingsin anincreasingorderofmagninrde. Detailed setup andmeasurementpro—
cedmesuehstedintheappendianuddlesomcecodeispresenwdinAppendixB.

3.4.3 Measurement details

ThemainaimoftheDLTS experimentwastocomparethespectraofadevicefab—
ricated on silicon before and after etching and hence study the efi'ects of BCR etching on
‘ devicefabricationintermsofdeeptrapgeneration.Thedevicechosenforthisexperiment
was theSchottky Barrier diode. Since theSBD has acne sided junction, allof the depletion.
region is present in the semiconductor being studied. Theoretically this makes the sample
relatively easy to analyze, however, a major drawback in this approach is that DLTS on
SBDsismcapabbofdewcfingnfinmitycm'brmpsmduscase,sincemebackground
dopingmadethewaferp—type, only holetrapscouldbedetected.

AwaferwascutupintoforuquartersandSchoukybardadiodeswereformedon

30

one quarter by following the steps detailed in Section 3.2. DLTS thermal scans were done
on the sample with “tl” values being lms, 5ms, llms, l6ms and 20ms. At each of these
values six readings were taken i.e. at t1, 2t1, 3t1 etc. This led to a rich combination of tland
t2 which was manipulated on the “UNIX” system using the “NCAR” graphics plotting rou-
tine. The HP 4280A is capable of 10 fF resolution in the “fast C-t” mode of operation. The
values of (C(tp) - C(t1))/ C... were plotted as a function of temperature. A variation of less
than 2 femtofarad was ignored allowing for the last digit fluctuation of data in digital instru-
ments. It can be seen here that of the three DLTS measurement modes detailed in Section
2.4, option 2 was chosen. This was partly because of simplicity of calculation and also due
to HP 4280A measurement characteristics. However all three measurement modes can be
obtained in software by simply manipulating the readings t1 through t5 to get the best result.
For example, if the values at t1 and 4t; are considered as the first and the second value for
DLTS measurement, the difference would be 3t1 and ratio would be 4, leading to a value of
sum of 1.386. This methodology leads to the large combinations of tlltz mentioned earlier.

The second quarter was then etched following the etching procedure detailed in
Section 3.3 and SBD was formed on the top surface following the same steps used to fab-
ricate the unetched diodes. These were mounted on the DLTS setup and the same scan was
done on these. A detailed discussion of the results is done in Section 4.5.

The selection of the time “t,” was done with a lot of deliberation. The decay of the
diodejunctioncapacitanceduetoapulsedbiascanbeconsideredasbeingmadeupoftwo
components; afastnatural RC type decay ofthejunction capacitance and a factordue to
the slow decay of charge due to traps. It was the latter which was investigated for the DLTS
purposes. This leads to a search for a “t1” which is slow enough to allow the decay of the
fast transient and fast enough to catch the efl‘ects of the slow transient. A test with t1 of l .
usecond (the fastest the HP 4280A can measure) showed the efiects of the fast transient.
Afterseveral trial anderrormeasurements, thevaluesof“tl”listed above were chosen. The
value of llms was seen to highlight the desired efiects.

TheHP4280A Cmeteriscapableofanumberofdifl'erentcircuitconnections to
mfitvmiousneedsThisexpaimentcmnecwdtheunmlemmemewrandmodminsuu-

31

Table 1 Connection modes of the HP4280A CV meter

(excerpted from “4280A, thz C meter/ C-V plotter,” HP 1987)

 

 

 

   

 

 

 

 

 

 

 

 

 

DC lies External Fest Pulse
Internal Internal and Extoml Generator" and later- None
10 DC 31” 500"” ml or External at
5. lies Source
all car: all! , G“
:11
nostrils I
tor a "I; . $0 at :0 .-
csls'; this car- can
L '5 5 t ' “
r. r. L tr. e.
W081) '
ctr. or: ate 0:”;
o g n a? II g n a
fr. :3 ' a". '

 

 

 

 

‘1: Set when the PLOA‘HNG key is pressed.
’2: Set when the GROUNDBD key is pressed.
'3: Used when delay time, td, for a high peed C-t measurement is ls. than 2003.

‘4: UR monument. Used when test lead lmpatnes is to be manned {or error
carnation.

32

ments in two connection modes. The measurements which required readings for times less
than 10:13, i.e., the readings at lms and 5ms, needed the HP 1915A to supply the biasing
pulses.This setup usedtheconnection mode 14 shown inTable 1. The readings at llms,
l6msand20mscanbedoneusingtheinternalpulsegeneratorofHP4280A. Connection
mode 11, also shown in Table 1,was usedfor these readings. When theexternal pulse gen-
eratorisused,careshouldbetakentoterminatethegeneratorinaSOohmloadsoasnotto
introduce additional impedance into the circuit. Anotherprecaution is to make sure the
pulse generator does not supply a DC offset in the external width mode. Please refer to
appendix A for details about this problem.

3.5 Description of IN and C-V measurements

3.5.1 Introduction

The IN and C-V measurements can be used to obtain details of the SBDs as
described in Section 2.5. The C-V capability of the HP 4280A capacitance meter was used
to measure the CV characteristics and a semiconductor parameter analyzer, HP 41458,
was used for the I-V measurementsThe various samples used were of two sizes, the small
oneof 1.8 mmdiameterandthe largeoneof2.6mmdiameter. Ineachofthese sizes four
typesofdiodes were used; etchedandunetchedoftypesA andB. Ineachofthesecatego-
ties fourdiodes were used leading toatotal numberof32 readings. Thiswas done tomea-
sure the efl‘ect of etching on various locations of the surface and the efi‘ects of post and
preprocessingon thequality of thefinal diode. The fabrication and etching details are given
in Sections 3.2 and 3.3 respectively.

33

3.5.2 I-V measurement details

The HP 41458 semiconductor parameter analyzer used for this experiment is
designed to measure, analyze and graphically display the DC characteristics of a wide range
of semiconductor devices like diodes, bipolar transistors, field efi'ect transistm's, ICs, etc.
Amongst other accessories, it is equipped with four Source/Monitor units (SMUs), two pro-
grammable voltage source units (Vs), two programmable voltage monitor units (V m) and
a removable floppy-disc storage unit. In order to connect the instrument with user furnished
test fixtures like wafer probing stations, the instrument can be interfaced with a rectangular
connector plate equipped with four BNC connectors and four triaxial connectors which can
be used to provide the necessary electrical contacts to the sample.

For I-V measurements the analyzer was used in the “diode VF-IF” mode of opera-
tion. The analyzer was interfaced to a wafer probing station through the connector plate.
Thebaseplateofthe probing station wasusedasthe bottomcontactwhileaprobewas used
for the top contact. Since the forward bias characteristics of the Schottky barrier diode were
of interest, 100 readings were taken between 0.01V and 1V in steps of 0.01 volts. The mea-
sured values were stored in the local floppy drive and later transferred to the “UNIX” sys-
tem to be plotted using “gnuplot”. These measurements were done in a light proof
enclosure because the diodes possessed photovoltaic properties. The theory behind this
experiment is discussed in Section 2.5.3.

3.5.3 C-V rneasurernent details

ForthesemeasurementstheC-VmodeoftheHP4280Awasused.Inthismodethe
metercangenerateasingleordoublestaircasevoltage sweepfromitsinmnalbiassom'ce.
Thestart,stopandstepvolmgesfmdresmimasesweepareuserselecmblelnaddidonnhe
“hold”timeandthe“stepdelay”timearealsouserselectable.The“hold”timesetsthebias
stabilizationtimeatthebeginningandendofthebiassweepsmadewiththeinternalbias

34

sourceandthe“step delay”time sets thebias stabilizationperiod foreach stepoftheinter-
nal source. The instrument measures the capacitance after these two times.

The capacitance meter was programmed over the HPIB bus to have a “step delay”
time and“hold” time of 30 ms each. It was noticed that times less than this caused bus time-
outerrorson theHPIB. Theinstrumentwas setinconnection mode 10forthese measure-
ments. The startvoltage was setat-6v, the stopvoltage at0vand the stepat0.4 vleading
toatotalof 16readings. Itwasnoticedthatlightincreasedthe steady statecapacitance of
the device, hence all measurements were done by placing the sample in a light proof black
box. The resulting data was transfettetl to the “UNIX”‘system and used to calculate 11C2
and background doping by methods detailed in Section 2.5.2. The results of this experiment
are discussed in Section 4.2.

 

 

Chapter 4
Results

4.1 Introduction

This chapter describes the results of the electrical measurements conducted on the
Schottky barrier diodes formed on etched and unetched silicon. In addition this chapter also
discusses the results of preliminary XPS and Auger studies of etched silicon samples.

4.2 C-V characteristics before and after etching

Ideal l/c2 vs. v characteristics of Schottky barrier diodes, as discussed in Section
2.5, are straight lines and information about background doping and barrier height can be
obtained from these plots. The characteristics of diodes formed on unetched silicon with
pre-evaporation cleaning are in fact are seen to be very close to ideal as shown in Figures
4.1 and 4.2. The characteristics of the eight samples, four large ones of 2.6 mm diameter
and four small ones of 1.8 mm diameter, were all similar. This is an indication of the isot-
ropy of the surface with regard to carrier concentration and surface states as would be
expected for an unprocessed wafer. Figm'e 4.1 and Figure 4.2 show the characteristics of
the large and the small diode respectively.

The carrier concentration was calculated from the slope of the line and was found
to be in the range of 6.41 x10“ Inn3 to 6.72 x1014 /cm3 for the large diode and for the ,
small diode, between 5.87 x10“ /cm3 and 6.32 x10“ /ctn3. This difference- in the carrier
concenn'ationsascalculatedfromthetwolinescanbeattributedtotheerrorinmeasuring
thediameterofthetwosamples. Itshouldbekeptinmindthatintheformulausedtocal-
culatethedoping,thediameterofthediodcisraisedtothefourthpowerandhencesmall
umindiamewrmeasmennntcndmbemgnifiedfiuvflueofmebackgrmnddoping
calculatedfromtheC-Vplotisinagreementwiththebackgrounddopingofthechosen

35

Reverse Voltage (Volts)

 

36

 

W‘ "‘-“ “W‘7trrr=r-T ‘" f“
3‘ .

 

 

 

‘6 L 1 L 1 1 l l l
0 5e+18 1e+19 1.5e+19 2e+19 2.5e+l9 3e+193.5e+19 4e+19 4.5e+19
1/C2 (rarttdr2

Figure4.lPlotofllszszorthelargediodeformedonunechedsilicon

Reverse Voltage (volts)

37

 

0 I I I I I I I I
Small diode '—
F,

I
y—a
1
l

 

 

 

-3 - -

_4 I- q

-5 - ..

'6 1 l I l l l l l

2e+19 4e+19 6e+19 8e+19 le+201.2e+201.4e+201.6e+201.8e+20 2e+20
l/C2(farad)'2

Figure 4.2 Plot of l/(:2 vs. v for the small diode formed on unetched silicon

38

wafers. The variation of doping with distance into the wafer for the small and large diode
isplottedon the samescaleand shown inFig4.3. Theworstcasevariationinthecalculated
doping is about 5% for the large diode and 7% for the small one. the value of the intercept
of the NC2 plot with the voltage axis, V0. is the same for both the large and small diodes
and is equal to 0.7 volts. The value of Gm“, assuming an average value of 6.5 x1014 /cm3
for the background doping, can then be calculated fi'om Eq. (8), Section 2.5.2 and is equal
to 0.98 volts.

» Theimportanceofnativeoxideandotherimpmityremovalfrom the surface before
aluminum metallizing the surface is illustrated by the C-V plots shown in Figure 4.4 of
other SBDs fabricated without this step being taken. It can be seen that even though the
plots are straight lines the values vary from sample to sample. This points to the non-uni-
form nature of an uncleaned surface which leads to unpredictable results.

The CV plots of diodes formed on the etched surface are shown in Figure 4.5 and
Figure 4.6 for the large and the small sans respectively. the most noticeable aspect of the
plots are that they are no longer straight lines in spite of cleaning prior to etching and prior
to SBD formation. This leads to the conclusion that the background doping is no longer a
constant with respect to distance in the semiconductor. The plot can be considered to be
piecewise linear and the slope and hence the carrier concentration can be calculated at each
point. Figure 4.7 and Figure 4.8 show the variation of doping vs. distance for the large and
the small SBDs respectively. It is seen that there is a significant reduction of efl'ective
dopant concentration at the surface and there is a gradual rise in the efl'ective dopant con-
centration with distance into the semiconductor. It can be seen in Figm'es 4.8 and 4.9 that
for both diodes, etching has somehow caused dopant compensation to a distance of nearly
6 ttmeters. Specifically for the small diode, the doping varies from a value or 1.5 x1014 / .
cm3 at 52 ttmetets to a value of 6 ><1o“/cm3 at 6.6 umeters.

Etching produced dopant compensation has been previously reported. For example.
hydrogen has been claimed to cause carrier passivation in silicon and GaAs. Hydrogen
presentinetching gaseshasbeenshowntocausecarrierrednctionuptoadistanceofnearly
6micronsinthecaseofp-typesilicon [7] similartotheremltsshowninfigures4.7and

Bovine (limited3

7e+20

6e+20

5e+20

4e+20

3e+20

2e+20

1e+20

 

39
I I I I I
Small diode -------
+ d
l l l l l

 

 

 

le-06 1.5e-06 2e-06 2.5e-06 3e-06 3.5c-06 4e-06

Distance (meter)

Figure 4.3 Variation of doping vs. distance in the unetched diodes

i-e.?

Reverse Voltage (volts)

 

 

l L L

l

 

0.1

 

-5 1
0 5e+18

Figme 4.4 Variation of capacitance on unclean surface for two difi‘erent samples

1e+l9 l.5e+19 2e+l9 2.5e+l9 3e+19 3.5e+l9 4e+l9

l/c2 (farad)‘2

 

Reverse Voltage (volts)

41

 

 

 

 

 

0 ‘ l I l l l I

Largeetched diode --—

E“

-1 - - i
-2 — -
-3 .. ..
.4 t- .t
-5 P 4
-6 l l l l l l
5e+l9 6e+19 7e+19 8e+19 9e+l9 1e+20 l.le+20 1.2e+20

l/c2 (taradl'2

Figure 4.5 Plot of we2 vs. v for the large etched diode

Reverse Voltage (volts)

42

 

o ‘ I I I I

I
Small etched diode —

 

 

 

 

’6 l L I l l l

2.5e+20 3e+20 3.5e+20 4e+20 4.5e+20 5e+20 5.5e+20 6e+20

 

l/C2 (farad)‘2

Figure 4.6 Plot of l/C2 vs. V for the small etched diode-

Doping (meter)'3

7e+20

6e+20

5e+20

4e+20

3e+20

2e+20

1e+20

43

 

I I I I r I I

Large Etched diode —

I

I

 

 

 

J l l 1 L l l

 

4.4e-06 4.6e-06 4.8e-06 5e-06 5.2e-06 5.4e-06 5.6e-06 5.8e-06 6e-06

Distance (meter)

Figure 4.7 Variation of doping vs. distance in the large etched diode

 

7e+20 , 1 I I r r I
Small etched diode —
6e+20 r -
5e+20 '- a
4e+20 '- T
g 36+20 r e
23
.S
g. 2e+20 - -
1e+20 - t
O L l L l l l l

 

 

 

5e-06 5.2e-06 5.4e-06 5.6e-06 5.8e-06 6e-06 6.2e-06 6.4e-06 6.6e-06

Distance (meter)

Figure 4.8 Variation of doping vs. distance in the small etched diode

gum I". t “9...,"

I-s-e .

'WDh“

45

4.8. It was noticed [7] that p-type, 10 D-cm <100> silicon samples subjected to plasma
etching using a barrel type plasma system with 700 W of power at 500 mTorr for five min-
utes and to reactive ion etching (RIB) using a commercial parallel plate system at 1300 W
of power at 20 mTorr for 5.2 minutes, exhibited dopant compensation efi'ects up to a depth
of nearly 6 umeters. The RIB reactor used 75 sccm CI-IF3/9 sccm 02 while the plasma reac-
torused6OSccmC2Fg/60sccmCHF3. Itwasalsonoticedthatefl'ectson n-type silicon is
lessthanthoseonp-type. Thesamples were seentorecoveraftertenminutesofannealing
at 230 0c. Similar effects have been seen in the etching of GaAs and AlGaAs [4.15] where
hydrogen appears as a component of the etching gases. BCR etching of GaAs [4] using
CIMiz/Ar as the etchant produced dopant deactivation in n-type GaAs up to a distance of
0.3 microns. However in the present case, hydrogen has not been intentionally introduced
and the etching gas is a combination of SF5 and argon. It should also be noted that in the
etching conducted during this thesis, the bias voltage was much lower than that in the ref.
erenced material for silicon.

In terms of speculating on the possible role of hydrogen compensation in this case,
the BCR plasma etch system used in this experiment uses an oil based difl‘usion pump to
maintain low pressure. Theoilusedin thepumpis separatedfmmtheplasmachamberby
a series of baffles preventing a straight path from the oil pump to the chamber. However
some molecules ofoil will manage to reach the chamber and the plasma present there may
breaktheoilintoitsconstituents. Butinthiscasetheoilisnotahydrocarbonandhence
contains no hydrogen to cause the efl’ect seen. Another source of hydrogen could be from
theconductingpaintappliedonthe backoftheSBDinordertoformapropercontact. The
conducting paint is made up of graphite dissolved in acetone. The wafer substrate holder
wasmcooledindrisworhandaldloughthewmpaannewasnotdocumenteditwu
observedtobecomequite hot. Itmay bepossible thattheheatcausedthepaintsolventsto
bedrivenfromthefilm,connibuting hydrogen Inthatcase,thiscouldwellbeamajor
cause of the effect noticed.

Alternatively, fluorine is present in relatively large quantities as compared to
hydrogen and hasalso been known tocausecarrierreduction in highly n-type silicon. Stud-

' ltr‘.'lm-““"l—d um- ”'Lu‘r-c-r..- --
E'ui . ‘. ‘ . ’ar»’ 4' y

46

ies have shown that ion implanted fluorine [16] causes carrier reduction in highly doped n-
type silicon by bonding with arsenic or phosphorous as the case may be and thus reducing
the amount of donors available. Since fluorine belongs to group VII of the periodic table it
isstillthemostelectronegativematerialinthesetup.Usingthesameargumentasinthe
case offluorine and arsenic, it can be argued that since both boron and silicon are relatively
electropositive with respect to fluorine, the carrier reduction may be due to either a fluorine
- siliconbondorafluorine- boronbond. Boththesebondsareknowntooccurinnature
[17] and have bonding strengths of 116 i 12 and 180 3; 3 k cal/mole respectively. Since the
fluorine-boronbondhashigherbondsuengththismaybetheonebeingformed

In order to resolve this one has to test for the chemical composition of the wafer. It
is in this context that XPS and Auger introduced earlier are used. The results of these exper-

iments are discussed in Section 4.4.

4.3 I-V characteristics before and after etching

The I-V characteristics of the diodes can be used to get additional understanding of
the interface and the ideality factorofthe diodes. Thecurrent across a Schottky barrier
diode is mainly controlled by the barrier height at the metal semiconductor interface.
Changes in current can often be directly correlated to changes in barrier height. The theory
of the IV characteristics and the associated non-idealities is discussed in Section 2.5.3. Ide-
allywithIon alog scale,theI-V plotisastraightline.Theplotsofthelargeetchedand
unetcheddiodearedrawnonthesamescaleandshowninFigm'e4.9. Itcanbeimmediately
seenthattheetcheddiode actually has abetterI-V characteristic thantheunetchedone. The.
characteristics ofthe interface seems to improve after etching. The etched diode conducts
less current at lower voltages than the unetched one indicating a higher barrier height. The
valueoflo.ascalculatedfiomdteintaceptofdlesnaightfinepadonoftheI-Vcharacter-
isticofthelargeetcheddiodewiththecurrentaxis,is4><10'8amperes.ThevalueoftDBcan
then be calculawd using Eq. (12), Section 2.5.3 and is equal to 0.78 volts. The value of the

1. “We. I.m-.-u A MID—“fl
s .- _ _- .t" ’~
.9
-k‘d

.e...‘
I

w

ampere:

Current in

47

 

0'1 T I I I I I I I I

'Etched Sample' -- i
'Untched Sample' -'" .

‘ ‘vvv

0.01

0.001

“55": a: ‘.' 4 In.” M1.” .' aha-WM- ”If.”
f

Van-I __
l

0.0001 ’
le-OS _

1e-06

 

1e-07

1e-08

 

 

18-09 , I l l l I L L l l

0 10 20 30 40 50 60 70 80 90 100
- Voltage in 108-2 volts

Figure 4.91-V plots of etched and unetched diodes

48

ideality factor, n, calculated using the slope of the same straight line is found to be 1.52.
Similar calculations could not be conducted for the unetched diodes due to the absence of
a straight line portion in their I-V characteristics. The etched and unetched samples are
however very similar in all other regions. This means that the strong dopant deactivation
effect noticed in the C-V plot does not seem to translate into a strong corresponding efi‘ect
in the IN plot. In order to investigate this further, a PISCES simulation of the I-V charac-
teristics wasrun fora SBD with uniform backgrounddoping andon anotherdiode witha
non-uniform doping profile as calculated from the C-V plot for an etched structure. The
results are shown in Figure 4.10. The PISCES plot ofthe two cases seems tojustify the
above experimental observation that a large C-V change does not necessarily correspond to
a large I-V change. It is noted that since the doping as calculated from the CV plot does
not yield a complete doping vs. distance profile, i.e., the first estimate of the doping is avail-
able at 4.6 microns for the large diode, this profile had to be extrapolated to the surface. The
PISCES input file is listed in Appendix C.

The PISCES plot indicates that at lower voltages, the non-uniformly doped diode
conducts slightly more than the uniformly doped one but their characteristics are practically
identical in all other regions. This is as expected since a lightly doped junction has a larger
depletion region and hence a larger contribution to the total cru'rent because of generation
- recombination contribution to current in that region. The experiment results however indi-
cated that the unetched samples had a slightly higher current which is opposite to the simo
ulation. In contrast to the C-V results, the I-V results of the unetched diodes show
significant non-idealities. There may be due to surface phenomena which may have a large
effect on the I-V characteristics but not on the C-V behavior, since the latter probe more
deeply into the wafer. - .

Earlier experiments conducted by Hopwood [14] on the I-V characteristic of Schot-
tkybaniadiodesmdicawddmmeideahtyfacmofmeemheddiodeswaebeuermm
those ofthe unetched ones but that theetcheddiodes conducted highercurrents at lower
voltages ascompared tothe unetched onesdue toreduced barrierheights. Theseexperi-
ments were conducted ondiodesetchedin asimilarECRplasnn source butatmuch higher

ma ”will“..- “.a". .-

m4 lfii’f '. r u

(amporoalmicron)

Current

49

 

 

 

     

 

 

000001 fi I I I I I I T
E 'Non Uniform' — 1
1e-05 I Uniform ""
1e-06 { 1
1e-07 r
1e-08 I
F
1e-09 [
1e-10 I
1e-11 I 1
= l
1e-12 E 1
1e-13 I 1
: ?
16-14 g I
19-15 ’ I I I I I I 1 I
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Voltage (volts)

Figure 4.10 PISCES simulation plot of uniform and non-uniformly doped diodes

-ts .a-“u'v aunts-

m—‘T'T‘?7‘* ’fi‘cfi- ..

50

voltages (-30,-60 and -70 v). It is noted that at lower bias voltages plasma etching improved
the ideality factor but did not effect the barrier heights. This observation should indicate
that at higher bias voltages etching is deleterious to the surface leading to reduced barrier
heights and hence higher currents.

The results of this study show that damage assessment with SBDs should include
both C-V and I-V measurements since they yield complementary information. Specifically,
the I-V measurements did not indicate, either by simulation or by experiment, the deep
dopant compensation that was apparent from the C—V measurements. However they are
more sensitive to surface phenomena. It is noted that the I-V calculated barrier height for
etched diodes is less than the C-V calculated barrier height for unetched diodes. This direc-
tion of barrier height change is consistent with Hopwood’s results.

4.4 XPS and AES measurement results

Multiple XPS measurements were done but with varying results. In the first study,
XPS was done on one of the diodes fabricated on etched silicon. This experiment was con-
ducted over a large range of binding energies (0 -1100 ev) in order to get a complete picture
of all the impurities present on the surface. The initial measurement was done without any
pre-measurement sputter of the surface. The XPS spectrum for the surface is given in Fig-
ure 4.11 and the composition ofthe sin-face in atomic percentage is given in Table 2. It can
be seen that the single largest component on the surface is oxygen. This is from the native
oxide formed on the surface of the exposed silicon and possibly on the exposed aluminum.
Theothermajorcomponentofthe surfaceiscarbonanditisgenerallypresentin samples.
that are not analyzed in-situ. Another unwelcome constituent of the surface is sodium
which is present in concentrations of nearly 1 atomic percent. The major source of this con-
taminafioncouldbefi'omhumanhandhng.Peakscurespondingtoalunfinumwere seen
near lmevflhesecmrespondtodtealuminumonthesmfacecontactofthediode. Allthe
afore mentioned constituents can be reasonably explained except for the peaks correspond-

r’.’ - tw-A 8...:OK'3'I'.“ Pol-1!
.~. - ‘
. a H

51

fitfldil .. . _ A...
Futillihlrtttl inlaid”?

3283 3.2... o... .6 cocoa o... do 6,3 max :4. 2.5m

>0 fig 22-

 

 

 

 

use

 

 

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53

ingtofluorine.Fluor-inepeaksareseennear700evand lOevandthiscorrespondstoasur—
prisingly large amount of 4.11 atomic percent. The only logical source of fluorine could be
the etching gas made up of SF5. However no traces of sulfur was found on the surface. This
could be because post - etch cleaning of the sin-face of the wafer may have washed away
any sulfur deposited on it. It is also possible that the level of sulfur present is too low to be
measured by XPS. Either of these is a valid reason because even though it is known that the
wafer is nominally p—type, no boron peak was detected. Assuming the surface to be silicon
containing 5 x1022 atoms/cm3 with a boron doping of 5 xrol‘lcm3, leads a value of 1045
atomic percent. This is well below the measurement limit of XPS.

The sample was then sputtered by argon ions in vacuum for one minute correspond-
ing roughly to a depth of 500A. The XPS spectra is plotted in Figure 4.12 and the compo-
sition of the surface is given in Table 3. It was seen that the amount of carbon detected
dropped from a value of more than 25% at the surface to a value of 5.15% after sputtering.
It was however seen that the amount of oxygen had increased in percentage. It is known
that the “native” oxide'formed on the surface has a maximum thickness of 15-20 0A. There-
fore the oxygen detected after a one minute sputter could not be from SiOz. It could how-
ever have been from the A1203 formed on the surface of the aluminum contact since the X-
ray spot size seemed to include the some part of the contact. A previously unseen element
which showed up this time is copper. The source of this is the copper wafer holder used to
fasten the sample in place. The sputtering process seems to have sputtered some copper off
the wafer holder. Sodium concentration remains more or less unchanged whereas the con-
centration of fluorine actually seems to increase. The quantity of silicon shows some
increase. This is logical since we are progressing into the surface of the silicon wafer. It
seems,basedontheseresults,thatfluorinehasdifl‘usedintothewaferandispresentinlarge.
quantifies

In order to further examine the extent of fluorine difl’usion, sputtering was contin-
uedforafurthertwominutes. 'IheXPS spectraandthecorresponding elementconcentra-
tions are given in Figure 4.13 and Table 4 respectively. The major component was still
oxygen.The percentage of silicon present had nearly doubled and fluorine was still present

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58

in large quantities. Since sputtering away 6 microns at the rate of so 0A per minute would
take a long time, Auger spectroscopy of the wafer’s edge was used to obtain a depth profil-
ing of impurities in silicon. The Auger results are described later in this section. These
experiments were conducted at the Composites Center, Michigan State University and will
be collectively referred to as Experiment A.

Inordertoverifytheabove resultsanothersetofXPS scans wasconducted using
the Chemistry departrnent’s XPS equith and this will be referred to as Experiment B.
Since this equipment required samples of relatively larger size, three quarters of a wafer
which was etched simultaneously with the quarter upon which SBDs were fabricated was
selected for this experiment. However this sample did not have SBD’s formed upon it and
had not been subjected to any form of post etch cleaning. XPS results of the surface showed
measurable amounts of fluorine in addition to large amounts of carbon, oxygen and silicon.
However, the amount was fluorine detected here was less than that detected by Experiment
A. This could be due to the relative position of the difi'erent quarters in the etching cavity.
Since the sputter gun associated with this equipments was not designed for depth profiling.
sputteringhadtobeconductedforaverylongtimeinordertoobtain someideaofthecon—
centration profile. It is noted that measurable quantifies of fluorine was still present after 24
hours of sputtering with helium ions.

,A attempt was then made to obtain a depth profile of the various elements present
in the Experiment A sample using Auger Electron Spectroscopy. The sample was mounted
on its edge and a “line scan” i.e., a small spot size Auger scan of the sample perpendicular
tothesurfaceandparalleltotheedge,wasperformedonit. Initialresults seemedtoindicate
the presence offiuorine in large quantities with adepth profile as shown in Figure 4.14.
However further tests on the same sample did not yield similar results. One speculation
offered bytheExperimentAXPS operatorwasthattheelectron beamusedin this tech-
nique could have heated the sample resulting in fluorine (molecular or non-bonded) escap-
ingout. ltis notedflrattheC-VcharacterisficsofthesediodesmeasmedaftertheAuger
prooesswaeessenfianyidenficalmmepreAugachmctaisficsThiscouldmeanthm
eithaflumineisnotthecauseofdopmtcompensafiomamatfluminemuldnmescape

(We: ' 7."; ._ "n.2,...

59

from underneath the aluminum dor contaCt and hence the diode behavior is unchanged. or
that the fluorine that escaped was not the same as fluorine causing compensation, or that the
ABS effected volume is a negligible part of the total sample. It should however be kept in
mind that even though the element is undetectable by AES, it could still be present in con-
cenu'ations enough to cause a change in elecuical characteristics. Further research should
be conducted in this area. It is further noted that subsequent XPS scans, using the same
equipment as Experiment A, on the same samples failed to detect any fluorine. Further

. J
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more AES scans conducted on the samples subjected to Experiment 8 did not detect any

fluorine.

Earlier experiments conducted by Hopwood [14] used Auger spectroscopy to
obtain the surface composition of etched silicon. Scans done on an unsputtered surface
showed 0.5% fluorine as well as silicon, oxygen, carbon and sulfur. The fluorine was no-
longer present after a 3 minute argon ion sputter. It was concluded in that case that fluorine
was present only on the surface and had been removed by the sputtering. Clearly XPS and

Auger analysis of fluorine is a matter requiring further study.

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4.5 DLTS measurement results

DLTS scans were done at five difi’erent t1 values as described in Section 3.4. Figure
4.15 and Figure 4.16 show typical C-t plots at difi'erent temperatures for unetched and
etched diodes respectively. The plot of (C(t7)-C(t1))/C.. was plotted for each of the two
cases and is shown in Figures 4.17 and 4.18. It is seen that the maximum value ofthis ratio
in the case of the unetched diode is about -0.0005, approximately 0.05%. This could be due
to noise or due to the LSB fluctuation error present in digital instruments. The same calcu-
lation in the case of the etched diode yields a maximum value of 0.03 or 3%. It should be
noted in Figure 4.16 that the absolute value of the capacitance has decreased and so a sim-
ilar change in capacitance in the case of the etched diode will lead to larger value of the
ratio due to a smaller value of C...

Consequently etching produced a measurable change in transient capacitance char-
acteristics. The detectable trap density in terms of background concentration and difl'eren-
tial capacitance is given by Eq. (3), Section 2.4 and has been reproduced below for
convenience.

N -- zoo/0mg)

The 3% change in AC/C for the etched sample would correspond to an N value of approx-
imately 3 x1013 /cm3. From the post etch data, the various values of e, rm and tlltz cor-
respondingtotheplotsinFigure4.18 arecalculatedandtabulatedin'lhble 5. ltcanbe seen
that in spite of the change in the DLTS signal between the etched and unetched diodes, the
tabulated values do not provide insight about trap energy levels when evaluated by standard
DLTS analysis. Ideally a plot of In e vs. 1000/1' is a straight line, the slope of which gives
the activation energy. In this case the values do not form a straight line. TheDLTS experi—.
ments conducted on the samples failed to yield any results leading to quantitative informa-
tion about trap energies. These could be due to the following reasons:

(1) The transientcapacitancechangeisnotdue todeep states, butratherdueto some
other phenomenon which overwhelm the number of deep states. The minimum detectable
change in capacitance for the experimental setup was 0.02 pf and the background doping

 

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'..'--".'l v.5; .» ’4.-

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Temperature (kelvin)

300

250

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65

Table 5. DLTS experimental results.

 

 

 

 

 

 

 

 

t1’ t2 AC / C... rm (ms) c (ms 4) 1000/1~ (K'l)
0.01/0.02 - 0.0026 0.01443 69.314 11.11
11144 - 0.0025 23.8 0.04 12.5
80/96 - 0.0020 87.75 0.0114 13.33
1/2 - 0.0018 1.443 0.69 14.2857
25/30 - 0.0027 13.712 0.073 12.5

 

 

 

 

 

 

66

was approximately 5 x10“ lcm3. The quiescent reverse bias capacitance of the large
etched diode is nearly 100 pfat -6v bias. This leads to a value of4 x1010 states/cm3 as the
lowest demetable trap density. Earlier work done by Indusekhar et al. [18] on Nickel intro-
duced deep states in p-type silicon, indicated a lowest reported value of 1011 states/cm3. In
that case large quantities of Ni were intentionally added to silicon to examine and profile
the electrically active deep states.

(2) DLTS conducted on Schottky barrier diodes is inherently incapable of detecting
minority carrier traps. In the present case, since the diode was p—type, n-type traps were not
detectable. It is conceivable that plasma etching may be introducing deep states in the upper
half of the band gap. These would need to be detected by fabricating SBDs on n-type silicon
and subjecting them to the same steps.

(3) The states are not characterizable by a single activation energy, but are spread over
a significant energy range within the gap.

In summary, this DLTS study did not produce any quantifiable information on acti-
vation energies of deep state production on silicon due to plasma etching. DLTS, however
is more useful in profiling deep traps in iii-v and ii-vi semiconductors which inherently
have a higher density of traps.Future studies on ECR etching of iii-v rmterials may find the
DLTS method to be of value as a complementary tool for studying etch damage.

Chapter 5

Conclusions

5.1 Introduction
This chapter summarizes the major results of this study and outlines directions for

future research.

5.2 Summary of Major Results

This study applied several different methods to evaluate and quantify the effects of
plasma etching on silicon. A method often reported for this purpose in the literanlre is the
measurement of IN characteristics of Schottky barrier diodes. This study shows that the I-
V characteristics are a poor measure of one possible etching efi‘ect, namely dopant compen-
sation. For this effect, a preferred method is an evaluation of C-V characteristics. The
results of this research indicate an appreciable compensation efl‘ect, up to several umeters
depth, that is readily observable both experimentally and via simulation in CV evaluations
but not in I-V evaluations. It is recommended that etching evaluation via Schottky diodes
include both IN and C-V measurement since they provide complementary information.
The I-V characteristics are particularly sensitive to surface phenomena which efi'ect the
barrier height. The C-V characteristics reflect the efi'ect of damage at depths within the
semiconductor. For this work. with relatively low (20 V) substrate biases, the I-V charac-
teristics of the etched and unetched diodes did not vary appreciably.

Transient capacitance variations were observed on etched surfaces, but not on
unetched surfaces, which indicates that etching did cause production of a small (on the
order of 10”) number or states which can be filled and emptied by varying the applied

67

l " l

68

diode bias. However results were not interpretable in terms of standard DLTS analysis of
single activation states.

The XPS and Auger analysis indicates the presence of fluorine both on the surface
of the etched samples, and at depths of up to 150 0A. However it was not possible within
thescopeofthis studytounambiguouslyconfirmthepresenceoffluorineatseveralumeter
depths indicated for dopant compensation. It is possible that fluorine is responsible for this
effect. Alternatively, hydrogen introduced inadvertently by the sample mounting procedure g 7
may also be playing a role. . i

The results indicate clear differences between etched and unetched samples. The
various methods produced complementary results. For this study, the electrical method
which provided the most information about etching efi‘ects was the C-V methods on Schot-
tky diodes.

 

5.3 Directions for future research

This thesis did not attempt to find the effect of post-processing steps, e.g. annealing,
on the characteristics of the etched device. Further research could be done in this area. Stud-
ies done in similar cases have shown that the device characteristics return back to normal
after a thermal anneal. A comparison of CV characteristics of the device after annealing
with those before and after etching will be suflicient.

A major point of contention is the cause of carrier reduction. Even though fluorine
hasbeenknownmcwsecardermducfimincenaincaseameexpaimentsconducwdsoi
far do not conclusively prove that this is the sole cause. Even though fluorine has been
detected in large quantifies, the presence of hydrogen in the acetone used in the conductive
paint makes this evidence inconclusive.

'I‘womajorapproachestoresolvethisissuecan besuggested. Thefirstonewould

69

betoconducttheetching step withoutconductingpaint by using an RFbiasratherthan DC.
Extra care should be taken to ensure that no source of hydrogen is inadvertently introduced
into the chamber. Also substrate temperature should be varied to investigate the diffusion
of the element causing compensation. A second alternative would be to conduct other
chemical spectroscopy methods like SIMS which are sensitive to minute quantities of
hydrogen on the etched samples to resolve this issue.

DLTS measurements conducted on the p—type SBDs did not yield any quantitative
results on trap energy levels due to the possible causes listed in Section 4.5. However it is
necessary that the same approach be used on n-type diodes to determine whether any elec-
tron deep traps were introduced as a result of plasma etching. Finally, the XPS and Auger
results, while interesting, were quite preliminary. The correlation of defect effects with
their chemical and physical origins will benefit greatly by a more concerted surface science
study.

"'33

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APPENDICES

 

Appendix A
Instrumentation required

Displex dosed-cycle refrigeration system: This is a closed cycle cryogenic refrigeration
system employing helium as a working medium. The system is capable of refrigeration
betweenroomtemperature (3000K) and 100K. The systemconsistsofacompressormod—
ule with electrical controls, flexible interconnecting gas lines and an expander module. As
the systemiswatercooled, itis imperative thatrunning waterbe usedall thetime the sys-
tem is in use. Failure to do so will cause the compressor to trip due to overheating.
Vacuum pump: The pump is used to start and maintain a working vacuum for the cryo-
genic unit to operate efficiently. The cryogenic unit requires pressure below at least 5
mTorr. Note that incorrect vacuum can damage the cryogenic unit.

HP 4280A 1 MHz capacitance meter: This is designed for C-V and C-t measurements of
semiconductor devices. The meter is equipped with an internal pulse generator for pulse
bias measurement'l‘he HPIB address ofthis instrument was set to 2.

HP 3457A multimeter: The HPIB address of this instrument was set to 22. It was used to
measure the DC voltage across the calibrated SI 400 diode.

HP 6634A DC power supply: The HPIB address of this instrument was set to 5. The over-
load current protection of this device was enabled so as to prevent run away heating in the
software loop.

HP 1915A variable transient time output: This is a pulse shaper and output amplifier
housedintheI-IP 1900A pulse generatormainfr'ame.'lhisinstr'umentwasterminatedin a
500hm feed-through resistance for two reasons. The first was to ensure thatthe circuitry .
“saw”theimpedanceofthepulse sourceasSOohms'I'hesecondwastoconvertthecmrent
output ofthe HP 1915A to a voltage pulse of6 V pp upon being triggered.

Note: Some pulse generators have non zero outputs even when disabled. These should
eitherbecalibratedtozerooraswasdoneinthiscase,usingtheofl'setcapabilityofthe
instrument.

70

 

lT'
h

 

 

:

71

Tektronix 5‘77 curve tracer: The curve tracer was used in the “DC” mode to supply a 100
tramperebiasingcmrenttothe SI400diode. Even though tlrecurve tracer-maintains the
current output quite correctly, the output should be frequently checked and manually read-
justed.

HP 6218C bias source: This DC power supply was used to supply the 6 V reverse bias
acrossthedeviceundertestThecunentdemandonthispowersomceismininnlsincevery
little current flows through a reverse biased diode.

Pirani vacuum gauge: The vacuum gauge is used to measure the vacuum inside the cryo-
genic unit. The compressor of the cryogenic unit is starmd up when the instrument reads
below 5 mTorr. '

IBM PC with 640 K RAM, 5.1 Microsoft C compiler, HPIB command library version 1.1
and a HPIB interface control board. To repeat the experiment the source code listed in
appendix B will have to be compiled using Microsoft c compiler version 5.1 and linked
with the HPIB command library version 1.1 or higher.

Note: Readthrough thesourcecodefordetails oftheprogrammingoftheI-IP4280A,HP
3457A and HP 6634A.

Procedure:

1) Start up the vacuum pump and wait until the vacuum gauge reads at least 5 mTorr.

2) Start cooling water for the cryogenic unit and then start up the compressor.
3)Usethecurvetracerin DCmodetosupply 10011amperesofcurrenttotheSI400diode
and measure the voltage across the diode using the voltmeter. The voltage readout at room
temperature is approximately 1.5 volts.

4) Allow cryogenic unit to cool the sample down to a value below the lowest desired tem-
perature. .
5)OnthePCchangetothedirectorywherethedatafilesneedtobestored. Ensurethatthe
file “calib.dat” containing the SI 400 diode calibration details and the file containing the
required measurement details are present.

7) StartuptheprogramonthePC.
8)‘I'heprogramwillautomaticallytakeallthereadingsdesired. Uponexitingfromthepro—

 

 

72

gramresetall instrumentstotheirpoweron state.

Note: Ifthereadingsaretobetakensuchthatthefirstvaluehastobemeasuredbelow 10
ms then an external pulse generator will be required. This will entail some changes in the
softwareasdetailedinthe someecodc. PleaserefertotheHP4280Aprogrammingpartof
the software for further details.

Device mounting: The device was fabricated such the whole back of the wafer was metal-
lized.Thiswasdonetoensure goodohmiccontactontllemountThefrontofthedevice
wasmetallizedthrough amaskleadingtoSBDoftwodifl'erentdiameters. Refertodevice
fabrication for further details. This section details the actual mounting of the device inside
the cryogenic unit and solutions to the problems which arose thereof.

The device holder was fabricated out of copper and one contact of the holder was
the bottom metal and the other, a spring controlled blunt pin. The spring led to the device
being firmly held in the mount thus ensuring proper contact. Since the bottom of the device
holderismetaLcarehastobe taken topreventthechuckfi'omcominginelectricalcontact
with the device holder and yet have the device in thermal contact with the cold chuck tip.
An electrical contact leads to undesirable stray capacitances being present in the circuit.
Lack ofthermal contact will lead to diflerent temperatures ofthe sample and cold tip. This
problem can be resolved by mounting the device holder on some plaster of paris stuck on
torhetopofthechuckinacircularfashion.'lheemptyspace betweenthebottomofthe
device holder and the cold surface of the chuck was filled with “cryocon” conductive grease
thus ensuring the two above requirements. Though the readings are taken with the samples
“floating”, it is best to connect the body of the cryogenic unit to the ground of HP 4280A.

 

Appendix B

Source code

P‘I‘hisisthesom'cecodeofthe softwareusedtotakeDLTS measurements”
#include <stdio.h>

#include <ctype.h>

#include <c_hpib.h>

#include <stdlib.h>

short error; 517'
longisc=7; PaddressoftheHPIBboardonthePC‘V
longC4280a=702;/*addressoftheCmeterontheI-IPIBbus“! Ji‘
long C3457a = 722; /" address of the Multimeter on the HPIB bus ”I ‘
long C6634a = 705; /* address of the Power supply on the HPIB bus */
FILE *inputfile;

FILE *outputfile;

char buf[1024];

char dumrn [20];

int temp [50];

int iteration;

double I_am; P Present reading of the voltmeter ‘/
double I_wannabe; l‘ Volt equivalent of the desired reading */

int n_ofr;

float volts [400]; l" Internal buffer containing SI 400 calibration */

int limit , nofr;

 

#define SRQLINE 1
#define TRUE 1
#define FALSE 0

lttttttttittttttttt#606646t0.6.66ttttttttttttttttttttttttttttttt/
void reverse (s)
char SD;

int c,i,j;

for (i = 0,j a strlen(s) - 1; i <j; i++, j") I
c = s[i];
80] = 80];
SD] = c;
l
}

[0000000000.$00.00*#600000tit0000000....Otiitittiittfittittittttt’

void mitoa(n, s)

73

74

intn;
char SD;
[
int i, sign;
if(( sign a n) <0)
11 s -n;
i=0;
do {
s[i++] =n% 10+ ‘0’;
I while ((n/a: 10)>0);
if( sign < 0)
Sli++l =
s[i] = “0’;
reverse (s);
l

/**##***#t******¢ttit#00000##0##ttttitittitttitttttttttttttttttt,

read_temp (tempfile)

char tempfile[20];
l" reads the file containing the temperatures at which measurements are needed”

(
int i;
inputfile = fopen (tempfile.”l'”);

fscanf (inputfile,”%d\n”,&nofr);
for(i=0;i<nofr;i++)
fscanf (inputfile,”%d\n”,&temp[i]);

fclose(inputfile);
l

ltttttttfitttttttlttttit*ttttltitttttttttttttttt*ttttttttttttttttl

ini‘l' 0

I” set all the instrunrents on the bus to thier default values *I
1

error = ioreset (isc);

error_handler (error, “IORESET”);

error =- iotimeout (isc, 5.0);

error_handler (error, “IOTIMEOUT”);

error = ioclear (isc);

error_handler (error, “IOCLEAR”);

 

accccclltrnf.H.m ..c ‘1 .nnllc .FLHHIQJFV Isn‘t. till fair {rul- (it‘ll-1c}-

 

75

error -- ioclear (C4280a);
error_handler (error, “IOCLEAR”);
error = ioclear (C3457a);
error_handler (error, “IOCLEAR”);
error = ioclear (C66348);
error_handler (error, “IOCLEAR”);
l

[#00000000*ttttttdti0.0#00000¢0*it...#00000.ttttttttttttttttttt/
HP4280a_setup (tm)
int no;

1
char *codes:

I” Program the HP 4280 to the proper connection mode etc
Un comment the lines below if connection mode 11 is needed */

if (an =0)
/* codes = “CN11,I.EZ.CEI.MSI.CH1.CS”: */
codes = “CN14,LEZ,CE1,MSI,CH1,CS”;

if (tm ==1)
/"' codes = “TR3,BC,FN5,IB2,PU+6.0,VOI,_RA1,BL1,PN6,PHZOE-3,PT20E-
3,MD1,SW1”;*/

codes = ‘TR3,BC,FN5,IBO,PC+0.0,VO1,RA1,BL1,PN6,PH20E-3,P'I‘05E-3,MD1,SWl”;

error = iooutputs (C4280a, codes, strlen(codes));
error_handler (error, “IOOUTPUTS”);

}

[tittttttttfittttfitt*00000000000it.ttittttttttittfitttttittttitttt/

wait_for’_srq ()
I‘ wait for SRQ from the device before taking readings */

[
int response;

do

i
do

[ ,

error =- iostatus (isc, SRQLINE, &response);
error_handler (error, “IOSTATUS”);

1

while (response 0);

 

76

error = iospoll (042808, &response);
error_handler (error, “‘IOSPOLL");

l ,

while ((response & 1) la 1); .
printh‘response is %d \n”,response);
l

[tittiiittfifittttittt#00*0tifittfitttfitttttttitfitttt**$#****ifiiittt/

l‘pr'ogramtheHP4280A tooutputthe bufl'eredreadings */
readout (iter)

int iter;

1

char *codcs;
char *info;

char *bsinfo;

int numvalues;
int i;

char outname[20];

mitoa (iter,outname);
outputfile = fopen (outname,”w”);
printh‘filename is %s ptr is%s\n”,outname,outputfile);

volt_r'ead 0;
fprintf (outputfile,”%s”,dunun);

error = ioeoi (isc, l);
error_handler (error, “‘IOEOI”);

codes = “38?”;

error = iooutputs (C4280a, codes, strlen(codes));
error_handler (error, “IOOUTPUTS”);
numvalues =-- 1500,

error =- ioenters (C4280a. bsinfo, &numvalues);
error_handler (error, “IOEN'I'ERS");

codes = “MF?”;

error = iooutputs (C4280a, codes, strlen(codes));
error_handler (error, “IOOUTPUTS”);
numvalues - 1500;

error a ioenters (C4280a, bsinfo, &numvalues);
error_handler (error, “‘IOEN'I'ERS");

codes = “BD”;

. 'r . warm,
i

 

77

enmgu=ioouqnns((¥uuulh(xxkflhSUfifl“30d¢$»3
error_handler (error, “IOOUTPUTSW:

fprintf (outputfile,”%d\n”,iteration);
(1611000);

for(i=1;i<(iteration+ 1 );i++)

{

numvalues = 15W;

error a ioenters (C4280a, info, &numvalues);
error_handler (error, “IOEN'I'ERS");

fprintf (outputfile,”%s\n”, info);

printf (“%s\n”, info);

} .

fclose(outputfile);

l

lttfifittttttttttiitfifitttttttttttttt#00000.titttttttttttttttttttt,

double search ( itemp)

int itemp;

{

return (volts [itemp - 1]);
l

*fiitiitttt0*0000000000000itt0it0*i*0tt*ttt*****#*********#**$***/

error_handler (error, routine)
l‘reportanyI-IPIB programminger'rors‘l

int error;
char *routine;
1

char *cstring;
char ch;

' if (error != NOERR)

{

printf (“Error in call to %s \n”. routine);

printf (“ Error = %d : %s \n”, enor, errstr(erlor));
printf (“Press <RETURN> to continue: “);

. '23.; .

78

scanf (“%c”, &ch);
1
}

’tttittttitt$03..fittififitttiifittttttttttttilttittittttttitttttfitt/

read_calibdata ()
/" read the file containing SI 400 calibration data */

{ E .

int i;

inputfile = fopen ("calibdat”,”r”);

VA’FF'Ie’t“ _—.:.~ . -I

fscanf (inputfile,”%d\n”,&n_ofr);
for(i=0;i<n_ofr; i++)

{
fscanf (inputfile,”%f\n”,&volts [i]);

l
fclose(input:file);

l

ltfittttfiitittttt00itttit0it0**0ttttit0ttit.*ttfittttttttttttittttl

 

rm' 23-. V:¢.'£V‘ ."-.

delayfi)

int i;

1

int 1'“;

for(l' =0;.i <i;l' ++)
{

k=l;

l=k;

lirintf (“N”);

}

['00.0iittttttttfifiitfitttt00¢.it.0000.00.ttttttttfitittttttttttttl
/’ maintains a loop continuosly monitors the voltmeter reading and changes
the power source output to match the requirement that “I_wannabe- I_am”
be equal to 4 mv (approx 2 centrigrade) *I

maintain (itr)
int itr;

79

1
int count;
double difl’;

count = 0;

I_wannabe = search (templitrl) ;
volt_read 0;

I_am = atof (dumm);

printf (“ I AM %fI WANT %f “, I_am , I_wannabe);
if ( (I_am - I_wannabe) > 0.4) limit as limit + 1500;
if( (Lam - I_wannabe) > 0.7) limit :- limit + 4000;
set_volt0;

dell)! (3000);

volt_readO;
I_am == atof (dumm);

do {
printf (“ I AM %f I WANT %f count %d “, I_am , I_wannabe,count);

difi' a: I_am - I_wannabe ;
if (diff < 0.0 ) difl' a I_wannabe - I_am;

printf (ts %f rs, difi‘ );
set_volt0;
volt_readO;

I_am = atof (dumm);

if(difl'< 0.004 ) count++;

lwhile(count<5);

l

”00000000000000.it00$00*0*0*0*00*000*.$000000tittitttttttttifiit’

set_volt 0 '

I“ continuosly vary the voltage across the heater unit depending upon the status *I
i .

char code [20];

char mp [50];

char I"codes;

if(limit>0)
{

 

80

sprintf (code ,”%s” , “VSET “);
if(I_am>I_wannabe)limit=1imit+50;
if ( I_am < I_wannabe ) limit - limit - 75;

mitoa (limit , trnp);
SW (code 0 trnp ):
streat (code , “E-3” );
printf (“‘bs “. code);

error a iooutputs (C6634a, code, strlen(code)); g
error_handler (error, “IOOUTPUTS”); i
delay(3000); ‘.

l
}

/*#¢**0*fittttitttit*0tit#1000004000001010!tittittttttttttittttt/

POWUCHIPO

I” program the powe supply for a maximum current ouput and set the overload protection*/
{

char 1"codes;

codes=“ISET.6;OCP 1”;

error = iooutputs (C6634a, codes, strlen(codes));
error_handler (error, “IOOU'I‘PUTS”);

}

[00000000000000.00000it.00*0.#00000.#00000littitfittfltttttttttfittl

close_up ()
{

error = ioclear (isc);

error_handler (error, “IOCLEAR”);
error a ioclear (C4280a);
error_handler (mot, “IOCLEAR”);
error a: ioclear (C3457a);
error_handler (error, “IOCLEAR”);
error =- ioclear (C6634a);
error_handler (error, “IOCLEAR”);
l

[0000.00.00.0000000000000it.t000000000.0000.00000000000000000060/

 

81

volt_readO
/‘ called by the subroutines to read the DC voltage of the SI 400 calibrated diode */
1

char info [20];

char *codes;

codes = “PRESET”;

error = iooutputs (C3457a, codes, strlen(codes));
error_handler (error, “IOOUTPUTS");

rt arr-ma.

661mm):
codes = “CSB;TRIG SYN;DCV”;

error = iooutputs (C3457a, codes, strlen(codes));
error_handler (error, “IOOUTPUTS”);

 

delay(80);

error = ioenters (C3457a, info, 1);
error_handler (error, “IOENTERS”);
if ( info[0] != 45 ) info[0] = 43 ;

sprintf(dumm,”%s”,info);
}

Pittitttttttttttttttttttit*00tit.t$000044*ttttttttttttttttttt]

I" This the main program, it in invoked in the form “source filename”. The program will be
in a loop forthe number ofreadings required as mentioned in the firet line offllename. The
software rests all instruments to their power on state upon exiting

*l

min (38cm)
int argc;
char “mil:

1

int iter;

char ch;
initialize ' 0;

read—WWI ll);

82

power’_setup();
read_calibdatao;

limit = 5500;
iteration = 6;

for(iter=0;iter<nofr;iter++)
l

I-IP4280a_setup (0);

maintain (iter);

d£11060);

HP4280a_setup (1);
printf(“HP4280A SETUP COMPLETE \n”);
wait_for__srq 0; '
dclay(20);

readout (iter);

printh‘exiting loop %d \n”,iter);

l

close_upO;

l

Pttttfittiltfiittt0‘00...ititfilttttttfiitittttlfit*tfitfiitttttfitttttl

 

Title Schottky barrier .

S The wafer is non - uniformly doped with input being result of experiment
option tek ’
mesh rect nx=4 ny= 60 outf = sbdmesh

x.m n=1 l=0 r=1

x.m n=41=0.1 ml

y.m n=1 I=0 m1

y.m n=601=10 r=1

region num=1 ix.l=l ix.h=4 iy.l=l iy.h=50 silicon

region num=2 ix.l=l ix.h=4 iy.l=50 iy.h=60 silicon

elec num=l ix.l=l ix.h=4 iy.l=1 iy.h=1

elec num=2 ix.l=1 ix.h=4 iy.l=60 iy.h=60

doping reg=1 ascii inf=dope.dat

doping reg=2 p.type conc=1e19 uniform

contac num=l alum

symb newton carr=2

method rhsnorm xnonn autonr

models temp=300 srh auger conmob fldmob print

solve init outf=pn2aO-r.slv

log outf=IV-r.log

solve vstep=-0.1 nsteps=10 electsl

plot. 1d inf=IV-r.log x.ax=v1 y.ax=iZ points min=0 outf=nunif.tr
end

 

BIBLIOGRAPHY

wmwc“‘fifm new

Bibliography

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CA, 1989).
2) Wavemat inc., “Microwave Plasma Disk Reactor 325 Instruction Manual,” 1990.

3) J. Asmussen, J. Vac. Sci. Technol., A 7, 883, (1989).
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9) D. V. Lang, “Fast capacitance transient apparatus: Application to erO and O centers in
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10) L. Sharma, “Metal-Semiconductor Schottky Barrier Junctions and Their Applications,”
(Plenum press, NY,1984).

11) Edward B. Hakim, “Microelectronic Reliability,” (Vol. 1, Artech house, MA, 1988).
12) D. K. Reinhard, “Introduction to Integrated circuit fabrication,” (Houghton Mifiiin,
NY, 1987).

13) Brian Musson, “An investigation of Anisotropic etching of silicon in an Electron
Cyclotron Resonance Plasma”, Master’s thesis, Michigan State University (1991).

14) J. A. Hopwood, “Macroscopic properties of a multipolar electron cyclotron resonance
microwave - cavity plasma source for anisotropic silicon etching.” Dissertation for Ph. D.,

85

 

86

Michigan State University (1990).

15) R. Cheung, S. Thomas, I. McIntyre, C. D. W. Wilkinson and S. P. Beaumont, “Passiva-
tion of donors in electron beam lithography defined nanostructures after methane/hydrogen
reactive ion etching,” J. Vac. Sci. Technol., B, Vol. 6, No. 6, pp 1911-1915, Nov/ Dec 1988.
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implanted Silicon,” J Electrochem. Soc., Vol. 137, No. 6, pp 1918-1924, June 1990.

17) Weast, “Handbook of Chemistry and Physics,” (56"I edition, 1975-76, CRC press).
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in silicon,” J. appl. Phys. 61 (4), pp 1449-1455, Feb 1987.

19) Karl Hess, “Advanced theory of semiconductor devices,” (Prentice Hall, NJ, 1988).
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(Academic press, NY, 1972).

21) Jian H. Zhao, “Effect of Carrier Confinement by InGaAs/ GaAs Heterointerface Barrier
on Deep Trap Concentration Profiling,” IEEE Transactions on Electron devices, Vol. 37.,
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22) S. M. Sze, “Physics of Semiconductor Devices,” (2nd edition, John Wiley and Sons,
NY, 1981).

23) U. S. Kim, C. H. Wolowodiuk, and R. J. Jaccodine, “The efl'ect of Fluorine additions
to the oxidation of silicon,” J. Electrochem. Soc Vol. 137, No. 6, pp 2291-2296, July 1990.
24) Le Xu, D. K. Reinhard and M. G. Thompson, “RF sputtered Gold-Amorphous Silicon
Schottky barrier diodes,” IEEE Transactions on Electron Devices, Vol. ED-29, No. 6, pp
1004-1008, June 1982.

25) J. S. Wang, S. J. Fonash and S. Ashok, “Passivation of Dry-Etching Damage Using
Low-Energy Hydrogen Implants," IEEE Electron Device letters, Vol. Edl-4, No. 12, pp
432-435, Dec 1983.

26) Jian H. Zhao, Jyh-Chwen Lee, 2. Q. Fang, T. E. Schlesinger and A. G. Milnes, “Theo-
retical and experimental determination of deep trap profiles in semiconductors”, J. Appl.
Phys, 61(3), pp 1063-1067, Feb 1987.

"‘lllllllllllllli