IIIIIIII'II'I’r‘r

This is to certify that the

dissertation entitled

AN INTELLIGENT MICROSENSOR FOR
MONITORING ROLLING ELEMENT BEARINGS

presented by

Mark B. Chuey

has been accepted towards fulfillment
of the requirements for

Ph.D. degree in Eiect. Enqr.

 

 

"flwa/S/zwflfi“

M ajor professor

Date 11/11/93

 

MSU is an Affirmative Action/Equal Opportunity Institution 0-12771

TATE

iiiiiiiiiiii

 

LIBRARY
Michigan State
University

 

 

 

PLACE N RETURN BOX to roman thi- chockout from your record.
To A ID FINES Mum on or before date duo.

DATE DUE DATE DUE DATE DUE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AN I
MONITi

 

AN INTELLIGENT MICROSENSOR FOR
MONITORING ROLLING ELEMENT BEARINGS

By

Mark D. Chuey

A DISSERTATION

Submitted to
Michigan State University
in partial fiilfillment of the requirements
for the degree of

DOCTOR OF PHILOSOPHY

Department of Electrical Engineering

1993

AV i.\

The akin to
mixed 5} dcsi 5.1:;

1 u ‘ ' ”I
1‘)”. SCSL‘CSCCC 313.55 I
In.

a Imera‘w

*"' A ‘ "-
.2515 tommd IO «1

.fi 0 .- . r‘
u. more am CIACI ‘

PM; 1 v v ’
e: .Stntimes Osen

M~ ' '
H'Llei HTS:

stage ClE‘CITT‘

Tifl'. H
may?

~32 The out;

‘ .
1a~~ .
My _

r area to a resolL'.

.....

 

ABSTRACT

AN INTELLIGENT MICROSENSOR FOR MONITORING
ROTATING ELEMENT BEARINGS

by
Mark D. Chuey

The ability to monitor rolling element bearings with an intelligent microsensor is
examined by designing key elements of the device. The intelligent sensor contains a four-
post suspended mass microaccelerometer to sense bearing housing acceleration vibrations.
This is converted to an electrical signal through a half-active piezoresistive bridge driven
by a temperature-compensated supply. The voltage output is amplified, high-pass filtered
to remove any offset signal, and low-pass filtered. The result is digitized in a second-
order, 256-times oversampling sigma- delta modulating analog-to-digital converter. A
novel first-stage decimator, located on-chip, provides a minimum resolution of 9 bits for
monitoring. The output of the decimator can be transmitted off-chip for second-stage
decimation to a resolution suitable for diagnostic purposes or it can be put into on-chip
feature extraction logic. Feature extraction is accomplished by filtering the signal in a
programmable sixth-order IIR filter then extracting the mean squared value. This value is
compared to a programmable threshold value. An alarm signal is transmitted off-chip
when the threshold is exceeded a programmable number of times. The sensor is to serve
as one element in a plant-wide multisensor monitoring system.

A simulation of bearing housing vibrations is developed to examine monitoring
parameters. The program simulates different types of point defects and random noise

sources as well as the signal transmission path through the housing. Comparisons between

 

peak value. mean 5.1,
Eezueacies The eff:

fares are also av:

rarer: less Circuit 37-.

2123:2532 A 015 't'

a“

(’1‘

 

peak value, mean squared, crest and kirtosis measures are made for various sampling
frequencies. The effects of sampling resolution on mean squared and spectral monitoring
features are also examined.

The on—chip sigma-delta modulating analog-to-digital converter employs a novel
first-stage decimation filter. The sinc3 FIR filter uses two coefficient
generator/accumulator pairs, each alternately producing an output. The filter is shown to
require less circuit area than previous designs at a cost of reduced noise rejection and

antialiasing. A classification scheme for sinc3 filters is also provided.

No progect of
pit-fie Abrieflzstirtt

[would first '
BiaDr J Hall. D:

m...

D: M (La-”~33”

Mould also .'

 

lath";
LLOU for her [38:
r .
Speqa] thank
Tish-'1'.

0'
.. r’
—

 

 

ACKNOWLEDGMENTS

No project of this size can be completed without the help and support of many
people. A brief listing of some of those people is provided here.

I would first like to thank the members of my doctoral committee: Dr. P. D.
Fisher, Dr. J. Hall, Dr. M. Nayeri, Dr. R. Tonda, Dr. C. L. Wey and the committee chair,
Dr. M. Shanblatt.

I would also like to acknowledge the faculty of the Electrical & Computer
Engineering Department at GMI Engineering and Management Institute for their support
throughout the past eight years. Special thanks is extended to the department heads
during this period, Fred Cribbins and Dr. Dave Leffen, for their cooperation in arranging
my teaching schedule to accommodate the requirements of the doctoral program.

Many thanks to Pat Irish for producing some of the figures in Chapters 3 and 4,
Dr. Jeff Abell for proofreading the technical chapters of this dissertation, Dr. Scott
Burgett for his suggestions in the area of signal processing, and Gerald Vossler for
invaluable strategic advice.

The support and understanding of my parents, Donald and Rosemary Chuey, my
family and friends has been invaluable throughout this project. I would also like to thank
Jean Furkioti for her patience.

A special thank you is extended to Dr. Richard Tonda for his help with the
mechanical design of the microaccelerometer. Without Rick's assistance this project

would not have been possible.

iv

USI Of TABLES
LIST OF FIGIRES
CE-LlPTERl BTROZ

l l ll.-‘-.-'.E-I.“C 3.

l‘l‘“'---
a A,’

LH,.\

 

 

TABLE OF CONTENTS

LIST OF TABLES ...................................................................................................... x
LIST OF FIGURES ..................................................................................................... xii
CHAPTER 1 INTRODUCTION ................................................................................ 1
1.1 MACHINERY MONITORING ......................................................................... 1
1.2 INTELLIGENT SENSOR MONITORING SYSTEM .............................................. 4
1.3 PROJECT SCOPE ......................................................................................... 6
1.4 ASSUMPTIONS ........................................................................................... 8
1.4.1 Knowledgeable User ................................................................... 8
1.4.2 Temperature Range .................................................................... 9
1.4.3 Vibration Signal Ergodicity. ........................................................ 9
1.5 OVERVIEW ................................................................................................ 10
CHAPTER 2 BEARING VIBRATIONS .................................................................... 12
2.1 BEARING LIFE AND FAILURE ...................................................................... 13
2.2 BEARING VIBRATIONS ............................................................................... 15
2.3 VIBRATION SIGNALS AND FEATURE EXTRACTION ....................................... 18
2.3.1 Transducer Type and Location .................................................... 19
2.3.2 Signal Frequency Range .............................................................. 20
2.3.3 Signal Magnitude Range and Resolution ..................................... 20
2.3.4 Feature Extraction Methods ........................................................ 22
2.4 BEARING VIBRATION SIMULATION ............................................................. 26
2.4.1 Bearing Vibration Model ............................................................ 26
2.4.2 Simulator Input ........................................................................... 27

 

 

‘‘‘‘‘

2.4.3 Simulator Operation Details ........................................................ 30

2.4.4 Simulator Example ..................................................................... 31

2.5 SIMULATION RESULTS ............................................................................... 36
2.5.1 Feature Extraction Simulation ..................................................... 36

2.5.2 Quantization Simulation .............................................................. 40

2.6 MONITOR SYSTEM SPECIFICATIONS ............................................................ 42
CHAPTER 3 TRANSDUCER .................................................................................... 44
3.1 SUSPENDED MASS ACCELEROMETER THEORY ............................................ 44
3.1.1 Mass-Spring-Damper System ...................................................... 44

3.1.2 Transducer Geometry ................................................................. 46

3.1.3 Isotropic Beam Theory ........ 47

3 .2 FINITE ELEMENT ANALYSIS ........................................................................ 53
3.2.1 Finite Element Model .................................................................. 53

3.2.1.1 Element type ................................................................ 54

3.2.1.2 Material properties ....................................................... 54

3.2.1.3 Element size ................................................................. 56

3.2.2 Static Analysis ............................................................................ 59

3.2.3 Eigenvalue Analysis .................................................................... 62

3.2.4 Frequency Analysis ..................................................................... 63

3.3 PIEZORESISTOR .......................................................................................... 66
3.3.1 Transduction Methods ................................................................ 66

3.3.2 Piezoresistance ........................................................................... 67

3.3.3 Piezoresistor Type ...................................................................... 69

3.3.4 Piezoresistor Bridge .................................................................... 70

3.4 PERFORMANCE CHARACTERISTICS ............................................................. 70
3.4.1 Resistor Dimensional Effects ....................................................... 75

3.4.2 Resistor Temperature Effects ...................................................... 79

36}

q
3

(7‘

3. c
(HIPIERI OIL:

'4)

4.3 TREAT)"
44 Ditty.-

44.1.

 

 

 

vii

3.4.3 Beam Thickness Effects .............................................................. 81
3.4.4 Nonlinearity, Hysteresis and Repeatability ................................... 83
3.5 DEVICE CONSTRUCTION ............................................................................. 85
3.5.1 Beam Micromachining ................................................................ 85
3.5.2 Process Compatibilities ............................................................... 87
3.5.3 Packaging Benefits ..................................................................... 88
3.6 ELECTRONIC CONSIDERATIONS .................................................................. 89
3.6.1 Temperature Compensation ........................................................ 89
3.6.2 Noise Effects .............................................................................. 94
3.6.3 Amplification and Offset Reduction ............................................ 97
CHAPTER 4 OVERSAMPLING A/D CONVERTER ................................................ 100
4.1 SELECTION OF A/D CONVERTER TYPE ....................................................... 101
4.2 BASIC SDM CONVERTER OPERATION ........................................................ 102
4.2.1 Single-loop SDM ........................................................................ 104
4.2.2 Double-loop SDM ...................................................................... 106
4.2.3 Decimator ................................................................................... 108
4.2.4 Regions of Operation .................................................................. 109
4.3 TRANSDUCER SIGNAL AMPLIFICATION AND OSR CALCULATION ................ 1 12
4.4 DECIMATOR DESIGN .................................................................................. 1 17
4.4.1 Sinc3 Filter Classification and Performance ................................. 118
4.4.1.1 In—band noise ................................................................ 121
4.4.1.2 Antialiasing .................................................................. 124
4.4.1.3 Droop .......................................................................... 124
4.4.2 Sinc3 Filter Architecture .............................................................. 127
4.4.2.1 Method I architecture ................................................... 129
4.4.2.2 Method II architecture .................................................. 131

4.4.2.3 Method 111 architecture ................................................ 135

443

45 xx:

454
(PAPERS FEAT?
51 D:;..:‘:.-=; f
52 03.3.92;
53 xii-t;
54 HR F1:-
SSMSCEC
56 ONE! Ii
57 83.51113:
CHIPTER6 SYSII
6.1 SI.‘~.!‘_‘..-‘«.I

62 SISbfny’atl:

 

 

CHIPIER7 CONT}

 

7.1 C(jk‘fpfl

7.lll

 

7.17}

‘ i

71.3 ,‘

7,14}

715 l_

viii

4.4.2.3.1 H120 coefficients ........................................... 137

4.4.2.3.2 H120 second coefficient generator ................. 139

4.4.3 Filter Type and Architecture Selection ........................................ 144

4.5 ADDITIONAL ADC SYSTEM ISSUES ............................................................ 148

4.5.1 ADC System Review .................................................................. 148

4.5.2 Antialiasing filter ......................................................................... 149

4.5.3 Sigma-Delta Modulator .............................................................. 153

4.5.4 System Simulation Results .......................................................... 154

CHAPTER 5 FEATURE EXTRACTION AND DECISION LOGIC ......................... 157
5.1 DIGITAL SYSTEM OVERVIEW ...................................................................... 157

5.2 DECIMATOR TIMING AND CONTROL ........................................................... 161

5.3 ANTIALIASING FILTER ................................................................................ 163

5.4. UK FILTER ............................................................................................... 170

5.5 MS CALCULATIONANDTHRESHOLDING ....................... 174

5.6 CONTROL UNIT .......................................................................................... 180

5.7 SIMULATION .............................................................................................. 183
CHAPTER 6 SYSTEM SIMULATION ..................................................................... 187
6.1 SIMULATOR COMPONENTS ......................................................................... 187

6.2 SIMULATION RESULTS ............................................................................... 189
CHAPTER 7 CONTRIBUTIONS AND FURTHER RESEARCH ............................. 197
7.1 CONTRIBUTIONS ........................................................................................ 197

7.1.1 Intelligent Microsensors and Machinery Monitoring .................... 198

7.1.2 Bearing Simulator and Simulation Results ................................... 199

7.1.3 Microaccelerometer .................................................................... 200

7.1.4 First-Stage Decimation Filter ...................................................... 202

7.1.5 Differing Monitoring and Diagnostic Precisions .......................... 203

7.2 FURTHER RESEARCH .................................................................................. 203

APPENDIX-1 BE‘
APPENDIXB
Bl S'.'\.E‘E__‘.

 

 

 

BE l~,-'.f-‘. 3
BS R-k‘flfi-L
B4 31-1-37; I
BE ST}; .. .
86 P122.
37 B; 9.11

 

AP?E.\DI.\'C
C1 DELLKZA
C2 L'xs. .;. i
C 3 An“: 12.1:
C4 S'I‘rxzi
C5 \\'r.-:~.\;.
C6 NICE-.1?
C7 TSXR:

APPEXDIxD DII

BBUOGRAPHY

ix

APPENDIX A BEARING MODEL PARAMETERS ................................................. 206
APPENDIX B ............................................................................................................. 208
3.1 SUSPENDED MASS ..................................................................................... 208
3.2 ISOTROPIC BEAM THEORY ......................................................................... 209
3.3 RAYLEIGH'S PRINCIPLE FUNDAMENTAL FREQUENCY .................................. 213
3.4 MATERIAL COEFFICIENTS .......................................................................... 215
3.5 STRESS AVERAGE ..................................................................................... 218
B6 PIEZORESISTANCE COEFFICIENTS ............................................................... 222
B7 BEAM THICKNESS VARIATIONS ................................................................. 222
APPENDIX C ............................................................................................................. 224
C. 1 DECIMATOR FILTER REGISTER WIDTHS ...................................................... 224
C2 USE OF RIPPLE-CARRY ADDERS ................................................................ 230
C3 ANTIALIASING FILTER CHARACTERISTICS .................................................. 232
C4 SWITCHED CAPACITOR FILTER .................................................................. 234
C5 WORST-CASE ANTIALIASING ..................................................................... 239
C6 NOISE POWER ........................................................................................... 240
C.7 TSNR SIMULATION .................................................................................. 241
APPENDIX D DIGITAL BUTTERWORTH FILTERS ............................................. 247

BIBLIOGRAPHY ....................................................................................................... 253

Iabiel l'ibtatzon >
Table: Actual n. 7
152163 Actual H '

Iai§e4 Natural Ire

Iahlef P:ezores:st.

Iabéeé Offset s:

Table 9 Method ll l

Title 10 Me '

thod II
Table ll Method II

Table 12 Method II:

Table 13 Hardin are :

Table 14

 

. Relative at;

. SC fi"

her C}.

Table 15
Table 16

Table 17

- Decimator .
Antidiasir.‘

36194,” i

..1a.-iasl:;
Tm I
Lute ‘0

HR filter 114
Table

I
- PIOgramn .

l

 

21. Firs: muhé»

Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.

Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.

LIST OF TABLES

Vibration signal ranges for different bearings. ................................................ 21
Actual vs. model bearing damage indexes for no defect. ................................ 34
Actual vs. model bearing damage indexes for an OR defect. .......................... 36
Natural frequencies and modal masses. .......................................................... 63
Piezoresistance coefficients [49]. ................................................................... 69
Offset sources. .............................................................................................. 97
Input signal deviation factors. ........................................................................ 115
Hardware for Method I implementation ......................................................... 132
Method 11 HN120 logic .................................................................................. 134
Method 11 accumulator sizes. ...................................................................... 134
Method II hardware implementation. ........................................................... 135
Method 111 H120 coefficient generation, N1 = 8 ........................................... 138
Hardware for Method III Implementation. ................................................... 143
Relative area figures, A(n). .......................................................................... 146
SC filter characteristics ................................................................................ 152
Programmable init register values. ............................................................... 160
Decimator control signals. ........................................................................... 162
Antialiasing filter control signals. ................................................................. 168
Antialiasing FIR coefficients. ....................................................................... 169
IIR filter timing. .......................................................................................... 171
First multiply/accumulate operation timing. ................................................. 172

“If.“ A
at -
T.‘I «'9
1.1316...

Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.

Accumulation cycle timing. ......................................................................... 176
MS and threshold timing. ............................................................................ 176
Effects of shft[7:4] ................................................................................... 178
Effects of shft[310] ................................................................................... .178
Maximum average MS values for band-pass filter. ....................................... 193
Bearing geometry parameters. ..................................................................... 206
Bearing housing resonance parameters. ....................................................... 206
Bearing housing high-pass parameters. ........................................................ 207
Bearing contact noise parameters. ............................................................... 207
Data generation parameters. ........................................................................ 207
NISA material coefficients ........................................................................... 219
P-type 1:44 vs. temperature for 9x 1018 concentration. ................................... 224
Method I register widths. ............................................................................ 229
Method II register widths. ........................................................................... 230
Band-pass filter coefficients. ........................................................................ 250

Figxel The memo

l
Eyre: lnteIfigen: l

24.. ‘ ' '
Eyre 5 Beam: v.”
\—

Eg.re4 Bea'izz 1:23.
r.-.
1.535 Axeraze b.-

..
.w-u -
r1552

6 8835121232;
figure? NS}; NT-

Eyes ACILBJ .2:

L

Fill-'69 Am {2“
J

Care 13 Qua‘” A ’
Figure 14

 

Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.

LIST OF FIGURES

The monitoring hierarchy [1]. ...................................................................... 2
Intelligent monitoring system. ...................................................................... 4
Bearing vibration monitor. ........................................................................... 7
Bearing lifetime wear rate [13]. .................................................................... 14
Average bearing Vibration level vs. time [10]. ............................................... 16
Bearing vibration model. .............................................................................. 28
NSK / NTN 30204 bearing section [27]. ...................................................... 32
Actual [27] and simulated zero-defect bearing signals and spectra. ............... 32
Actual [27] and model defective bearing signals. .......................................... 35
Defect indexes vs. frequency. ..................................................................... 37
Comparison of normalized defect indexes ................................................... 39
Quantization effects on MS. ....................................................................... 41
Quantization effects on spectrum. .............................................................. 43
Mass-spring-damper system [35] ................................................................ 45
Overall transducer geometry. ..................................................................... 48
Beam geometry .......................................................................................... 49
Loaded beam in the four-beam accelerometer ............................................. 50
Test beam. ................................................................................................. 57
Element size effects .................................................................................... 58
Beam top stress distributions ...................................................................... 60
First six accelerometer modes. ................................................................... 64
Longitudinal stress frequency response ....................................................... 65

xii

l

l
Piezoresil

l
Pzezoreszi
Bcdge Oi

:d-ze 0L

4'. Omenszo

1“ 1'5 te:

Temper;

 

Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Figure 49.

xiii

Piezoresistor bridge. .................................................................................. 71
Piezoresistor placement .............................................................................. 72
Bridge output for dimensional changes in R1. ............................................. 76
Bridge output for dimensional changes in all resistors ................................. 76
Dimensional effects on the span and offset. ................................................ 78
it“ vs. temperature ..................................................................................... 80
Temperature effects on the bridge output. .................................................. 81
Temperature effects on the span. ................................................................ 82
Beam thickness effects on stress and fundamental fi'equency ....................... 83
Etch-stop apparatus [60] ............................................................................ 86
Accelerometer package cross-section [55]. ................................................ 88
Temperature compensating bridge supply ................................................... 91
Temperature compensation of the Span. ..................................................... 93
Approximate system noise effects ............................................................... 96
Offset reduction and amplification. ............................................................. 99
Traditional and oversampling ADC models. ............................................... 103
Single-loop SDM. ...................................................................................... 105
Conversion noise spectral density. .............................................................. 106
Effect of OSR on quantization noise. ......................................................... 107
Double-loop SDM. .................................................................................... 107
Conversion of a rail-to—rail sinusoid ............................................................ 110
Conceptualized TSNR vs. input power. ...................................................... 112
OSR effects on TSNR ................................................................................ 114
Signal gain profile. ..................................................................................... 114
OSR and gain determination ....................................................................... 116
Standard second-order SDM ADC. ............................................................ 118
H100, H010 and H001 spectra. .................................................................. 120

‘ AI") 111 a

Six Hgt

ln-bar.d r
Worst-ca
Worst-ca
Worst-ca

H131: arch:

Method I}

I
Method I

 

Deal coetl
C oetftcée'

m .
IMI‘TOIee

 

Figure 50.
Figure 51.
Figure 52.
Figure 53.
Figure 54.
Figure 55.
Figure 56.
Figure 57 .
Figure 58.
Figure 59.
Figure 60.
Figure 61.
Figure 62.
Figure 63.
Figure 64.
Figure 65.
Figure 66.
Figure 67.
Figure 68.
Figure 69.
Figure 70.
Figure 71.
Figure 72.
Figure 73.
Figure 74.
Figure 75.
Figure 76.

xiv

Six Hijk spectra. ........................................................................................ 121
In-band noise power vs. 11. ......................................................................... 123
Worst-cast antialiasing. .............................................................................. 125
Worst-case aliasing with low-pass filters. ................................................... 125
Worst-case droop, N1 = 64. ....................................................................... 126
Hijk architectures ....................................................................................... 128
Method I H120 architecture. ...................................................................... 123
Method 11 H120 architecture ...................................................................... 131
Method III H120 architecture. ................................................................... 139
Dual coefficients vs. time. .......................................................................... 140
Coefficient generator 1 circuit. ................................................................... 141
Improved coefficient generator 1 circuit. .................................................... 142
A(n) vs. quantization noise power. ............................................................. 146
ADC system block diagram. ............................................... . ....................... 148
Antialiasing filter spectrum ......................................................................... 150
Continuous and SC filter frequency response .............................................. 152
Sampling rate effects on SC filter parameters. ............................................ 153
Simulated frequency response. ................................................................... 155
TSNR vs. frequency. .................................................................................. 155
TSNR vs. input power. .............................................................................. 156
Digital logic block diagram. ....................................................................... 158
Decimator logic diagram. ........................................................................... 162
Decimator timing diagram. ......................................................................... 164
Frequency response with and without antialiasing ....................................... 167
Spectral folding with and without the antialiasing filter. .............................. 167
Antialiasing filter logic diagram. ................................................................. 168
IIR filter block diagram. ............................................................................. 171

—

 

v.-

P' v- [O

A .3.“
v

c 77
Eggre "8
figs-'6 79
ngse 30

figsre SI

nge 82

' 5
"a '
QM e. b
Pfizer‘s“.

 

 

Figure 77. MS calculation and thresholding unit circuit. .............................................. 175
' Figure 78. Control unit diagram. ................................................................................. 181
Figure 79. Simulation model hierarchy. ....................................................................... 184
Figure 80. Digital simulation output. ........................................................................... 185
Figure 81. Simulation modules .................................................................................... 187
Figure 82. Comparison of feature extraction parameters. ............................................ 190
Figure 83. Comparison of computed MS for various decimator gains. ......................... 192
Figure 84. Range of MS values for band-pass filter, N = 512. ..................................... 195
Figure 85. Range of MS values for band-pass filter, N = 2048 ..................................... 196
Figure 86. Accelerometer sensitivity vs. resonant frequency. ....................................... 200
Figure 87. Suspended mass. ........................................................................................ 208
Figure 88. Clamped-sliding beam. ............................................................................... 210
Figure 89. Crystallographic-to-model axes transformation ........................................... 216
Figure 90. Quarter beam longitudinal stress values. ..................................................... 221
Figure 91. Piezoresistance vs. dopant concentration [52]. ........................................... 223
Figure 92. 1:44 vs. temperature for p-type silicon [52]. ................................................. 223
Figure 93. Beam thickness variations. ......................................................................... 225
Figure 94. Sinc filter. .................................................................................................. 227
Figure 95. Register width simulation results. ............................................................... 230
Figure 96. Ripple-carry adder. .................................................................................... 232
Figure 97. Ripple-carry adder/subtractor. .................................................................... 234
Figure 98. System components that affect frequency response ..................................... 235
Figure 99. Antialiasing filter parameter relationships. .................................................. 237
Figure 100. System frequency response. ..................................................................... 237
Figure 101. Second-order low-pass network. .............................................................. 238
Figure 102. Switched capacitor integrators. ................................................................ 239

Figure 103. Second-order switched capacitor filter. .................................................... 239

Figure I01 First-3:.

Tia-re 105 TSNR '
nge 106 frquer

Figure I'.'. frecger

 

 

Figure 104. First-stage spectral folding. ...................................................................... 242
Figure 105. TSNR vs. simulation time ......................................................................... 245
Figure 106. Frequency response of BPF 1. .................................................................. 252

Figure 107. Frequency response of BPF 2. .................................................................. 252

The pup-es:

ITLCTCSC'LSOTS TO IT:

! ‘.L~ | ; I
haunting and a:

This Chapter

3" fl" ' g
‘“ “"3316“ 0‘ ‘Ft'g .'

I
‘ un_ L

 

-
.

 

CHAPTER 1 INTRODUCTION

The purpose of this project is to examine the feasibility of using intelligent
microsensors to monitor the health of rolling element bearings. This is accomplished
through the design of a device that incorporates a microaccelerometer, analog
conditioning circuitry, a novel analog-to-digital converter, and logic for feature extraction,
thresholding and alarm generation, all on the same substrate.

This chapter provides introductory and supporting material for a discussion of
monitoring bearings using microsensors. Section 1.1 describes the general monitoring
problem. Section 1.2 defines an intelligent microsensor and discusses the configuration of
a system employing these devices for machinery monitoring. Section 1.3 describes the
scope of this project within the general framework provided in the first sections. Section
1.4 lists the assumptions used throughout the design process. Finally, Section 1.5 presents

an overview of this dissertation.

l . 1 MACHINERY MONITORING

The purpose of monitoring is to obtain information. This information is used to
influence future decisions concerning the monitored system. The amount and type of
information required from monitoring depends on the kind of decisions to be made.

Machinery monitoring refers to the gathering of information required to make
decisions about the operating conditions and relative health of mechanical systems. These
decisions range from simple inquiries as to whether a device is operating or not to
complex issues such as quantitative predictions about firture operating parameters and

failure possibilities. The precise definition of machinery monitoring, therefore, differs
depending on the context. Figure 1 shows different levels of meaning based on the

complexity of the decision under consideration. The figure is modified from Brawley [1].

tag-est 1:ch

lnrrmwinp,
Snphiut icul Inn

I
1
Lots es: Les 6

condition, of ha” a" ;

C1? 4 '.
.~e ue‘tites that ha

1i
I CR.»

CC"~‘-~.-.
‘Muences due to

£55.”. .
3.1 to the Cost c"

23 OII‘C' .,;
l i eqt..pmem a.

 

moi '

Jig COndfti;
Tatar I

 

 

 

Highest Level Highest Level
‘I PROGNOSTIC MONITORING I
How long before something will be wrong with this component?
C
DIAGNOSTIC MONITORING ~§
m g What, if anything, is wrong with the component? m g
.S ‘3 ‘2
to .§ PERFORMANCE MONITORING E .2
g :3 How well is this component working? {33 “5
.5 ‘3‘ E: a.
:2 CONDITION MONITORING §
Is this component working properly? 5
STATUS MONITORING
Is this component working? I
LoweSi Level Lowesi Level

Figure 1. The monitoring hierarchy [1].

Monitoring rolling element bearings involves gathering information about the
condition of ball and roller bearings. Status monitoring checks for failed bearings, or
those devices that have seized. This requires very simple data and little data reduction.
However, on many pieces of machinery the sudden seizure of a bearing has catastrophic
consequences due to the force created by the rapid deceleration of rolling masses. In
addition to the cost of the bearing, there are the costs that may be incurred by the damage
to other equipment and by the unscheduled equipment down time. This makes status
monitoring a virtually useless technique for monitoring most bearings.

Condition monitoring detemrines if a bearing is perfonning at some level or within
a set of specifications. Because of the monotonic nature in which damage is accumulated
in a bearing, condition monitoring can be used to estimate the health of the device.
Condition monitoring requires extracting a sufficient amount of information to obtain a
relevant feature of the bearing, reducing the data to extract the feature, then comparing

the feature level to a threshold value.

Pert’ormanc;
Performance monk.
heath

Diagnostic :7

the hearing The

 

perrormoce merit.

74.124 -
Wag or, more spe

In Deaang life expe-

Performance monitoring is similar to condition monitoring in its data requirements.
Performance monitoring differs in that it provides a quantitative measure of the bearing's
health.

Diagnostic monitoring is used to determine the cause of any defect discovered in
the bearing. This generally requires data that is more detailed than is necessary for
performance monitoring. Further, research indicates that different bearing defects are best
diagnosed through the use of various types of data reduced using a variety of techniques
[2, 3].

Prognostic monitoring attempts to predict the future operating conditions of the
bearing or, more specifically, exactly when the bearing will fail. Due to the wide variance
in bearing life expectancy and the difficulty in obtaining direct information about the
contacting surfaces inside the bearing, no prognostic monitoring systems are commercially
available.

In addition to the level of monitoring, the frequency of monitoring is important.
Continuous monitoring requires sensors permanently attached to the machine and
dedicated data collection, reduction and analysis hardware. At the other extreme, hand-
held meters are periodically connected to machinery by maintenance personnel. The
meters may perform condition monitoring on location or may record data for future
analysis. A compromise technique uses permanently attached sensors connected to a
central monitoring processor Via multiplexed cables. This method removes the
inaccuracies introduced by hand-held devices but may result in a delay in detecting
deteriorating conditions if the degree of multiplexing is high.

An ideal solution would employ small processors at the sense point to perform
low-level, low-resolution continuous condition monitoring. When a problem is detected
and for periodic verification of operation, the sensor signal could be transmitted to a
central computer for in-depth processing on high-resolution data. Intelligent sensors offer

a mechanism for realizing such a monitoring system.

IZ ICE-LILLY

:15 mi:
pa'anerer of it
E‘mation ab
font-at comers
Id affect than.

A 1213::
flashed to the

type of machi:

‘
”IT .5 “v.4. I
- tillaggje

1.2 INTELLIGENT SENSOR MONITORING SYSTEM

As minimum requirements, an intelligent sensor is capable of measuring some
parameter of its environment, reducing the effects of cross-parameters and transmitting
information about the parameter. Additionally, it may perform signal conditioning and
format conversion, extract parameter features, make decisions based on these features,
and afi‘ect changes either directly or by communicating the results.

A monitoring system that employs intelligent sensors is pictured in Figure 2.
Attached to the machinery being examined is a group of smart sensors. Depending on the
type of machinery, the sensed parameters may include temperature, voltage, current,
vibration, acoustic emissions, speed, torque, force, chemical makeup, radiation, pressure

and particulate size. A group of sensors is connected to an interface unit through

central
intrafacility processing
network system

 

    

J’uv-V'--T—T-|

—r1-

I..- L

    

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

interface
unit .
interface
r r 0000 unit
r 10900 0000 -—
coco 0000 I-—
6000 0000 F—
intelligent 3::
S r E h- 0000
machine subsystem

Figure 2. Intelligent monitoring system.

'T

dedeated ca'eles
W: as initia'izatio.’
Once initia'
perferrrrng data g3:
corridor: is detect.
star sensor car I-
tgazed data to the
35.33. TQCJCII OIL p67?
'5 .... ”'Igent sensors is

temps-tel, for T‘ ":Ht 1'

it.“

The central .-

l

heTieen the meal:

Eif- .;

“JANOIL and re
"“~ -- .
rakes>0r \ra a PI“
314:5:

tion Pr 010C ,

Many Of The »

“”9 aStern '\
WIT-4 Is 7]

35.3] Sensors

a. ,-
'— —

|

 

dedicated cables. The interface unit provides each sensor with power and clock signals as
well as initialization parameters on startup.

Once initialized, the intelligent sensors are capable of operating autonomously,
performing data gathering, reduction and condition monitoring functions. If a change in
condition is detected, an alarm is transmitted to the interface unit. Additionally, each
smart sensor can be placed in a transducer mode, allowing it to transmit conditioned,
digitized data to the interface unit. The interface unit may collect this data, implement
data reduction, perform multivariate condition monitoring or diagnostics, reinitialize the
intelligent sensors with new parameters, and forward the data to the central processing
computer for further analysis.

The central processing system provides advanced data manipulation, coordination
between the monitoring of different machine subsystems, overall plant monitoring
initialization, and report generation. The interface units are connected to the central
processor via a plant-wide communication network, such as the MAP (Manufacturing
Automation Protocol) network [5].

Many of the high-level components required for the intelligent sensor based
monitoring system, such as the interface units and the central processor, have been
implemented [6, 7]. A major set of components that have not been designed is the
intelligent sensors.

In order to minimize the cost of the system, each intelligent sensor Should contain
common electronics for connecting to the interface unit. These electronics provide
communication buffering, power supply regulation and signal separation if common wires
are used to carry multiple signals. Since temperature is the major source of cross-
sensitivity in silicon based microsensors [8, 9], a temperature sensing circuit should also be

included.

I3 Revise”? 5‘5" I
As a bear.

loca'ized meta! fat!

:ni'~ ' ‘ ‘ -
.aire or seize> dqs‘
.\0 team;
. ..I
animated contac
iajng Success. inc'
153‘s?" ' I '
-‘ Knit m L3,] a:&.‘\
3...:
\...a.:orr. Three 1‘.“
. f
acce7er=ris
. ...L.\..n ACCC‘VQ

.R‘QI .-
a\\\le. Ome:

6T5 A C:

rC‘CeC' III Chamer "

 

 

1.3 PROJECT SCOPE

As a bearing ages, the contact between races and rolling elements produces
localized metal fatigue. This fatigue produces small subsurface cracks that may grow into
pits. The pitting of the surfaces increases contact stresses, firrther accelerating the
accumulation of damage. This damage progresses until the bearing suffers a component
failure or seizes due to excessive fiiction.

No technique has been developed for direct, in situ measurement of the
accumulated contact surface damage. Several indirect measures have been used with
varying success, including housing Vibration, housing temperature, lubricant temperature,
lubricant metal analysis, and acoustic emission. Of these, the most widely used is housing
vibration. Three types of housing vibrations can be measured: displacement, velocity and
acceleration. Acceleration is most often used due to the frequency range and cost of
accelerometers. A detailed description of rolling element bearings and their monitoring is
provided in Chapter 2.

This project concentrates on the design of critical elements unique to an intelligent
microsensor for monitoring the vibrations of rolling element bearings. A block diagram of
the sensor system is shown in Figure 3. The system is divided into two portions, signified
by the bold boxes in the figure. The top portion represents electronics common to all
intelligent sensors. The bottom portion is unique to the Vibration monitor.

The common portion contains three subsystems, a temperature sensor,
communication logic, and power and clock separation circuitry. The temperature sensor
provides a voltage output used to adjust the bridge supply for cross-parameter correction.
A possible scheme for connecting an intelligent sensor to the interface unit uses 3 wires,
combining the clock and power supply on a single cable. This requires separation circuitry
at the sensor. Communication logic passes initialization parameters from the interface unit
to the monitor on startup and passes data from the monitor back to the interface unit

during operation.

 

 

 

 

.l I " .7
:25... ..:._::::. u A I .-.::: 5.3.: (.1: v \
_ ’ A O 1. ni~= sch Ja-.~
_ . \
L _ A! .1
a
4.2:. v
23:29:12.2:3. v V~ ~T< C .4

..:..¢.I. 32:3: v v. > v.1

p.882: :2353 wctmom .m oSmE

8:038 .2:on m J

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

c2305 Q couogxm— baa—3m
wEEofiBzh 238m mats—E 5:950 86:58—08" omvcm
M. , ... a C a a
. , oEuEEE E UQ<
.2:on .288800 l RN m I A1
as? N _ 32835 2am
SEE—aEE ovoE 82:08
Saunas \
ovoE 38:88.38
I j H
2&3. bans» .
I. See I. wows. Lacs
soc—o A II I
883m BESS
033 A cog—flow
5288:8800 Cobsm ~82 38.0
A use 830m
x85
gracing—BU NEE o."
3.8m 9595 d > mm
%

 

 

 

 

 

The s
micromachise:
axifzcation
rfgjtal comer:
12w: meted
Mic The de
compensated. :
autonomous cg

The sensor components unique to the bearing vibration monitor include a
micromachined accelerometer incorporating a half-active piezoresistive bridge,
amplification and conditioning electronics, a novel sigma-delta modulating analog-to-
digital converter, programmable digital filters, feature extraction logic for calculating the
mean squared value of the filtered acceleration signal, thresholding logic, and control
logic. The device is capable of operating as either a smart accelerometer, transmitting
compensated, digitized vibration acceleration values back to the interface unit, or as an
autonomous condition monitor, comparing filtered mean squared vibration values to a

programmable threshold.

1.4 ASSUMPTIONS
Three assumptions were used in the development of the intelligent vibration
monitor. These assumptions concern the availability of a knowledgeable user, the range of

operating temperatures, and the ergodicity of the bearing vibration signals.

1.4.1 Knowledgeable User

Although the bearing monitor is considered an intelligent device, it still requires a
knowledgeable user. The user must first make decisions regarding the overall
configuration of the monitor system. Once this is accomplished, the appropriate types of
intelligent sensors must be chosen to match the needs of the machinery subsystem. Next,
the correct placement of each sensor is critical to maximizing the sensing of the desired
parameter and minimizing the effects of cross-parameters.

With regard to the intelligent vibration monitor, a knowledgeable user must
determine appropriate initialization parameters for the sensor. This requires an

understanding of the bearing configuration and potential failure modes as well as the

the titration :
In tit:

. Y J \ ~' 1
Lnoweczegr.

limitations of the sensor. The user must also be able to interpret the results produced by
the vibration monitor to determine an appropriate course of action.
In the future, it may be possible to replace the fimctions provided by the

knowledgeable user with an expert system.

1.4.2 Temperature Range

The operating temperature range assumed for this device is 20 i20 °C (68 3:36 °F).
This range is reasonable for bearings mounted on motors, fans, pumps or transmissions
located in manufacturing facilities designed for human workers.

The reason for this choice for the range of temperatures is to allow for the use of a
simple temperature compensation scheme in the intelligent bearing monitor. If a greater

range is desired, a more complicated scheme may be employed.

1.4.3 Vibration Signal Ergodicity.

The vibration signal over the life of the bearing is nonstationary. This is apparent
since a change in the signal's statistical properties over time provides an indication of
deteriorating health.

Despite the long-term nonstationary quality of the vibration signal, it is always
assumed to be stationary over short intervals [10]. This is because the bearing normally
deteriorates gradually over an extended period of time, often many years. This
assumption allows the calculation of power spectral densities for frequency analysis.

In addition to assuming the vibration signal is locally stationary, it is common to
assume the signal is locally ergodic as well. This assumption is reported to be valid due to
the "correlation between machinery vibration and defects for similar pieces of equipment"
[11]. Ergodicity allows signal statistics to be calculated from time averages instead of

ensemble averages. Hence the major reason for the ergodic assumption is the

impartiality 03'

J a .4...‘ .
owarlng L£r304uk

iscesses the natu

r qwir v- e ‘

firmemeut) for (
C napter 3

'7‘: ' ‘1‘ l

«25: atteif' V'“

In“:

.fzezoresisrix'e be
‘. l

3.1::
' Central 10:
4;. ‘

10

impracticality of obtaining data from identical pieces of machinery under identical

operating conditions.

1.5 OVERVIEW

The remainder of this dissertation is divided into seven chapters. Chapter 2
discusses the nature of bearing vibrations and presents a simulator for generating defective
and defect-free housing acceleration signals. These signals are used to examine condition
monitoring. feature extraction methods and to determine frequency and resolution
requirements for condition and diagnostic monitoring.

Chapter 3 describes the microaccelerometer. The design of a four-post suspended
mass accelerometer is followed by finite element analysis results. The half-active
piezoresistive bridge that transduces acceleration into a change in voltage is presented
next. The chapter also includes discussions on transducer construction issues and support
electronics.

A second-order sigma-delta modulating analog-to-digital converter is designed in
Chapter 4. The converter incorporates a novel first-stage decimation filter requiring less
chip area than conventional designs. The first-stage decimator provides sufficient
quantization noise reduction for on-chip condition monitoring. Output from the first-stage
may be routed off-chip for further diagnostic processing.

Chapter 5 discusses the design of the on-chip second-stage decimator, sixth-order
programmable IIR digital filter, mean squared value calculation logic, thresholding logic,
and control logic. A register transfer level simulation of the digital hardware is also
discussed.

The results of a functional simulation of the intelligent vibration monitor are
presented in Chapter 6. The simulator consists of 3 modules written in C representing the

bearing vibration source, transducer and conditioning electronics, and digital logic.

Capra .- .

further research

 

Four apper
beefing simulation
ClaptersS and 4 re

prrgammable llR .\

 

11

Chapter 7 lists the contributions resulting from this project and presents areas for
further research.

Four appendixes are provided. Appendix A lists the parameters used in the
bearing simulation of Chapter 2. Appendixes B and C provide supporting material for
Chapters 3 and 4 respectively. Appendix D contains the design of digital filters used in the

programmable IIR section of the monitor.

CHAPTER 2 BEARING VIBRATIONS

A bearing interfaces a rotating shaft to a stationary support or another rotating
mechanism. The goal of a good bearing is to sufficiently distribute the load and minimize
the fiiction between the two elements. Rolling element bearings consist of five basic parts:
the inner race, outer race, rolling elements, cage and housing. The inner and outer races
attach to the rotating shaft and the stationary support. The rolling elements fit into the
races, separating the two races and providing the transfer of load between the stationary
and rotating components. Rotating elements may be balls (spheres), or may be cylindrical,
needle, tapered or barrel rollers. Most rolling element bearings contain a cage between the
inner and outer races. The cage maintains proper spacing between the rolling elements,
provides balance, and prohibits contact between the rotating elements. The housing
surrounds and protects the bearing assembly. Throughout the remainder of this
dissertation, the term bearings will imply rolling element bearings only.

Bearings can be classified using criteria based on their construction and use. The
type of rolling element used in the bearing divides them into ball and roller bearings.
Another method of classification considers the technique for guiding the shafi, yielding
self-aligning bearings that allow for shafi misalignment and non self-aligning bearings that
do not. A third method of classifying bearings uses the supported load direction. A radial
bearing principally supports a load perpendicular to the shaft and an angular contact
(thruSt) bearing supports load along the axis of rotation as well as radially.

Regardless of the type, all bearings tend to exhibit similar deterioration patterns as
they age and wear. This wear produces vibrations that can be detected on the outside
surface of the bearing housing. A monitoring system detects these vibrations to determine
the health of the bearing.

Bearing life and failure modes, and the vibrations these modes produce are covered

12

inSections 2 l a

'i ‘ -_ “F ‘
’ 1 B:~“‘..\..\'\L- L:
One of :1

. .3 LT “ .-
u‘ ea.e~tl‘ye Iv?

13

in Sections 2.1 and 2.2. Section 2.3 contains a discussion of the issues associated with
obtaining vibration signals and the techniques for extracting salient features from these
signals. Section 2.4 presents a bearing vibration simulator and the specific bearing model
used throughout this dissertation. The results of the simulation are presented in Section
2.5. Section 2.6 develops a set of specifications for the monitor system based on the

material presented.

2.] BEARING LIFE AND FAILURE

One of the difficulties in using rolling element bearings is the large discrepancy in
the effective life of identical bearings under similar loads. This is reflected in the order of
magnitude difference between the BIO life (length of time during which 10% of all
bearings will fail) and the 890 life. Therefore, it is important to monitor the bearing to
avoid catastrophic failure and the subsequent costly unscheduled downtime, and to avoid
the other extreme of replacing perfectly useful bearings [12].

The variance in expected bearing life is partially due to the number of possible
failure modes and their varying effects. Under optimal conditions, a bearing will wear out
due to material fatigue based on the load, speed and service time. The function describing
the rate of wear for a bearing throughout its life has a bathtub shape, as shown in Figure 4.
Initially, the bearing will accumulate wear rapidly during a short breaking-in period. The
bearing should then experience a long period of low wear accumulation and low fatigue.

One principal failure mode begins as the bearing ages. Metal fatigue causes small
cracks to form below the surface of the races and/or rolling elements. These cracks
progress to the surface, breaking free small pieces of material and producing pits.
Following the initial pitting, wear accumulates rapidly due to the damage caused by the

freed particles and due to rolling surfaces impacting the pits.

 

"“3
Inr r
W‘-

 

 

uC‘
Pi’SEIESses until 'he
horn

accelerated due to

animal CUfiez-n Ss

temperames The;

14

failure

breaking-in

wear rate

 

low wear

 

 

time

Figure 4. Bearing lifetime wear rate [13].

This may create additional pitting on other surfaces and may enlarge the pits already
present, both in depth an in surface area, further increasing the wear rate. The damage
progresses until the bearing suffers a component failure or seizes due to excessive rubbing
fiiction.

The formation of bearing surface damage and subsequent bearing failure can be
accelerated due to several factors including lubrication failure, contamination, corrosion,
electrical currents, excessive preloading, vibration, incorrect mounting and excessive
temperatures. These factors tend to produce point or local defects [12, 14].

Under certain conditions, factors such as lubrication failure, brinelling (regularly
distributed indentations in the races due to excessive vibration or shock, static loading or
electric current), contamination and corrosion may cause somewhat even damage over one
or more of the surfaces simultaneously [15]. This damage, classified as a distributed

defect, also accelerates wear and greatly reduces bearing life.

installed beari:
pattern arcane
eccentric races.

The de:
source of stud}
temperature. a:
examined as p3:
commercial use

2‘ . i n'-
e..~e ofirrtr .emer

v.” 5

canons from x
.i. .
“fl can be UK”
sore

 

 

15

Another set of difficulties includes distributed defects due to faulty or improperly
installed bearings. These problems produce unusual loading distributed in a symmetrical
pattern around the bearing. Factors producing these defects include misaligned races,
eccentric races, off-size rolling elements and out-of-round components [14].

The detection of the damage and wear level suffered by a bearing has been a
source of study since the invention of the bearing. Various bearing parameters, including
temperature, acoustic emissions, lubricant debris and housing vibrations, have all been
examined as potential sources for health monitoring. Currently, the majority of systems in
commercial use are based on the analysis of housing vibrations due to the effectiveness,

ease of implementation and relatively low cost of vibration-based systems.

2.2 BEARING VIBRATIONS

Contacts between elements in a bearing produce forces that result in vibrations.
Vibrations from within the bearing are transmitted to the surface of the housing where
they can be used to determine the type and extent of damage. This section examines the
sources of vibrations in rolling element bearings and the characteristics of vibrations
resulting from internal defects.

Vibrations from new bearings generally arise from three sources. Under optimal
conditions, the main source of vibrations is the normal contact of the rotating elements
with the races. Since this contact involves rolling surfaces, the vibrations produced are
firnctions of the surface smoothness and, since these surfaces are quite smooth on new,
properly lubricated bearings, the vibration produced have the form of relatively low
amplitude, zero mean Gaussian noise [12, 16, 17]. A second source of housing vibrations
results fi'om contacts in other machinery. The vibrations are transmitted to the bearing
through the shaft or the mountings. These sources include fundamental and harmonic

shaft rotational vibrations, gear mesh vibrations, cavitation noise from pumps, blade noise

from turbines. af‘w
results from imp
dependent on the 5
As the tea:

rroughout most
paint. hcu‘m er. the
continues to deterit
The basic t
depending on the fa
cha'acreriStics is to
The ragrltude at C
to 1 kHz contains
contacting other ele.
@Pfoemarely 504;. 1

it the contacting s:

 

Vibration amplitude

 

 

Fir

(I

16

from turbines, and impacts from reciprocating equipment. A third source of vibrations
results from improperly installed or defective bearings, with the type of vibration
dependent on the specific problem.

As the bearing ages, the average level of vibration increases, as shown in Figure 5.
Throughout most of the bearing's life, the vibration level growth is gradual. At some
point, however, the bearing experiences a defect that accelerates the rate of increase. As it
continues to deteriorate, the vibration level climbs until failure occurs.

The basic characteristics of these vibrations change, as does their magnitude,
depending on the failure mode, loading and bearing usage. One method of examining the
characteristics is to consider the magnitude frequency spectrum of the bearing vibrations.
The magnitude at 0 Hz must be zero if the bearing is stationary. The range from above 0
to 1 kHz contains the repetition frequencies corresponding to defective components
contacting other elements and most vibrations from connected machinery. The range from
approximately 500 Hz to 20 kHz shows the random vibrations produced by the roughness
in the contacting surfaces and harmonics of the defect frequencies. The range above
approximately 10 kHz includes the vibrations resulting from excitation of the resonances

in the bearing [12]. These ranges vary depending on bearing type and running conditions.

failure

vibration amplitude

 

 

 

time

Figure 5. Average bearing vibration level vs. time [10].

The def‘ec
calculated if the b
race or inner race
The frequencies 0
pass frequency of
the defect is on a
The frequency of
maidens? (fit I

treaaencies [13. l

3

‘0 _C-'

O.

17

The defect repetition rates for point defects on rolling elements or races can be
calculated if the bearing geometry and shaft speed are known. If the defect is on the outer
race or inner race, each rolling element will strike the defect once per cage revolution.
The fi'equencies of the sum of the impacts due to all rolling elements are known as the ball
pass frequency of the outer race (fa) and the ball pass frequency of the inner race (fi). If
the defect is on a rolling element, it contacts both the inner and outer races alternately.
The frequency of contact with one of the races (outside) is referred to as the ball spin
frequency (fb). Below are the formulas for calculating the point defect repetition

frequencies [13, 18].

f, =521—f,[1+-g‘-’-cosd>],

P

f. =-’23/,[1—-gicos¢].

P

 

D D2
= ” 1+—i ,
f" 21), f'l 0; comb]

f, 2%],[1—%—cos¢].

P

where f, = rotating unit frequency (shaft speed) (Hz),
f,- = inner race element pass frequency (Hz),
f0 = outer race element pass fiequency (Hz),

fb = rotating element spin frequency (112),
ft = firndamental train frequency (Hz), '

n = number of rotating elements,

Db = rotating element diameter (mm),

Dp = pitch diameter (mm),

d) = contact angle.

The fundamental trair
resolve around the as
The magrutudl
fanction of the be :in
defect contacts anothc
The detected \ibratior
the housing surface
exponentially damped r
If the defect or
decajdng pulse of 5131:
though regions of \ arj
Pind the imerse of I}?
the fandarnental train r‘:
Stile the inner and out:
flue to the at

tenuation c;

Cé‘ii‘fll

t'e element is rot

a4, .
nanilated by the funds:

the ,.. . ..
additional possrbrlit}

it"; ' "' .
. “0‘8, Lausmg the \‘ibra

1 3 V
[EMU

ox Samar. f\‘
Due to the corn
1‘
centre
5 extracted f0
ailhot "
b. ...ng a signal an
hill)
erransdr
. ucer ft
, en ti
[Wu th
e t\

18

The fundamental train frequency is the speed at which the rotating elements and the cage
revolve around the axis of rotation.

The magnitude and shape of the vibrations produced by the point defect are a
function of the bearing geometry, loading, and defect location and size. When a point
defect contacts another surface, the resulting shock can be approximated as an impulse.
The detected vibration is dependent on the transmission path from the defect location to
the housing surface. A good approximation of the resulting acceleration is an
exponentially damped sinusoid [13].

If the defect occurs on the outer race, each rolling element impact will cause a
decaying pulse of similar magnitude. If the defect is on the inner race, it may rotate
through regions of varying load. This produces a series of decaying pulses, each with a
period the inverse of the inner race pass frequency and with the magnitude modulated by
the fiindamental train frequency. If the defect is on a rolling element, it will alternately
strike the inner and outer races, passing the inner race induced vibrations at a ‘weaker level
due to the attenuation caused by the signal passing through the rolling elements. Since the
defective element is rotating through areas of different loading, the magnitudes will be
modulated by the fundamental train frequency. If the rolling elements are balls, there is
the additional possibility of having the defect spin partially or completely out of the race

groove, causing the vibrations to intermittently fade or disappear.

2.3 VIBRATION SIGNALS AND FEATURE EXTRACTION

Due to the complex and random nature of bearing vibration signals, descriptive
features are extracted for use in monitoring and diagnostics. Several issues are associated
with obtaining a signal and extracting the salient features, including the type and location
of the transducer, frequency range of the transduced signal, magnitude range and signal

resolution, and the type and amount of data reduction to obtain an indication of the

hearing health

231 Transdut
JCT I

velocity. and a
desired. with
acceleration at
lfld‘ui’d
reillii'lfd for g

L. , --
trQ'dhli‘iQ mags

untied frequ.
Sinusogd 31

C(l]~ielli‘les3 l
a a ..
fikqgency

no
5‘ Preys}.

ch'OlCe in a

19

bearing health.

2.3.1 Transducer Type and Location

Three types of vibration signals have been used to monitor bearings: displacement,
velocity, and acceleration. The selection is primarily dependent on the frequency range
desired, with displacement showing the greatest sensitivity at low frequencies and
acceleration at high frequencies.

Industrial displacement transducers are usefirl to about 1 kHz, below the minimum
required for general bearing monitoring. They find use on large, slow machines where the
housing mass is significantly greater than the rotating mass resulting in vibrations at the
housing surface that may not be representative of the internal condition [19].

Industrial velocity transducers tend to be bulky, to be sensitive to cross-axis
vibrations and magnetic interference, and to have a useful frequency range up to 2 kHz
[19]. Velocity transducers have been successfully used to monitor bearings despite their
limited frequency ranges. They are reported to have a flatter frequency response to a
sinusoidal contact force than displacement transducers, which accentuate lower
frequencies, and acceleration sensors, which accentuate higher frequencies [20].

Industrial acceleration transducers have good insensitivity to cross-parameters and
a frequency range from 0 to above 10 kHz [19]. Acceleration appears to be by far the
most prevalent transduction method in the field, and has been selected as the method of
choice in a number of research articles that compare velocity and acceleration [12, 21, 22].

The location of the transducer is important in detecting defects. One of the
limitations required by most bearing designs is that the transducer must be non-intrusive.
The transducer should be located on the housing surface at a point corresponding to the

area of highest loading inside the bearing [20].

:3 2 Signal “6‘?“

The optimt
depends on the t)";
basic ranges haw
monitoring

Lon freque
isdesigned to enco
Various reports in;
tne health of a bear

High freque
tihrations that ans:

ST;

dies repon gfea

noise from externa

The curren
U56 ll] bearing m0!

lt Ari
ll \ g, in

g is used t<

lilis also fits into

mates.

20

2.3.2 Signal Frequency Range

The optimum range of frequencies for bearing vibration acceleration signals
depends on the type of bearing, application and feature extraction method used. Two
basic ranges have been identified, low frequency monitoring and high frequency
monitoring.

Low frequency monitoring extends up to between 2 and 10 kHz [23]. This range
is designed to encompass the defect repetition frequencies and their significant harmonics.
Various reports indicate that this range is suitable for extracting salient information about
the health of a bearing [17, 24, 25].

High frequency monitoring extends to 20 kHz and beyond. This range includes the
vibrations that arise when housing resonances are excited by point defect impacts. Several
studies report greater success in the high frequency range, particularly if there is significant
noise fi'om external sources [19, 21, 22].

The current available research is inconclusive as to the best range of frequencies to
use in bearing monitoring. If the bearing is operating in a relatively quiet environment or
filtering is used to remove extraneous signals, the low frequency range is appropriate.
This also fits into the present technological constraints for microaccelerometer frequency

ranges.

2.3.3 Signal Magnitude Range and Resolution

Xistris et al. claim that vibration monitors should ideally operate in the range of
0.001 g to 1000 g measured to 10 kHz [23]. This would require 20 bits of resolution, an
amount beyond the capability of most industrial-grade analog-to-digital converters. In
their own work, 12-bit accuracy was used [23].

A survey of research was conducted to obtain a range for RMS and peak
acceleration values. Table 1 presents the starting and maximum values for different

bearings under different conditions.

21

 

 

 

 

 

 

 

 

 

 

 

 

EB
88 - o8 8:2
P: 2&8 3:8 2c. : - o 883 m - m ca mo - do to mac - 3
Swan: 88 ownm 8:8
E: 88 .85 7: : 888 m - m :2 «no
88
z: 88 - 8: m - 3 no No
88 8:8 86 m: .o
.5 88 89. - 0% 8.35 m - o - M: .o - So
8:8 _
as 828 Bean om - o $ - mm N - _ 3 - 3 no - No
:8
a: 38.3 7e. 2 w 32 2.38 on - o 8m - cm om - m
=3
8: 22.26 7e. 2 w 32 29.8 on - o 28 S. :2 3.
8888.: Bowen 83m 09¢. 83% owned 858:8: “8.8: 0 Z 83:83.2 8.8: e Z
>33 9.58 888...: do as.“ 3 m5

 

 

 

 

 

 

 

.3580: 888:: 8.: 888 Rama 8:895 _ 033.

 

Tvto facts ca
variation bettteen th
test conditions Th
satish the needs for

The second i
Amongst the PMS \
maximum for any or
the MS values ll 1
from 24 to 40 dB
to cover this range

The range b!
Tsil'difed to represc:

Arctic

pnare quantiz

1 1
...4 Feature Extra
Many techr

These include the a.

a; ' 1
bill!“

sic-value indEXe

lice-dip
d It al‘d .
C. 1 “me

16]

Ol’e ‘

Kid ”ending The

22

Two facts can be obtained from an examination of the table. First, there is a large
variation between the no defect and maximum values for different bearings under different
test conditions. This implies that it is highly unlikely that any one type of device will
satisfy the needs for all monitoring situations.

The second item concerns the magnitude range required for a given bearing signal.
Amongst the RMS values, there is no more than a 31 dB variation between no defect and
maximum for any one type of bearing and test. This indicates that 6 bits are required for
the RMS values (11 bits for mean squared values). The spread of peak amplitudes varies
from 24 to 40 dB. Assuming the signal is symmetric, between 5 and 8 bits are necessary
to cover this range.

The range between no defect and maximum levels does not consider the resolution
required to represent the signal. Unfortunately, this area is not covered in the literature.

Appropriate quantization levels must be obtained through experimentation or simulation.

2.3.4 Feature Extraction Methods

Many techniques have been developed for monitoring the health of bearings.
These include the areas of spectral analysis, statistical analysis, low frequency time-domain
single-value indexes, high frequency time-domain single-value indexes, frequency-domain
trending, and time-domain trending. Several reports that compare different methods
indicate that more than one method may be required to detect impending failures [12, 15,
16].

Probably the most prevalent technique in industry is power spectrum windowing
and trending. The person implementing this technique sets maximum limits over ranges of
frequencies. An alarm is raised when a magnitude value at a frequency within a specified
range exceeds the "window" threshold value. The maximum level within each window
over a set period of time may be saved for trending analysis [15, 26].

Spectral techniques yield very good sensitivity to changes in the bearing's health,

but posse

reductior

Ir
single-ta
sensor.
defectite
Variance.

I

.1216 [3.31:

t b.

23

but possess a high degree of computational complexity and may produce very little data
reduction. These disadvantages eliminate spectral methods from consideration for use in
near-fiiture smart sensor monitors due to the silicon area required to perform the
computations and to store and process the large amounts of data produced.

In contrast, time-domain statistical indexes have simple algorithms and produce
single-valued outputs for a given time range, making them better suited to a self-contained
sensor. Their main detraction is that they generally are not as accurate at detecting
defective bearings. Four techniques were considered for use in the monitor: peak,
variance, crest and kirtosis values.

The peak value, AP, is the maximum vibration acceleration value over the given

time range. Expressed mathematically,

where a, is the 1lb acceleration value over It samples. The peak value is the easiest to
calculate, and has been studied extensively [4, 15, 16, 22, 26, 28]. Comprehensive limits
on peak levels have been determined for use as guides when examining bearings. One set,
developed at the Southwest Research Institute, partitions possible bearing conditions into

five quality grades [28]:

AI, < 0.9 g No fault
0.9 < Ar < 1.8 g Acceptable
1.8<Ap<3.6g Marginal
3.6 < A, < 7.2 g Failure probable

7.2 < Ap Danger of immediate failure.

The precise acceleration levels for each grade depend on the type of bearing being

monitored, equipment mounting, vibration fi'equencies and monitoring equipment.

Corr the ac
usage and mor
pointsin a set.
performs best
sensitive to tl
nonotonicl} as

The ta!

found as the m:

“left i is th
acceleration. ej
Ill? Second eqa;

Write can th.

24

Corrective factors must be used to compensate for variations in bearing construction,
usage and monitoring methodology [28]. Since the peak value is only one of the data
points in a set, AP is arguably the worst representative feature of the vibration signal. It
performs best under artificially introduced single-point defects [16]. The peak value is
sensitive to the load and speed 'of the monitored bearing, and may not increase
monotonicly as the bearing ages.

The variance, 62, is the second central moment of the acceleration. It can be

found as the mean square minus the square of the mean, or

 

where '5 is the mean of a. Since the bearing housing is fixed, it has zero average
acceleration, eliminating the need to calculate the mean. This leaves only the first term in
the second equality, the mean squared (MS) value, a measure of the signal power. The

variance can then be calculated as

1
M =— .2.

The MS value is the square of the commonly used root mean square (RMS) value.
It appears to be the most popular low-frequency single-value index [4, 12, 15, 16, 17, 21,
26, 27]. Of the four indexes considered, MS is the most monotonic with respect to
increasing defect magnitude, with often a slight drop in value just prior to failure [4, 12,
16, 17]. Like the peak value, MS is sensitive to variations in the load and speed.

The kirtosis value, or coefficient of kirtosis, K, is the unitless ratio of the fourth

central moment of a to the square of the variance

 

 

25

Again, if the mean is zero this expression can be simplified as

:2:
(2“?)

The kirtosis value indicates the "peakedness" of the signal. A normally distributed

K:

random variable will have a kirtosis value of three. Higher values result from signals
containing peaks. A great deal of laboratory and field work has been done on kirtosis with
mixed results [12, 15, 16, 17, 27, 29, 30]. When a point defect is intentionally introduced,
the kirtosis value can be quite large. Comparing the kirtosis values in different frequency
bands may yield trending information. As the bearing defect increases, the kirtosis values
appear to increase then decrease, with higher frequency bands increasing later in the
damage progression [12, 17]. One major advantage of kirtosis is its relative insensitivity
to load and speed variations. However, the kirtosis value may never increase in some
defect modes, such as lubrication failure, and, even when the kirtosis value trends upward
with an increasing defect, the value undergoes wild fluctuations between individual
measurements [16, 30]. The product of the RMS and kirtosis values has also been
examined with some success [16].

The crest value, C, is a unitless measure defined as the ratio of the peak value to

the stande deviation, or

Since the mean is zero, the standard deviation reduces to the RMS value. The
theory behind the crest value is similar to that of kirtosis. By examining the ratio of the
peak to the RMS, an indication of the peakedness of the signal can be obtained. Like
kirtosis, the crest value is relatively insensitive to speed and load and, also like kirtosis, it

sometimes does not indicate a significant change before failure [15, 16, 27, 30].

:4 Bo.

.. .
75').‘ W"
h, . ‘kIL u

cozcztto:
to prom

T650715

.1 J' ‘
an an
0--5n U“.

the 9,}: f3

3:" 5»
IL r ‘ O"

h—J

26

2.4 BEARING VIBRATION SIMULATION

One of the tools required for designing the vibration monitor is a source of
vibration signals representing various stages of bearing deterioration and testing
conditions. Traditionally, a test fixture is constructed and actual bearings are run to failure
to provide the necessary signals. For this project, the test method was avoided for several
reasons. First, this technique requires expensive test equipment and skilled personnel.
Second, the test fixture and measuring equipment often introduce errors. Finally, it is
often difficult to control the variance in testing parameters and defect levels.

An alternate method is to synthesize the necessary bearing vibration signals with a
computer simulation. Such a simulator was written in C as part of this project because no
suitable existing software could be located. The simulator provides signals for two
purposes, comparing various feature extraction methods and simulating the operation of
the vibration monitor. The output of the simulator is a set of data points representing the
vibration acceleration at the surface of the bearing housing and a summary display of the
data points including statistics, defect frequencies, a portion of the time signal and an
optional periodogram magnitude spectrum. The remainder of this section discusses the
model that forms the core of the simulator, describes the simulator input and operation,

and provides the bearing example used during this project.

2.4.1 Bearing Vibration Model

There are three theoretical issues related to the development of a vibration model,
the low-level background noise signal, the defect source signals, and the transmission path
between the signal generation site and the sense point.

The acceleration vibrations detected at the housing surface of a healthy bearing are
described as being "noise-like and low in level" [31]. Experimental evidence shows these
vibrations to have a zero-mean Gaussian distribution [12, 16, 17] and, hence, the mean

squared level of the noise is the variance. The measured level of the noise is dependent on

the bearit
T
litoneclte

the defec

' '
mattrmt"
‘g....ub

E

the defies
aso incri

frequenct

27

the bearing type, application, measurement frequency range and operating conditions.

The defect source signal due to a point defect can be simulated by a periodic
Kronecker delta impulse train [13]. One of the factors determining the repetition rate is
the defect location; on the outer race, on the inner race, or on a rolling element. The
magnitude of the impulse is affected by the severity of the defect as well as the loading at
the defect location. As the defect and/or loading increases, the magnitude of the impulse
also increases. Experimental evidence shows that a corresponding growth in the high-
frequency background noise level may also occur [17, 27].

The transmission path between the defect generation site and the sensing point
affects the signal in several ways. One effect is to excite resonant modes in the housing,
adding significant components to the vibration signal. The modes may be represented by
second-order systems under damped systems, with parameters experimentally determined
[13]. A second effect of the transmission path is to attenuate the signal. The amount of
attenuation is frequency dependent and may be periodically time dependent if the
generation point is moving with respect to the sense point.

A model that represents these effects is presented in Figure 6. The Gaussian
background noise source is summed with any defect sources present. The resulting signal
is passed through a set of parallel second-order underdamped low-pass and/or band-pass
filters representing the significant resonant modes of the bearing. The outputs are summed
and high-pass filtered. The high-pass filter represents the housing mounting base support
and guarantees that the average value of the signal will be zero, a required condition if the

bearing is stationary (i.e., no net acceleration).

2.4.2 Simulator Input
The program begins by requesting parameters describing the bearing, fault
conditions and simulation environment. The bearing parameters can be entered by the

user and stored in a file or can be loaded from a previously saved file.

28

88:3 own:

 

 

\

_\

L

 

 

8:08 8:883 wagom .0 8:9”:

8:88 8888 mama:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

88:8 80.8: “Eon

N22.:

 

 

 

08:8 38: 958883

AN

3x8

Beanng
and backgroun
node. the type
damping ratio 2
frstorder base
dancer and b.‘
titling element

Thfi‘

proportional l

29

Bearing variables include housing resonant mode information, bearing geometry
and background noise parameters. The number of housing modes is a variable. For each
mode, the type of second-order response, low-pass or band-pass, the resonant frequency,
damping ratio and gain are entered. Also required are the cutoff frequency and gain of the
first-order base support high-pass filter. Bearing geometry data includes the unitless pitch
diameter and ball diameter, since only their ratio is required by the program, the number of
rolling elements, pitch angle and thrust factor.

Three types of background contact noise are available: none, constant and

proportional. Expressions determining the noise variance (of) are

’0 none

(is
i

GMAG constant

 

[GMAG x (1+ nprop x Mag[0]) proportional,

where GMAG

noise base level,

nprop - noise constant of proportionality,

Mag[O]

magnitude of the first defect.

The proportional noise option models the observed increase of background noise as the
bearing deteriorates.

Up to ten point defects can be introduced into the modeled bearing. Any of the
three contact surfaces, outer race, inner race or rolling element, may be selected for each
defect. For the race defects, an angle entry locates a defect relative to other defects.
Rolling element defects are specified by a ball number and the ratio between outer race
and inner race transmission strengths. A relative magnitude for each defect is also
entered. Finally, the shaft speed is provided for calculating defect contact intervals.

The program allows for setting the simulation environmental parameters pertaining

to sampling and output. The sampling frequency (inverse of the period between generated

data points
' 11,.

Syfi'ilpl...é

spectrum c

pol
BbxemC‘l LI

reduce alias

The
represent:
noise value
Cha‘ked \\
added 10 mt.

men to .
ill-Turned
A g
laiaEIeS Usi
mom \‘ari

is

30

data points), number of samples and subsampling frequency are programmable. The
subsampling fiequency determines the sampling rate for summary statistics and the
spectrum, and must be no greater than one-third the sampling rate. A fifth-order
Butterworth filter‘with a cutoff frequency of one-third the sampling frequency is used to
reduce aliasing. The subsampling has no effect on the generated data points.

Program menu options allow the user to save the output data to a file, generate a

periodogram spectrum, and print summary data.

2.4.3 Simulator Operation Details

The simulator is time driven, with each pass through the simulation loop
representing one sampling period. If the background noise option is used, a Gaussian
noise value is generated at the start of each pass. Each of the defect generators is then
checked. When sufficient time has elapsed to trigger the defect, the impulse magnitude is
added to the signal and the next defect trigger time is calculated by adding the current time
to the repetition period. The signal is next passed, in parallel, through the second-order
housing mode filters, summed, then high-pass filtered. If the data is to be stored, it is
written to a file. The data is then subsampled, statistics are taken and an FFT is
performed. The remainder of this section presents some of the pertinent simulator details.

A Gaussian noise value is generated from twelve uniformly distributed random
variables using the Convolution Method [33]. If R,- are independent, uniformly distributed
random variables over [0,1], then the Gaussian random variables Z and Y can be formed

as

12
N(0,1): Z = ZR -6.
i=1

N(my, 6y): Y = my + Oy-Z.

correspond:
stanzas int

If rh
GET.Sll:i l 5 e5

TTT l5 per

Siefii‘tm CC

.3: .

the end 0ft

31

The housing mode filters are constructed by an impulse invariant conversion of the
second-order underdamped transfer fiinction. This method most closely represents the
response due to the impulse-like point defects. The high-pass filter and the antialiasing
filter are developed using the bilinear transformation. A design example of the bilinear
transform is included in Appendix D.

Before the beginning of the simulation loop, the loop count is increased to include
an additional 0.1 seconds of simulation time, based on the sampling frequency. Data
corresponding to the first 0.1 seconds of operation is not saved nor used to calculate
summary information to allow for initialization of the filters.

If the spectrum option is selected for inclusion in the display, the power spectral
density is estimated by periodogram averaging [33]. Once initialization has occurred, an
FFT is performed on each successive set of 1024 samples producing the complex

spectrum coefficients A(k), for

fk = £122, k = o,1,2...1023,
1024

where fab is the subsampling frequency. The periodogram average, I( f k ), calculated at

the end of the simulation, is

ice): 1 ZlAak)’,

 

 

1024L

where L, the number of periodograms averaged, is determined by the number of data
points generated and the ratio of the subsampling frequency to the sampling frequency.

The first 512 coeficients of I(f,,) are displayed as the spectrum.

2.4.4 Simulator Example
The simulation of an actual bearing provides a means for comparing feature

extraction methods and provides an input for simulating the monitor. The parameters

32
15.25 _

 

   
 

Ff inner race

47
20 mm

.IL. % roller element
outer race

Figure 7. NSK / NTN 30204 bearing section [27].

 

 

 

used for the simulation are from a type NSK / NTN 30204 tapered roller bearing as
reported by Howard and Stachowiak [27]. The 30204 is a general purpose, medium duty
bearing that may find use, for example, as a motor shaft guide [34] This type of bearing
was chosen because it appears to lend itself well to the working range of the monitor as
specified and due to the detailed information available. Figure 7 shows a cutaway view of
the bearing and relevant dimensions. Appendix A contains a complete listing of the
bearing parameters used for the model.

The bearing was tested at a shaft speed of 2000 rpm and an axial load of 295 N in
a fixture that isolated the drive unit vibrations from the bearing. The radial housing
vibrations were measured with a Bruel and Kjaer model 8309 piezoelectric accelerometer.
The output was amplified and low-pass filtered with a B&K type 2635 charge amplifier
before sampling at 116.2 kHz. High frequency tests were conducted with a cutoff
fiequency of 30 kHz. The resulting spectrum revealed housing resonances at 2.2, 11.3,
18.2, 26.8 and 35.2 kHz within the measured range.

Ft EFEFF ..=a..w.L-.+. 11.5333 r hrbipi . re s... akrPaE nil : it >52 -7: : 5.: 3:75:13: ”33.8’94. flaiiiixi & grgi ti}:

33

.88on :8 mficmfi match: 808888 88:86 28 Fm: 8894.

 

 

 

 

mm 3.2V 88:58: o
T
£2225
88808 88:88 wood
.. om-
A83 08:

5.: .2

2,2, _2. .2 T. :2; , 2” _____..... E .2 :2“ _ L. +2.21: , ”:222_m2.22.d..22,,2.r12:22.12.“ :3, . . 2 NM?
.2
4

name 8838 on

 

.m 2&8

mm 38 8882: o

 

 

 

858% :88
2. cm.
88: 0:5 ..
3.:
.:
1.. _ .222 2 2: : ~88

 

name 338 .. on

Figur
and the arm
sampling rat:

kHz. Then

actual test

Bmem'onh
L‘Jeefects 01

Tabl:
and kirtosis
ms The in

The .
DOICh On 11;“
“figmmde Q
of 3.3130 I

“mm
”1‘

. fies 1h

/

1321

A [7

/

"1
(D
l/;
r ¢

 

/:<

34

Figure 8 presents a comparison of the time signals and spectra from the simulator
and the actual bearing. The actual bearing graphs are from [27]. The model used a
sampling rate of 2.56 Mhz, 143,360 sampling points and a subsampling frequency of 174
kHz. The number of sampling points and subsampling frequency were chosen to match
actual test conditions. The background noise variance (GMAG) was set at
2.93x10‘5. For the purpose of this comparison, a second-order, bilinear transformed
Butterworth filter with a cutoff frequency of 30 kHz was added to the model to simulate
the effects of the charge amplifier.

Table 2 compares three vibration acceleration feature indexes, RMS, crest factor
and kirtosis factor, of the actual bearing as reported in [27] and five simulation model
runs. The indexes are presented here for comparison purposes.

The effects of a point defect were created in the actual bearing by introducing a
notch on the outer race (OR). This was modeled in the simulation by a relative defect
magnitude of 0.0022 and by using varying noise with a constant of proportionality (nprop)
of 300.0. Figure 9 shows the time signal for the actual and model bearing. Table 3

compares the damage indexes.

Table 2 Actual vs. model bearing damage indexes for no defect.

 

 

 

 

 

 

 

 

 

 

 

 

Damage Actual Simulation
Index Test run #1 run #2 run #3 run #4 run #5
RMS 4.91 5.77 5.93 5.66 5.66 5.88
Crest Factor 4.19 4.11 4.26 5.32 3.77 3.73
Kirtosis 3.11 3.00 3.08 3.08 3.08 3.06

 

 

1 a ‘1
~l~l I ~
-
F"
p\
A

Fin

\

35

{.1l1‘lli. 11 l 11'. 3 . ..
. I 'Hyrift'ttll l"'ln Wm

 

acceleration (m/32)

 

 

time (s)

 

-50 ‘-

a) actual signal [27].

 

 

 

acceleration (mls’)

time (s)

 

 

 

b) simulation signal.

Figure 9. Actual [27] and model defective bean'ng signals.

 

 

36

Table 3. Actual vs. model bearing damage indexes for an OR defect.

 

 

 

 

 

 

 

 

 

 

 

 

Damage Actual Simulation
Index Test run #1 run #2 run #3 run #4 run #5
RMS 8.75 8.66 8.53 8.61 8.81 8.50
Crest Factor 6.45 6.69 7.84 6.74 7.08 7.50
Kirtosis 6.15 5.14 6.20 5.04 5.32 5.50

 

 

2.5 SIMULATION RESULTS

This section summarizes the results obtained from the bearing simulator to
compare defect indexes and to consider the effects of quantization. The model uses the
NSK / NTN 30204 bearing parameters described in Section 2.4 and summarized in
Appendix A. An outer race point defect and a shafi speed of 2000 rpm resulted in a
defect repetition frequency of 207 Hz (f0). For each of the test cases, a sampling rate of
2.56 million samples per second was used, and a sufficient number of samples were

generated to result in an output sample size of 640 for each subsampling frequency.

2.5.1 Feature Extraction Simulation

A series of simulations produced data useful for examining the effect of frequency
on the damage indexes. A fifih—order Butterworth low-pass filter with a cutoff frequency
one-third of the subsampling frequency limits the subsampled data to frequencies between
100 Hz and 40 kHz in various runs. Ten sets of results with no defect (0.000 defect
magnitude) were analyzed to produce the standard deviation values expected for healthy
bearings. One set was obtained at each of six relative defect magnitude levels fi’om no
defect to 0.005, the approximate border between the marginal and failure probable grades

as estimated using the peak value comprehensive limits discussed in Section 2.3.4. The

mean sq
therefore.
results an

C .-
Fira. cres
from belt:
:30 range

bélO‘J.‘ the

37

mean squared and peak values increase as the subsampling frequency increases and,
therefore, the values are normalized to the average of the ten zero-defect runs. The
results are summarized in Figure 10.

Conclusions for each index type can be drawn by examining the simulation results.
First, crest is a relatively poor index of the bearing's health. The range of values extends
from between 3 and 4 for no defect to just under 7 for the best-case high defect, and the
i30 range is about 2. Also, the measure is insensitive to increasing damage at frequencies
below the housing resonant frequencies.

Kirtosis is a better indication of relative health than the crest factor. The kirtosis
ranges fiom 3, indicating a Gaussian distribution of values, to a maximum of 11.5 at 30.5
kHz. As with the crest factor, the kirtosis value only indicates a deteriorating condition at
frequencies containing housing resonances.

The normalized peak value is a better indicator than kirtosis over the entire range
of frequencies simulated. A factor change of about 3.5 at low frequencies up to 6 at high
frequencies occurs between the zero-defect and severely damaged bearing. Some
nonmonotonicity with respect to an increase in defect magnitude can be observed.

The mean squared value is the best defect index. Normalized values for the 0.005
relative defect magnitude range from about 9 at high frequencies up to 18 at the defect
repetition frequency. The normalized MS value is the best measure around the defect
frequencies, has the smallest relative :30 range, and exhibits the best monotonicity with
respect to increasing defect magnitude.

As an indicator of bearing health, the most important factor for an index is the
change from no defect to the current defect level. Figure 11 presents a comparison of the
indexes with each normalized to the average zero-defect level. Two graphs are provided:
one with a 0.002 relative defect magnitude, the comprehensive magnitude border between
acceptable and marginal grades, and one with a 0.005 defect magnitude, the border

between marginal and failure probable grades. The mean squared index provides the best

Sl‘t P 9*

 

38

.553on .3 886?: ~8me .2 ousmfi

Aura 3:033.“

I h P

N

 

 

 

.8363 “8.3% Sun Sea
32333 235% m a
32... 3.83 83m
306 II wood
mood é... Sod l
Bed 1! coed I
395:»? 683 333:
9.595

 

 

e .2. .2. .8 ...

 

$3.12" ..
............ ...........

 

 

..p.... ...

 

$2.03.???

.2 .8 .3 .2 .3

 

 

 

3.3V 5:293
on but l3. 0

m. -2 .3 .3 .3

 

 

 

 

bl p b r L
. .
.llll. «. . .lill .. .1 f... .l Eli! 4....
It’ll" ). ‘IIII” ‘1']
41‘. I ‘1‘ [’11\

 

 

 

ON

 

88 85.8
a

 

-
v
o»

 

o.” .8. .8. .o. m. 3 .3 .3 .3 .3

........

  

........
. ....

......
.........

 

N:

 

2. .8 .2.

38.6883
.0. .m. .3 .3 .3 .3 .3

 

 

 

 

 

 

I I I I
I l /
/ .
P > Y b P
1 1 1 1
"J 4 a.) ”I. l
9.. 3r. :0:- 39V. _ _ .3553:

01

 

I I
/
r
b F f b
“ ‘ ‘
P‘- 0 3d
1 I

0.. - .mnfivnh- 30‘ : .....C.: a:

normalized measure

normalized measure

39

 

 

 

 

crest

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

O
0.1 1 10 100
low-pass frequency (kHz)
a) 0.002 relative defect magnitude
20 . w.
,\ - - - - MS - - - peak ----- kirtosis crest
’ ‘\ i 3
I \‘/.__.\ /'\‘ ’/ :\‘ ‘1'" \
I ~ ~ - ‘0 \ ‘l i V
,g ‘— \ ‘h / \ \/ i , '\
I —"'-\/ ‘—___/ .-" \‘
_ _ . - - - h ;_-_"/'—-—--
0 - __ _ -_
0.1 l 10 100
low-pass frequency (kHz)

b) 0.005 relative defect magnitude

Figure 11. Comparison of normalized defect indexes.

indication 0f
acceptable mai

Peak {31ng for

:52 Quantiz
The ef
spectmm net:
of :10 g were
The ef
sets for no d
innanent lex‘e
was then quar
bit quantizatn
The shaded n
point runs.
The 5
1e» e1 of apprc
Ihe floating p
°f1hequanti.
A1 relative (
quamllatim
the falllll'e p(

The

1024‘POint l

40

indication of deterioration in all instances except at very high frequencies for the
acceptable/marginal border where peak value is superior. Kirtosis and crest are inferior to

peak value for every case.

2.5.2 Quantization Simulation

The effects of quantization on the mean squared value and the vibration power
spectrum were investigated using simulation. A 5 kHz cutofl‘ frequency and a peak range
of 110 g were used.

The effects of quantization on the MS value were investigated by generating data
sets for no defect through a relative defect magnitude of O. 1, well beyond the failure
imminent level predicted by the Southwest Research comprehensive limits. Each data set
was then quantized at 4-bit through 10-bit resolution. The results for the 5-bit through 8-
bit quantization, together with the floating point (flp.) values, are presented in Figure 12.
The shaded region indicates the 4:30 range obtained by averaging ten zero-defect floating
point runs.

The S-bit quantization is too coarse to detect any values before a relative defect
level of approximately 0.002. At quantization greater than five bits, the MS value follows
the floating point value exactly, plus an additional amount equal to the mean squared value
of the quantization noise. The 8-bit line is indistinguishable from the floating point results.
At relative defect values above about 0.05, the peak value can exceed 10 g, causing
quantization saturation and an under estimation of the MS value. This should be beyond
the failure point of the bearing.

The effects of quantization on the spectrum were examined by generating ten
1024-point FFTs. These were averaged to produce power spectrum periodograms. One
data set representing no defect and one at a relative defect level of 0.002 were quantized

at 6, 8, 10 and 12-bit levels. The resulting spectra plus the floating point spectrum are

41

comprehensive vibration limits

 

AgBIC!D‘E

 

 

 

100 , .-
: _ flp.
« 8-bit
* -- 7-bit
MS 10 3' -- 6-bit
(g2) ---- S-bit
Shaded region shows
i3 0 from no defect
floating point average.
1 1' 1 1
0.1 3-
0'01 I I r I T T I 2 I I E I I I
0.0001 0.001 0.01 0.1

relative defect magnitude

Key to Comprehensive Vibration Limits

= no fault
= acceptable
marginal

= failure probable

muow>
II

= failure immanent

Figure 12. Quantization effects on MS.

 

presented in l
clarity

All of
S-hit and 6-bi'.
zetodefect g

spectrum.

26 MONIT! is

This t
monitor syste
mean square.

iasgest \aria:

defen maeni
The

dean to it:
acceleromeg
01 g. Thee
din} bearing

The
mean Squat

05(th Spt

42

presented in Figure 13. The spectra are shown with a two decade vertical spacing for
clarity.

All of the spectra follow the trends of the floating point spectrum. However, the
8-bit and 6-bit spectra have significant differences at lower magnitudes, particularly in the
zero-defect graph. The 12-bit spectrum is virtually identical to the floating point

spectrum.

2.6 MONITOR SYSTEM SPECIFICATIONS

This chapter concludes with the development of a set of specifications for the
monitor system based on the previous findings. The feature extraction method will be the
mean squared value. This defect index yielded the best results in simulation, having the
largest variation between no defect and defect levels, a monotonic increase with increasing
defect magnitude, and good sensitivity at low frequencies.

The accelerometer should have a flat response up to between 2 and 10 kHz and
down to 100 Hz. A low-pass cutoff of 5 kHz was chosen for this project. The
accelerometer should have a magnitude range of :10 g and have the ability to resolve
0.1 g. These parameters are sufficient to cover the monitoring requirements of a medium
duty bearing such as the NSK / NTN 30204.

The analog-to-digital converter should produce at least 8 bits of accuracy for the
mean squared calculation. It should also support the capability for 12-bit quantization for

off-chip spectrum generation.

t ..hu. MD. .\
a... n
b 1 h t 1
q a < 0

 

\ mi .n n...
v . t
0 4» «S 1
A 1‘: turdblm

 

Am:uv S; .0031.

spectra (dB)

spectra (dB)

43

 

 

 

 

 

fiequency (kHz)

a) no defect

 

 

6-bit
.l ...-..

Within“, .

 

0.1

. TOTBTFMW ..-- . _.

frequency (kHz)

b) 0.002 relative defect magnitude

Figure 13. Quantization effects on spectrum.

 

10

CHAPTER 3 TRANSDUCER

The acceleration transducer converts bearing vibrations into a change in resistance.
This is accomplished by using a mass suspended by four beams. As the device is
accelerated, the suspended mass moves relative to the base material, causing stress in the
beams. Two piezoresistors placed on one of the beams convert the stress into a change in
resistance. The piezoresistors are arranged to form a half-active bridge to accentuate
stress induced changes while minimizing the effects of resistor variations.

Section 3.] presents theory associated with suspended mass accelerometers. In
Section 3.2, the results of finite element modeling of the four-beam accelerometer are
given. A discussion of the piezoresistor follows in Section 3.3. Section 3.4 then estimates
the performance characteristics. Section 3.5 presents transducer construction issues.
Finally, the electronics that convert the change in resistance to a voltage signal are
considered in Section 3.6. Appendix B provides greater details in the development of

relations used in this chapter.

3.1 SUSPENDED MASS ACCELEROMETER THEORY

This section theoretically analyzes a suspended mass accelerometer. It starts with
a brief discussion of a mass-spring-damper system. Next, a basic description of the
transducer design is presented. This is followed by design calculations developed from

isotropic beam theory.
3. 1.1 Mass-Spring-Damper System

Figure 14 shows a mass-spring-damper system with base excitation. The spring is

assumed to be linear and elastic, with the stiffness k relating the applied force F to the

44

45

y(t) = Ysin(a)t)

Base A g
1" *’
+y

 

 

 

Z/Y (base motion)

 

 

 

+x

Figure 14. Mass-spring-damper system [35].

deformation d by F = kd. The damper is assumed to be linear and viscous, with damping

constant 6 relating the applied force to the velocity v by F = cv.

An expression for the displacement of the mass, x(t), in terms of the base

displacement, y(t), is
m56+c(JE—y)+k(x-y) = O.

A more usefirl expression is obtained by reforrnulating the problem in terms of the relative

motion between the base and the mass. Let 2 = x - y. The equation of motion becomes
m2 + c2 + k2 = —-m}'5 = mszsin(a)t).

The displacement and acceleration transfer functions can be obtained through

frequency transformations. The magnitudes are

me) 2 r2

Z = :
ly®>i ‘/(k—m(i32)2+(cc0)2 J(1-r2)2+(2C’)2,

46

’k .
where (00 = — rs the fiandamental frequency,
m

(o

r is the normalized frequency, and

0

c
C, = 2_\/——kr—n_ is the damping ratio.

Figure 14 shows the relationships between the magnitude transfer function, normalized
frequency and the damping ratio.

Parameters of importance in the mass-spring-damper model include the frequency
response and the sensitivity. The sensitivity can be expressed as a fimction of the strain, or
normalized change in length, of the spring. The primary issues of importance regarding
frequency include the range of relatively flat response in the low frequency pass band, and

the frequency and damping ratio of the fimdamental response.

3.1.2 Transducer Geometry

A mass suspended by one or more beams is used to implement the mass-spring-
damper arrangement in silicon. The spring action is supplied by the elasticity of the thin
silicon beams supporting the mass. The principal damping is supplied by the fluid through
which the mass and beams travel.

Single beam accelerometers are the simplest construction. They have relatively
good sensitivity because of the freedom of movement allowed to the mass. This
configuration, however, has two serious drawbacks. First, the resonant frequency is low
because of the large spring constant. Second, the system is sensitive to off-axis
accelerations due to the lack of support for the freely suspended mass.

The addition of more beams of the same size to the same mass has the effect of
decreasing the sensitivity and increasing the bandwidth. If these beams are distributed on

different sides of the mass, the motion of the device in the plane of the beams is severely

testified Thi
commercial aece

The geor
and 16 The pt
silicon [36] T0
connect the base
timid with 0U
The mass is tale

The beat
acceleration l
acceleration. but

The gee
iiierent philost‘
make the trans:
produces derie
condition varia
allows the sur

eleoronies. iso

3.1.3 Isotropit

A first

Simple beam 1]:
mAttendees

If a sler

47

restricted. This greatly reduces sensitivity to off-axis acceleration. Most recent
commercial accelerometers are constructed with four beams.

The geometry of the transducer designed for this project is shown in Figures 15
and 16. The projected 45° angles result from the anisotropic micromachining of (100)
silicon [36]. Four beams, each contained within dimensions of 90 um x 60 um x 10 um,
connect the base material to a mass cut approximately into the shape of the frustrum of a
pyramid with outer dimensions of 2320 um X 2320 um x 400 um and a mass of 3.55 mg.
The mass is calculated from the volume and density of silicon in Appendix B. 1.

The beams are each located near a different corner of the mass to reduce off-axis
acceleration. Placing them on each corner would minimize sensitivity to off-axis
acceleration, but would also complicate the micromachining [3 7].

The geometry was chosen principally for acceptable bandwidth. It follows a
different philosophy fiom many of the products currently available. The usual goal is to
make the transducer as small as possible to allow electronics on the same chip. This
produces devices that are more susceptible to manufacturing variations, operating
condition variations, and small-scale effects. In contrast, the transducer proposed here
allows the surface of the large mass to be used for the placement of conditioning

electronics, isolating them from the other electronics.

3.1.3 Isotropic Beam Theory

A first estimate of the transducers mechanical properties can be obtained from
simple beam theory. Additional details of the results presented in this section are provided
in Appendices 8.2 and B.3. ‘

Ifa slender prismatic beam constructed of a linear, isotropic, homogenous, elastic
material is subjected to a load resulting in a small deflection, an approximate relationship

between the loading and the deflection is [38]

48

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ar. —'-' r— 90pm
F12” l i
\T\ l ///|l 200nm
\ /
l \r _________________ ”4” r T
I l i
= : t
! i :
I l I
| l l
i : 2300pml
i I I
= i l
| I I
i E 2300 pm E
: JI— _________________ "i
_ i x/ \\
L \ J
B -[La_--_-_-_-_-_-- «.-..— B
, I II:
A TOP VIEW
r 10pm

 

I
i/t\ 42,,“ /\l
L——— 1540 tum—J [

SECTION A—A 8c B-B

Figure 15. Overall transducer geometry.

49

 

 

“g 90pm *‘
Ti. l 7
5 loum
70pm——-i

l
SIDE VIEW

 

 

 

 

[——---

 

 

.5
O
t
3

 

 

 

 

 

 

 

 

60 um—-

SECTION A—A

Figure 16. Beam geometry.

where

50

4

d
E! (J = w(x),

 

H
II

length along the beam,

y(x) — deflection of the beam,

w(x) = load fianction,
E = stiffness (Young's) modulus,
I = cross-section area moment of inertia.

Solutions to the differential equation for deflection, longitudinal stress, and

bending moment along the beam require four boundary conditions. These are found by

considering the ends of a clamped-sliding beam under end loading as shown in Figure 17.

The four-post suspension limits the free end of the beam to motion normal to the

plane. It also results in a loading of the "sliding" end equivalent to one-quarter of the total

\
A

 

 

 

 

 

 

 

\\\\\\\\\\

 

Boundary Conditions
d
y(O) : 0 l = 0

dx x=0

2 3

d m
M(L) = rap—2’1 = 5(0) = EI—g’ = —F = —ma
x=L x=0

 

Figure 17. Loaded beam in the four-beam accelerometer.

mass times the

The si
However. the
The effective
value may be
Tandamentai fr

One irn
manmum oute

piezoresistor.

There

The mi‘iimum

either The mass

The ma

beam Conn€Cts

This 5373!

ac-t

51

mass times the applied acceleration.

The simplified beam model used assumes a constant cross-sectional area.
However, the last 10 pm on either end of the beam merge with the supporting material.
The effective length of the beam lies somewhere between 70 and 90 pm. The shorter
value may be used for stress calculations and the longer value for displacement and
fundamental fi'equency calculations to yield worst case values.

One important value obtained from the solution to the differential equation is the
maximum outer fiber stress, 00. This stress is converted to a change in resistance by the

piezoresistor. The maximum outer fiber stress is

 

_ Moc __ _ macL

=—396 /m.s2,
0 1 21 gg U

 

where maximum moment,

a:

c = maximum edge-to-neutral surface distance,

m = suspended mass,

a = acceleration,

L = beam length,

g = number of gravitational accelerations.

The maximum outer fiber stress occurs at the top of the beam at the point of attachment to
either the mass or the base.
The maximum deflection in the y-direction, which occurs at the point where the

beam connects to the mass, can be found as

maL3 .4
L =— =—7.61x10 .
y( ) 1251 g um

 

This system of units, grams (g), micrometers (um), and seconds (5), is used to

accommodate the finite element analysis.

 

Serera
their inaccurac
to the base do
long as the la:
simplifications
stresses exist
beans saith sr
approaches ihl
atachment to
used to iielda

The fit:
[35] Details;
potential energ
Assuming the

tontnbntion of

minimum pote

52

Several assumptions made in the development of the above equations contribute to
their inaccuracies. First, the material is not isotropic. Second, the post attaching the mass
to the base does not fit the beam definition that the length should be at least ten times as
long as the largest cross-sectional dimension (width or thickness). Third, the standard
simplifications that only pure bending exists along the beam and that only longitudinal
stresses exist at points away from applied loads, while providing accurate results for
beams with small deflections, may produce significant errors as the length dimension
approaches the width dimension. Fourth, the material in the base and mass near the
attachment to the beam will not remain rigid. Finally, an approximate beam length was
used to yield a worst case solution.

The fundamental frequency, 030, can be approximated using Rayleigh’s Principle
[3 5]. Details are provided in Appendix B.3. If the vibrating beam is conservative, the
potential energy will be completely converted to kinetic and vice versa twice per cycle.
Assuming the effect due to the suspended end mass is significantly greater than the

contribution of the weight of the beam, the equations for the maximums are

maximum potential energy: P = ngd = ngJ’UJ),

maximum kinetic energy: K = T’m’z = wgmy2(L).

Since the system is assumed conservative, the maximum kinetic energy must equal the

maximum potential energy. Equating the two and solving for (00 yields
020 = _g_ =‘/123E1 = 1.14 x105 rads/s
y(L) L m
or

f0 = 18.1 kHz.

 

This es‘
introducing sti:
beam is assume
resonant freque

This tends to u

HFNIEJ

The fini
elements. app}:
results of each
“:35 NISA ll 1
Engineering M
“ills used 1h:

handle nonisoti

TPC.

This 56:
mils lields
Used TOT dEI en

reslouse is pre

32‘] Plrtite E1.
Three (

th

estruciuk, Tm

53

This estimation suffers from three inaccuracies. First, the deflection used is static,
introducing stiffness. Second, the material in the base and mass near attachment to the
beam is assumed rigid. Both of these simplifications cause the estimate to have a higher
resonant frequency. The third inaccuracy arises from the use of 90 pm as the beam length.

This tends to underestimate the fundamental frequency.

3.2 FlNITE ELEMENT ANALYSIS

The finite element method consists of three steps, dividing the problem into small
elements, applying appropriate physical relations to the elements, then combining the
results of each element to obtain a solution [39]. The program used to run the simulation
was NISA II (Numerically Integrated Elements for System Analysis II) developed by
Engineering Mechanics Research Corporation (EMRC) in Troy, M]. This program is
widely used throughout the world for finite element analysis and is known for its ability to
handle nonisotropic materials. The program was run on a 4/490 Sun Server using a Sun
IPC.

This section opens by describing the model used. Next, a description of the static
analysis yields stress and displacement data. This is followed by the eigenvalue analysis
used for determining the modes and their relative contributions. Finally, the fiequency

response is presented.

3.2.1 Finite Element Model
Three of the decisions required in developing a finite element model include the
type of element to be used, the material properties of the elements, and the partitioning of

the structure into those elements. This segment will examine each of these issues in turn.

54

3.2.1.1 Element type

NISA 11 supports over 15 different three-dimensional element types and orders.
The hybrid solid element (NKTP = 9) was chosen because it supports wide variations in
thickness throughout the model, a necessary requirement for the accelerometer [40]. Each
element is a hexahedron with six faces and eight nodes, each node having three degrees of
freedom. The additional computational cost associated with using this element type is
justified because the simpler tetrahedron and hexahedron elements were found to exhibit

numerical stability problems with the accelerometer model.

3 .2. 1.2 Material properties

Part of the description for a structure is the set of constitutive equations. These
are mathematical descriptions of the material's properties. The relevant constitutive
equation for this finite element model relates applied loads or stresses to displacements or

strains. The tensor stress-strain relationship is

0'9 = qur 51:1 ,

where 9o = Cauchy stress tensor,
Cw = fourth-order stiffness tensor,
8k, = small strain tensor.

NISA 11 uses a linear elastic orthotropic model for nonisotropic bulk material. A

material is orthotropic if the stiffness coefficients, in matrix notation, have the form [41]

rCttc'rzctz O O O -
C,,C,,C,, 0 0 0
C13C23C33 O 0 0
'1' 0 0 0G,, 0 0
o 0 0 0C,, 0
_ 0 0 0 0 0C,,_

 

 

 

The particul.

 

 

where

Thus. nine i
Lille Poissc
M bl the

Silic

mimaiTOQfa-

55

The particular form of the constitutive equations used in NISA II is

 

 

 

 

 

 

0'11 TEHU" V23 V32)E22(V12 + V13 V32 )E33(V13 + V12 V23) 0 O 0 Tan
022 E22 (1 " V13 V31) E33( V23 + V21V13) O 0 0 £22
+ 0'33 =(_1_\ E33(1- V12 V21) 0 0 O 333 L
712 a) aGrz O O 712 ,
123 Symmetric 01623 0 723
[731] _ 0G31_ (731,
where a = 1‘ V12 V21 — V23 V32 " V31V13 " V12 V23 V31 ‘ V21 V13 V32 .

Va;- 2 Poisson's ratio,

Er; = elastic modulus,
G1} 1" shear modulus,
To = 0t, = shear stress,
7.; = 25.; = "engineering" shear strain.

Thus, nine coeflicients need to be supplied: three elastic moduli, three shear moduli and
three Poisson's ratios. It should be noted that the indices 1, 2, 3 refer to the axes x, y, 2
used by the model.
Silicon is an orthotropic material. Its stiffness coefficients, referenced to
crystallographic axes, have been experimentally determined to be
Cll=1.658x108 g/m-sz,

C12 =0.639x108 g/pm-sz,
C,,,,=0.796><108 gl/an-sz,

for 300 °K temperature and 0 kg/cm2 pressure [42].

Because the beams align with the (110) directions and the crystallographic axes lie
“011g (100) directions, the coefficients must be converted to tensor notation and
transformed to the new coordinate system. The stiffness constants must then be converted

to the moduli format used in NISA II. Appendix B.4 provides details of the transform.

 

56

This results in the following model constitutive coefficients, written in the form

used by the program:

EX: EZ=1.692><108 g/um-sz,
EY=1.302x108 glam-s2,
GXY= GYZ=0.398x103 g/ttm-sz,
GXZ=0225x108 g/um-sz,

NUXZ = 0.0626,
NUXY = 0.362,
NUYZ = 0.279.

3.2.1.3 Element size

The decision regarding how to divide the structure into elements is similar to any
numerical method in that the finer the divisions, the more accurately the discrete result will
approach a continuous result. The goal of the finite element modeling is to estimate
properties of the beams since they contain the stress-sensitive piezoresistors. This is also
the region that will undergo the most change due to acceleration. Hence, the beams will
require greater accuracy than the larger base and mass volumes.

No straightforward theoretical method exists to determine how a particular region
should be divided into elements. Instead, the typical method employed is to partition the
volume into successively finer elements, noting as the results asymptotically approach the
continuous solution. The process is halted when the desired accuracy is obtained.

This technique was implemented by using a 70 um beam with the same cross-
section and material properties as the beam in the full model. The base side was rigidly
fixed. The mass was modeled by a rigid, dense block having one-quarter of the total mass
and a length of 10 um, constrained to move only in the vertical (y) direction. Figure 18

shows an example test beam.

57

       
     
  
 
         

   

' \\\\\\\\\\\\\\\\\\\\
“\‘\‘\‘\\\‘lt‘\‘\\\\\\\\\ \\\\\\\\\\\\.~

I

 
 
    

\\\\\

beam mass

Figure 18. Test beam.

Static and eigenvalue analyses were conducted to obtain the stress at the top
center of the fixed end (maximum stress), displacement at the top center of the mass end
(maximum displacement), and the first harmonic frequency. Six trials were run with the
cross-section divided into 4, 2 width by 2 height, and 6 trials with the cross-section
divided into 8, 4 width by 2 height. The 6 trials were run for each cross-section starting
with the length divided into 2 elements, doubling each time until 64 length divisions were
obtained. The results of these tests are summarized in three graphs in Figure 19.

The theoretical values are the results of the isotropic beam theory calculations with
a length of 70 pm. The calculations are provided in Appendices B2 and B3. These limits
do not represent the asymptotic limits for a continuous solution to the general anisotropic
problem.

The results show a good correlation between the asymptotic result from the beam
model and the isotropic theory. They also indicate that the model results are within about
2% of the asymptote at 256 elements for an eight element cross-section, and within 5% of
the asymptote at 128 elements for an eight element cross-section. This resulted in the
decision to use an eight element cross-section with 30 length divisions for a total of 240
elements per beam. This accuracy is carried into the supporting material, decreasing in

fineness away fiom the beams.

 

stress (g g/um-s’)

displacement (g um)

58

 

450 i g T
400 ,
300.»-m -.-is.- i ;
250.»-3.----i--w .Hmlw,,m-- l.“ - W i
150 r e s e ;

8 16 32 64 128 256 512

number of elements

 

 

 

 

 

  
  
 

 

theoretical
+ 8 element x-
section .

—B—4 element x-
section

 

   

 

 

  

 

 

 

 

 

 

8 16 32 64 128 256 512

number of elements

 

“\O

 

\l

 

 

 

frequency (kHz)
N N N N

 

 

ON

I-

I:
i
t
s
i
l
l
i
l

 

 

 

to
Us

L
J

16 32 64 128 256 512

00

number of elements

Figure 19. Element size effects.

 

is used
basedt
work it
tirtual
constra
equilibr.
Stresses
[43]

1
Since th
changei
0n the ti
(3) of ti
Darlerr
31655

T

the bean
Value of.

the “idth

St
The Shear,

is 22] 2.1

V I

aliaches if

59

3.2.2 Static Analysis

Static analysis produces the steady-state result to an external load. In this case, it
is used to obtain stress and displacement information. The technique used by NISA II is
based on the principal of virtual displacements, which states that the total internal virtual
work must equal the total external virtual work. The virtual work is expressed in terms of
virtual displacements that are compatible with the conditions of equilibrium, kinematic
constraints and boundary conditions.

The solution proceeds by first calculating the stiffness matrix for the system. The
equilibrium equations are then solved to obtain element displacements. Next, the element
stresses are calculated. Finally, the element results are combined to provide system results
[43].

One of the results obtained from a static analysis is the distribution of stresses.
Since the stress along a beam (longitudinal stress) is used to convert acceleration into a
change in resistance, its values are critical. Figure 20 presents the distribution of stresses
on the top of a beam aligned with the x-axis due to 1 g of downward acceleration. Part
(a) of the figure shows the distribution of normal stresses in the x-direction (SXX).
Darker regions indicate increased compressive stress and lighter regions increased tensile
stress. I

The maximum longitudinal stress on the top surface occurs at the outside edge of
the beam above where the bottom of the beam attaches to the base or mass, and has a
value of 428 g/um-sz. The maximum longitudinal stress at the center of the beam (across
the width) occurs at the same point along the length and is 344 g/um-sz.

Several measures of stress are important in determining potential to failure. One is
the shear, or in-plane stress. Figure 20b shows shear stress (SZX) due to 1 g acceleration
on the top of the beam, with darker regions showing greater stress. The maximum shear
is 221 g/um-s2 per g, occurring on the top face above where the bottom of the beam

attaches to the base material.

mar-f
arm”;
"74%

I ) I
«fie/i ’

institutes.

".k‘

:fli’r'l
., g.

in

x.

 

 

b) SZX

a) SXX

60

 

 

d) SEQl

c) SIP

rstributions.

Figure 20. Beam top stress d

deterrnint
SITESS

stresses)
principal
point. til
the third

lllTJTC 6T

SleSSfS a

the anisr

61

Another stress measure is the principal stress. The normal and shear stresses are
determined along the model axes. These may not be the directions of maximum normal
stress. The stresses resolved in directions producing only normal streSses (no shear
stresses) are known as principal stresses. Figure 20c shows the distribution of the first
principal stress (SIP). The principal stress is also greatest above the lower attachment
point, where its value is 432 g/|.rm-s2 per g. The second principal stress is near zero and
the third principal stress is a reflection of the first. This verifies the compressive - tensile
nature expected on opposite ends of this beam.

A fourth stress measure is the magnitude of the octahedral stress. Octahedral
stresses are normal to the octahedral, or { 1,1,1} planes. This measure is significant due to
the anisotropic cubic nature of silicon. Figure 20d presents the magnitude of the
octahedral stresses due to l g acceleration on the top surface of the beam (SEQ3). The
maximum octahedral stress occurs in the region above the lower beam attachment, with a
value of 206 g/um-sz.

Because it is an anisotropic material, the yield strength of silicon should be
anisotropic. However, the anisotropic yield strength coefficients have not been
experimentally determined. This is because the practical yield stress of a silicon
mechanical device tends to be more sensitive to surface defects than to the direction of
imposed stresses. Measured yield stresses vary between about 105 and 106 psi (about
7x105 and 7x106 glam-$2). Results from Nova Sensor have shown yields of 150,000 psi
in the [110] direction for a (100) silicon wafer. The value was shown to increase to
950,000 psi with removal of surface defects [44].

The maximum stress seen by the accelerometer is below 500 g g/um-sz. The
maximum expected acceleration in normal use is 10 g. This implies that resulting stresses
are over two orders of magnitude below the minimum listed yield stress. This also implies
that the unprotected device should be able to withstand shocks resulting from nearly 1000

g before fracturing.

mood

-79. l0“'

9)
a J
D)
L' I.
”Q

Tl
hequenci

by solsirtg

Where

Subspace

“r-

the firm
TCSUilS s:
an llldic.

asMonti

naillralfi

62

Along with stress information, displacement data can be obtained from the static
model. The displacement at the center of the suspended mass was found to be

—7.9x10'4 urn/g acceleration.

3.2.3 Eigenvalue Analysis
The purpose of performing an eigenvalue analysis is to obtain the device's natural
frequencies (eigenvalues) and free vibrating modes (eigenvectors). This is accomplished

by solving the following equation:
Mu' + K 11 = 0,

where M = mass matrix,
K = stiffness matrix,
— 'ax+
u = W] 11’

= sinusoidal forcing function.

Several methods are available in NISA II for extracting eigenvalues. The Accelerated
Subspace iteration method was chosen for this analysis because of its ability to rapidly
solve systems.

A primary result of the analysis is the set of resonant frequencies. These values for
the first ten modes and their modal masses in the y-direction are listed in Table 4. The
results show that the firndamental frequency will be 17.7 kHz. The modal mass provides
an indication of the relative effects of that mode on the system. This reinforces the
assumption that the only significant mode is the first.

Another usefirl result of the eigenvalue analysis is the mode of vibration at each

natural fi'equency. The vibration modes for the first six harmonics are shown in Figure 21.

 

63

Table 4. Natural frequencies and modal masses.

 

 

 

 

 

 

 

 

 

 

 

 

Mode Frequency Modal Mass
(kHZ) (UY)
1 17.7 3.55x10'3
2 30.9 7.6x10-14
3 30.9 1.3x10-13
4 94.8 7.5x10'17
5 94.8 2.6x10-18
6 153.6 2.9x10-8
7 316.4 1.5x10-16
8 880.5 5.1x10-17
9 908.4 1.5x10-9
10 991.8 7.0x10-15

 

 

 

 

3.2.4 Frequency Analysis

Frequency analysis indicates the steady-state system response to a harmonic
forcing function. The longitudinal stress was plotted as a function of l g swept frequency
sinusoidal acceleration in the y-direction. The response is dependent on the type and
magnitude of damping used. The device packaging will supply viscous squeeze-film
damping with a critical ratio as described in Section 3.5.3. Figure 22 presents the
simulated magnitude spectrum at the beam center (node 115) and outside edge (node

109). The response is flat beyond the 5 kHz limit required for the device.

64

o 258 Q.

 

m a. N 886 3

 

.888 5888288 xi EE AN cosmE

m a. v movoE Au

 

fl once 8

 

L“!

522

‘v'lnlolss

(IIUDLE)

Riot

 

65

E.II.R.C.- 11le II PUST-PRIIIESSER VERSICH 91.0 Jun/19/93
FREQJEI’CY RES’GISE (MITUDES)

FREQ.‘ RESPENSES

 

 

 

 

 

 

 

 

 

 

 

 

 

5 423.3 522 : LIBE—Ol
5 — \ m: : 4.201302
: FRED. : 1.oor-:+o1
s — 12mm: : 1.00£+06
T 34206 1
R _
E _
5 ..
S d
u —1
II] : _ 109
n ._
L 171.4 _ - 115
E _.
) _.
05.74 "
0.1079 "
I I l l I l TI I l I l I l l
1E-03 115-02 0.1000 1.000 10.00 100.0

Fm ( I 1.0154)

WY ME TO 13 ESE WTICN. CRITIC“. WINS

awn: X-RXIS LII; Slit-LE

Figure 22. Longitudinal stress frequencyresponse.

 

 

I.)

l1

(,1

66

3.3 PIEZORESISTOR

This section presents the transduction method used to convert mechanical stress to
an electrically compatible parameter. A comparison of common techniques for
transduction leads to the decision to use a difiused, single crystal piezoresistor. This is
followed by a discussion of piezoresistance. Next, the type of piezoresistor is selected.

Finally, the bridge containing the piezoresistors is described.

3.3.1 Transduction Methods

Three methods are currently used in mechanical microsensors to convert
acceleration into an electrical signal: the variable capacitor, polysilicon piezoresistor, and
crystalline silicon piezoresistor.

A variable capacitor uses the movement between mechanical elements, such as the
suspended mass and the base material below it, to form a time-varying capacitance. This
method has high sensitivity and low cross-sensitivity to temperature compared to resistor
methods, but suffers from complex signal routing and severe nonlinearity. These
drawbacks make the capacitive technique difficult to implement for smart sensors [45].

A polysilicon piezoresistor is constructed by depositing polysilicon onto an
insulator, such as SiOz, that is placed over an area of high stress. This method allows for
easy trimming during manufacturing and a higher operating temperature than single crystal
resistors, but suffers from lower sensitivity, higher nonlinearities and an increased number
of manufacturing steps [46].

Crystal silicon piezoresistors are constructed by diffusing or implanting dopants
directly into the substrate material at areas that will experience stress. This method
provides a high degree of linearity and sensitivity, and is the most conducive to current
circuit manufacturing techniques. Its major drawback is a high sensitivity to temperature,

which can be minimized with compensating circuitry. The limit in maximum temperature

 

is due to
analog an

T
BiCthS
linea-"Ity :
of the se
be direc

importar
3 3.2 Pi
T

applied 1

SUCSS. 0

“here. f

S“TlCi‘ir

This re:

DOQTTOE

67

is due to p-n leakage currents, an effect that limits the temperature range of on-chip
analog and digital circuitry as well.

The main criteria used for selecting a transduction method are linearity and
BiCMOS process compatibility, both met best by the crystalline piezoresistor. The
linearity is important because of the difficulty in compensating for the nonlinear distortion
of the sensed parameter. Unlike cross-sensitivity parameters, nonlinear distortion cannot
be directly measured and removed from the signal. Finally, process compatibility is

important in minimizing the cost of the monitor.

3.3.2 Piezoresistance
Piezoresistance is a bulk material property relating the change in the ratio of an
applied electric field, E, to the resulting current density, J, due to a change in the applied

stress, a“. A tensor equation relating these variables is [47]

E. =ij. +1tW .110“,

where, for crystalline silicon, p isotropic unstrained resistivity,

“ya! = fourth-rank piezoresistivity tensor.

The expression can be further simplified using the symmetry of silicon and by

switching from tensor to matrix notation [48]:

97:11: 7t1111,
97:12 : “1122:
97:44 =27t2323-

This results in the following representation for the piezoresistance of silicon in matrix

notation:

 

 

and ti

ru‘

result

corm

SITES;

Wher

68

Tirnrrlzzrn 0 0 0-
”12761752 0 0 O
”127’127’11 O 0 0
'1' 0 0 07:4,0 o
0 0 O OIIMO
_0 O O 0 07r44_

 

 

and the following set of equations:

E
—pl— : J1[1+ ”1101+ ”12(02 + 03)]+ ”44(‘120-6 +J305)’
E
7); = J2[1+ ”1102 + 7112(0‘ + 03)]+ ”44(J106 +J3O'4)a
%=J3[1+7r”03+7r,2(01+02)]+7r44(J,0'5+J20'4).

The majority of practical applications have the electric field, current density and
applied stress aligned in the same direction, such as the longitudinal stress of a beam. This

results in

E.
7]— =,0(1+ ”11' 01') =p+Ap,
1'

known as the longitudinal piezoresistance coefficient, where the 1' subscript is the
common alignment direction and Ap is the change in resistivity resulting from the applied

stress. The transformed piezoresistivity constant, at“, is [47]

_ 2 2 2 2 2 2
7711' — ”it +2(71.12 + 7:44 _ ”ti)[art atz +arr a13 +a12 (113],

where a“ is the direction cosine between the new 1 direction and the old i direction. The
sensitivity to stress will be maximized when at“. is maximized. The alignment quantity, in
U, ranges between zero if 1‘ is aligned with a crystallographic axis, (100), and one-third if
1' is aligned with a (111) direction. The alignment value is one-quarter for a (110)

direction.

when t
masirni

saith a

The 101

A poi
longitt

pieZOi'i

C_-7

/_

 

[

3 .3 .3 Piezoresistor Type

Two types of piezoresistors can be constructed by driving either p- or n-type

donors into the substrate. An example of the coefficients that result is presented in Table

5.

For p-type silicon, rt“. is maximized when (7r12 + 1:44) is maximized. This occurs
when the piezoresistor is aligned with a (111) direction.

maximized when (1t12 + at“) is minimized. This occurs when the piezoresistor is aligned

with a (100) direction.

The anisotropic etching of silicon results in beams aligned with a (110) direction.

69

The longitudinal piezoresistance coefficients for both types are

A p-type resistor yields over twice the sensitivity to stress as does the n-type for a

longitudinal arrangement on a (110) beam.

p-type: 7C] 1'

For n-type silicon, 7t”. is

= —102.2 + 2(53.4 - 13.6 +102.2)(O.25)

= —3.12 x10"7 um- s2 /g,

= 6.6+2(—1.1+138.1— 6.6)(0.25)

= 7.18x10‘7 arm-s2 lg.

piezoresistance is about one-half of 7:44.

Table 5. Piezoresistance coefficients [49].

For p-type silicon, the longitudinal

 

 

 

 

 

 

 

 

Sample Coefficient (x1078 um‘sz/g)

(Q-cm) 1!“ ran 1:44

n 11.7 ‘ -102.2 53.4 —13.6
J 7.8 6.6 -1.1 138.1

 

 

 

 

 

 

F3

1"

(I;

ll

70

The resistors can be constructed by diffusing boron into the silicon base material
until a surface concentration of about 1019 cm-3 is obtained, yielding a resistance of
approximately 200 Q/El [45] and a longitudinal piezoresistance of approximately
50x10-8 um-sz/g at room temperature. The piezoresistance coefficient derivation is
presented in Appendix 86. Each resistor is 3 pm wide and 40.5 um long, for a resistance

of 2.7 kQ.

3 .3 .4 Piezoresistor Bridge

To take advantage of the equal magnitude but opposite sign of the developed
stress, a resistor will be placed at each end of a beam. These resistors are then connected
to two identical resistors off the beam to form a half-active bridge. This is shown in
Figure 23, where R1 and R3 are the active piezoresistors.

The piezoresistors can be made using standard masking and diffusion processes.
They are placed at the center of the beam along its length. A possible layout of the
resistors on the beam is shown in Figure 24. The design uses scaled CMOS 1 11 rules
except for the resistor diffusion, which follows scaled bipolar 1 u rules [50].

The interconnects that run along the beam should be made of metal due to its
lower sensitivity to stress and higher current density. The aluminum used for the
interconnects is 8 pm wide. The specification allows 0.8 mA/um [50], for a total of
6.4 mA. This yields a maximum allowable supply voltage of 17.28 V across the 2.7 k!)
bridge. A bridge supply of 15 V is proposed.

3.4 PERFORMANCE CHARACTERISTICS
This section develops performance characteristics of the piezoresistive transducer.

A general bridge expression is developed to obtain the nominal bridge output. The next

71

 

 

 

 

 

 

 

 

 

 

 

Figure 23. Piezoresistor bridge.

 

 

72

 

—— diffused resistor

metal

metal 2 or poly

-——- contact

— beam edge

5 micrometers

 

 

 

 

 

 

'r—______.____.—-_————____

 

 

 

 

-_-__-__-___.___..._J

 

 

 

Figure 24. Piezoresistor placement.

 

 

4'5

73

two segments examine how changes in bridge resistor dimensions and operating
temperature affect span, offset and equivalent resistance. The following segment
considers the impact of a construction variation in beam thickness on stress and
fundamental frequency. The final segment discusses nonlinearity, hysteresis and
repeatability by reviewing published results of related devices.

The performance characteristics of each resistor include the piezoresistance,
resistance and temperature sensitivity, and the time and cyclic stability of these properties.

The value for each resistor in the bridge can be expressed to a first order approximation as

R.- = P(T)[1+K(T)5.]DA.,

where R. = resistor i,

2
:3
ll

temperature dependent resistivity,
7r(T) = “11' = temperature dependent longitudinal piezoresistance,
. - average longitudinal stress in resistor i,

5.
l

D - 2 - ratio of designed physical dimensions of resistors,
l

= designed length of resistors,
A = designed cross-sectional area of resistors,

A. = fractional variations in ratio D for resistor i.

The first-order model was chosen principally due to the lack of general knowledge about
higher-order coefficients [51].

In Appendix B.5, the finite element analysis results are used to develop the average
stress along the resistor length as 206.3 g/um-s2 per g acceleration. A value of 200
glam-82 is used throughout this section.

By considering the bridge structure, the properties of the resistors can be

converted into the standard performance characteristics of output to applied acceleration,

 

74

offset, span and equivalent resistance. The transfer firnction relating the output voltage,

V0, to the supply voltage, V3, for the bridge shown in Figure 23 is

Kg _ R1R4 ‘R2R3
V, (Rl +R,)(R, +R,)'

 

The ideal transfer function is obtained by inserting the definition for the resistors
and assuming that all resistors have ideal size and operate at ideal temperature. The

transfer function can then be expressed as

V p(1+7z3)D.pD-pD.(1-n3)D

y:— — [p(1+ 7:3)D +pD][pD +p(l - 7:3")D]

 

__ 27:3"
44??
~ — . —~ —4
7912-7: srnce 71'0'~1X10 per g,
where 51 = -53 = 3,
<52 = (34 = 0.

The nominal output voltage per applied g is found using the bridge supply voltage.
With a supply of 15 V,

V0 = %7E(—S-VS
= 750 uV/g.
Under ideal conditions, the equivalent, resistances of the bridge as seen by the
supply and the output amplifier are

Ram = (R1 +R,)//(R, +R,) = 2700 Q,
R,q W, = (R1 +R,)//(R2 +R,) = 2700 O.

75

3.4.1 Resistor Dimensional Effects

Any dimensional changes common to all resistors will be canceled out. A change
in any single resistor R, can be represented by a percent deviation from the length/area
quotient, A,. As an example, if Rl varies and the other resistors remain unchanged, the

transfer firnction becomes

V _ (1+7rE)A, -(1—7r6)

i T [(1+ 7:6)11, +1][(1— n3)+1]'

Figure 25 Shows the change in output voltage per supply voltage per g due to different
changes fi'om nominal size in R1.
A worst case occurs if the dimensions of R1 and R4 are increased on the same

device that R2 and R3 are decreased. The transfer fimction becomes

V0 A2(1+7rc_r)-§(1—7r3)

Z— — [A(1+ n3)+§][§(1— 7:3)+A]’

 

where A = fractional increase in R1 and R ,

i = fractional decrease in R2 and R3.

Figure 26 graphs the change in output due to acceleration for dimensional variations in A
from unity.

The offset, or zero, is defined as the unstressed bridge output. The span is defined
as the outputs over the range of inputs from zero to maximum. Related measures are the
slope, the slope of the line between the outputs at maximum and zero inputs, and the
sensitivity, the span divided by the maximum operating input. The general fianctions for

the half-active bridge are

 

76

 

i

 

2% dimensional change

1 g s r

......u

w
I

l

 

 

output (mVN)

 

2 g g 5 t i g t
1° 0 dimensronal change ,‘ ' , .
l q ...- . ......_. 4..-. . ‘ : ... .3 -.-. . .. 2....-. . r7" . ...n, . ...i. -..? ...... i ....-. «...,
. , .

 

0 ....._...0% dimensional change; 7 __ -.., .-....

 

5 i t i

 

 

up... ”...... -

 

db
q -.. .. .....
p-

 

-rl
-lO-8-6-4-20246810

acceleration (g)

Figure 25. Bridge output for dimensional changes in R1.

 

. i . i
g -.... “whiz... . u... i...“ .....- +..... .....n . 'é'w ...—..-..m

3% dimensional change ’: é.
‘ l t i t

l l l l t

.. ”1......“ .. ..L...

i
l

 

I
1
r

 

 

i— u— H o—-

\O I-I Us) LII \l

l I l l l
I

 

 

 

1% dimensional change T

 

l

E l l i l

V . . ' . i

g 7 ‘ ...... ....-. ... ...... . a... ... .4"... ”......" .....l....._........ . i. ...... .. .._...W.-.v.. .. ...-._ 1......“ «..., TM . "...... 9%.... .-.....-. ....
3

O

 

1.
t 1 l i 1
3 q .... «...... 49.... . ...... ....L-....._.... ...... , .. ...... .. .....a... ...... .. a... «...-.. ...-.. .. .....-. ....._ 10a...“ ..... .... ...i..- .. ......Ma

1 ..-...-.......- 0% dimensional change~~ .--...l

 

 

 

 

 

 

 

 

 

 

 

 

1
-10 -8 -6 -4 -2 0 2 4 6 8 10

acceleration (g)

Figure 26. Bridge output for dimensional changes in all resistors.

 

77

 

 

 

 

V0 V0
8 an =— ‘—
p VS 3:3,, S 5:0
_ (1+ 7:3,”)A,A, — (1 — 7:6,)A,A, A,A, — A,A,

 

" [(1+ 7:3,)A, + A,][(1— 7:6,)11, +A,] (A, + A,)(A, + A,)’

where the maximum stress, 6”,, is due to a 10 g acceleration. Expressions showing the

effect on offset and span to increasing R1 and R4 and decreasing R2 and R3 are

 

A2—-‘2-
offset=—2—A—w
2+A +23%
_ 4+2A2+2§+7famiA2’T)
san=71r ' i
p "' l2+a2+o][2—neat+(l+zra.)424143023]
-fl
2+N+fii

Figure 27 shows the effect of dimensional changes on the offset and span. The
dependent axis of each graph represents fractional changes in the ratio of the resistor
length to the resistor area. The graphs represent a worst-case condition that results from
increasing R1 and R4 by the same factor by which R2 and R3 are decreased. The
approximate formulation for span is used.

No more than a 3% deviation in dimensions is expected, with about 1% due to
diffirsion differences and 2% due to mask variations [45]. This is modeled by a
dimensional increase in R1 and R4 of 1.5% and a decrease of R2 and R3 of 1.5%. The

offset increases by approximately 0.5% of the supply for each 1% dimensional change in

 

78

 

(WW)
8 3
A as
\O \O
O\ 00
a :

 

 

 

 

3 494.94 -~
8‘
494.92 -
494.88 5 a
0.97 0.98 0.99 1 1.01 1.02

fractional dimensional change (Al/AA)

a) Dimensional effects on the span.

1.03

 

15

10 -*

offset (mVN)
O

i
i

 

l 4’ i i
U I

-15 . . . .
0.97 0.98 0.99 1 1.01 1.02
fractional dimensional change (Al/AA)

b) Dimensional effects on the offset.

Figure 27. Dimensional effects on the span and offset.

 

 
    

 

1.03

79

worst case, producing a 1.5% offset. The span changes by 0.02% of the fill] scale due to a
3% dimensional change in the worst case.

The steady state acceleration value must be removed for the feature extraction
logic. This will be done by filtering the bridge output as discussed in Section 3.6.3.
Therefore, systemic offset errors will not affect the overall operation. Also, each device
will be tested for gain, with any deviation corrected by the filter gains or by adjusting
thresholds. Therefore, systemic span errors will not affect the overall operation.

The variations in the equivalent resistance seen by the supply and the load are also

affected by dimensional changes. The worst case occurs if all resistors change by a factor

of A, resulting in

Req source : [pD(1+ 7T3)Al +pDA2]//[pD(1_ 7(6)A3 +pDA4]

 

_ 4A2 — HZOJAZ
4A
e pDA,
Req load z pDA

The bridge input and output resistances vary linearly with dimensional changes.

3.4.2 Resistor Temperature Effects
This section examines the effects on the bridge characteristics due to changes in
temperature. Throughout the following calculations, the stress and dimensions of the
piezoresistors are assumed to be independent of temperature. Also, all piezoresistors are
assumed to be at the same temperature, the ambient temperature of the chip.
- Changes in temperature affect both the resistivity and the piezoresistivity.
However, since there is assumed to be no dimensional changes due to temperature, the

resistivity change effect will cancel out of the bridge transfer function.

80

 

l 15 f
110 -
s

. 5 i i
. l .'
l l

 

 

 

85 .L . .
.40 -20 0 20 40 60 80 100

temperature (°C)

Figure 28. 1:44 vs. temperature.

The piezoresistance coefficient has a slightly nonlinear dependency on temperature
at the proposed concentration and throughout the working temperature range. Figure 28
graphs the experimentally determined piezoresistance coefficients for p-type doping at
9x 1013 cm‘3 concentration (developed from [52] in Appendix 36).

The temperature dependent transfer firnction is

V. (”atria-(Lama)

V: [(1+ 71(T)'6') +1][(1- 7r(T)3) + 1]

_ 27r(T)3'
’ 4-zfimal'

 

Figure 29 shows the relation of bridge output to applied stress using temperature-
dependent longitudinal piezoresistance approximated by taking one-half of 1:4,, as

developed in Section 3.3.3.

 

81

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.6 , i T
l s
E l ‘
0.2 {... , , .. T
>
5 o .. - . .
H i i é
:1 3 g
9‘ ‘ i 1 - _ - 0 C
:3 -0.2 , l ..
O s
o 4 i —— 20 C
i t - r ' - 40 C
'0 6 l i i I i 1 if n i f 1 . 1’ L n 5' 1

 

 

~10 -8 -6 -4 -2 0 2 4 6 8 10

acceleration (g)

Figure 29. Temperature effects on the bridge output.

The zero offset is not affected by variations in temperature using the first-order

model. The span is affected by temperature, resulting in the function

SPAN: 211(2T)o:2.
4—7: (T)O,,,

 

The temperature dependent span is graphed in Figure 30. As stated in Chapter 1, the
assumed working temperature range for the monitored bearing is 20 °C :20 °C (32 to 104
°F). Over this range, the span exhibits a 9% change, implying that some form of

temperature compensation is required. Temperature compensation is discussed in Section

3.6.1.

3.4.3 Beam Thickness Effects

The principal manufacturing dimensional effect is the etching of the beam

thickness. The process requires cutting through about 400 pm of material to leave the

82

 

span (uVN)
til
0
O

 

 

 

 

450 --
400 a . . .
.40 -20 0 20 40 60 80 100

temperature (°C)

Figure 30. Temperature effects on the span.

10 pm thick posts. The depth of the out not only determines the thickness of the beam,
but the width of the bottom of the beam, the length of the beam and the suspended mass.
These affect both the natural frequency and the stress on the piezoresistors that, in turn,
affect the span and offset. The changes in the stress per g acceleration and in the
fundamental frequency due to beam thickness variations are shown in Figure 31. The
graphed values of average stress and fundamental fiequency were obtained using ideal
beam theory calculation. They should be used to obtain an indication of the amount of
variation to be expected, not of the exact values. The formulas used to obtain the graphed
values are derived in Appendix B7.

The variation in average stress per g that results from etch thickness differences
will change the sensitivity of the accelerometer. If the change is not excessive, it can be
compensated for by increasing or decreasing a filter gain in the feature extraction section,
or by changing the decision thresholdlevel. Variations in fundamental frequency will not

adversely affect operation as long as the frequency response remains flat to 5 kHz.

 

83

 

 

 

  
 

 

 

 

  

 

 

 

360 ,. , . . 22
\ 340 . , average stress 3., 21
§ 5 - - - fundamental ,f/’ 8‘
a) a . . ..
z: ; =15 '-"
,3? :3 300 .- --:- ' . 195.1> a
0 ,2 i t:
3, § 280 ~ ~18 g ‘3’
"8‘ ~ .2 g
1:5 90 260 ., .-...- ’ 17 g
g 240 .-/,/ : . . ' ' , ' . 16 E.
,I
220 l i l i l e e c l 15
-l -O.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

change in thickness (um)

Figure 31. Beam thickness effects on stress and fiindamental frequency.

3.4.4 Nonlinearity, Hysteresis and Repeatability

Nonlinearity (also known as linearity) expresses the difference between the actual
output and a linear output, usually expressed as a percent of full scale output (F SO). The
definition for the linear output varies. The two most common are a line between the zero
input and the maximum input, and a least-squares, best fit line through the curve.
Hysteresis represents deviations in the dependent output between increasing and
decreasing independent variables. Often, this includes temperature cycling. Repeatability
(also known as stability), represents a device's ability to resist parameter changes over
time. Tests are sometimes performed while cycling independent parameters such as
acceleration or temperature, sometimes done statically and sometimes as a combination of
these methods. A final parameter, accuracy, is used to represent the combined error

introduced by nonlinearities, hysteresis and repeatability.

84

Each of these parameters is strongly dependent on the physical characteristics of
the device under test, the test conditions, and the test procedure. Therefore, the results
are difficult to predict theoretically and are usually determined experimentally. Since the
device described in this paper has not been built, these parameters have not been found.
The results of similar devices that have been tested will be presented to provide an
indication of expected results. All of the devices discussed use implanted piezoresistors.
The actual terms used in the reports have been reproduced here.

One of the first accelerometers reported has a 0.45 mg mass suspended by a
cantilevered beam. This device exhibited il% nonlinearity F SO [53].

Recent commercial accelerometers include a family of four-post accelerometers
from ICSensors that exhibit an accuracy of i0.2% span typical and i1.0% span maximum.
The literature defines accuracy as "repeatability, hysteresis and linearity (best fit straight
line)" [54].

SenSym offers a series of four-post accelerometers that have 0.3% FSO linearity
typical and 1.0% FSO linearity maximum. Linearity, for their pressure sensors, is defined
as "the maximum deviation of measured output at constant temperature (25 °C) from best
straight line determined by three points (offset pressure, firll-scale pressure, and one-half
firll-scale pressure)" [55].

Micropressure sensors were developed before microaccelerometers and, therefore,
a larger body of work exists to describe them. Since they are closely related to
accelerometers, results should be similar.

Siemens reports a family of pressure sensors with s :l:0.2% nonlinearity, s i0.2%
full scale temperature hysteresis, and s i0.5% firll scale/annum long term stability. The
stability was determined fi'om temperature cycling (-60 to 150 °C, 1000 cycles), storage at
temperature (150 °C for 5000 hours) and temperature-stress storage (150 °C and 15V

inverse voltage for 5000 hours) [56].

 

85

Foxboro/ICT has developed a sensor with a temperature nonclosure, or "shift of
zero or span after temperature cycling expressed as % of span," of below 0.1%. Also, the
"long term stability of temperature slopes at zero and span" is 0.02% [57].

Finally, a recent experimental sensor from China showed the average of three units
to have values of 0.15% FSO nonlinearity, 0.09% F SO hysteresis, 0.15% F SO
repeatability and an overall accuracy of 0.32% F SO. The worst of the three had an
accuracy of 0.43% FSO [58].

3.5 DEVICE CONSTRUCTION

This section considers three issues associated with the microaccelerometer
fabrication. First, a technique is described for accurately micromachining the beams and
mass. Second, the compatibility of BiCMOS and micromachining is briefly discussed.
Third, the device packaging and its effects on damping ratio and over-acceleration

protection are reviewed.

3.5.1 Beam Micromachining

The basic shape of the device is determined by a wet chemical etch. This process,
known as bulk micromachining, is accomplished after all electronics have been constructed
and protected with a silicon dioxide layer. Traditionally, the etch has been one of the
hardest fabrication procedures to control due to the ratio of starting thickness to ending
thickness (approximately 40 to 1 in this application) and the dependence of the process on
temperature, agitation and etchant variations. ‘

The process can be converted from one of controlling etch rate to the more precise
task of controlling epitaxial layer thickness by using an electrochemical passivation etch-
stop. Electrochemical passivation involves exposing a p-n junction to the etchant. One

side of the junction is connected to a voltage source. The other side of the source is

86

CONSTANT
VOLTAGE

 

AHODE

....
u cormscr 3 HP! 2M

DIFFUSION l 404:!!!
P-SW 3501!"
3 400°C!!!

Pt
3 WAFER QELECTUODI

annnen ,

 

 

 

 

 

HEATER

Figure 32. Etch-stop apparatus [60].

attached to an electrode suspended in the etchant. A positive voltage applied to the
junction causes the etch to proceed at a normal pace. When the junction is reached, the
etch is greatly reduced and the current flow is reduced [59].

One particularly well suited method was reported by NBC, and is shown in Figure
32. A 20 pm thick, 4 Q-cm n-epitaxial layer was deposited on a 350 pm thick, 40 Q-cm
p-type substrate. This was then suspended in a hydrazine-water solution at 90 °C with a
platinum electrode to complete the circuit. After over two hours, the supply current
dropped and etching ceased. The etching is thought to have stopped completely due to an
oxide film formed at the surface of the n material. 1 mm x 1 mm x 20 um diaphragrns
were constructed with a thickness variation of 21:2 urn due solely to epitaxial layer variation

[60].

 

87

A similar process employed by the Electron Physics Laboratory at the University
of Michigan produced 1 mm x 1 mm x 10 um diaphragrns using an ethylene diamine --
pyrocatechol -- water (EDP) etchant. The results showed 75% of the devices within
i1 pm, the tolerance of the measurement device [45]. A similar technique yielded test

membranes 1.5 pm thick [59].

3.5.2 Process Compatibilities

Key to manufacturing the monitor is the ability to integrate bulk micromachining,
analog electronics and digital electronics on the same substrate. A BiCMOS process,
blending the best characteristics of bipolar and CMOS devices, offers the best opportunity
to meet the performance characteristics required by the monitor.

To date, no descriptions of BiCMOS bulk micromachined devices have been
published. However, all the component technologies appear to be available. Bulk
micromachined sensors compatible with either CMOS electronics [58, 61] or bipolar
electronics [62, 63] have been reported. BiCMOS has been successfully combined with
surface micromachining to create a high-g accelerometer [64].

Mixed analog and digital BiCMOS processes have been developed for the
telecommunications industry [65-69]. BiCMOS digital circuits can offer the high density
and low power dissipation of CMOS and the increased drive ability and subsequent
reduced switching time of bipolar processes. In analog systems, the higher
transconductance and lower noise levels achieved with bipolar transistors can be coupled
with the ability to produce simple and accurate switches, high impedance inputs, charge
storage nodes and complementary transistors [70]. One technology offers supply voltages
to 18 V, typical digital gate delays of 4.5 ns, interface cells corresponding to NHL STD
883C, and ROM, PLA and switched capacitor filter compilers [67].

The key to combining BiCMOS and bulk micromachining is properly preparing the

wafer for etching prior to electronic processing steps. The growth of a 10 um n-type

 

 

La)

88

epitaxial layer on a p substrate is compatible with both bipolar [71] and CMOS circuitry

[61]. This p-n junction forms the stop for the etch process described in Section 3.5.1.

3.5.3 Packaging Benefits

This section examines how packaging can be used to set the damping ratio and
prevent over-acceleration damage. The packaging consists of two additional
micromachined wafers that form a cavity around the wafer containing the device. Figure
33 shows a conceptualized cross-section of such a device available from SenSym.

Proper damping of the device is required to limit travel at resonant frequency and
to assure a flat vibration response to 5 kHz. In an experiment with one of the first
microaccelerometers, various fluids were tried. The results showed a linear relationship
between viscosity and damping ratio. In order to come close to the desired damping value
of 0.7, a silicone oil was proposed [53]. Unfortunately, these oils have densities close to
that of bulk silicon, reducing the effective mass and, hence, the sensitivity [72].

Recent devices use squeeze-film damping. This technique limits the flow of air
around the moving mass. Air is a good fluid for this purpose because of its low density
and because its viscosity is relatively insensitive to temperature variations. A i15%

variation in viscosity from —30 to 75 °C was reported to cause a $1.2 dB change in

HEZOGESISTIVE
ELEMENTS

oertecrrou
3"” ‘ AIR cavmes

   

BONDING PADS

  

‘ T168:
., y ...a
oil”?

..a ‘8.@

hi"
4

INERTIAL MASS

Figure 33. Accelerometer package cross-section [55].

89

sensitivity at resonance for a critically damped part [73]. The viscosity can be adjusted by
opening channels in or narrowing the base material near the mass.

Over-acceleration is a problem with microaccelerometers. Any acceleration large
enough to create a stress in excess of the yield will damage the device. Since this
maximum stress is dependent on the mass displacement, limiting the mass travel will
eliminate this mode of failure. This is accomplished by using stops placed on both the top
and bottom support structures, as shown in Figure 33. ICSensor [73], SenSym [55] and
Nova Sensors [74] all produce devices utilizing this technique. One Nova Sensor product

has a working range of i2 g with an over-acceleration range of 1500 g in any direction.

3.6 ELECTRONIC CONSIDERATIONS

This section covers issues related to converting the change in resistance to a
voltage that represents the acceleration. It opens with a discussion of temperature
compensation and the bridge supply. Next, the principal sources of noise and their effect
on the system are considered. The specifications for the bridge output amplifier are then
developed. The final segment describes the analog electronic subsystem for amplification

and offset reduction.

3 .6.1 Temperature Compensation

Analysis in Section 3.4.2 indicates that changes in device operating temperature
strongly affect the piezoresistor bridge. To a first-order approximation, the offset is not
afl‘ected by temperature. However, some form of compensation must be applied to
correct for the 9% variation in span across the range of 0 to 40 °C.

Many techniques have been proposed to compensate for temperature variations.
Passive compensation is the simplest method. Resistors are placed across portions of the

bridge to modify the balance and output level. An ICSensors pressure sensor uses three

90

external resistors to compensate for offset, temperature coefficient of offset and
temperature coefficient of span [75]. The major drawbacks of this technique are the
requirement for testing under operating conditions and the addition or adjustment of
passive components after the device is constructed.

A second method involves a temperature sensitive gain element placed in the
bridge output circuit. Devices use resistors with positive temperature coefficients in
feedback to compensate for the negative temperature coefficients of the piezoresistance.
Several pressure sensors have been built implementing this technique with bipolar [76] or
MOS circuitry [77].

A third method introduces a reference signal for calibration or comparison. One
proposed device uses electrostatic deflection to place a known stress on the piezoresistive
bridge. This stress is used to calculate span compensation in a ratiometric analog-to-
digital converter (ADC) [78]. A constructed accelerometer uses the difference between
the output of half-active bridges placed on support beams and the outputs from similar
bridges on dummy beams, removing temperature and construction induced offsets [73].
This technique requires either multiple matched amplifiers, or multiple or shared ADCs.
Due to its comparative nature, this method has a greater impact on offset effects than on
span effects.

A fourth method increases the supply voltage as a function of temperature to
compensate for the negative temperature coefficient of the piezoresistance. One
implementation uses two npn transistors with different current densities to generate a
voltage proportional to absolute temperature. This signal is amplified and added to a
temperature insensitive band-gap reference voltage. The sum is increased to provide the
bridge supply [79]. Several integrated pressure sensors have been constructed using
similar techniques [63, 80].

The bridge supply modification method is recommended for the bearing monitor

because of its proven ability to reduce the temperature coeflicient of span and because it is

91

easily integrated into the monitor system. A block diagram of an implementation is shown
in Figure 34.
The bridge supply voltage, VS(T), can be expressed as

v,(:r)=G-(v +kV )=G-( ,,,+aT),

ref temp

where Vref = temperature independent reference voltage,
= temperature dependent voltage,
G, k = amplifier gains,

or = temperature gain factor (V/°C),

T = temperature (°C).

The values of G and or were found using the least squares method [81] on the temperature
dependent span values at three points, the nominal temperature (20 °C) and the operating
limit temperatures (0 and 40 °C). With a reference voltage of 0.644 V [79], the resulting

values are

G = 1.48x 15 = 22.2 V/V
2.28 mV/°C.

:2
ll

 

Vref

 

Figure 34. Temperature compensating bridge supply.

,92

Figure 35 presents two graphs demonstrating the effectiveness of this scheme. The
first graph shows the temperature span with negative temperature sensitivity, the
normalized linear bridge supply with positive temperature sensitivity and the resulting
compensated span. The second graph plots the compensated and uncompensated spans as
a percentage of the uncompensated span at 20 °C (% change in span). The variation in
span over the desired temperature range is reduced fi'om 9.09% to 0.34%.

These results represent a "best case" scenario. The voltage reference and
electronics are assumed to be independent of temperature, the temperature sensitive
voltage source is assumed to be linear with temperature, and the gain values G and or are
assumed to be precisely adjustable. One device, constructed with a separate integrated
circuit for electronics and piezoresistive pressure sensor and with external adjustable gain
potentiometers for or, reported a deviation in sensitivity of 0.78% in the range of —40 to
100 °C [79]. This demonstrates the effectiveness of this method except for the impact of
gain variations. The second graph of Figure 36 includes the effects of increasing G by 5%
while or is increased and decreased by 5%. The average change in span is about 5%,
representing an increase in overall sensitivity. The deviation in span across the
temperature range of interest increases to 0.35% when or is decreased by 5% and the span
deviation increases to 0.57% when or is increased by 5%. The average span increase is
fixed in a given device and can be compensated by adjusting the digital filter gains or mean
squared threshold value in the feature extraction section. Decreases in gain values G and
or yield similar results.

This method is particularly suited to the sensor system described in Chapter 1.
The temperature sensor, voltage reference and associated electronics can be located on the
common interface integrated circuit chip. The final gain, G, can be set for each specific

sensor type on its integrated circuit chip.

 

span (uVN) @ 108

% change in span

93

 

 

— - uncompensated span
, compensated span .
550 “T" \‘i ”“ - - - - normalized supply z

r.”

 

 

 

 

 

'/
’i

 

i i -
i t I ‘ i
: ' I ‘ i :

500 qp...“ ......_............ .... .... . .. ,,_.,,..,,_. -.. . .... . .... ...- ...... ..m.......... . ....f. ......n. .. ....... ....... .. 4...... ........ ..
- : '. :' \ ?
. ’ i \ s

 

A
‘6
\i

I
/

 

 

 

400 a , i l
40 -20 0 20 40 60 80

temperature (°C)

1.2

fl
H

4.
9
so

normalized supply (V/V)

 

N
O

...—a
M
l

\

H
O
l

' i - . ;
. . . . .
' 1 ' I : t

.

.

t

1 p

t

 

{II
1

 

 

O

 

I
U!

 

 

- 1 T i
: : i z 3
l l r !
r e s s s
- - --. ...“ ...-..... ..........;-...._....... .. . ..-.,.. ....... 1"“ ...... .. .... .. .....- 1' ..... ..... . ....... . ”1.. 4: .......... .... ....... .. ......Y.......-. . ..-..-... .. .. .. .-....T .. ..--.. .-.—..rnr— — ... -4
‘ :
. I I I
I - 1 o

 

 

 

-1 5
20 40 60

temperature (°C)

-40 -20 0

Figure 35. Temperature compensation of the span.

94

3.6.2 Noise Effects

The two major sources of electronic noise are expected to be the piezoresistors
and the bridge output amplifier.

Three primary forms of noise are typical in electrical circuits: shot noise, thermal
noise and l/f noise. Work on pressure sensors indicates that the thermal noise is the
dominant source in piezoresistor based sensors [82]. The effect of the thermal noise on
the system can be determined by passing the power spectral density (PSD) of the noise
produced by the resistors through a transfer fianction representing the monitor electronics
up to the feature extraction stage.

Thermal noise has a flat power spectrum throughout the frequencies under

consideration. Its PSD, S,,(co), can be expressed as [83]

Sn ((0) = 2kTR,
where k = 1.38x10‘23 J/°K,
T = temperature in °K,
R = resistance in Q.

The noise PSD at the feature extraction stage, SR(co), is

8.0») = S.(co>|Hrco)|2.

The noise power, PR, is found by integrating SR(0)) over all frequencies, or

p, =,i,.,[:s,,(co)d6
=41:er |H( f)|2 df.

The system transfer firnction, H(s), is developed in Section 4.5.2. The area of the

magnitude squared of the transfer function is numerically integrated in Appendix C6, and

95

is found to be 1.32x109 Hz. The area includes the voltage gain through the amplifier of
388 calculated in Section 4.3. The resulting noise power at 20 °C is 5.77x10—8 V2.

Due to the small signal level put out by the transducer, the first amplifier is critical
to system operation. Principal among its characteristics must be a low level of noise.
Several projects report amplifiers in BiCMOS with an equivalent input noise voltage
density of 8 nV/s/E RMS [67, 84]. One particularly quiet amplifier designed for an
audio tape preamplifier has a measured input-referred noise level of 300 nV RMS
CCIR/ARM over the range of 20 Hz to 20 kHz [85]. An input-reflected density of 8
nV/JHZ— will be used in noise calculations for this project.

Assuming a flat PSD and the same transfer firnction used to calculate the resistor

noise power, the amplifier noise power, PE, is

PE = (8 x 10")2 (1.32 x109)
= 8.46 x10'8 V2.

The combined noise power is the sum of the constituent powers, or

PC = PR +PE
=1.42x10" v2.

This results in 377 [IV RMS output noise.

A temperature increase to 40 °C raises the resistor noise power about 7%. If
temperature affects the amplifier in a similar fashion, the combined noise power becomes
1.52x10'7 V2.

An indication of the effect of the noise on the system can be obtained by
comparing its amplitude to that of an expected signal. From the bearing model derived in

Chapter 2, the minimum mean squared value in the rang of 0 to 5 kHz is above 0.01 g2, or

96

8.47x10‘4 V2. This results in a signal-to-noise ratio (SNR) of 37.8 dB. The SNR
decreases to 37.5 dB at 40 °C.

Another useful indication of the noise effect is to compare the combined resistor
and amplifier noise to the quantization noise of the ADC. Assuming ideal quantization,
the quantization noise power, Pq, is

2

 

m

Pq:31?

where mp = peak value (10 g, 2.91 V),
L = number of quantization levels.

Figure 36 shows the nominal combined resistor and amplifier SNR at 20 °C, quantization

SNR and cumulative "total" SNR.

 

 

   

 

electronic noise

 
 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

- - - quantization noise
_ | total noise
0 e i l
7 8 9 10 1 1 12 I 3 14 l 5

number of bits

Figure 36. Approximate system noise effects.

 

97

3.6.3 Amplification and Offset Reduction

Offsets present problems in microsensors because their values are often several
orders of magnitude greater than desired signal levels. An offset fi'om the monitor
accelerometer will appear as a large mean squared error in the feature extraction section.
Therefore, some form of offset elimination must be employed. Table 6 lists offset sources
for the monitor accelerometer.

The effect of resistor size variations on the offset are developed in Section 3.4.1.
The four bridge resistors are expected to show no more than a 3% deviation in value
between them due to size variations.

Section 342 shows that, to a first-order approximation, temperature does not
affect the bridge offset. However, stress on the beam results from the bimetal effect
between the silicon and silicon dioxide layers due to the differences in thermal expansion
coefficients [78]. Additional thermal stresses may be introduced by packaging. The
maximum of the temperature dependent offset depends on how the transducer is
constructed. Recent improvements in manufacturing have reduced uncompensated

thermal offset to 32% of the firll scale output between —40 and 85 °C in a :2 g

Table 6. Offset sources.

 

 

 

 

 

 

 

 

 

Source Offset (mV) Comment
bridge resistors i225 3% variation between resistors
temperature i15 estimated thermal stress effect
single-sided supply 7.5 60 dB CMRR
gravity i075 1 g x 750 pV/g

 

98

commercial sensor. The sensitivity of the sensor is 2.5 mV/g [86]. A 15 V supply results

in an offset of

V

offset

=2%x2.5mV/V/g x15Vx2g
=15mV.

The commercial accelerometer has a modified cantilever design, significantly different
from the four post design used in this project. Also, the commercial accelerometer has no
integrated electronics, allowing the manufacturing process to be optimized for the sensor
characteristics. A factor of 10 is introduced to compensate for these differences. This
brings the thermal offset effect close to the values observed in experimental sensors [78].

The use of a single-sided bridge supply introduces an offset due to the common
mode gain of the differential amplifier connected to the bridge output. Because the bridge
is designed to be balanced, the common mode input will be one-half the bridge supply
voltage, or 7.5 V. A conservative 60 dB common mode rejection ratio (CMRR) for the
amplifier will result in a 7.5 mV offset.

A final source of "offset" is the effect of gravity. Since the sensor can be mounted
in any orientation, a constant signal of up to i750 uV may be combined with the vibration
signal. Since this constant will add to the overall mean squared value, it should be
removed before feature extraction.

The offset voltage can be removed by analog or digital filtering. However, the
offset voltage is almost four orders of magnitude greater than the signal produced by a 0.1
g RMS input. Without filtering, an amplification of the vibration signal to obtain a
sufficient signal-to—quantization noise level would produce a constant value that would
saturate the amplifiers. Figure 37 presents a conceptual subsystem diagram for amplifying

and high-pass filtering prior to the ADC.

99

Figure 37. Offset reduction and amplification.

 

€26

 

 

 

 

 

The first amplifier gain of 20 is designed to increase the differential signal level
without allowing the DC level to exceed 5V. The resulting vibration signal level is 1.5

mV/g. The coupling capacitor CC, forms a first-order high-pass filter with the transfer

 

firnction
Rf
H(s) = 1‘
s + —
R,Cc
The cut off frequency, 0, is
1
fc = -
27IR,CC

The bearing vibration signal contains relevant spectral components above 100 Hz,
suggesting a cut off frequency no greater than 10 Hz. The input resistor value must be
limited in magnitude due to construction and thermal noise limitations, forcing a large
capacitance value. For example, a 16 k0 resistor will require a 1 11f capacitor to produce
a 9.9 Hz cut off. The size of this capacitor prohibits its integration on the sensor IC.

The second amplifier stage has a gain of 19.4, resulting in an amplifier gain of 388
V/V or 291 mV/g. The amplifier gain is calculated in Section 4.3. The signal is then low-
pass filtered and digitized. Chapter 4 presents the design of the ADC subsystem.

CHAPTER 4 OVERSAMPLING A/D CONVERTER

The conversion of the analog transducer signal to a digital format is an integral
part of a smart sensor. One reason is that the transducer signal must be digitized if digital
logic is used for on-chip information processing. Additionally, a digital format provides
greater immunity to noise.

Chapter 2 developed minimum specifications required by the monitor for digitized

accelerometer signals. These constraints result in the following analog-to-digital converter

(ADC) specifications:
0 5 kHz conversion frequency
. 9-bit accuracy on chip
. support for 12-bit accuracy off chip
. iIO g maximum input signal range
. 40 dB minimum dynamic range

In addition, the following design goals should be met to minimize the cost of the device

and facilitate solid state manufacturing:

. No precision components
. Small size and low complexity
. BiCMOS processing compatibility.

This chapter opens by explaining the reasons for choosing an oversampling A/D
converter over other. architectures. A description of the basic operation of a sigma-delta
modulating converter is given in Section 4.2. A calculation of the amplification of the
transducer signal prior to conversion and the oversampling ratio is presented in Section
4.3. This is followed in Section 4.4 by the development of the decimation filter, including
a new classification scheme and a novel implementation for minimum area. Section 4.5

discusses details of the final converter system. Section 4.5.1 provides a summary of the

100

101

system and simulation results are in Section 4.5.4. Appendix C gives details of

calculations used in Chapter 4.

4.1 SELECTION OF A/D CONVERTER TYPE

Many architectures are available for converting analog signals to digital. Most can
be grouped into one of four classes: serial, successive approximation, parallel and
oversampling.

Serial converters include single-slope and dual-slope devices. A single-slope
converter compares the input voltage to an increasing ramp voltage that starts at the
minimum level. A counter records the number of clock periods until the ramp voltage
exceeds the input voltage. If the maximum clock value corresponds to the time required
for the ramping voltage to reach the largest converter voltage and the minimum clock
value corresponds to the smallest voltage, the clock count is the digitized output. A dual-
slope converter uses a reference voltage in the count-up phase and the input voltage in the
count-down phase. The ratio of the counts is equal to the ratio of the voltages. Serial
converters require a reference voltage, but do not require precision components. The
major drawback for this application is the slow operating speed, limiting conversion
frequencies to less than 100 Hz [50].

Successive approximation converters use a comparator and a digital-to-analog
converter to make a sequence of estimates about the input voltage, each estimate deciding
the next significant bit. Difl‘erent architectures result from different D/A converters,
including voltage scaling, charge scaling, serial and algorithmic. These methods require a
voltage reference. Both the charge and the voltage scaling methods also require ladder
arrangements of resistors or capacitors with precise ratios. The serial method is based on

charge distribution between precisely matched capacitors. The algorithmic method uses a

102

pipelined architecture to sum the analog output due to each bit, requiring precise capacitor
matching in the summers and low noise circuitry for the low-order bits.

Parallel, or flash converters, use resistor or capacitor ratios to develop all the
output bits simultaneously. Although very fast, these devices require large amounts of
hardware with precise ratios and a precise voltage or current reference.

Oversampling converters sample the input signal at a rate many times faster than
the desired Nyquist rate, then exchange this precision in time for precision in amplitude
using digital filtering. Hence, oversampling replaces the need for exact analog
components with digital processing, a situation ideally suited for VLSI implementation.
The only precise component required is a clock, necessary for the digital processing later

in the monitoring algorithm.

4.2 BASIC SDM CONVERTER OPERATION

This section outlines the operation of a sigma-delta modulated (SDM) analog-to-
digital converter. The description represents a summary of work in the area [87-95]. To
' be consistent with the literature, single-sided spectra will be used.

Standard A/D converters consist of a sharp antialiasing low-pass filter followed by
sampling at the Nyquist frequency, fN, and n-bit quantizing, as shown in Figure 38a. This
process is known as pulse code modulation (PCM). Errors in this type of conversion
result from having a non ideal low-pass filter, inaccuracies and noise in the electronics, and

finite quantization. Considering only the latter, the output can be expressed as
y,- = y(nTs) = x(”Ts ) + e(nTs ),

where e(nTS) is the quantization error. If the quantizer has L levels and a working range

of imp the error e will fall within the range of i§ A, where

103

Ts = TN _

quantizer

 

 

 

 

a) traditional ADC

Ts: NTN , , TN
x(t) X "‘b‘t LPF ~—— )<——» y(kTN)

quantizer

 

 

 

 

 

 

b) oversampled ADC

= NTN __ TN
)( Z—A >(
x(t) modulator LPF _ y(kTN )

c) sigma-delta modulating ADC

 

 

 

V7

 

 

 

 

 

 

Figure 38. Traditional and oversampling ADC models.

The error is usually assumed to be uniformly distributed and uncorrelated with the input.
If it is not, a dither signal can be added before quantization. This results in an RMS value
of

with a spectral density of
E(f) = eRMS s/ZTs-

The effects of quantization can be reduced if the signal is oversampled before it is

quantized, as shown in Figure 38b. The desired signal is recovered by low-pass filtering at

104

the conversion fi'equency, f0, followed by downsampling. This process is referred to as

decimation. Oversampling uniformly distributes the quantization noise across the sampled

frequency range, resulting in a total noise value in the signal band, ng, of

2 f 2 erzws
"o = E (f)df = —N—
0

where N is the ratio of the oversampling frequency to the Nyquist frequency, known as the
oversampling rate (OSR). Each doubling of the oversampling rate yields an increase of 3
dB in the signal-to-noise ratio (SNR), an increase of 1/2 of the value of the least significant

bit in the converted word.

4.2.1 Single-loop SDM

Sigma-delta modulators are used to reshape the noise spectrum, pushing noise out
of the conversion range. Figure 38c shows an A/D converter system using a modulator
quantizer, and Figure 39 presents a block diagram of a single-loop SDM and a discrete
model with a 1-bit quantizer.

The output of a single-loop, or first—order SDM, is the quantized accumulation of
the error between the input and the converted input. The average value of successive
output values will approximate the input. The output can be expressed in terms of the

input and quantization error as

yr wr+e'

I

xi—l + e, _ er—r-
Defining noise n, as the difference between the output and the delayed input,

"1' : er ‘er—l a

105

 

 

x(t) ‘ I yt

 

 

 

 

 

 

 

 

 

 

 

 

D/A

 

 

 

a) analog model

 

 

 

 

 

 

 

 

 

 

:' 'eI- ':
, W.- I :i: I y.-
z . 2 . >——-*
quantizer
b) l-bit discrete model
Figure 39. Single-loop SDM.
with a spectral density of

N10) = E(f)(1- 4"“st ).

|N.(/)l = N.(/) = E(f)2sin(rrfTs)
= ZeRMS ,/2TS sin(1thS).

Figure 40 shows how the noise is shaped in the frequency domain for a 64-times
oversampled system. The number indicates the modulator order, with NOV) representing
oversampling without modulation.

If a low-pass filter is used to decimate the modulator output, most of the
quantization noise can be eliminated. The resulting in-band noise power, n3, is

712
T(

f
n? = ier(f)df~e§Ms 2/0T.)3 since 7.2»702.
0

106

 

 

 

 

 

E
8
8‘
8
‘8
C:
'8
..‘S
'3
E
O
t:
0 1 16 32
frequency (x f“)

Figure 40. Conversion noise spectral density.

Each doubling of the oversampling rate results in a 9 dB SNR gain, yielding a 1‘/2 bit
increase in output word width. The effect of increasing the oversampling rate on
normalized SNR for various oversampling configurations is shown in Figure 41. Ideal

decimation is assumed in the graph.

4.2.2 Double-loop SDM

Additional integrators and feedback paths can be added to further push the
quantization noise out of the conversion band. A second-order SDM is constructed by
placing a second loop around the first-order system. A block diagram and an equivalent
discrete model are shown in Figure 42.

Using the discrete mOdel, the output of the modulator is

Y: = xi—l +91 " 231-1 +er-2 = xr-l +nr-

normalized noise (dB)

 

107

 

20

b . ‘~
Q . i
g .
Q -r
.
o 1 ~ ‘ ............-..‘. ....._. .. 9.... ... ..... .. .w...—.. 'f'" .... ., ..__ .... ‘ . u........ . .
. . g l
' — _ k . . 1
; H — i i 1
. I . - -1 _ _ -
Q — ~ — .
. . - . F — 2 i
, . , . -— .
.... b... _. ...... . ‘.... ... .... ...!“.,~.- ”‘I” .

   
 
   
 

-40 -- i
-60 ..

' '-.J i m
i. 1:: ...-.-.‘l. 0 order.
. - ‘ u . I

i m! i-..
. 1 order a
. ,

-100 ..

 

 

 

-120

1 2 4 8 16 32 64 128 256

oversampling ratio (N)

Figure 41. Effect of OSR on quantization noise.

 

 

 

x“) J- yr

. t m

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

* D/A

 

 

 

 

a) analog model

 

 

 

 

 

 

 

quantizer

 

 

 

 

 

 

 

 

 

 

b) discrete model

Figure 42. Double-loop SDM.

108

The quantization noise spectrum N20) becomes

Nam =E(f)(1-e"2"”‘)2.
lszl = N20) =4eRMSs/2TssszlfTsI

Figure 40 includes the noise spectrum for the second-order SDM. The total in-band noise

power, n3, obtained by integrating to f,,, is
7:4 5
n: z 9121143 -3—(2f0TS) since f52 >> fez.

This yields an increase of 15 dB SNR for each doubling of the OSR, an increase of 2V2 bits
in the A/D converter output word width. Figure 41 includes the relative effects of the
OSR on the SNR for a double-loop system.

Besides better noise spectral properties than single-loop or oversampled pulse
code modulation systems, double-loop SDMs exhibit noise that is effectively uncorrelated
with the input signal, even if the signal is constant [91].

More complex structures are possible. Additional loops can be added, but the
system soon becomes unstable due to slight variations in circuit parameters and may settle
into limit cycles if the quantizer saturates. Single and double-loop modulators can be
concatenated, but precise component matching is necessary. Multiple bit quantizers can
also be used, but this reintroduces the difficulties of flash A/D and D/A converters, since

conversion must take place at the sampling rate [87].

4.2.3 Decimator
The decimation stage consists of low-pass filtering and downsampling.
Downsampling is accomplished by sampling the filter output at the slower, desired rate.

Implementing the low-pass filter presents more difficulties.

109

The low-pass filter, or decimating filter, performs three functions. First, it removes
the quantization noise shifted out of the conversion band. Second, it attenuates out-of-
band signal components before downsampling, reducing aliasing. Third, it reduces the
efl‘ects of circuit noise by frequency limiting the noise power spectral density. To
accomplish these goals, the filter's magnitude spectrum requires a flat pass band, a
reasonably sharp roll off, and good rejection in the stop band. The filter performs
calculations at the oversampling rate, requiring an efficient architecture to minimize
delays. Additionally, the filter should occupy minimum surface area to allow sufficient
room on the IC for other monitor subsystems.

Theoretically, since the output of the SDM represents the average of the input
signal, an averaging filter could be used. Such filters are referred to as sinc filters due to
their sin(f)/f spectral shape. However, this filter does not sufficiently perform antialiasing
or noise attenuation. In practice, the equivalent of several concatenated averaging filters
is used to implement oversampling sigma-delta converters. It has been found that n+1
successive sinc filters are sufficient for filtering the quantization noise of an nth-order
sigma-delta modulator [96]. A filter implementing the logical concatenation of n+1 sinc
filters is referred to as a sincn+1 filter.

Two potential difficulties arise from using a sine"+1 filter: insufficient out-of-band
fi'equency attenuation and magnitude droop in the high frequency portion of the pass band.
Both problems are usually reduced to acceptable levels by partial downsampling after the

sincn+1 filter, additional low-pass filtering, and then final downsampling.

4.2.4 Regions of Operation
The SDM quantizer gives the A/D converter nonlinear operation characteristics.
These can be seen by considering the conversion of a rail-to-rail sinusoid with frequency

within the conversion band, as shown in Figure 43. The top graph presents the converted

0.95

0.45

Signal magmtude
(fi'action of firll scale)

-1.05

0.04

error magnitude
(fiactron of full scale)

-0.03

-0.01 -
-0.02 --

110

 

 

-0.05 '-

A
v—

-0.55 ‘-

 

 

 

time (ms)

a) converted sinusoidal signal.

 

0.03 '-
0.02 --
0.01 "

 

 

 

 

time (ms)

b) conversion error (ADC output — input signal).

Figure 43. Conversion of a rail-to-rail sinusoid.

0111

the

 

 

111

output fiom the 64-times oversampled A/D converter designed in the next sections. The
bottom graph presents the error between the converter output and the input, corrected for
the delay of the modulator and decimator.

The region exhibiting the severest difference between the input and converted
output occurs near the extremes and is due to quantizer saturation. The quantized output
is added to the input signal and, in the case of a two-loop system, the output of the first
integrator. If the input is large and has the opposite sign of the quantization error, the sum
will saturate the following integrator. This produces an input to the quantizer that is
greater than the output level, causing the quantizer to function as a limiter. The
quantization error will then contain frequency components of the input and, hence, will no
longer be uncorrelated with the input. Since the quantizer output is fixed between two
levels, the output power is fixed. The additional harmonic power increases the error
produced by the SDM. It can be noted by observing Figure 43 that the quantizer

saturation problem is not fatal, as the converter recovers from saturation when the input
level is decreased.

In regions away fiom saturation, deviation is due to the SDM operating in the
linear region. This is the expected quantization error, appearing as a smaller random
variation with zero mean.

The magnitude-dependent operation of the converter can be described by
examining a plot of the total signal-to-noise ratio (TSNR) of the output versus the input
signal power. Figure 44 presents such an unscaled, conceptionalized graph. The graph
can be divided into three regions, overload (saturation), normal (linear) and idle channel

[93].

112

 

  
  

saturation

TSNR

 

idle channel

 

 

 

input power

Figure 44. Conceptualized TSNR vs. input power.

The idle channel region results from nonideal circuit operation and the high
frequency limit cycles that result from near-zero inputs. An example of the so-called idle
pattern is a {+1, -1, +1, —1, ...} cycle that could result from an input of zero to a single-
loop SDM. Since the fundamental frequencies of the SDM outputs are one-half to one-
eighth of the sampling frequency, the decimation filter will remove the noise. However
circuit inaccuracies, such as a linear region in the quantizer or a comparator offset, will
disrupt the pattern. This produces low fiequency harmonic noise that dominates the signal

at low levels.

‘ 4.3 TRANSDUCER SIGNAL AMPLIFICATION AND OSR CALCULATION

In this section, the gain for the transducer amplifier and the oversampling ratio are
calculated. These values are necessary for calculating decimation filter parameters.
However, the design process is iterative and the gain and OSR cannot be estimated

without an accurate picture of the hardware that follows. For this reason, and in an

113

attempt to make the design process easier to understand, the final design is used in
calculating the values.

Two related decisions are required in the design of this converter: the
oversampling ratio and the gain of the input signal. With a two-loop architecture, each
doubling of the OSR results in an increase in the SNR of 15 dB. Figure 45 shows the
simulated output signal-to-noise ratios versus normalized input sinusoid power for OSRs
of 32, 64 and 128.

To select the appropriate OSR, the specifications for the input signal must be
considered. The bearing monitor accepts up to 21:10 g and should be able to detect at least
0.1 g. This can be represented as a wedge, as seen by the heavy line in Figure 46. If a fill]
scale input of 10 g is to have 10 bits of accuracy, the point of the wedge must lie at or
above 60.2 dB, and at least 54.8 dB is required for 9 bits.

Due to construction variations and temperature changes, the electrical signals
corresponding to a given acceleration will deviate from device to device and over time.
Specific sources for these deviations include beam etch thickness, piezoresistor
dimensions, piezoresistor temperature dependence, bridge supply gain variations and
transducer output amplification variance. Derivations for the first four were discussed in
Chapter 3. A variation of :t10% will be used for the transducer amplifier and bridge
supply electronics gains. Actual values for deviations depend on the specific process used
to manufacture the device and, therefore, can only be obtained by experimental analysis.
The deviation factors considered are summarized in Table 7. The deviations assume that
any DC value from the transducer has been removed by the offset filter prior to the
converter. It is also assumed that the various deviation causes are independent of each
other, allowing their power effects to be summed.

The effect of the deviations is to widen the range required by the input signal for a

given desired TSNR. The result is shown in Figure 46 as a modified wedge, where the

magnitude (dB)

114

 

output TSNR (dB)

 

 

 

normalized input power (dB)

Figure 45. OSR effects on TSNR.

 

 

 

 

nominal

- - - constructional
variations

   
    

 

+ temperature
variations

 

 

 

 

 

 

.400 «3.8 0 3.9 (dB)
0.1 10 (g)

Figure 46. Signal gain profile.

Table 7. Input signal deviation factors.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SOURCE NORMALIZED EFFECT
Cause Deviation Range Magnitude Power (dB)
Beam nominal 10 1 .000
Thickness +10% 1 1 0.796 —I .98
mL —10% 9 1.281 2.15
Resistor Size nominal 1.000
AI/AA) 53% 0.9998 . —0.002
Amplifier nominal 1 .000
Electronics —10% 0.900 —0.92
(Again) +10% 1.100 0.83
Bridge Supply nominal 495 1.000
Electronics —10% 447.24 0.904 —0.88
(AG & A01) +10% 545.89 1.103 0.85
Temperature nominal 20 1.000
(A°C) AG & A01 @ -lO% 0 0.998 —0.02
AG & A01 @ +10% 40 1.008 0.07

 

 

116

combined construction deviation at nominal temperature is shown as a dashed line, and the
addition of temperature variation is shown as a light solid line. The temperature effects on
the piezoresistors are minimal due to the temperature compensating bridge supply
discussed in Section 3.6. 1.

The calculations for amplifier gain and OSR can now be made. In order to
accurately convert the input signal regardless of the variations in a device, its signal
envelope must fit below the TSNR curve for the converter. Horizontal shifts of the
envelope correspond to changes in the amplifier gain, while vertical shifts correspond to
changes in output resolution.

If an accuracy of 10 bits at 10 g is desired, the envelope top must lie at 60.2 dB
TSNR, and 54.2 dB is required for 9-bit resolution. Figure 47 shows the placement of the
envelopes within TSNRs from OSRs of 32, 64 and 128, with 10 g nominal at —4.7 dB.
This value is chosen to allow for space between the signal envelope and the declining
TSNR curves near maximum input. From the figure, an OSR of 64 times yields sufficient

clearance for both 9- and 10-bit resolutions. For resolution purposes, the worst case point

 

100 ,_ —64 OSR
_ . —- 128 OSR
80 ml _ .. .. 32 OSR
. - .— - 9-bit envelope .,

 

 

 

 

 

 

 

40 O’.’_-.-::" /

/
20/

output TSNR (dB)

as

o

I
.5
S".
8
. <
52.
o
-o
(‘D

 

 

 

 

 

 

 

 

 

normalized input power (dB)

Figure 47 . OSR and gain determination.

117

for the signal envelope occurs at the lowest possible gain for a 10 g input, —8.5 dB
normalized input.

The amplifier gain can be calculated using the nominal transduction gain, the
placement of the nominal point on the envelope (nominal voltage level corresponding to
iIO g), and the converter input voltage range. The envelope must be placed so that it falls
within the TSNR limits. Placing the nominal 10 g input at —4.7 dB (0.58 times firll scale)
meets this objective. Section 4.5.4 shows this placement is sufficient for all input
frequencies within the pass band.

The nominal transduction gain, calculated in Section 3.4, is 750 uV/g. This
produces 7.5 mV at 10 g. The ADC will have an input range of +5 V. In order to set a

10 g input to correspond with —4.7 dB normalized input , the nominal amplifier gain must

be

(5 V)x(0.58) _
(750 taV/g)x(10 g) _

 

4.4 DECIMATOR DESIGN

The decimator provides the filtering, downsampling and accumulation necessary to
convert the I-bit output of the sigma delta modulator at the sampling rate into a multibit
number at the Nyquist rate. The decimation filter must remove a sufficient amount of the
shaped quantization noise to provide the desired word width, must provide attenuation of
out-of-band signals, and must have a flat pass band region. For this project, additional
design constraints are imposed by the need to minimize the required chip area.

The method used in a majority of second-order converter designs found in the
literature involves a two-stage decimation process. In the first stage a sine3 filter, to be
described in the next section, is followed by decimation to a factor of N, below the

sampling rate. This stage accomplishes the bulk of the noise reduction. The second stage

 

llSl

118

uses a low-pass filter followed by downsampling by N2. This stage provides additional
antialiasing and corrects for the magnitude linear distortion, referred to as droop, caused
by the sinc3 filter. The total oversampling ratio, N, is the product N, X N2, with N2 usually
at 4. Such a system is shown in Figure 48. The objective of the design presented in this
chapter is to reduce the architectural complexity of the sinc3 filter and to eliminate the
need for placing the second stage on the monitor IC.

The remainder of this section opens with a classification of various sinc3 filters,
including a development of their transfer fiinctions and comparisons of noise reduction,
antialiasing and droop. This is followed in Section 4.4.2 by a discussion of three
architectures to implement the sine3 filter and estimates of their relative chip areas.
Finally, the selection of the filter type and architecture to be implemented is justified in

Section 4.4.3.

4.4.1 Sinc3 Filter Classification and Performance
The sinc3 filter is created, conceptionally, by concatenating three averaging filters.

The output of each filter is formed by summing the previous K equally weighted samples,

 

 

 

 

N, N 2
second-order lst 518 e 2nd stage
——** sigma-delta . g ”— , —
decimator decrmator
modulator fS = N fN fD = N, fN fu = Zfo

 

 

 

 

 

 

 

 

 

f s = sampling frequency

f D = decimator (intermediate) frequency
f N = Nyquist frequency

f o = pass band frequency

Figure 48. Standard second-order SDM ADC.

119

lK-l .
y(k) '3 ngUr—I).

The frequency spectrum, obtained by using a z-transform, is

Y(z) = kl—gz'WU),

 

H __I_1—z

(Z) K1_z-1’
_ 19E

H(f) —H(e )mw

 

: _1__1— cos(27rfl(TS ) + jsin(21gKTs)
K 1— COS(21';fI‘S)+jsin(21§fTs)
= -l_ZSin2("/KT3)+725in(fifKTs)cos(rtfl(Ts)
K 25in2(1rfTS)+j2$in(1rfTs)cos(ner)
= i sin(1§fKTS ) e-J‘nfTs(K-l)
K sin(rth‘S)
= Si"°(fl(Ts ) e-rnflstx-n
sinc (fI‘s) '

 

 

The magnitude spectra for N, = 32 and K values of N,, 1/2N, and ‘/4N, (referred to as
H100, H010 and H001) are pictured in Figure 49. The magnitude spectra are plotted as a
function of the sampling frequency, fs. The phase spectrum is not critical for this
application due to the squaring operation that follows the converter, the decision threshold
based only on the magnitude and the relative unimportance of filter delay.

Sinc3 filters built with three averaging filters of length N, (HlOO) are nearly
optimal in their removal of quantization noise [96]. Virtually all SDM ADCs built to date
use this type of sinc3 filter for the first stage decimator. Combinations of three averaging
stages with smaller values for K, such as ‘/2N, and ‘/4N,, produce filters with fewer zeros
on the unit circle, resulting in degraded noise reduction performance but simpler

architectures. These filters can be formed by multiplying combinations of the three first-

120

 

 

 

magnitude (dB)

 

 

 

 

 

 

 

 

 

 

 

0.25 0.375 0.5
frequency (f / fs )

 

Figure 49. H100, H010 and H001 spectra.

order averaging filters H100, H010 and H001. The magnitude spectra that result are

specified by the fiinction

[sarong )]‘[2sin(l 717M. )1’ [4 SW 75’1“th )l" i
N: stutter.) l’

 

HiJ'k(f) =

where i = number of length N, stages,
j = number of length ‘/2N, stages,
k = number of length 1/4Nl stages,
i+j+k= 3

Figure 50 shows the spectra for six filters, H300 (the standard filter), H210, H120, H030,
H012 and H003, for N1 = 32.

The length of the filter (number of coefficients in a convolution implementation) is

aI—k—‘¥L

 

121

 

 

 

 

magnitude (dB)

 

 

 

 

 

 

 

frequency (f / fs)
—H300 ----- H210 —H120 - - - H030
----H012 ----H003

 

 

 

Figure 50. Six Hijk spectra.

L includes 3 zero coefficients for padding to equal a multiple of N,.

Henceforth, only the filters H300, H120 and H012 will be considered. The
remaining filters have lengths that are not multiples of N, and are, therefore, difficult to
implement.

The 3 filter performance specifications of interest are the total in-band quantization

noise, worst case attenuation of out-of-band signal before aliasing, and the worst-case

magnitude droop.

4.4.1.1 In-band noise

The quantization noise at the output of the sinc3 filter results from passing the
noise firnction 772(1) through the filter. Downsampling by Nl aliases the spectrum about fD,
copying the noise above fD into the pass band. If Hijk contains an H100 term, its

spectrum will go to zero at multiples of fD. These regions of near-zero noise are folded to

122

the region around DC. If a second low-pass filter strongly attenuates any signal above fO
before the second decimation by N,, very little noise is aliased into the pass band. This
technique has been used to produce outputs with near theoretical SNRs, but requires
excessive hardware.

Since only nine bits of output precision are required, no second stage low-pass
filter will be used. A sufficient noise attenuation has been obtained by selecting an
appropriate sinc3 filter and OSR. The in-band noise that results will be the total noise
obtained from passing the quantizer noise through the sinc3 filter, because all of this noise
will be aliased into the desired signal band. The total quantization noise, n0, is analytically
determined by integrating the power spectral density of the output of the sinc3 filter driven

by the shaped quantization noise input SD(f) fiom DC to L f5.

Soto =SQ(f)><Iszk(f)I2
= N: (f) x Haj/8(1).
2 oifs
"D = SDU)df
I I: ammonium/No.1] Pontiac/NM”1481110911391df

 

N? sin (vi/T.) f’
where SQ(/) = quantization noise PSD
2
e2 = P = EL.
““5 ‘ 3L2

The calculation represents a system with inputs normalized to i1.
A graph of the approximate in-band noise power for filters H300, H120 and H012

as a function of n, the log2(N,), is presented in Figure 51. The integration was performed

123

 

 

 

 

 

 

 

 

20 T ,
6'5
3
o
o.
a A
a $9
"SHE
.23. x
Ia V
E
o
C
-100 - ~-
-120
1 2 3 4 5 6 7 8
it

Figure 51. In-band noise power vs. n.

numerically using Simpson's 1/3 rule. A discussion of the numerical integration is
provided in Appendix C .6.

The graph indicates that H300 has the best noise attenuation at a given decimation
rate, and that H012 performs the same as an H120 filter using half the decimation rate.
The signal-to-noise ratio can be obtained by subtracting the in-band quantization noise
from the input signal power. For example, consider a 0.5 normalized magnitude signal to
be quantized into nine bits. The quantization noise must be 54 dB below the signal level
for a 9-bit output. An input of 0.5 (-6 dB) requires a signal-to-noise ration of 60 dB.
This results in a decimation rate of at least 32 if H300 or H120 are used and at least 64 if
H012 is used. It should be noted that this noise is only due to the aliased quantization
noise and, therefore, only estimates the SNR in the linear operating region of the
quantizer. The performance is degraded at near maximum input amplitudes from
nonlinear noise due to quantizer saturation and at very low amplitudes fi'om noise due to

circuit imperfections.

124

4.4.1.2 Antialiasing

Out-of-band signal components are aliased into the pass band in the same manner
as out-of-band quantization noise. In a two-stage decimator, the second stage low-pass
filter attenuates the out-of-band signal before the second downsampling aliases the signal
into the pass band. Eliminating the low-pass filter in the second stage requires the
reduction of higher frequency signal components by other means. The first method is to
use a sharper filter in the first stage. The added architectural complexity for this solution
defeats the purpose of eliminating the second filter.

A second method is to increase the order of the second downsampling. Hijk is
monotonically decreasing up to fD, implying that the worst case aliasing occurs at jg.
Therefore, increasing N2 decreases the aliasing. Figure 52 shows the worst case
attenuation of an aliased signal for filters H300, H120 and H012. Note that, if f0 and N1
are fixed, each doubling of N2 requires a doubling of the sampling rate.

A third method for reducing the aliasing is to apply analog low-pass prefilters, the
same technique conventional converters use. Since some filtering can be accomplished in
both stages of the decimation, the order of this prefiltering need not be as high as would
be required for non-oversampled converters. Figure 53 shows the worst case antialiasing
for the three filters of interest using second-order and fourth-order Butterworth filters
each with a cut-off frequency at jg. In order to achieve 54 dB as the maximum allowable
worst case attenuation, if a second order analog low-pass filter is used in addition to the
natural attenuation of the transducer, then N2 must be at least 2 for H300 and H120 and at

least 3 for H012.

4.4.1.3 Droop
Because Hijk is monotonically decreasing up to fD, the quality of the magnitude

Spectrum's flatness can be expressed as the drop in gain from 0 dB at DC to the gain at f0.

125

 

\ 7' .

 

attenuation (dB)
is
O
l

l

 

 

 

 

 

 

Figure 52. Worst-cast antialiasing.

 

 

- - - H300 + 2nd LPF.
—H120 + 2nd LPF
----- H012 + 2nd LPF .

— - H300 + 4th LPF .
—-H120 + 4th LPF .
--—H012+4thLPF

 

 

attenuation (dB)

 

 

' I
“odp-u ~M
,

 

 

 

 

 

 

 

 

16 32 64

 

Figure 53. Worst-case aliasing with low-pass filters.

126

This is known as the droop of the filter. The droops for H300, H120 and H012 are
plotted against N2 with N1= 64 in Figure 54. The droop values are strongly dependent on
N2, as can be seen in Figure 54, but only weakly dependent on N. For example, the
droop for H120 and N2 = 2 ranges from 1.32 dB at N1 = 8 to 1.36 dB at N1 = 256, a
change of 3% over 5 octaves. The effect decreases with increasing N2.

Normally, the droop is corrected with the second stage filter [94]. Since this filter
is not present in this design, an alternate method is employed. Before examining this
alternative, it is usefirl to consider how the signal will be used after the converter. The
digitized signal can be routed to one of two places: the feature extraction logic on the
bearing monitor IC or the central monitoring computer. The feature extraction logic uses
the signal to detect fairly coarse changes in vibration acceleration amplitude. Hence, small
variations in the magnitude spectrum will have little effect on its operation.

If the signal is sent to the central monitor, precise measurements are to be
expected, namely frequency spectral analysis. Hence, a high degree of accuracy is

required. However, the central monitor need not make computations in real time and may

 

 

H
o
P
l
I
I
'
I
w
o
o
l

 

 

 

 

droop attenuation (dB)

 

 

 

 

 

 

 

Figure 54. Worst-case droop, N1 = 64.

127

have a firll-scale floating point processor at its disposal. It could run the sensor output
through a large FIR filter, compensating for the droop to the 12-bit accuracy available
fiom the converter.

Two alternatives exist for correcting the droop on-chip. First, the magnitude
spectrum can be corrected by the digital filter in the feature extraction section that follows
the converter. This filter is used primarily for rough fi'equency selection and, hence, does
not need to be architecturally complicated. Hence, it will not have resolution to
sufficiently compensate for the droop.

A second method uses the second-order analog low-pass filter in front of the
quantizer. By making the response slightly underdamped, the magnitude spectrum of the
input is increased in the area where the decimator droop causes attenuation. This is the
technique used in the monitor. The damping ratio and cut-off frequency values that

produce the optimal filter depend on the Hijk type used and are discussed in Section 4.5.2.

4.4.2 Sinc3 Filter Architecture

Since space is a critical resource on a smart sensor, the implementation of the Hijk
decimator is an important concern. This section begins by examining the three
architectures that can be used to implement the decimator. The key to the first two
methods lies in fi'actioning the sinc3 filter into the product of a numerator firnction, HNijk,

and a denominator function, HD:

Eli/((2) =HNijk(z)XHD(z)
_ HNljk(Z)
_ (1-2)3 '

The first architecture, referred to as Method I, implements the denominator as
cascaded IIR accumulators, then intermediately downsamples, and finally implements the

numerator as an FIR filter. The second architecture, Method 11, places the numerator FIR

128

before the denominator IIR to take advantage of the 1-bit arithmetic in the FIR stage.
Method III implements Hijk directly as an FIR filter, generating the coefficients on-the-fly
to reduce storage requirements. A block diagram of each of the three methods is shown in
Figure 55. Following the development of the architectures is a section that develops a
relative area figure for each method and compares the size and quantization noise rejection
qualities to determine the most appropriate filter type and architecture.

All of the architectures accept the i1 output of the sigma-delta modulator and
produce a two's complement integer within the range [—1, 1). For simplicity, the filter

Hijk and the magnitude fiinction Hijk will both be represented by the symbol Hijk.

 

 

 

 

 

 

 

 

NH 1
11:1
SDM—F HR — L—O FIR —— L
output
a) MethodI
N.

 

 

i1 —+ FIR ————> IlR —— @

 

 

 

 

 

 

b) Method 11

 

N.

:tl —’ FlR ———- :C—>

 

 

 

0) Method III

Figure 55. Hijk architectures.

129

4.4.2.1 Method I architecture

Method I implements Hijk by using three accumulators at the sampling frequency
for the denominator function and an FIR at an intermediate rate, dependent on the filter
type, for the numerator fiinction. Figure 56 presents a detailed diagram of the architecture
for H120. All eight registers have the same width.

Regardless of which sinc3 type is used, the denominator has the form HD(z). This
can be implemented as three successive IIR accumulators, each implementing the

difference equation
y(k) = y(k - 1) + x(k)-

The size of each register depends on the filter type and decimation rate. Using n =
longNl), H300 requires (3n+1)-bit registers, H120 requires (3n—l)-bit registers and H012
requires (3n—4)-bit registers. Detailed development of the register widths can be found in
Appendix C. 1. The accumulators each require an adder with the same output hwidth as the
registers. The first adder actually implements an increment/decrement function, since one
input is the i=1 output of the SDM.

The numerator function, HNijk, can be implemented with addition circuits

following an intermediate downsampling. The three numerator fiinctions are listed below:

HN300 = (1- 2““ )3 = 1— 3z"N' + 32‘2“: — 53”»,
Hero = (1— 2”“ )(1—ii”! )2 = 1- 2241“! + zl-éN. _ z-2N,,

HNOIZ = (1- Z-EN’ )(1 - Z—ZN' )2 =1__ zz’iNr +22—%N, _ z-Nr~

The intermediate sampling rate, providing a decimation of NI/l, allows for a minimal

amount of storage to be used to implement the FIR filter, HNijk. H3 00 requires an

intermediate decimation of N1 and four registers, producing delayed values at 2°, 2"“,

_ _

2302203 85 H 8502 .8 2&3

lb

.VN %

 

 

 

130

.U

m ..u
323 :3
m <

 

 

 

 

_

_ _

 

 

 

5&8

 

 

 

 

50m T“

 

 

 

 

 

 

 

 

131

241‘“ and z‘3N‘. H120 requires an intermediate decimation of 1/2Nl and five registers,
, -1 , _ -2 _ .
producrng delayed values at 2°, 2 1N', z N‘, 2 IN‘ and z 21“. H012 requires an

intermediate decimation of ‘/4N1 and five registers, producing delayed values at 2°, z’iN‘,
z'lN', z'iN' and 2”“. These registers have the same widths as thOse in the IIR stage.

The actual implementation of HNijk can be done with a shift-and-add circuit.
Following are the difference equations for implementing the shift-and-add, expressed at

the intermediate decimation rate:

HN300; y(k) = x(k) — x(k —1)+x(k — 2) — x(k — 3) +2[x(k — 2) — x(k — 1)],
HN120 and HN012: y(k) = x(k)-x(k -4)+2[x(k —3)-x(k-1)]-

The addition is performed using modulo arithmetic with a modulus of the register width,
allowing the sum to fit into the same width as the input registers. This results in 5b—2 fill]-
adder cells being required for the HNBOO shift-and-add circuit, and 3b—2 firll-adder cells
required for HN120 and HN012, where b is the word width in bits.

It should be noted that the adders for the IIR accumulators must operate at the
sampling rate whereas the shift-and-add circuit need only operate at the intermediate
decimation frequency. The IIR adders will be referred to as fast adders and the FIR
adders as slow adders. The number of full-adder cells is based on the assumption that
ripple-carry adders (RCAs) can be used. This assumption is verified in Appendix C.2.
Table 8 summarizes the hardware required for Method 1, assuming all adder cells are full-

adders for simplicity.

4.4.2.2 Method H architecture
The second architecture for Hijk implements the numerator FIR section before the

3 accumulator HR denominator section. This takes advantage of the i1 output of the

132

Table 8. Hardware for Method I implementation.

 

 

 

 

Number of Number of Number of C
Filter Type Storage Cells Fast Adder Cells Slow Adder Cells
H300 24n+7 9n+3 15n—2
H120 24n—8 9n—3 9n—S
H012 24n—32 9n- 12 9n— 14

 

 

 

 

 

 

SDM to reduce the numerator FIR arithmetic computation at a cost of expanded storage
requirements. Figure 57 shows the Method II architecture for H120.

In order to implement the FIR section first, the previous L SDM output values
must be stored, where L is the number of bits in the filter (length of the filter). This
requires 2" l-bit storage locations for HN012, 2X2" locations for HN120 and 3X2"
locations for HN3OO. The memory is arranged as a shift register.

An adder arrangement similar to that used for Method I could be used to
implement the FIR, but the 1-bit word width allows for a direct implementation in
combinational logic. The truth table and the resulting functions for HN120 are shown in

Table 9. The capital letters A, B, C and D represent the l-bit inputs delayed 2°, 2-iN‘,

2%N

‘ and 2'2”! respectively. The small letters a, b, c and d represent the 4 bits of the
two's complement output, with most significant bit a. The same firnctions apply for H012,
with N1 replaced by ‘/2N,. It is noted that, for any of the filter types, the least significant
bit of the output is always zero. This implies that only 3 bits are necessary for
representing the output of HN120 and HNOIZ. Four bits are required for HN3OO as its

output consists of even values between —8 and 8.

133

/ L
r
l

 

 

 

 

 

 

 

 

 

 

 

 

 

 

/
/
n+1

 

 

 

 

 

 

 

 

REG3

REGZ

REGl

 

 

EC)

{mo “:1ch rQUQ mo

 

 

Figure 57. Method 11 H120 architecture.

134

Table 9. Method II HNIZO logic.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ABCD A—2B+2C—D abcd

0000 0 0000

0001 -2 1110

0010 4 0100 a=BEvXBDvKED
0011 2 0010 b=X(B®C€BD)vA(B®C)
0100 —4 1100 c=A®D

0101 6 1010 d=0

0110 0 0000

0111 -2 1110

1000 2 0010

1001 0 0000

1010 6 0110

1011 4 0100

1100 —2 1110

1101 -4 1100

1110 2 0010

1111 0 0000

 

 

 

 

Table 10. Method 11 accumulator sizes.

 

Filter Type REG] Size REG2 Size REG3 Size

 

HD3OO n+1 2n+1 3n+l

 

HD120 n + 1 2n 3n — 1

 

HDOIZ n 2n—2 3n—4

 

 

 

 

 

 

135

Table 11. Method II hardware implementation.

 

 

 

 

 

Number of Number of
Filter Type Storage Cells Adder Cells
H300 3xzn+6n+3 6n+3
H120 2XZ" + 6n 6n
H012 2"+6n-6 6n—6

 

 

 

 

The IIR accumulator section that follows the FIR section is similar to the IIR
section in Method I. One difference is that each successive accumulator can be allowed to
grow to the maximum size [94]. Table 10 lists the sizes required for each accumulator as
a fiinction of n, where REG] is the first accumulator following the FIR, REG2 is next and
REG3 is the final accumulator. The widths are developed in Appendix C1. The number
of full-adder cells for the IIR stage is the same as the register size.

The hardware requirements for Method 11 implementations are listed in Table 11.
The combinational logic required for the l-bit shift-and-add circuitry has been omitted

since it is relatively small and independent of n.

4.4.2.3 Method III architecture

Method IH realizes Hijk directly as a convolution filter. This takes advantage of
the 1-bit arithmetic, since the filter input is the SDM output, without the need for L 1-bit
storage locations.

Method III implements the function

y(k)={—Z'x<i)h(k—i),

136

where h is the impulse response of Hijk and x is the 1-bit output of the SDM. For a
normalized full-scale ADC output in the range [--1, 1), the values for h also range between
[—1, 1). Throughout the following discussion the values for h are scaled to be integers for
simplicity.

Since the filter output is downsampled by N1 in the next operation, the y values
can be accumulated until the next downsample. This requires L/Nl copies of the
accumulation hardware, or 3 copies for H300, 2 for H120 and 1 for H012. Furthermore,
since x is the i1 output of the SDM, the convolution term for each input involves only
adding or subtracting the appropriate filter coefficient to the accumulated value.

Two techniques can be used to obtain the filter coefficients. First, they can be

stored in memory. Hijk has linear phase, or

h(i)=h(L—l—i) osis L,

i
2

implying that only half of the coefficients need to be held. However, since the coefficient
size requirements are on the order of n bits, the storage necessary would be on the order
of n><Nl or 0(n2") bits.

The second technique generates the coefficients as needed. A relation to generate

 

the H300 coefficients is
[(1 +1) 0 S i < N1
2
h(i)=l War-Nam, —1—i) N1 si<2N1
EST—1 2Nl .<_ i < 3N1.
L 2

 

A circuit to generate the coefficients and perform the decimation has previously been
designed [97]. The implementation uses a total of 16n+2 storage cells, 15n+6 adder cells

and 9n+1 3-to-1 multiplexer cells, excluding the control circuitry.

4.4.2.3.1 H120 coefficients

137

A relation to generate the H120 coefficients is

 

 

 

 

 

 

[ i(i+1)
l l 2 ' l ' l
2Nl(22Nl+1)+(_2LNI_1Xi_%Nl)_(l—2Nl—21)(1-2Nl)
hmzl y:_(i—N,)(i—N,+1)
4 2
l l “-1 '_3
2N‘(2N‘+1)-%Nl(i-%Nl+1)+(' 2N,)(z 2N,+1)

2

2

While this formula is capable of producing any coefficient for a given i, it is not

particularly USCfiJ] for developing an architecture.

considering the incremental difference between adjacent coefficients,

A(i) = 12(1) —h(i — 1).

This yields the set of first-order difference coefficients

i O_<_i<§Nl
A(i)= Nl—i §NISi<§~Nl
i—2Nl gNISi<2N,.

A simpler scheme is obtained by

A further clue to an efficient implementation is found by considering a fiinction for the

difference between A(i) coefficients, F(i),

I"(i)= A(i)-A(i-1),

resulting in the set of second-order difference coefficients

+1 0_<_i<12-Nl
F(i)= —1 gN, Si<%N,
+1 %N, Si<2N,.

138

The implementation of this algorithm uses an (n+1)-bit counter, the most significant bit
indicating F(i). This controls an increment/decrement (n+1)-bit register for generating the
A(i) coefficients. The A(i) values feed a (2n—1)-bit accumulator that generates the h(i)
coefficients. Table 12 provides an example of this process for N1 = 8.

An architecture to implement this technique for generating the FIR coefficients and
for performing the convolution is shown in Figure 58. Since, for H120 L = 2N, two sets
of coefficient generating logic are required. The outputs are alternately selected via 2-to-1

multiplexers. Control logic for thisarchitecture is covered in Section 5.2.

Table 12. Method 111 H120 coefficient generation, N1 = 8.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 COUNT F(i) A(i) 12(1)
0 4 0 (+1) 1 0
1 5 0 (+1) 2 1
2 6 0 (+1) 3 3
3 7 0 (+1) 4 6
4 8 1 (—1) 3 10
5 9 1 (—1) 2 13
6 10 1 (—1) 1 15
7 11 1(-1) 0 16
8 12 1 (—1) —1 16
9 13 1(—1) -2 15
10 14 1(—1) —3 13
11 15 1 (—1) —4 10
12 0 0 (+1) —3 6
13 1 0 (+1) -2 3
14 2 0 (+1) —1 1
15 3 0 (+1) 0 0

 

139

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COUNT
Wk) llllllllllqn+1 igufgr
”Z.— T FT
I _ _ __
N — ._ _
C 210‘) I M") : I
3 I I : i- + Z N, select
E — _. _
g 6:; :1 g I
coefficient generator accumulator ' 2-to-1
———+
MUX
second copy of coefficient generator and accumulator '~——

Figure 58. Method III H120 architecture.

4.4.2.3.2 H120 second coefficient generator
The second coefficient generator can be implemented with a duplicate copy of the
generator described in Section 4.4.2.3.1, with a COUNT value differing by one-half of the
total count (N1). However, a more area-efficient design can be developed by considering
the relationships between the coefficient values in the two sections. Figure 59 shows the
progression of values for N1 = 8.
Throughout the discussion below, the following notation will be used:
h
h

multiple-bit value,

l-bit value,
"h = k—bit value,
kh

l-bit value hi repeated for k bits,

140

 

 

 

 

 

 

coefficient

generatorO l l l I
“k l l I | l_ L.
” .1 I. .l e- '1le .

output output output Loutput output output
from I from 0 from 1 from 0 from 1 from 0

coefficient

generator]
”’0 I | | l | I
Ll I11 I 7 III :III 7']: 11' I

o 4 81216 20 24 28 32 364044 48k
2N, 3N, 4N, 5N, 6N,

 

 

 

 

 

 

 

 

 

 

 

 

 

_Z

Figure 59. Dual coefficients vs. time.

(h),

h.- l h,- = concatenation of h, and h].

h modulo 2’,

The coefficients for generator 1 h'(k) are related to generator 0 by
h' (k): 22"" —h(k),

where 22'"2 is the maximum value for In. An architecture for implementing this operation

can be obtained by considering the subtraction performed with modulo arithmetic, or

Z'Hh' = (22,14 — h>2n-l
= (22“2 +(IT + 1))”.1
({th—ZEn-3F2n—4 ' ' ’51)}3' 1>2H

141

Before being put into the accumulator, the coefficient is sign extended fi'om 2n—1 to 3n—1
bits. This can be accomplished either by sign extending 2""h' after the addition of l or by
sign extending 2""h prior to the addition. The first technique is shown in Figure 60. As a

precursor to the next improvement, the second technique is expressed as

3"-'h'="h;.-2 I(22"’2 42""; +1»...
= (22“ + { "EH En—zgn—SEn-‘l. ' ’70} + 1);"-
= ({"4.-. a.-.8.-.8.-.-~8}+1>
= ({"*'hz,.-2 E...E.-.---Eo}+1>

l
3n‘l

3n-l.

The term "he“ represents the n-bit sign extension of h '.
This circuit can be further reduced by combining the adder in the coefficient
generator with the adder/subtractor in the accumulator. The equations describing the

resulting logic are

     

11 control

from SDM 3'“

 

 

y(k-l)

3n—1

 

 

 

 

 

 

 

 

 

coefficient
generator accumulator

Figure 60. Coefficient generator 1 circuit.

142

y(k— — )3"“'h'(k))
y(k— 1) — "16'. 22""h')

SDM = 0 (-1); 3’“ y(k)

3n-1

3n—l

="’<

=<

(yd 6+ 428 {22~-2-+,.}),_)m
=—<y(k 1)+ h,',_,|(2"-‘h— 22'" )2”_1)3m_1
=(y(k k-1)+{"2,.-hz Mhz,. 3’12..- -ho})
=<k<y k-1>+{"*‘h..-..h...h.-.-- 4})
=<
<

3n-l

3
3n—l

3n 1y _1) + 3n—1h,(k))3n r
= J’(k- 1) + {Mhz, 2 th- 3h2n- 4 h0}+1>

SDM = 1 (+1); 3" y(k)

3n—l.

Figure 61 uses these results to show a minimal area circuit for the second coefficient

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

generator.
11
”"3 ° 11 SDM
J’UC'I) ht output
(1, 0)
2M0- h—4 h—OIH
MUX 1 0 1 o
3n-2 2n-12n-2 2n-3 2n-4 0
A B
(3n-l)-bit adder Cm
SUM = A+B
)(k)

Figure 61. Improved coefficient generator 1 circuit.

143

The longest path in the coefficient generator is needed to verify that ripple-carry
adders can be used in the implementation. The longest path is through the (2n—l)-bit
adder for h in coefficient generator 0, through a 2-to-1 MUX, then through n+1 bits of the
adder in coefficient generator 1. Appendix C.2 provides the calculations that verify the
use of ripple-carry adders.

The coefficient generation architecture for H012 is identical to that of H120 with
N1 replaced by l/2N,. Since, for H012 L = N1, only one copy of the coefficient generation
logic and no output selection multiplexers are required. The MUXs listed are for the
add/subtract accumulator implementation. A description and verification of the use of
RCAs in the adder/subtractor is presented in Appendix C .2.

Table 13 summarizes the hardware requirements for the Method 111 architecture
components. The number of adder cells includes the increment/decrement circuitry in
H120 and H012. The multiplexer counts are for 3-to-1 multiplexers in the H300 filter and
2-to-1 multiplexers for the H120 and H012 filters. The control hardware was not
specified for the H300 filter [97], hence, the table values represent an underestimation of

the amount of memory required for this case. The following section indicates that the

Table 13. Hardware for Method 111 Implementation.

 

 

 

 

Number of Number of Number of

Filter Type Storage Cells Adder Cells MUX Cells
H300 16n+4 15n+6 9n+l
H120 lOn—l 9n—2 7n-3
H012 7n—7 6n-7 3n-4

 

 

 

 

 

 

144

H120 filter requires significantly less area for the monitor application than the H300, so

this omission serves to underestimate the superiority of the selected option.

4.4.3 Filter Type and Architecture Selection

This section discusses the motivations for selecting H120 with a Method 111
architecture as the decimator filter for the analog-to-digital converter. The decision is
based on the implementation that uses the smallest estimated area while accomplishing the
necessary quantization noise limiting. The section begins by deve10ping an area figure,
A(n), to estimate the relative area required by each filter type and architecture. These area
figures are then compared to noise limiting for different decimation rates.

The area required for a particular filter type, architecture and decimation rate is
dependent on many issues, including: IC technology; type of memory, adder and
multiplexer cells; control strategy; cell aspect ratios; clocking strategy; clock distribution;
power distribution; relative location of input and output connections; design rules and
interconnection efficiency.

If a comparative area is to be calculated without actually designing every
combination, limiting assumptions must be made. First, assume that factors such as
technology, interconnection, clocking, power and layout strategies affect each design
proportionately, so that the relative area is only a function of the type and amount of
hardware required to implement the design. Second, assume that the relative areas
required by each type of cell; memory, adder and multiplexer, is constant throughout a
design and between different designs. Finally, assume that relative cell sizes are 1 for a 2-
to-l MUX, 3 for a memory and 6 for an adder cell. These values are based on a 4
transistor 2-to-1 MUX (a 3-to-1 MUX is assumed to require 1% times this area), a 14
transistor, clock race immune, static D flip-flop, and a 28 transistor full-adder cell [98].

The coarse estimate of the relative area required for each design is obtained by multiplying

145

the number of each cell type by its relative size. Table 14 presents A(n) for the three filter
types implemented with each of the three architecture methods. Note that, in all cases of
interest, Method 111 has a smaller area figure than Method 1.

In order to choose an appropriate filter type, the quantization noise attenuation for
a given n must be considered. The development of an approximation of the total in-band
noise was presented in Section 4.4.1.1. By comparing this information with the area
required, an appropriate filter type, architecture and decimation rate can be obtained. This
is done graphically in Figure 62 where the area figure, A(n), is plotted against the
quantization noise. The numbers next to the data points are values of n.

A starting point in calculating an appropriate filter type and architecture is to
determine the maximum quantization noise allowed. A 9-bit output requires a 54.2 dB
SNR. As discussed in Section 4.3, in order for the signal gain profile to fit under the ADC
TSNR curve, a signal input of -8.5 dB must satisfy the 54.2 SNR requirement. This
implies that the noise level must fall below 62.7 dB. From the graph, H120 Method II
with N1: 32 and H012 Method III with N1 = 64 offer the smallest area together with an
appropriate noise attenuation.

The previous calculation will overestimate the minimum required noise for two
reasons. First, the noise is approximated using an expression for the SDM quantization
noise and the decimator frequency response. Second, the calculation does not include
imperfections in the SDM and decimator. Electronic noise, integrator leakage, integrator
nonlinearity, first integrator gain variation, comparator hysteresis, finite filter word width
and filter distortion can all contribute to ADC inaccuracies [99]. The degree to which
these inaccuracies affect the converter output depends on the technology and architecture

of the SDM, the manufacturing tolerances and the desired resolution. As an example, a

quantization noise (dB)

146

Table 14. Relative area figures, A(n).

(normalized to the size of a 2-to-1 MUX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Filter Type Method I Method II Method III
H300 216n + 27 9x2" + 54n + 18 15222 + 50
H120 180n— 72 6x2n+ 54n—36 91n— 18
H012 180n - 252 3><2n + 54n — 72 60n — 67
0
20 I H300 M11 0 H300 MIII
-|- H120 MII I: H120 MIII
-40 \ X H012 MI] 3: H012 M111
-60 \
5
5
'80 X
7. 6 § 7
7 6
-120
0 200 400 600 800 1000 1200 1400 1600 1800 2000
A(n)

Figure 62. A(n) vs. quantization noise power.

147

12-bit 15 MHz sarnpling rate ADC showed an 8 dB difference between ideal simulation
and the actual device signal-to-total harmonic distortion ratio [89]. To provide a safety
margin, a designed noise level of —80 dB will be used.

According to Figure 62, the filter that best meets the —80 dB noise requirement is
the H012 Method II with n = 7. A difficulty in implementing this filter arises when its
antialiasing ability is considered. Section 4.4.12 discusses the situation where an H012
filter preceded by a second order low-pass filter requires a second decimation of 16 to
achieve at least 54 dB worst-case aliasing attenuation. This results in a total oversampling

ratio of

N=Nl ><N2 =128x16:2048.

To achieve a Nyquist rate of 10 kHz, a sampling rate of over 20 MHz is required.

The sampling rate can be reduced by a factor of 8 if the first stage decimator is
implemented as an H120 filter of order n = 6. Preceding the SDM by a second order low-
pass filter requires only a second decimation of 4 for a worst-case antialiasing. This

results in an oversampling ratio of
N=N1xN2 =64x4=256,

for a sampling frequency of 2.56 MHz. At n = 6, the Method III H120 filter has the
lowest A(n) value.

An alternative implementation would be the H012 Method HI with N1 = 128,
N2 = 4 and a fourth-order low-pass prefilter. This would offer sufficient noise reduction
and antialiasing with approximately two-thirds the hardware of the H120 filter at the
expense of twice the sampling frequency rate, another second-order prefilter and an

increased droop.

148

4.5 ADDITIONAL ADC SYSTEM ISSUES

This section details elements of the final converter design. Section 4.5.1 reviews
the complete system. Section 4.5.2 describes the switched capacitor (SC) implementation
for the antialiasing filter. Section 4.5.3 briefly discusses the sigma-delta modulator.

Section 4.5.4 presents graphs describing the ADC developed through simulation.

4.5.1 ADC System Review

This section reviews the overall converter system. Figure 63 presents the system
block diagram.

The analog acceleration signal from the amplifier and offset removal filter is low-
pass filtered in a switched capacitor (SC) filter designed to assist in antialiasing and to
reduce the effects of decimator filter droop. The SC filter has a sampling rate of 160 kHz.
Details of this filter are described in Section 4.5.2 and Appendices C3 and C4.

The SC filter output enters the second-order sigma-delta modulator. The signal is
upsampled to 2.56 Msamples/sec in the SDM to provide 256 times oversampling for the
ADC. The SDM is also implemented in SC technology. A brief discussion of the SDM is
provided in Section 4.5.3.

The SDM 21:1 (1, 0) output is filtered and downsampled in the decimator that

 

 

from select

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 .
manta SDM * Li \4
P FIR I:

160 kHz 2.56 MHZ 40 kHz to on-chip
coefficient "’ decimator '2 feat“?
generators ,’ FIR 240-] extraction

11 MUXs

Figure 63. ADC system block diagram.

149

follows. The decimator is composed of two parts, coefficient generation and filtering.
The coefficient generators produce ll-bit sinc3 FIR coefficients on-the—fly in a novel,
reduced area design. The coefficients are sign-extended to 17 bits in the filter. The filter
section is composed of two identical units. Each unit contains a 128-point FIR.
Multiplication of the coefficient and the input amounts to a sign change due to the
:1:1 SDM output. A 17-bit accumulate-and-dump operation sums the products and
provides the decimation. Outputs of the FIRs are alternately selected via 2-to-1
multiplexers to provide downsampling by a factor of 64. The design of the decimator is
discussed in detail in Section 4.4. Because the digital decimator must be synchronized
with the digital filtering that follows, the decimator control logic is described with the
feature extraction logic in Chapter 5.

The 40 ksamples/sec output of the decimator is sent to the selectable antialiasing
filters in the feature extraction section before final downsampling by 4. The signal may

also be routed off-chip for further processing.

4.5.2 Antialiasing filter

Section 4.4.1.2 described the necessity for preceding the ADC with a second-order
low-pass filter to reduce the aliasing caused by downsampling. The filter cutoff frequency
fc and damping ratio 5 are chosen to satisfy two conflicting sets of constraints. First, the
antialiasing is improved by lowering fc because the filter gain at any fiequency above the
cutofi‘ is reduced. This also improves the systems ability to attenuate the thermal noise
produced by the transducer amplifier, as discussed in Section 3.6.2. Second, the filter can
be used to reduce the droop of the decimator filter near f0 (5 kHz), as discussed in Section
4.4.1.3, by increasing fc, and making the filter slightly under damped. This produces a

gain slightly greater than 1 near )3, offsetting the droop.

150

Appendix C.3 presents the method used to calculate antialiasing filter parameters fc

and 5 that minimize the mean squared error between the actual filter and a target filter.
The target filter was chosen to obtain acceptable antialiasing and electronic noise
reduction. The optimal cutoff frequency was found to be 7000 Hz and the optimal
damping ratio is 0.56. Figure 64 shows the spectra of the resulting filter, the decimator,
the system including the antialiasing filter, and the ideal.

The antialiasing filter and SDM are both implemented with a switched capacitor
(SC) architecture. There are three main reasons for selecting switched capacitors over
other techniques. First, filter parameters are determined by the ratio of capacitors, not by
precise component values. Second, switched capacitor circuits require less area than other
techniques because of their regular architecture and elimination of resistors. Third, due to
the oversampling in the ADC, a high frequency clock is already available.

Because it is sampled, the SC filter frequency response will be different from the

_-~
—_
~‘

  
 

 

 

 

 

 

 

 

E
0 .4 fl
:5 - - - decimator
é -6 J' —- antialiasing :
E 8 combined ;

----- ideal

-10 : . 4' 4 . .
0 2000 4000 6000 8000 10000
frequency (Hz)

Figure 64. Antialiasing filter spectrum.

151

continuous filter. The response is not only a firnction of fc and 5, but of the SC sampling
frequency f; as well. Appendix C.4 describes the design of the SC filter and the minimum
mean squared technique used to match the SC filter to the continuous filter for various
sampling rates. The fc and 6 that result in the best fit for various quotients of the
decimator sampling frequency by powers of 2 together with the continuous filter
characteristics are presented in Table 15.

The selection of the SC sampling frequency is, once again, a tradeoff between
conflicting characteristics. A higher fp results in a filter that more closely matches the
continuous filter. However, as is shown in Appendix C .3, the area required for the
capacitors, AC, is proportional to the ratio of the sampling rate to the cutoff frequency, or

Q

C

AC oc3+2§+2

Decreasing the sampling fiequency reduces the area required. However, in
addition to a poorer match of the analog filter, there is an increase in the effect of aliasing
caused by sampling at the SDM rate. This is demonstrated in Figure 65, which shows the
frequency responses after sampling at fs for the continuous filter and the SC filter
(fp = 80 kHz).

When the signal is downsampled, the higher peaks are attenuated by the
decimation filter. However, enough gain remains to result in an increase in the worst-case
antialiasing and the amplifier thermal noise power. ’ Appendix C.5 discusses the
calculations for antialiasing and Appendix C.6 for noise power. The results are included in
Table 15 and summarized graphically in Figure 66. A sampling frequency of 160 kHz

offers the best tradeoff between capacitor size and antialiasing and noise power.

152

Table 15. SC filter characteristics.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

   
 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SC Sampling Cutoff Damping Worst-Case Electronic Relative SC
Frequency Frequency Ratio Antialiasing Noise Power Area
fp(kHZ) fc(HZ) 5 (dB) (><10'8 V’) (1PF=1)
analog 7000 0.56 —64.5 8.43 -
2560 7040 0.563 —64.6 8.43 735.6
1280 7080 0.566 —64.6 8.43 369.8
640 7130 0.571 —64.6 8.43 187.0
320 7260 0.583 —64.3 8.43 95.6
160 7560 0.611 —63.2 8.46 49.9
80 8120 0.680 —58.8 8.54 . 27.2
40 9440 0.902 —36.3 9.20 16.2
0
l l
-5 r. n
a -10 +-
g -15 ..
°° ----- continuous
-20 — SC f, = 80 kHz \ \j U U
-25 '

 

 

10

frequency (kHz)

100

Figure 65. Continuous and SC filter frequency response.

1000

 

153

 

   
  
   

 

 

 

 

 

 

522 3g 2 -30
\\fp=40kHz ' g a -35 A
.3" - X - noise power a
> 9 ,_ . . . .... -40 or)
.9 —<>—ant1alrasrng .S
s: 1-45 :8
35 35
a; 88 .4. q!- -50 g
8 80 '55 8
'8 ' 640 1280 2560 ' g
“3K , -~-65 a:

84 -a§-—-x——-a&--—x J0

10 100 1000

relative SC capacitor area (1pF = 1 unit area)

Figure 66. Sampling rate effects on SC filter parameters.

4.5.3 Sigma-Delta Modulator

This section presents the results of research on the construction of second-order
sigma-delta modulators. The current state-of-the-art in SDMS produces systems that are
more than adequate for use in the bearing monitor.

The SDM model used in this project was designed by Boser and Wooley [99].
The model is based on a device incorporating two firlly differential SC integrators and a
regenerative latch for the quantizer. A sampling rate of 4 MHz is used. The SDM is
implemented in 3 pm CMOS and operated with a single-sided 5 V supply. Reported
simulation and test results are comparable to those obtained with the simulation of the
device presented here.

Sufficient work has been reported to implement SDMS similar to the Boser and

Wooley design with BiCMOS circuitry. This includes the construction of high frequency

154

op-amps for SC circuits [100], the SC circuits [67, 101], and the incorporation of these
SC circuits in SDM ADCs [66].

4.5.4 System Simulation Results

This section presents several graphs that summarize the performance of the
monitor system from the transducer through the ADC. The graphs are for nominal system
conditions and the gains are normalized to 1 (the amplifier gain of 388 V/V has been
excluded). All the graphs were produced by a simulator written in C. Details of the
TSNR simulation are provided in Appendix C .7.

Figure 67 shows the fiequency response of the system from 10 to 10 kHz. The
sinusoidal input magnitude was 0.2. Figure 68 presents the TSNR as a firnction of
frequency for the same input and frequency range. The TSNR drops off rapidly as a
firnction of frequency because the quantization noise is attenuated only by the decimation
sinc3 filter. Figure 69 shows the TSNR as a firnction of magnitude for a 625 Hz sinusoidal
input, the TSNR for a 5000 Hz sinusoidal input, the 9-bit signal gain envelope, and the
nominal gain location for a 10 g input. The figure verifies a sufficient TSNR for 9-bit
operation for all input frequencies and throughout all expected variations in system

parameters.

155

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

 

 

 

 

 

 

2 , -
A 1 simulated system
m 0 1% -—< "- . ...
'3 ; 1deal
g T
a _2 .... ...... . . - 2.1.. ._
g -4 1* ~
‘8’ 6 ..
E -
8 -8 ' ~ , . ,
-10
0 2 4 6 8
frequency (kHz)
Figure 67. Simulated frequency response.
65 1
60 '1 ~ ..
g 55 -
(E2 50 ..
45 -
0 2 4 6 8 10

frequency (kHz)

Figure 68. TSNR vs. frequency.

156

 

70

 

 

TSNR (dB)
A Ur
O O

w
0
1
fi

 

 

-— 625 Hz
. _ _ 5000Hz

— 9-bit envelope ,"'
——- nominal ‘

 

 

7

-. ......1 A _M.,.g.m. a...“ ”...-w. ...-..4 .. ......“ ...--.. .. . .

1
l
....... ..." .. ..... ........ ..§.,...., .....

1

1 l
............ w... .-

l

1

1 e

i E i

l ‘ 1
-D————_‘-—-—

L '1 i

t E 1

l r i

 

-40 -30 -20
relative input magnitude (dB)

Figure 69. TSNR vs. input power.

-10

 

 

CHAPTER 5 FEATURE EXTRACTION AND DECISION LOGIC

In this chapter, the logic for extracting a salient feature fi'om the converted bearing
signal and for using this value to determine the health of the bearing is presented. The
results of Section 2.5 indicate that the mean squared (MS) value of the signal offers an
appropriate single-value indication of increasing damage. Filtering enhances this value by
increasing the effects due to defect sources while decreasing the effects due to external
sources. The decision logic triggers an alarm when a programmable MS threshold is
exceeded a programmable number of times.

The remainder of this chapter is divided into seven sections. Section 5.1 presents
an overview of the hardware. Sections 5.2 through 5.6 cover the decimator, antialiasing
filter, programmable IIR filter cells, MS and thresholding unit, and control unit,
respectively. A simulation used to verify the hardware design is summarized in Section
5.7. Figure 70 presents a block diagram of the system. Throughout this chapter, the
names of registers and control signals are printed in Courier type and module names are

printed in Couri er 1' tali c type for clarity.

5.1 DIGITAL SYSTEM OVERVIEW

The first-stage decimator for the sigma-delta modulating analog-to-digital
converter, antialiasing filter and second-stage decimation form the first functional unit,
referred to as the conversion unit. The basic design of the decimator is presented in
Section 4.4. Because of its close coupling to the antialiasing filter, the timing and control
of the decimator will be covered in this chapter.

Feature extraction is accomplished by filtering the acceleration signal then
calculating the MS value. Three second-order programmable IIR units form the filter.

Each unit implements a biquad digital filter with five 12-bit coefficients.

157

158

omflcmrumoo

.8326 x83 6&2 EEE .3 2&3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SE

:oumfimoon
owflmrwmhm

3930
Sam

 

 

 

 

 

 

 

 

ummou 1 1 1 F
. F4 J “E: 35280
E 1' 1+ 1' 6......
Eumfim 30amum>t Al T1 1.1 wfimfl—mfl IV»
- we
3C3 HmG—J All “mo—3 Al “ma—3 K /—
30585 SHE ESE cow—c v
8 m2 , [yr—Fl a: E.
mumnlcoE
‘|\ I.
:5.— _obcoo mumn 00m
x020 33

30:85:43

159

Hardware for calculating the MS value, comparing this value to a threshold, and
counting threshold exceptions is the final firnctional unit. The MS value is found by
accumulating the squared output of the last IIR cell. The number of accumulations is
programmable in powers of two fi'om 256 to 4096. The resulting sum is then divided by
the number of samples accumulated to form the mean squared. Each time the MS value
exceeds a programmable threshold, an exception counter is incremented. When the count
exceeds a programmable value, a system alarm is generated and the last MS value is
shifted out for transmission off-chip.

In addition to MS threshold exceptions, a system alarm is generated if a numerical
overflow is detected in the MS calculation, IIR filtering or, optionally, the gain in the
conversion unit. The current MS value is also shifted out when an overflow exception
occurs. The three least significant bits of the MS value are set or cleared to indicate the
cause of the alarm. Once an overflow occurs, the overflow alarm flag remains set until the
monitor system is reinitialized.

The functional units are interconnected via serial lines. This is possible due to the
low data rate (10 kbits/second) after the second decimation. The use of serial connections
reduces the wiring complexity and simplifies block placement and interconnection routing.
Two lines are required, one for transmitting data to the next block and one for sending
coefficients and option selection bits to the blocks during initialization. In addition, single-
bit lines provide calculation overflow, reset and coefficient shifi Signals.

Upon initialization, the monitor accepts 216 bits of information. The allocation
and purpose of these bits are summarized in Table 16 in the reverse order in which they
are shifted into the functional blocks. The parameter value registers, referred to as init
registers, are concatenated to form a shift register that extends across all of the functional
blocks. The purposes of these registers are described in the following sections. At the
end of 216 2.56 Mhz clock periods, the coefficients are in place and the monitor begins

operation.

160

Table 16. Programmable init register values.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Functional Init Number
unit register of bits Description
control mode 1 monitor or accelerometer mode?
MS & shf t 8 MS gain factor (1 - 8)
threshold exnum 9 number of exceptions before alarm
thre sh 9 MS threshold for exception
IIR B2 12 filter coefficient
filter B 1 12 filter coefficient
(x3) A2 12 filter coefficient
Al 12 filter coefficient
A0 12 filter coefficient
decimator & aa 1 use antialiasing filter?
antialiasing ovf sw 1 decimator gain overflow check?
shval 7 decimator gain factor (1 - 128)

 

 

161

5.2 DECIMATOR TIMING AND CONTROL

The one-bit, 2.56 Mbits/sec output of the sigma-delta modulator represents the
average value of its input. The purpose of the first-stage decimator is to convert this
signal to at least 9 bits of accuracy at 40 kbits/sec. This is accomplished by low-pass
filtering and downsampling by 64. Details of the operation of the decimator are presented
, in Section 4.4. The hardware is shown in Figure 71. Table 17 presents the timing for
control signals.

The 7-bit count register serves a dual purpose. First, its most significant bit
(MSB) provides the i1 second-order difference value for generating the low-pass filter
FIR coefficients. Second, it serves as the timing source for the decimator and antialiasing
filter. The count register is driven by the 2.56 MHz system clock.

The 7-bit delta and 11-bit h registers provide the mechanism for generating the
FIR coefficients.

The l7-bit registers accO and accl accumulate the partial sum outputs for the
FIR. For accO, the output of h is either added or subtracted from the accumulated value
depending on the i1 output from the SDM. For accl, the output of h is modified before
addition or subtraction to generate the second set of FIR coefficients.

Seventeen 2-to-l multiplexers alternately select between accO and accl twice
per cycling of count. By alternately choosing one of the 128-bit FIR outputs every 64
clock cycles, a decimation factor of 64 is achieved.

Monitor system simulation, covered in Chapter 6, indicated the need for
introducing a gain at the decimator output. This need arises when a low amplitude
acceleration signal, as occurs in a defect-free bearing, is passed through a narrow-band IIR
filter. The signal reduction due to the small pass-band and finite arithmetic results in zero-
valued output from the filter. A gain is implemented by left-shifting acc by a

programmable number. The 8-bit shcnt register is programmed with a l for each

 

162

 

accO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

  

ll]

 

 

overflow

output to
—f—> antialiasing
12 M88

 

 

 

 

 

 

 

 

 

 

 

:——> transmission
/ l7 acc acc[5] off-chip
key 1
[:1 data register + —/ a : Sh'fi
. . . — 41 - control
rmt regrstcr + l
——> l-bit line ace ”'7
—,¢—. n-bit line .- shcnt
"pub control line
® special add-
subtract hardware
Figure 71. Decimator logic diagram.
Table 17. Decimator control signals.
count (hex) signal description
20 clr accO clear accO
60 clr accl clear accl
20, 60 lch_acc latch accO or accl into acc based on tog
20, 60 cmp tog ‘ complement toggle bit
21-27, 61-67 rot_shcnt rotate shcnt
21-27, 61-67 lsht acc left-shift acc if MSB of shcnt is 1 for scalirg
04-0F, 44-4F rsht acc right shift data out for off-chip transmission

 

 

 

 

 

163

required shift, resulting in gains that are powers of two from 1 to 128. shcnt is rotated
its firll width twice per cycling of count, after the next output has been latched into acc.
During the rotation, the current MSB indicates whether or not a Shift in acc should
occur.

Shifting acc may result in an overflow. Since acc is a signed value, the overflow
is detected as a difference between the current value of acc's MSB and the previous
MSB. As discussed in Section 6.2, monitor system simulation indicates that, for narrow-
band filtering, overflow rates as fi'equent as 25% did not adversely affect the MS
calculation. A programmable bit (ovfsw) provides a switch for enabling or disabling the
system exception on shift overflow.

When the monitor is reset, all of the data registers in the decimator unit are cleared
except count, which is initialized to 32 (20h).

Figure 72 shows a timing diagram obtained by simulating the decimator hardware.
The simulated output of the SDM has seven 0 values (-1) for every 1 value (+1),
representing a normalized DC value of —0.75. The 17-bit output in acc, 14000h,
corresponds to the —0.75. A value of 01 in shcnt causes a gain of 2. This results in an
output value of 08000h, corresponding to a DC level of 0.5, which causes an overflow.

The simulation program is described in Section 5.7.

5.3 ANTIALIASING FILTER

The antialiasing filter reduces spectral components above 5 kHz before the final
downsampling. This increases the accuracy of the output by reducing the aliased signal
noise at the expense of additional harmonic distortion and circuit complexity. The
antialiasing filter and subsequent filtering and feature extraction are applied only to the

signal in the monitor mode. If the device is in accelerometer mode, the 40 kHz first-stage

164

.Efimflc meme: ESSEBD .mn vuswfi

 

 

 

                  

 

 

_ _ 3...“.

 

 

 

_ — DalL—Um
_ _ oarwcm.

cocooH aoov" oooVaH vdooc dud

 

 

 

 

 

HoosoufiumnomemnonHmaaoflmemmnHaommuHwoumaHaonmnHmommaHoomaafimummufiwmnauHUNnaunhnaa~uwwaHHummnH_ Huua

 

 

”comma”vmwmfiHmUCmmHmuwmchommfiHomwwa“u+mm-¥wmmfiHl ocooonmcvu~nooquvcovHHmoovHanQVMHWWJWMH ouuw

 

 

 

 

 

 

H nmoH «mmfil oHoH mnnH. eooHIIdcaH mega mocH fiaEHI oooH "on“ mooH moo“ doa~ 4ao~ 5
com .°~ mOH oo~ aoH moH moH v¢~ moHIII~o~ «oHII,o°~. 45H 65H ENH 65H JWH .¢.du
“OH ow“ omH EHH oqa. voH NQHI do «coca

 

 

 

||FL L _ a
rmmmamm mma mmH ENH me mNH VMH mmH «NH «NH omH efiH ofiH EHH odH gnu «cued

 

mmME
Dana rdrtm:
Noam Immune

 

165

decimator output is sent directly off-chip for further filtering. This relaxes the
requirements for the antialiasing filter since its output will be used only for comparative
monitoring and not diagnostics.

The selection of the type of antialiasing filter presents two significant design trade-
offs. The first is the exchange between control of the filter frequency response and filter
complexity. Ideally, the antialiasing filter should be flat from DC to 5 kHz, have no
transition width, and pass no signal components above 5 kHz. Such a filter would be
noncausal and, hence, impossible to construct. The filter can be approximated to within a
given tolerance provided there are no restrictions on the filter order and complexity.
Because of the limited area on the monitor IC, the filter hardware complexity must be kept
to a minimum.

The second design trade-off considers the exchange between filter characteristics
for a given filter order. For example, maximizing the flatness in the pass-band decreases
the roll-off in the transition region. The simulation in Chapter 2 showed that the best
source for indicating bearing defects are the defect repetition frequencies, which tend to be
in the hundreds of Hertz. Therefore, a significant amount of pass-band flatness can be
exchanged for improved transition response.

Several filter architectures were examined before selecting a sine2 filter due to its
sumcient attenuation of high frequency components and simple design. The second-stage
decimation factor is 4, requiring 8 coefficients for the sinc2 filter. The discrete transfer

function for the FIR filter, H(2), is

1 3 . -3" - - +r'
H(z) figgon +(4—z)z“’

= 1—16-{2-1 +22“2 +32"3 +42”4 +32‘5 +22“6 +24}.

Each unit delay, 2“, represents one output of the first-stage decimator.

166

Figure 73 shows the frequency response of the antialiasing filter, as well as the
system frequency response with and without the antialiasing filter. The spectral folding
that results after the second-stage decimation both with and without the antialiasing filter
is shown in Figure 74. For low-frequency signals, the antialiasing filter provides sufficient
out-of-band attenuation without severe in-band linear distortion. At signal frequencies
below 500 Hz, the system response through the antialiasing filter yields a worst case
attenuation of —58 dB for an input at 9.5 kHz and a worst case in-band attenuation of
—0.06 dB.

Bypassing the antialiasing filter folds most of the signal below 40 kHz into the 0 -
5 kHz pass band. Obtaining the MS value of this signal yields an indication of the overall
power of the bearing acceleration signal.

Figure 75 shows a logic diagram of the antialiasing filter implementation. Table 18
presents the timing for control signals.

The 3-bit register ccnt provides timing for the output firnctions of the antialiasing
unit. It can be logically formed by adding 2 bits to count and including the MSB of
count. ccnt has been provided as a separate register for clarity.

The coefficient multiplication in the antialiasing FIR filter is implemented with
repetitive additions. This can easily be accomplished because all of the coefficients are
positive integers no greater than 4 and because new data values enter the filter at the low
rate of 40 kwords/sec. The FIR coefficients are functions of ccnt. Table 19 summarizes
the coefficient values and signals A, B, C and D that indicate whether or not an addition
should be performed in one of the addition slots. The signals for controlling filter addition

are then
add_acc0 = (AAtO)v(B/\t1)v (CA t2)v (DAt3),

add__accl = (71A t0) v (E /\ t1) v (CA t2) v (DA t3),

167

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

  
 

 

 

 

 

 

 

 

 

 

20 . .
w/o antialiasing
‘ i . 1 —w/ antialiasing ‘
ES -20 . \.-..- ., - - - antialiasing filter
3 1 \ x'"‘1“~ ,”’7— ‘x I f 1
0 \ f ’ 1 \\ i j \ I f
3 l \ II, \‘ 3 ,’I \\ i I, :
E) 1 ‘ i1 1 I
a i \ :1 I “I ?
E -60 .. N“?! .. .... ‘5' . .. ....
I 3 1‘ E ‘
-100 = I f = ‘1' f
0 5 10 15 20 25 30 35 40
frequency (kHz)
Figure 73. Frequency response with and without antialiasing.
O .2 _: _ _ _-:-‘—— “——- —_.-:.':=.1“1—-—1 } 5 kH
~10kHz::::::::_2 ______ I :3- 2
g -20 --- ~— ‘ __;Z 521:: :=.-..--..
v — 20 kHz - ------- 15 kHz
,8 -40 —~ .. .-
E
:3 g i
8 .60 11.-.... .. .. -... ....,: ,_ . 5 . . ......“wu...._... 1..“... mm....._..,...,~......_~., “W... ...........~..._.......,.
-30 w . without antialiasing ....
-100 i ’ : 1 1 1
0 1 ' 2 3 4 5
fi'equency (kHz)

Figure 74. Spectral folding with and without the antialiasing filter.

168

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

:1 ccnt F
aarO
from 1 _ L.
decimator 12 7%. outreg
‘~ 16 T
key 12
1:] data register — ,1 - 2-1 2'] —,1—.
init register ,1 :MUX U 12
—§ l-bit line _ 12 . : ‘
—/—> n-bit line 5
"IL, control line N‘ 16 U I
v ' t 2 aa
L.®__. _ og serial
data
output
aarl

Figure 75. Antialiasing filter logic diagram.

Table 18. Antialiasing filter control signals.
ccnt (hex) count (hex) Signal Description of action
all 00, 40 inc ccnt increment ccnt
see text 00-03, 40-43 add aarO add acc to aarO
see text 00-03, 40-43 add aarl add acc to aarl
0, 4 04 lch out latch aarO or aarl into outreg
0, 4 04 cmp tog2 complement tog2, selects oflmt
0 20 clr' aarO clear aarO
4 20 clr aarl clear aarl
0, 4 20-2B sht out right Shift outreg, serial output to IIR

 

 

 

 

 

169

where to = 1 when count = 00 or 40h,
t1 =1 when count = 01 or 41h,
t2 = 1 when count = 02 or 42h,

t3 = 1 when count = 03 or 43h.

A set of 12 2-to-1 multiplexers is used to select between the 12 most significant
bits of the antialiasing filter and the output of the first-stage decimator. This allows the
antialiasing filter to be selectively bypassed. The data is latched into outreg once for
every fourth output value from the first-stage decimator, yielding a second-stage
decimation factor of 4. The 12-bit outreg is right-shifted to provide serial output from
the ADC unit into the first programmable filter unit.

When the monitor is reset, all of the data registers in the antialiasing unit are

cleared.

Table 19. Antialiasing FIR coefficients.

 

 

 

 

 

 

 

 

 

 

 

ccnt FIR filter coeflicient Add subsignals
value aarO aarl A B C D
o ' o 4 0 0 o 0
l l 3 0 0 0 1 A = ccnt[2]
2 2 2 0 1 l 0 B =C= ccnt[2]®ccnt[1]
3 3 1 0 1 1 1 D = ccnt[2] EB ccnt[O]
4 4 0 1 1 1 1
5 3 1 1 1 1 0
6 2 2 1 0 0 1
7 l 3 1 0 0 0

 

 

 

 

 

170

5.4. IIR Filter

The monitor includes 3 second-order, programmable IIR filter cells. This sixth-
order filter can be used to focus on frequencies likely to signify damage, such as the
bearing defect fiequencies, or can be used to reject signals from sources external to the
bearing. A cellular design approach was used to simplify the VLSI implementation and to
allow for an easy increase or decrease in the filter order by adding or removing cells.

Each filter cell implements the transfer function

A0 +A12’l + A22“2
1- B12’1 — B22"2 '

 

H(z) =

This results in the difference equation, expressed in terms of the IIR cell notation, as

Y0:2x{A0-X0+A1-X1+A2-X2+Bl-Y1+132-Y2}.

Each of the five coefficients, A0, A1, A2, Bl and B2, is implemented as a 12-bit sign-
magnitude number in the range [—1, 1). The number range required for typical analog
filter coefficients with unity-gain pass bands is [—2, 2). Therefore, the coefficients are
divided by 2 prior to application in the monitor, and the partial products are multiplied by
2 during filtering. Sign-magnitude numbers are used to facilitate the implementation of the
multiplication.

In addition to the five coefficients, the filter must hold the three most recent 12-bit
inputs, X0, X1 and X2, and the two most recent 12-bit outputs, Y1 and Y2. Figure 76
shows a block diagram for the IIR cell.

The IIR unit produces filtered values at the rate of 10 kwords/sec, the same rate as
the converter output. The timing is controlled by the 8-bit fcount counter operating at
the system clock rate of 2.56 Mhz. This yields 256 clock periods per filter output. Table

20 summarizes the events in a filter cycle.

171

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

   

 

 

 

 

 

 

 

 

 

 

 

 

 

overflow overflow r4 4] fcount
in out
Shifi prod
control
rsgn ~~ll k
csgn W 4W 4 reg C)’
,} 12 1:3 data register
A0 p 4 x0 init register
A1 , r ’t J X1 —+ l-bit line
A2 If 9 4 x2 —/——> n—bit line
Bl r 1- : 1 ’ A yl "11.--, control line
B2 1 4
F l y2
Figure 76. IIR filter block diagram.
Table 20. IIR filter timing.
fcount (hex) Description of action

00 - 0C shift data values between registers and units

20-3D Y0 (— YO + XO-AO

40-5D Y0 (— Y0 + Xl-Al

60-7D Y0 (— Y0 + X2-A2

80-9D Y0 (— Y0 + Y1~Bl

AO-BD Y0. (— Y0 + Y2-B2

C0 12-bit error check

 

 

 

 

 

172

At the start of each cycle, a new 12-bit data value is serially shifted into X0 from
the conversion unit. At the same time, the old X0 is shifted into X1, X1 into X2, Y1 into
Y2, Y0 is shifted into Y1 and the next functional unit, and 0 is loaded into Y0.

The filter output is calculated as five separate products of a coeflicient with its
corresponding data value, together with an accumulation of the partial result. The
multiplication in the IIR filter is implemented using the indirect (shift-and-add) method.
This architecture was chosen due to its minimal hardware requirements relative to other
techniques. Table 21 shows the timing for the first multiply/accumulate operation; the
remaining four are identical. The left shift of prod implements the multiplication by 2 to
compensate for the ‘/2 factor in the coefficients. The design and implementation of indirect
multipliers are well known and will not be covered in detail [102].

The shift-and-add multiplication requires a 22-bit addition. Appendix C.2 indicates

that a 21-bit ripple-carry adder is the longest allowed for a unit gate delay of 9 ns and a

Table 21. First multiply/accumulate operation timing.

 

 

 

 

 

 

 

 

 

 

 

 

fcount (hex) Description of action

20 load reg, clear prod, load rsgn & csgn
21 complement reg if negative
22 increment reg if negative

23 - 38 ll-bit shift-and-add multiply, overflow?
3A left shift prod, overflow?
3B complement prod if rsgn €19 csgn = 1
3C increment prod ifrsgn EB csgn =1
3D add prod to Y0, overflow?

 

173

clock rate of 2.56 Mhz. Three solutions are possible. First, change the parameters of the
system; i.e., decrease the gate delay or reduce the clock frequency. Second, pay the
increased hardware cost for a faster device, such as a carry-completion adder. Third,
allow two clock cycles for the completion of the addition before latching the results into
prod. Since there are ample clock periods in the 256 period cycle, the last option is used.
This results in 22 clock cycles for the shift-and-add operations.

Since the coefficients are stored in sign-magnitude form, the MSB of each value
indicates the Sign and the remaining 11 bits are used to determine whether or not an add
operation is performed for each shift in the multiplication algorithm. The five coefficient
init registers are connected to form a circular shift register. At the start of each
multiplication cycle, the MSB of register A0 is stored in csgn. As prod is shifted, the
concatenation of the coefficient registers is also shifted so that the current MSB of register
A0 provides the add control.

Once the multiplication is completed, a left-shift of prod is performed to
implement a multiply-by-2 operation to compensate for the halving of the coefficients.
The 11 most significant bits are then converted to a 12-bit two‘s complement value based
on the signs of the coefiicient (csgn) and corresponding data value (rs gn). The result is
a 12-bit two's complement value in the range [—1, 1).

Next, the product is added to the l3-bit contents of Y0. The extra bit in Y0 allows
the accumulated partial sum to exceed the [—l, 1) range. The final filter output, however,
must fit into 12 bits.

Error checking is done at three points in the multiplication/accumulation cycle.
Unsigned addition overflow checks are made at the end of the indirect multiplication and
after the subsequent multiplication-by-2 operation. A 13-bit signed addition error check is
made after the accumulation operation. After the final multiplication/accumulation, a 12-
bit signed error check is made on YO. Any of these errors will set the overflow flag,

which causes a system exception. The overflow flag is cleared on a monitor reset.

 

174

When the monitor is initialized, the five 12-bit coefficient registers are loaded by
serially shifting in values as described in Section 5.1. All of the data registers are

initialized to zero.

5.5 MS CALCULATION AND THRESHOLDING

The MS and thresholding unit performs the final feature extraction and decision
firnctions. The output of the last IIR filter stage is squared and summed. When a
programmable number of inputs have been accumulated, the total is divided by the number

of values to obtain the mean squared value. This implements the equation

The MS value is compared to a programmable threshold value to indicate if an exception
has occurred.

When the number of exceptions exceeds a programmable amount, an alarm signal
is generated An alarm may also be generated by numerical overflows in any of the
previous units (converter, IIR) or in this unit. At each alarm, a 12-bit word is transmitted
off-chip through the interface unit. The first 9 bits contain the most significant bits of the
most recently calculated MS value. The remaining 3 bits indicate which of the possible
sources caused the alarm.

Figure 77 shows a register diagram of the MS and thresholding unit, Table 22
shows the timing cycle for each data input, and Table 23 shows the timing for MS
calculation and thresholding.

An 8-bit counter, cntrl, counts the 2.56 MHz clock periods to maintain control
between each new data value. Overflows of cntrl are counted in the 12-bit cntr2

register. This counter indicates the accumulation of values for the MS calculation.

14096
2048

N ( 1024

512
l 256

1 x16
x8

MS gain 1 x4

data
in

 

 

 

 

 

 

I)

12

 

 

acc

 

 

23

175

ovrflw
in

 

1;]; 8[BIBT

N

 

 

 

 

 

1313131

 

I°L

 

 

 

 

 

 

 

vvvvv

 

 

 

 

compare

"1 [—

 

 

 

‘__ m_over
¢—— c_over

k.- e_over

acc_ext

data
out

 

 

 

 

increment '
control I

o———.——————————l

a_greater

 

_ e_over

shft

excnt

.....

 

 

 

T acc

shift
control

key

data register
init register
l-bit line
n-bit line
control line

Figure 77. MS calculation and thresholding unit circuit.

 

cntr2

_

cntrl

 

 

 

 

LLB

increment
on overflow

176

Table 22. Accumulation cycle timing.

 

cntrl (hex)

Description of action

 

 

 

 

 

00 - OB Shift in x from third IIR cell
0C x <— 2 +1 if x is negative
25 x2 <— x x x
28 acc (— acc + x2

 

 

 

Table 23. MS and threshold timing.

 

 

 

 

 

 

 

 

 

 

 

cntr2 (hex) cntrl (hex) Action
FFF 80 - 8F rotate shft, shift acc based on shft[O]
FFF C0 latch C over
FFF C0 - D0 threshold comparison, shift acc, rotate thresh
FFF Dl increment exnum on MS > thresh
FFF D2 latch alarm causes into acc ext[2:0]
000 00 - 0B shift out {acc[6:0], acc ext[4:0]}
initialize cntr2, t_greater, a__greater
000 0C ' and c_over
if e over set, initialize excnt and e over

 

 

177

At the start of each data cycle (every 100 us), the 12-bit output fiom the last IIR
cell is shifted into x. The absolute value of the contents of x is obtained next. The 12-bit
result is then squared in a shift-and-add multiplier similar to the one discussed in Section
5.4 and placed in x2. The most significant 12 bits of the product are added to the 24-bit
accumulator acc. The size of acc allows for up to 4096 values of x2 to be accumulated
without any chance of overflow.

cntr2 counts the number of squared values summed in acc. When cntr2
overflows, acc is right-shifted to implement the division by N required in the MS
calculation. Both actions are influenced by the 4 most significant bits of the 8-bit register
shft. After each MS calculation (acc shift sequence), shft[7:4] is transferred into the
most significant bits of cntr2, preloading a count value. When cnt r2 overflows, shft
is rotated, with each 0 that appears in the MSB position indicating a right-shift of acc.
Table 24 summarizes the effects due to the 5 allowed values of shft[7:4].

The 4 least significant bits of shf t provide for optional right-shifting of acc.
This scaling implements a trade-off between range and resolution in the 9-bit comparison
operation that follows. The effects of shft[320] are shown in Table 25. From Section
4.3, an input of —10 g acceleration corresponds to -2.91 V, or 58.2% of the full-scale
—5 V limit of the ADC. This implies that the maximum output of the ADC corresponds to
—17.2 g. The maximum MS value is then 295.22 g2 (25 V2).

At the end of the acc shift operations controlled by shft, the least significant of
the 9 bits of MS to be used for threshold comparison is located in acc[6], the MSB in
acc[14]. It is possible to have hit acc[lS] set (and bits acc[14z6] cleared) if all the
input values for x were 800h. This can only occur if the electronics fail, since the offset
reduction filter discussed in Section 3.6.3 eliminates any DC signal components prior to
the sigma-delta modulator. Bit acc[19] is latched into the comparison overflow flag,
c_ove r, to indicate an error. Discarding the MSB and including the next least significant

bit introduces an implicit gain of 2 in the resulting MS value shifted out of the monitor.

178

Table 24. Effects of shft[7 :4].

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

shft[7:4] Number of shifts Division factor (N) cntr2 starting value
1 11 1 0 256 3840
1 1 10 1 512 3584
1100 2 1024 3072
1000 3 2048 2048
0000 4 4096 0
Table 25. Effects of shft[320].
Number of Gain Maximum Resolution
sh f t[3 :0] shifts factor (32) (82)
1111 0 16 1.15 2.26x10-3
1110 1 8 4.61 9.03x10—3
1100 2 4 18.45 3.61><10'2
1000 3 2 73.82 1.44x10—l
0000 4 1 295.26 5.78x10‘l

 

 

 

x-I

 

 

 

179

For programmable gain factors above 1, (2, 4, 8 or 16) it is possible that the
shifted acc has a 1 in bits acc[18215]. These bits are ORed together with acc [19] to
indicate a comparison overflow, an indication that the scaled MS value exceeds the limit
of the 9-bit comparator.

A bitwise comparison of acc[1426] with the 9—bit programmable thresh register
is next performed. This is accomplished by shifting successively significant bits of acc
through acc[6] while rotating corresponding bits of thresh through thresh[0].
As each bit pair is compared, two latches keep track of whether the MS value is greater
(a_greater = 1), the threshold value is greater (t_greater = 1) or the values are
equal (both latches are 0).

At the end of the comparison, the 9-bit MS value is in acc[620] and the two most
significant bits of the accumulator extension register, acc_ext[4:3].

If a_greater is 1 at the end of the comparison, the MS value is greater than the
threshold and the 10-bit exception count, excnt, is incremented. If this causes excnt
to overflow, an exception overflow (e_ove r) is generated. The excnt register,
therefore, is initialized with a 9-bit value that is n less than the overflow, 29, where n is the
number of exceptions before overflow. This value can be found by taking the twos-
complement of n.

Any of 3 sources of overflow may cause an alarm from this unit. The first alarm
cause is an exception counter overflow. The second cause is a comparison overflow. The
combination of the first two overflow types implements a dual-level thresholding. The
e_over value indicates if a lower level has been exceeded a programmable number of
times. The c_over value indicates if a higher level, outside the comparison limit, has
been exceeded once. The third alarm cause is an overflow from the conversion unit or any
of the IIR filter units, signified as m_ove r.

When an alarm occurs, the values of m_ove r, c_over and e_over are latched

into acc_ext[220] respectively. The 12-bit value {acc[6z0], acc_ext[4:0]} is then

 

 

180

serially sent to the interface unit for transmission off-chip. This signal contains the 9 most
significant bits of the compared MS value together with the status of the possible causes
for the alarm that initiated the data transfer.

Upon initialization, the values in the init registers shft, thre sh and exnum are
serially loaded as described in Section 5.1. All of the data registers are loaded with 0.
This implies that the first MS calculation will require 4096 values regardless of the value in
shf t. The MS value resulting from this first calculation is discarded. This amount of
time, 0.4 seconds, allows the transient responses of the filters to decay to an insignificant

level.

5.6 CONTROL UNIT

The control unit performs three firnctions. First, it generates the reset and
coefficient shift signals that control whether the logic is running in initialization or normal
operation mode. Second, it determines which output will be transmitted off-Chip based on
whether the device is operating in monitor mode or in accelerometer mode. Finally, the
control unit is responsible for interfacing the monitor system to the communication system
that connects to the external interface unit.

The design of the logic for this last firnction depends heavily on the design of the
communication logic and the transmission methodology. A simple buffered serial scheme
was chosen to demonstrate a possible implementation. Figure 78 shows a diagram of the
control unit.

When power is first applied to the IC, all of the registers are cleared. This sets the
serial data and clock lines to input. The communication logic on the transmitting side
synchronously sends 12 bits into the. trans fer register. Each bit causes an increment of
the modulo-12 counter dcntr. When dcntr overflows, the contents of trans fer are

parallelly loaded into buffer, cdat is asserted to indicate the presence of a coefficient

 

 

181

 

 

 

 

 

 

 

 

|
l
l
l
I .

T—D 1n out
acc_data 1 '7 1
mon data ——>0 —_ '
_ fl :
I
|
|
A :
cdat 1

cshift <—-| I ‘12 0 *—<—>—l serlal
I 1 data

reset <—l:l

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

coe f E: C
mode buffer transfer
key bcntr l J (mod-12)
|:l ._ data regrster d cntr [ J (mod-l2)
. 1n1treg1ster
l-bit line ccntr [ J (mod-18)
n-bit line
11 .
...... > control l1ne scntr [ J

 

Figure 78. Control unit diagram.

 

 

182

word, and cshi ft is asserted. This begins the serial shifting of the 12 bits through the
init registers of the various units as described in Section 5.1. As each bit is shifted through
mode, the modulo-12 counter bcntr is incremented.

When bcntr overflows, cshi f t is cleared, cdat is cleared and the counter
ccntr is incremented. The modulo—18 counter ccntr indicates the number of 12-bit
coefficient words that have been shifted into init registers. When ccntr overflows,
reset is set causing the device to begin normal operation; in_out is set, placing the
serial data and clock lines in output mode; and scntr begins incrementing with each 2.56
MHz clock period.

The init register mode serves two firnctions. First, it indicates whether the output
to be transmitted off-chip comes from the conversion unit (raw acceleration data) or from
the MS calculation and threshold unit (MS value). Second, it indicates to the control
hardware in the control unit of how often to expect data. In accelerometer mode, data is
serially shifted into buffer every scntr value of 24h - 2Fh, 64h - 6Fh, A4h - AFh, or
E4h - EFh. This results in 12-bit values at 40 kwords/sec, the data rate before second-
stage decimation. In monitor mode, data is serially shifted into buffer when scntr has
values between 00h and 0Bh, and the alarm line from the thresholding unit is asserted.

Each time a bit is serially shifted into buf fer fiom either the converter unit or the
threshold unit, bcntr is incremented. When bcntr overflows, buffer is parallelly
loaded into transfer and tdat is asserted. Each system clock period while tdat is
asserted causes a clock pulse to be fed down the serial clock line and causes dcntr to be
incremented. Trans fer is also left-shifted each period sending the next bit down the

serial data line. When dcntr overflows, tdat is cleared.

183

5.7 SIMULATION

The purpose of the digital hardware simulation described here is to test the
connection and control structure of the logic design. Due to the length of time required to
perform a hardware simulation run, obtaining results with simulated bearing acceleration
data was not feasible. Chapter 6 presents a system simulation, including an algorithmic
simulation of the digital hardware in C, that produces outputs similar to actual applications
of the monitor.

The logic described in this chapter was simulated using Verilog-XL digital
simulator by Cadence Design Systems. Verilog-XL uses the Verilog Hardware
Description Language, capable of both behavioral and structural modeling. Verilog I-IDL
constructs allow for algorithmic level, register transfer level (RTL), gate-level and switch-
level simulation [103].

A hierarchical model of the logic was constructed to facilitate task partitioning and
information flow. Figure 79 shows the simulation model hierarchy. Connections between
the control unit module and the converter, IIR filter and thresholding leaf modules are
shown in Figure 70.

The converter module, dec . v, is implemented at the register transfer level. It
accepts the 1-bit simulated output of the sigma-delta modulator, supplied from the
t es t sys . v module, and implements the decimator and antialiasing filter.

The IIR filter module, iir. v, is also an RTL model. Three instances of iir. v
implement the sixth-order programmable filter.

The MS calculation and thresholding module, sqsm . v, is a multiple-level module.
The squaring operation is implemented at the algorithmic level due to its similarity to the

multiplier in i i r . v. The remainder of the module is an RTL model.

 

 

184

 

testsys.v

sdm serial serial
output clock power data clock

control.v

l 1 1 1 H

dec.v iir.v iir.v iir.v sqsm.v
1 2 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 79. Simulation model hierarchy.

The control module, con trol . v, is implemented as an intermediate level module
because it must connect to each of the leaf modules. All of control . v is implemented
at the register transfer level except the serial data and clock connections, which are
implemented at the switch level due to their bi-directional information flow.

The top-level module, testsys. v, serves 3 firnctions. First, it simulates the
systems connected to the digital logic. This includes the sigma-delta modulator connected
to the decimator and the communication, clock and power-up logic connected to the
control unit. Second, it collects output for display or storage. Verilog can generate
timing diagrams, as in Figure 72, or numerical data, as used in Figure 80 later in this
chapter. Third, testsys . v sets up simulation parameters such as the simulation clock
rate. The clock rate was chosen so that one simulation clock tick corresponds to one gate
delay, or 9 ns. This results in a system clock period of 43.4 simulation ticks for a

frequency of 2.56 MHz.

 

 

185

Several input patterns, including constants, square waves and sinusoids, together
with many different coefficient patterns were used to test the operation of the digital
hardware. The results of one representative test are presented here.

The ADC simulator, employed to produce the simulation results in Chapter 4, was
used to produce the output of the SDM to a 1 kHz sine wave with an amplitude one-half
offull scale (8.6 g, 2.5 V).

The converter unit was initialized to bypass the antialiasing filter. A sixth-order
Butterworth band-pass filter with a center frequency of 1 kHz and a bandwidth of 400 Hz
was designed. The analog filter was converted to a digital filter using the bilinear
transform with fiequency prewarping. The calculations are developed in Appendix D.
The MS value was calculated every 512 samples (51.2 ms). A threshold of 0 and an
exception count of 1023 were used to cause an alarm after every MS calculation. The

control unit operated in the monitor mode.

 

 

9.9.0

N A O\

l l
:U V

E . ‘
1 1
i 1
l
1
1

”1"

magmtude
(fraction of full scale)
0

 

 

 

 

 

 

 

.02 ~ - -- ~ -
-0.4 ~— [
-0.6

429 . 430 431 432

time (ms)

 

— input signal —-3(-— ADC output —-1— BPF output

 

 

 

Figure 80. Digital simulation output.

 

 

186

Partial results of the simulation are shown in Figure 80. The figure includes the
input sinusoid, ADC output at outreg in dec . v, and filter output at Y0 of iir. v3. A
phase Shift differentiates the input sinusoid and the decimator output, as discussed in
Appendix C.7. The filter output is attenuated by the 0.983 gain of the filter at 1 kHz. The
phase shift results fi'om the delay of the filter.

The simulation was run for a 1 second period following the initial 4096 samples
discarded for initializing the system filters. At every overflow of cntr2, the 12-bit value
1E9h was shifted out of the control unit. The three least significant bits indicate that a
threshold overflow was the cause of the alarm. The remaining 9 bits indicate the last MS
value that exceeded the threshold. The decimal output value is found by converting the
hex value into an integer value and dividing by 4096. This results in an MS value of 0. 1 19
relative to full-scale (11.9 g2, 2.98 V2). The normalized theoretical value is

[(0.5)(0.983)]2

 

=0.121.

The principal reason for the 1.5% difference between the theoretical and actual
values is that only 9 bits of accuracy are used in the output. This introduces a relative
error of up to

212-9
4096

 

= 0.002,

sufficient to cover the discrepancy.

 

 

CHAPTER 6 SYSTEM SIMULATION

Chapter 6 describes a simulation of the bearing vibration monitor system. The
simulator is divided into 3 modules. Each module is written as a separate firnction in C.
A supervisory top-level program calls each module, allowing for multiple feature
extraction passes over the same data. Section 6.1 outlines the components of the

simulator. Section 6.2 presents the simulation results.

6.1 SIMULATOR COMPONENTS

The system simulator is composed of three modules, a bearing vibration simulator,
an analog and conversion electronics simulator, and a feature extraction logic simulator.
The relationship between the modules is shown in Figure 81.

The first module simulates the vibration sources and transmission paths within the
rotating element bearing. The module accepts as inputs physical parameters such as the

bearing geometry, housing resonances, defect types and magnitudes, and shaft speed, as

 

 

 

bearing geometry data,
bearing housing data, programmable
operating conditions, monitor
defect parameters coefficients
. flp Transducer 17 bits 9 bits
222:: —/—- ...... +1 —1—» 2:.

2.56 ADC 40 39-2.4
MHz kHz Hz

 

 

 

 

 

 

 

 

 

Figure 81. Simulation modules.

187

 

 

188

well as simulation parameters such as sample frequency and number of data points. The
module produces a string of 32-bit floating-point values corresponding to the amplitude of
the bearing housing acceleration. A sampling rate of 2.56 Msamples per second is used to
correspond with the clock rate of the digital system. Details of the bearing vibration
simulation are discussed in Section 2.4.

The second module simulates the transducer, amplification and ofl‘set reduction
circuitry, switched capacitor filter, Sigma-delta modulator, and first-stage decimator. This
module accepts the simulated acceleration as input. The outputs are the 17-bit two's
complement integers at a simulated rate of 40 ksamples/second from the first-stage
decimator. The effects of the transducer, described in Section 3.2, are simulated as a
second-order low-pass filter. The transducer and the high-pass offset reduction filter are
implemented as difference equations, converted to discrete filters through the bilinear
transformation. The switched capacitor filter is implemented as a difference equation
directly from its z-domain transfer firnction, described in Appendix C4. The sigma-delta
modulator and first-stage decimator simulation is identical to that used to obtain the total
signal-to-noise ratio results of Chapter 4.

The third module simulates the antialiasing filter, second-stage decimator, IIR filter
and MS calculation as described in Chapter 5. The module accepts the output from the
second module, converting the l7-bit values into scaled, 12-bit values according the
programmable gain factor. The optional antialiasing filter is applied as programmed. The
sixth-order IIR filter is algorithmically simulated using 12-bit twos-complement arithmetic.
The MS value is calculated by summing the squared filter outputs for a programmed
number of data values. The outputs of the third module are the MS values, converted to
floating point and scaled by the prOgrammable MS and decimator gain factors. The rate
of the output depends on the programmable number of samples used to generate the MS

value (256 - 4096), resulting in output at a simulated rate of 39 - 2.4 values per second.

n

 

 

189

6.2 SIMULATION RESULTS

A set of 14 simulation runs was performed using parameters from the type NSK /
NTN 30204 tapered roller bearing described in Section 2.4.4. The first run simulates a
defect-free bearing. The remaining 13 runs Simulate an increasing outer race defect,
taking the bearing through acceptable vibration limits and into imminent failure as
estimated in Section 2.5.2. For each run, 4.2 million data points were generated in the
bearing vibration module.

The converter output from each of the 14 runs was used in several tests with
different programmable coefficient values. All of the tests used 512 squared filter outputs
to calculate the MS value. This resulted in 16 MS values per test. Test variations include
no filtering, antialiasing filter only, and band-pass filtering around the defect frequency
(207 Hz) both with and without antialiasing filtering. The results of the test are shown in
Figure 82. The values for each curve represent the average of the 16 MS outputs
normalized to the minimum defect magnitude MS value for that set of coefficients. The
comprehensive vibration limits, discussed in Section 2.3.4, are based on the magnitude of
the bearing acceleration signal.

The heavy line shows the MS calculated for all data values in the bearing vibration
module. These values represent the "actual" mean squared housing accelerations, low-
pass filtered at 5 kHz.

The output values for the all-pass IIR filter both with and without the antialiasing
filter closely follow the bearing vibration module MS signal. The test without antialiasing
has a unity gain for both the decimator output and the MS value, and is shown as a dotted
line on the graph. The test with antialiasing has a gain of 1 at the decimator and a gain of

8 for the MS value, and is shown as'a dashed line on the graph.

 

190

comprehensive vibration limits

 

 

 

 

 

 

 

 

 

A B 3 C J D ; E
10000 i ' i
— bearing module
----- APF, no antialias : g
1000 .P " " - APF & antialias . ..
“Ed — BPF & antialias ‘ i
3 1
E
1, 100
.8
“a
E
8
10
1
0.0001 0.001 0.01 0.]

relative defect magnitude

Key to comprehensive vibration limits

A = no fault
B = acceptable
C = marginal

D = failure probable
E = failure imminent

Figure 82. Comparison of feature extraction parameters.

 

 

191

Tests were also conducted using a band-pass filter with a center frequency of 200
Hz and a bandwidth of 300 Hz. The center frequency was chosen to match the outer race
defect frequency (207 Hz). The bandwidth covers the inner race and ball-pass defect
frequencies (293, 189 Hz), since it is not possible to predict the type of failure before it
occurs. Discrete coefficients were obtained for a sixth-order Butterworth band-pass filter
through the use of the bilinear transform. Details of the filter design are in Appendix D.
Eight tests were conducted, each with the antialiasing filter and an MS gain value of 16.
The decimator gain factors ranged between 1 and 128. The results with a gain of 16 are
shown as a light solid line in Figure 82. This graph shows the sharpest increase in MS
values through the acceptable range, with an 8-times increase in magnitude between the
zero defect MS value and the marginal limit. By varying the decimator output gain, the
region of sharp increase can be shifted with respect to the relative defect magnitude. This
is shown in Figure 83, which graphs the MS outputs with the antialiasing and band-pass
filters for various decimator gain factors.

From Figure 83, it is noted that the slope of the average MS curve decreases with
increasing relative defect magnitude. This is due to an increase in the percentage of 12-bit
first-stage decimator outputs that overflow. Since this overflow is a modulo operation
(bits over 12 are discarded), excessive overflow implements a uniformly distributed
random source, hence the flattening of the MS curves. Table 26 lists the decimator gain
value that produces the maximum average MS value out of each of the tests with band-
pass and antialiasing filtering for a given defect level. The table shows that overflow rates
as high as 25% produce average MS values greater than those produced by decreased

gains. This indicates that decimator output overflow rates as high as 25% are acceptable.

 

 

MS 2)

1.00E-01

1.00E-02

1.00E-03

1.00E-04

1.00E-05

1.00E-06

0.0001

192

comprehensive vibration limits decimator

A3BEC§D§E 83;"

 

2

4

8
..... .....- .,._,~ 16

32

 

 

 

64

 

 

_, 128

 

 

 

 

 

 

0.001 0.01 l 0.1

relative defect magnitude

Key to comprehensive vibration limits

A = no fault

B = acceptable

C = marginal

D = failure probable
E = failure imminent

Figure 83. Comparison of computed MS for various decimator gains.

 

 

I l

193

Table 26. Maximum average MS values for band-pass filter.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Relative defect Gain for maximum Maximum average % overflow of

magnitude MS MS (g2) 12-bit decimator
0.0 32 7.86x10'5 17.4
0.0001 32 8.88x10’5 ' 18.6
0.00018 32 9.07><10'5 19.6
0.00032 32 9.55x10'5 21.4
0.00056 32 9.64x10'5 24.6
0.001 16 1.32x10'4 4.0
0.0018 16 2.25x10-4 9.2
0.0032 16 3.28x104 18.8
0.0056 8 6.40><10-4 6.7
0.01 8 1.35x10-3 21.1
0.018 4 4.70xl03 12.2
0.032 2 1.72x10'2 0.0
0.056 2 fi 4.40x10‘2 0.0
0.1 l 9.99x10‘2 0.0

 

 

194

A final concern is the range of MS values for a given defect magnitude and set of
monitor parameters. Figure 84 shows the range of values corresponding to each of the
relative defect magnitudes for decimator gains of 4, 8 and 16. Ranges that extend to the
bottom of the graph indicate MS values of 0.

The monitor configured with a gain of 16 shows best separation of ranges in the
acceptable region. The monitor programmed with a decimator gain of 8 shows best
separation in the marginal region of operation. However, in both cases, there is overlap in
the range of MS values for closely spaced defect magnitudes. This range of MS values for
a given defect level signifies the difficulty in selecting a threshold to use as an absolute
indication of bearing deterioration. Two solutions may be used to compensate for the
overlapping ranges.

First, the number of IIR outputs used to calculate the MS value, N, can be
increased. One possible reason for the large range of MS values is the close relation
between the defect period (4.8 ms) and the MS calculation period (5.1 ms), occasionally
resulting in 2 defect impacts adding to a particular MS value. This efl‘ect can be reduced
by taking the same data used in the previous runs and increasing N to 2048, resulting in 4
MS values per test. The results for a configuration with band-pass filtering, antialias
filtering, and decimator gains of 4, 8 and 16 are shown in Figure 85.

A second solution can be obtained by setting the threshold at the average expected
MS value for a given defect level, generating an alarm when a set number of threshold
exceptions have occurred, and recording the period of time between alarms. A decrease in
the period indicates a change in the health of the hearing. The counting and alarm
generating logic is included in the monitor as described in Section 5.5. The timing

mechanism would be located in the interface unit, discussed in Section 1.3.

MS (32)

195

comprehensive vibration limits

 

 

 

 

 

 

 

 

 

 

 

 

 

A ; B c 3 D E E
1.00E'01 ' j :
m ... dec gain = 4
——decga1n=16; ‘ [,4
; é ; /2 '
1 3 1 _:"".- "
. * " ? , z
1_00E-04 -... .. ....f ..--
1.00E-05 ""'“" .- l :W in.-." i
?
1.00E-06 : ' Z i ,1
0.0001 0.001 0.01 0.1

relative defect magnitude

Key to comprehensive vibration limits

A = no fault

B = acceptable

C = marginal

D = failure probable
E = failure imminent

Figure 84. Range of MS values for band-pass filter, N = 512.

MS (82)

1.00E-01

1.00E-02

1 .OOE-03

1.00E-04

1.00E-05

l .OOE-O6

A

196

agc‘o

 

J

l

l

 

 

H a M

 

dec gain = 4
dec gain = 8 .

 

 

 

 

 

l i ‘ 1

dec gain: 16 "

 

 

 

0.0001

Key

0.001 0.01

relative defect magnitude

to comprehensive vibration limits

A = no fault

B = acceptable

C = marginal

D = failure probable
E = failure imminent

Figure 85. Range of MS values for band-pass filter, N = 2048.

0.1

CHAPTER 7 CONTRIBUTIONS AND FURTHER RESEARCH

The purpose of this project is to examine the feasibility of using an intelligent
microsensor for monitoring the health of rolling element bearings through analysis of
housing acceleration vibrations. To that end, a device is designed that uses a four-post
suspended mass microaccelerometer to sense acceleration vibrations. This is converted to
an electrical signal through a half-active piezoresistive bridge driven with a temperature-
compensated supply. The voltage output is amplified, high-pass filtered to remove any
offset signal, and low-pass filtered. The result is digitized in a second-order sigma-delta
modulating analog-to-digital converter. A novel first-stage decimator, located on-chip,
provides a minimum resolution of 9 bits for monitoring. The output of the decimator can
be transmitted off-chip for further filtering before second-stage decimation to a resolution
suitable for diagnostic purposes or it can be passed to the feature extraction section.
Feature extraction is accomplished by first filtering the signal in a programmable sixth-
order IIR filter, then extracting the mean squared value. This value is then compared to a
programmable threshold value. An alarm signal is transmitted off-chip when the threshold
is exceeded a programmable number of times.

The remainder of this chapter is divided into two sections. Section 7.1 lists the
major contributions of this project. Section 7 .2 discusses areas for future research related

to the application of intelligent sensors to bearing monitoring.

7.1 CONTRIBUTIONS

This section describes five - major contributions of this project: the concept of
applying intelligent microsensors to machinery monitoring, a simulator for bearing housing
vibrations and results obtained fi'om the simulation, design of a high-sensitivity, high-

resonant frequency microaccelerometer, the design of a reduced area first-stage

197

198

decimation filter for sigma-delta modulating ADCs, and an implementation of dual

precisions for monitoring and diagnosis.

7.1.1 Intelligent Microsensors and Machinery Monitoring

The concept of using intelligent microsensors for monitoring bearing vibrations
contributes to both the fields of microsensors and of machinery monitoring and
diagnostics. Continuous machinery monitoring is currently implemented with transducers
on the devices under inspection, connected via multiplexers to a central processing unit.
The processor extracts salient features, usually using an FFT to obtain an estimate of the
spectrum. The output is then compared to programmed limits or is analyzed by a human
expert. This technique suffers from several inadequacies. The cabling and processing can
be expensive if a large number of sense points are required or the sense points are widely
distributed. Also, if the degree of multiplexing is significantly increased to reduce the
amount of cabling and hardware, the monitoring ceases to be continuous.

The advent of inexpensive processors and application-specific integrated circuits
(ASICs) has made possible the development of small, rugged data analysis units placed
near the sense points. However, the cost per sense point of this technique makes it
prohibitive for all but highly critical or dangerous applications.

An intelligent microsensor offers the opportunity for data reduction and analysis at
the sense point for normal monitoring operations, eliminating the need for a dedicated
external processor. Further, the microsensor can be placed in a sense-only mode,
transmitting conditioned, digitized data back to a central processor for in-depth analysis
when necessary. This offers the possibility for switching between continuous low-level,
low-resolution monitoring at many points without external supervision and selective high-
level, high-resolution diagnostics, all at a potential cost per sense point significantly below

that currently available.

199

This reduction in cost should occur when microsensor manufacturers begin to
mass produce intelligent devices. Currently, some commercial microsensors are packaged
together with signal conditioning electronics, but no devices are available that combine a
transducer, conditioning and conversion electronics, and signal reduction and decision
logic. The reasons for this seem to be more economic than technological. No market has
yet presented itself for mass produced intelligent microsensors and, hence, industrial
research and development has been slow in this area.

During the past 30 years, the costs of analog, digital and hybrid electronic devices
have plummeted as the demand has increased, further increasing demand and continuing
the trend. It is reasonable to assume that the cost of devices that combine
micromechanical transducers, analog and digital electronics will follow a similar pattern
and decrease as more applications for these devices are developed. The intelligent bearing
monitor is an excellent initial concept for this process since a market for relatively high-

priced machinery monitoring and diagnostic equipment already exists.

7.1.2 Bearing Simulator and Simulation Results

A second contribution of this work is the development of a bearing vibration
simulator and the results obtained from its application. Surprisingly, a review of research
in the field of bearing vibration monitoring revealed a lack of simulation-based models for
analyzing monitoring methods. Only one paper discussed a simulation model for defective
bearings, and this work was concerned with calculating the defect frequency, not with
examining a generalized strategy for failure detection [13]. Previous research has centered
on constructing fixtures for testing actual bearings under various conditions. While this
technique produces results that will' more accurately represent field conditions, it does not
lend itself to generalization to other bearing types nor has it been used to examine the

effects of monitoring equipment frequency and quantization limitations.

 

 

200

The bearing vibration simulation described in Chapter 2 was used to examine the
relationships between various feature extraction methods and frequency. The results show
a strong dependency between the two most popular single-value indicators, MS and
kirtosis, with MS showing greater sensitivity at the lower defect frequencies while kirtosis
has greater sensitivity around the higher housing resonant frequencies. This may explain
the mixed results reported in the literature, which often fails to consider the relationships
between the bearing housing and defect frequencies and the sampling rate of the data

acquisition equipment.

7.1.3 Microaccelerometer
An examination of commercially available microaccelerometers, conducted at the

start of this project, revealed no devices that met sensitivity and operating frequency range

 

 

 

 

 

 

 

 

 

 

 

 

10000
II [54]

,\ ‘\\, ‘0’ [104]
£0
2: 1000 )< [74] .
>
a \ A 1551
.‘E‘ \ . this project
i; 100 v
I:
3), O

10

100 1000 10000 100000

resonant frequency (Hz)

Figure 86. Accelerometer sensitivity vs. resonant frequency.

 

 

201

requirements for bearing condition monitoring. This prompted the design of the four-post,
suspended mass, piezoresistive accelerometer detailed in Chapter 3. Figure 86 presents a
comparison of the resonant frequency versus sensitivity for this and commercially available
piezoresistive microaccelerometers. Lines connect devices belonging to the same model
(from the same manufacturer). The numbers refer to bibliographic references for the
specification sheets. For comparison, the resonant fi'equency is used instead of the
maximum operating frequency as the latter specifications were not always available and
because the definition of operating frequency range differs between manufacturers. The
maximum operating frequency varies from about 30% to 60% of the resonant fi'equency,
depending on the damping ratio of the device and the manufacturer.

The transducer developed for this project has a resonant frequency of 17.7 kHz
and a sensitivity of 50 uVN/g (750 uV/g with a 15 V supply). The complete intelligent
sensor is designed for a range of i10 g and an operational frequency range of 10 to 5000
Hz. This superior combination is achieved through several factors. First, the high
resonant fi'equency results fiom suspending the mass from four posts placed near the
comers of the mass. This produces greater stifihess than an arrangement of a cantilevered
beam or a quad beam with two beams on opposing sides.

This relatively high resonant frequency is not without cost. The increased stiffness
limits the mass movement, reducing the change in resistance and, hence, decreasing the
potential sensitivity. This is compensated for by the sizing of the piezoresistors, their
arrangement in a half-active bridge, and the integrated BiCMOS electronics. The latter
allows for amplification of the bridge output with a minimum of added external noise as

compared with the off-chip electronics required by other microaccelerometers.

 

202

7.1.4 First-Stage Decimation Filter

A fourth contribution of this project is the development of a reduced area first-
stage decimation filter for second-order sigma-delta modulating analog-to-digital
converters. A classification scheme for these filters is also presented.

To optimize the quantization noise rejection without excessive hardware, second-
order SDM ADCs use sine3 filters in their first-stage decimators. These filters are
logically created by concatenating 3 averaging filters, each with a sin(/)/f spectrum.
Traditionally, each of these 3 filters has had a length equal to the first-stage decimation
ratio, N. This project examined utilizing averaging stages with lengths 1 and 9,- of N. A
classification scheme, based on the length of the averaging filters used in the sinc3 filter, is
summarized by the expression Hijk, where i is the number of length Nl averaging stages, j
is the number of §N1 stages, and k is the number of %N1 stages. In order for Hrjk to
remain a sinc3 filter, the sum of i, j and k must be 3. The filter typically used in second-
order SDM ADCs is classified as H300. Of all other possible combinations of averaging
stage lengths, the H120 filter possesses the best combination of filtering characteristics
and implementability. A comparison of the H300 filter with the H120 filter indicates that
the H120 filter requires less area to implement, but sacrifices quantization noise rejection
and antialiasing ability. ‘

Three architectures for implementing each type of sinc3 filter were considered.
Method I uses an IIR filter, downsampling to an intermediate frequency, then an FIR filter.
Method H uses and FIR filter followed by an IIR filter. Method III uses an FIR filter with
coefficients generated in special hardware. Methods I and III are shown to require
hardware with area of order O(log2(N 1)), with Method HI requiring less hardware than
Method I in all cases of interest. 'Method H is shown to require hardware with area
0(N1). A Method 111 H120 filter requires less area than a Method H H120 filter for any
N1 over 32. A Method HI H300 filter requires less area than a Method H H300 filter for

 

 

203

any Nl over 64. The filter proposed for application in the intelligent vibration monitor is

the Method 111 H120 sinc3 filter.

7.1.5 Differing Monitoring and Diagnostic Precisions

A fifth contribution is the implementation of differing numerical precisions for on-
chip monitoring and off-chip diagnostic calculations. Simulation of the bearing
acceleration conducted in Chapter 2 indicates the need for differing precisions in the data
used for monitoring and for diagnosis. This dual precision is implemented by splitting the
256 times downsampling decimator of the analog-to-digital conversion process. The first-
stage, 64 times downsampling decimator is located on-chip. When coupled with a second-
order switched capacitor antialiasing filter, the system provides sufficient noise attenuation
for a minimum resolution of 9 bits. The output of the first stage is selectably routed to
either the on-chip feature extraction logic or transmitted off-chip. In accelerometer mode,
the first-stage output is transmitted to a central processor, where a floating-point filter
may be used to further eliminate quantization noise before final downsampling by 4. In
monitor mode, an optional simple antialiasing filter may be applied prior to downsampling

by 4 and feature extraction.

7.2 FURTHERRESEARCH

The design of an intelligent microsensor for bearing health monitoring
encompasses many fields, including rolling element bearing design, vibration analysis,
sensor design, solid-state processing, continuum mechanics, analog electronics, digital
electronics, and digital signal processing. This section presents specific areas of fiirther
research that will directly impact the future implementation of an intelligent bearing

microsensor.

 

 

I 1

 

204

A first area for continued effort is the improvement of the bearing vibration
simulator. The program currently uses a linear model of the housing to modify signals
produced by point defects on the outer race, inner race and rolling elements.
Modifications should include modeling of area defects such as spalls and roughness;
nonlinear effects such as brinelling and rolling element contact with the cage; and external
noise sources such as pump cavitation, gear teeth mesh and reciprocating equipment
impacts. The model output should be compared to a variety of actual bearing vibration
signals to verify its accuracy.

Further research needs to be conducted into a BiCMOS process that is compatible
with analog and digital electronics as well as micromachining. The process must produce
analog components capable of handling high power and high voltage for the bridge supply
as well as components with low noise characteristics for the amplifiers; digital components
with small area and low power dissipation characteristics; and the ability of all devices to
withstand the micromachining operations that follow BiCMOS proceSsing during
manufacturing and the rigorous industrial operating environment.

As discussed in Chapter 1, the work done for this project is one component of a
plant-wide monitoring system. One item yet to be designed is the circuitry common to all
intelligent sensors in the system. This circuitry includes the temperature sensor, power
supply and clock separation, and communication electronics.

The design of an accurate, inexpensive, rugged, integrated temperature
compensating system is still needed. This project referred to several experimental
developments but, as yet, none of these designs have been implemented in a commercial
device.

In order to reduce the cost of the monitor system, the number of wires connecting
a sensing IC to the Interface Unit must be kept to a minimum. A 3 wire implementation
using a common wire, a communication wire, and a combined power supply and clock

wire is one possibility. Further research is necessary in developing a standard for

205

multiplexing communication, power and clock signals for remote sensing in a
manufacturing environment. This research will require cooperation between intelligent
sensor manufacturers, network designers and industrial users of the monitor systems.

The Interface Unit also needs to be designed. This device initializes the intelligent
sensors on startup, provides the power and clock signals, and performs data collection and
reduction operations when the remote sensors operate in transducer mode. The reduction
of data could include implementation of the second-stage decimation filter and subsequent
downsampling, obtaining an FFT of the data, and extracting machine speed and defect
frequency information.

Further research is needed into the area of coordinating the information produced
by multiple sensors in the same environment, known as sensor fusion. A possible product
of this study could be the development of an expert system for determining optimal

initialization parameters and for performing diagnosis on the resulting data.

APPENDICES

APPENDIX A BEARING MODEL PARAMETERS

Appendix A presents the parameters used in the bearing housing vibration
computer simulation in Chapter 2. The bearing geometry and housing resonant values are

for an NSK / NTN 30204 tapered roller bearing with an outer race point defect as

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

discussed in [27].
Table 27 . Bearing geometry parameters.
Parameter Value
pitch diameter (Dy) 34.00 mm
ball diameter (Db) 6.00 mm
number of rotating elements (n) 15
contact angle ((1)) 12.96°
thrust factor 1.00
Table 28. Bearing housing resonance parameters.
Resonant Pass band
Type frequency (kHz) Damping ratio gain
band-pass 2.2 0.023 0. 15
low-pass 1 1.3 0.066 0. 10
low-pass 18.2 0.087 0.09
low-pass 26.8 0.089 0.09
low-pass 35.2 0.083 0.10

 

 

 

 

 

 

206

207

Table 29. Bearing housing high-pass parameters.

 

Frequency High frequency
(kHz) gain

 

8 1.00

 

 

 

 

Table 30. Bearing contact noise parameters.

 

Parameter Value

 

GMAG 2.90><10°5

 

 

 

 

nprop 300

 

Table 31. Data generation parameters.

 

Parameter Value

 

sampling frequency 2.56x106 (Hz
number of data values 2.2x 105 (Hz)

 

 

subsampling frequency 1.2x 105 (Hz)

 

 

 

 

shaft sged 2000 (rpm)

 

APPENDIX B

This Appendix provides details of calculations summarized in Chapter 3.

Bl SUSPENDED MASS

The calculation of the suspended silicon mass involves multiplying the volume for
the frustra of two pyramids by the density of silicon. Figure 87 gives the dimensions for
the suspended mass.

The formula for the volume of a pyramid is

V = §(base area) x (height)
= §12 x h.

When silicon is anisotropically etched, {111} surfaces dissolve at a rate several

orders of magnitude less than other surfaces. If a wafer with a top surface of (100) is

top view side view

10 /
‘15— \
\ /
\ /
\ /
r ------------ r

l l
l l
2300 l : 1540
I l
l I

: , . \/
allele—2300441019 41.01.3904

dimensions in micrometers

 

 

 

 

 

 

 

 

 

 

 

not to scale

Figure 87. Suspended mass.

208

209

subjected to anisotropic etching, the resulting structure will have surface normals parallel
to lines formed by connecting opposite corners of a unit cube. This implies that a pyramid
formed by such a process would have a height one-half the length of its base (h = V21).

The volume of the frustrum of such a pyramid with height t can then be found by
removing the volume of a pyramid of height h - t, where the length of the base of the
removed pyramid is l- 21. This results in

V = 151211-150 — 21)2(h— t)
_—.. §t(3l2 — 6lt + 41’).

The volume of the suspended mass is the sum of two fi'ustra of pyramids, the first
having a base of 2320 um and height of 390 um and the second having a base of 2320 um
and a height of 10 pm. This yields

V=1.526x109 1.1m,
p=2.328x10"2 g/nm3 [1051
m=pV=3.553x10’3 g.

B2 ISOTROPIC BEAM THEORY

The general equation relating deflection of a beam, y(x), to the loading function,

w(x), is [38]

d4y

W(X) = E1717 = —F6(x—L)

for a point force —F applied at the mass end (x = L). Solving this equation yields
EIy(x) +gclx3 + -2LC2x2 .+ C,x + C4 = —%F(x - L)3 U(x — L).

The four constants of integration can be found by applying four boundary conditions for a

clamped-slider beam, as shown in Figure 88. The reaction force at the clamped end must

 

210

oppose the applied force for the beam to be in static equilibrium. The deflection at the
slider will create moments at both attached ends. The moments are found to equal FL/2
by summing moments about the z-axis.

The first coeflicient is found by noting that there is no deflection at the base Side
(x = 0) because the beam is clamped, forcing C4 to be zero. The slope of the beam at the

clamped end is also zero, forcing C3 to be zero. Solving for the remaining two constants

‘

requires expressions for shear force, S(x) and the moment, M(x). From the elementary

-..‘r-s

theory of prismatic beams,

d3y dzy
Sx=EI——, Mx=EI———.
() dx () dxz

 

Using the moment and shear information obtained from the beam,

 

 

 

 

 

 

\\\\\\\\\\\1

§
{—

 

 

Boundary Conditions
2 = 0
y(0) = 0 dx x=o
2 - 3
d L d
M(L) = 151—2y = mi 5(0) = 151—:1 = -F = -ma
x=L x=0

 

Figure 88. Clamped-Sliding beam.

211

S(O+)=-—F=C1 :> C,=-ma,

The relevant relations for the beam are then

Shear: S(X) = ma,
Moment: M(x) = "70(3‘ ‘ iL),

ma
Deflection: fix) = 370}sz ‘ #63),

for 0<x<L.

If numerical values are required, the area moment of the cross section, I, and the
largest distance from an outside surface to the neutral surface, known as the extreme fiber
distance 0, must be. Specified. These values are available in reference books for different

cross sections. For the trapezoidal beam cross section [106],

 

 

c _ h (a + 2b)
3 (a + b) ’
I = h’ (a2 + 4ab+b2)
36(a + b) ’
where a = top width (40 um),

b = bottom width (60 um),
h = thickness (10 pm).

A function for the maximum longitudinal stress at any point along the length of the
beam can be derived from the stresses, in a beam subjected to pure bending, and yields a
good approximation if the deflection is small. The stress is proportional to the moment at

the point, M(x), and the distance from the cross-sectional centroid along y. This is

 

 

 

212

maximized at any point along the length at the farthest surface from the centroid, the

extreme fiber distance. The maximum longitudinal stress along the beam is then

 

00 (x) = M(x)c = mac(x

—-LL.
1 1 2)

The absolute maximum longitudinal stress (0'0) occurs where the moment is maximized, at

either attachment point. Its value is

o _M(0)c__macL
° 1 21 '

 

 

The maximum longitudinal Stress at the base side (x = 0) will be tensile if the acceleration
is in the —y (down) direction and compressive if in the +y (up) direction. The maximum
stress at the mass end will be equal in magnitude but opposite in Sign.

One difficulty in applying the simple beam theory developed here to the actual
transducer is deciding what length to use for the beam. The derivation assumes a constant
cross section. However, with the transducer, the 10 pm of material at each end gradually
merge into the supporting material. The longer length (90 um) will be used in deflection
and firndamental frequency calculations and the shorter length (70 pm) will be used in
stress calculations because these yield worst case solutions.

Two expressions of value for design and analysis are the maximum longitudinal
stress, 00, and the maximum deflection, y(L). For both quantities, there is a linear
relationship with acceleration, a. Therefore, they can be expressed in terms of the number

of gravitational accelerations, g, as

 

 

macL,Jr
co — — 21 = —395.7gg/j.1m-s2
and

maL3
y(L) = y = —7.611x10‘4gum,

- 12151

"“‘-""m'!

 

 

213

where m = lAtotal mass = 8.83x10‘4 g,
L6 = 70 um,
Ly = 90 um,
c = 5.333 pm,

I = 411] um“,
E = 1.692x108 g/nm-SZ,
a = —9.81x106gpm/sz.

The system of units, grams (g), micrometers (um), and seconds (5), was chosen to
facilitate the finite element analysis. The isotropic modulous of elasticity, E, is the
anisotropic stiffness value along the length of the beam. This value is calculated in Section

B4.

B3 RAYLEIGH'S PRINCIPLE FUNDAMENTAL FREQUENCY

An approximation of the fundamental frequency for a conservative system (no
damping) can be found by equating the maximum potential energy and the maximum
kinetic energy [3 5]. A general formulation of the kinetic energy for a beam of constant

cross-section A and length L attached to a mass m is
K = 4?!)de = Wing-)2 dx + 01(9)
2 5r 2 6t 2 dt

If the beam is vibrating at its fiindamental resonant frequency, coo, the expression for the

2

.v=L

time varying natural response of the displacement along its length can be written as
y(xJ) = Y(x)°05((° of).

Substitution into the kinetic energy expression yields

 

214

__L 2 ° 2 L 2 _L - 2 2
K— szcoosm (toot)!o y (x)dx+ 2mooosrn (mot)y (L).

Kinetic energy is maximized when Sin(0001) is 1.
When the beam deflection equation developed in Section 32 is substituted for
y(x), the maximum kinetic energy is

:(m__a_)2 [—pALwo 7 L7+lm a): 12 L7]
E101728 2 1728

 

= 1 (”0m“) L7[7pAL+l2m]
3456 E1

 

2
= 1 (”0m“) L"[5.70x10-7+1.07x10—2].
3456 E1

From this expression, it can be seen that the contribution due to the beam is over four
orders of magnitude less than that due to the mass.

Ignoring the effect of the beam, the maximum potential energy is

P = angyunosm 00L, 21mm).

The potential energy will be maximized one-quarter cycle away from when the potential
energy is maximized. If the system is conservative, these two values will be the same.

Equating the two expressions yields

K=P

in) 3my’(L) = %mgy(L).

Using a length of 90 pm, the fundamental frequency is then

 

coo: g 12351:].14x105 rads/s
y(L): L m
or

f0 :18] kHz.

 

215

8.4 MATERIAL COEFFICIENTS

This section develops the orthotropic constants required for the finite element
analysis program NISA II from the experimentally obtained stiffness coefficients for
silicon. The development requires three steps. First, the Stiffness coefficients will be
inverted to obtain compliance coefficients. Second, the compliance coefficients must be
transformed from the crystallographic axes to the model axes. Third, the coefficients must
be converted to the form required by NISA 11.

Since the formula used for the conversion requires compliance terms rather than
stiffness terms, the stiffness matrix must be inverted. This can be seen by examining the

matrix form compliance and stiffness relations.

 

stiffness relation: 0,. = C1181
compliance relation: 8;, = 51.101
I) I = S1} Ck]

The stiffness coefficients have been determined experimentally [42]. Solving the matrix

inversion for individual compliance terms yields

 

 

 

S = C“ +C‘2 = 0 768x10‘8 m s2/
11 C11(C11 +C12)-2C122 . P g,
S = —C” = —0 214x10-8 m s2/
12 C“ (CH +Clz)—2CE. ' “ g’
1 .
S44 = ‘54: = 1.256x10‘8 um-szlg.

In order to transform the coefficients, they must be in tensor notation, not the

abbreviated matrix notation. The algorithm for converting between the two forms is [107]

Suki 95"", when m and n are 1, 2 or 3,

ZSW 4: SW, when either 112 or n are 4, 5 or 6,

216
4507:! c» Sm when m and n are 4, 5 or 6.

The last two conditions contain the factor of ‘/2 for converting between engineering and
tensor strain.

By definition, the crystallographic axes correspond to the (100) directions. These
will be designated by the right-hand system 1, 2, 3. When the device is etched, the beams
are formed along (110) directions. To facilitate the model, an alternate coordinate system
was developed so that the x- and z-axes are parallel to major device features. This
requires transforming all material and field tensors as well. The new axes will be
designated 1', 2' and 3' corresponding to the x-, y- and z-axes, respectively. Figure 89
shows the crystallographic and transformed axes, and the direction cosines required for
the transformations.

The formula for transforming a‘ fourth order tensor is

1 _
S ykl - arma jnakoalp S mnop ’

where S 'W is the tensor in the new coordinate system. A sample calculation is shown

below with zero terms omitted.

 

 

..L L
15 0 .5
aij : anew, old : O 1 O
__L L
I 15 0 15 -

 

Figure 89. Crystallographic-to-model axes transformation.

 

 

217

3 3 3
Sl'lll : zzzzalmalnaloalpsmop

3
m=l n=l o—l p=l
: allallallallSllll + allallal3al3sll33 + allal3allal3sl3l3 +

allal 3a] 3allsl33l + a13allal 131383113 + a13a] lal 3al 183131 +

30313311311833” + a”31331321138333

_ r 1 1 1
- 381111 +Z’Srrss 781313 +751331 +
S

+
r
J£33113 +211'S3131 +2 3311 +‘k33333

_ r
_ ‘i'Srrrr +381122 +Srzrz

1 _ 1
Sn _'i'811+'i'srz +7844

Following is the set of coeflicients that results, expressed in matrix notation:

11: i3 ‘-' TS“ +i512 +2115“ = 0.591x10-8 um-Sz/g,
S52 = Sll = 0.768x10-8 um-sz/g,

is = %S“ +‘iiSrz “i544 = —0.037x10'8 um-sz/g,

1'2 3 553 = Sn = -0.214><10’8 um-sz/g,
S3,, = 5;, = S44 = 1.256x10‘8 um-s2/g,
55'; = 2(Sll —Sn) = 1.964x10-8 um-sz/g.

The formulation for converting the compliance coefficients to the notation required

for NISA 11 is [41]

 

 

 

 

 

 

 

 

 

P _L -v12 —v13 0 0 0 1
E11 E11 E11
"Vzr L _V23 0 O 0
E22 E22 E22
—V31 —v32 _1_ O 0 O
S' : E33 E33 E33
'7 1
0 O 0 0 0
2023
O 0 0 0 2C]; 0
l3
0 0 0 0 0 2;
.. 12 .J

 

 

The resulting program coefficients are listed in Table 32.

B.5 STRESS AVERAGE

This section calculates the effective stress over the length of the piezoresistor.
This is done using two methods, averaging the theoretical isotropic beam stress and
averaging the finite element normal (longitudinal) stresses.

Assuming a constant cross-sectional area for the resistor, A, the stress-dependent

resistance distribution can be expressed as

dR
E = f—Jl + noo(x) ].

Integrating over the length l= xl — x0 and substituting the stress relation developed in 8.2

yields the resistance,

219

Table 32. NISA material coefficients.

 

 

 

 

 

 

 

 

 

 

 

 

EX = 15;, =31: = 1.692x108 g/um-SZ
EY = E52 = 312,; = 1.302><108 g/um-s2
E2 = E5, =i = 1.692x108 g/pm-sz
GYZ =0;3 371.; = 0.398x103g/um-s2
ze = 0;, = 2515.5 = 0.255x108 g/um-52
GXY = G;2 = 2;,6 = 0.398x108 g/urn-s2
NUXY = Viz = v3. = 51:2: = 0.362
NUYZ = V53 = V31 = '33 = 0.279
NUXZ = V13 = V31 E = 0.0626

 

 

220

R = I:%[l + noo(x)]dx

:21 _g mac :1 _l
A+An—I L(x 2L)drc

 

macx1+x0—L]
=—— 1+1:
AL I 2

 

 

z p_1'1,,co(x.)+o.(x.)]

where '60 is the average stress over I.

This shows that the average stress can be used to calculate the total resistance.
The development depends on having a cross-sectional area independent of position along
the resistor. Although this may not be true, the approximation is suflicient for the first
order analysis and any error introduced Should be similar in all resistors.

The formula for calculating the average stress between points x1 and x0 along a
beam of length I = x1 — x0 is

30 = %(x1 + x0 — L).
The length of the proposed piezoresistors is 40.5 um. Applying this formula to a
beam of length 90 pm fi'om 0 to 40.5 um yields an average stress of 280 g/um-s2 per g
acceleration. A beam of length 70 pm with a piezoresistor from —10 to 30.5 mm results in
an average stress of 82 g/um-S2 per g acceleration. The actual average Should lie between
these estimates.

Results of the finite element analysis can be used to obtain a more accurate

measure of the average stress. Figure 90 shows a quarter model of the longitudinal stress

221

 

 

 

22—

 

 

 

 

 

 

 

 

 

12—

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

..-——

9
8
3 H.
6|I|2
6 6
9 8 1 4 8 6 8 7 6 7 O 3 8 3
1 1. 2 4 4 4 3 3 2 2 2 1. .l 1
5 4 00 3 2 9 0 4 4 7 8 7 5 3 11
filOllZlZ 5 O 1. 4'3 1 on 5 2 9 6 3 % fir m -MIIJ.
1 l 1 1 2 3 3 3 3 2 2 2 1 1 l .9.
.fl
8
r.
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII Z
.w
4 6 4 2 7 9 0 9 9 00 7 5 3 p
6 .1. 4'3 0 7 5 . 1. oo 5 2.1119 6 . 11
.l. 2 3 3 3 2 2 .l. 1.. 11

-—-70
——-95

—l30

— 139

—-1—330

—-31

Figure 90. Quarter beam longitudinal stress values.

 

 

222

distributed on the top surface of a beam. The piezoresistor placement is shown by the
box on the left. By averaging the stress contribution due to each element, the average
stress value seen by the beam piezoresistors is estimated to be 206 g/um-s2 per g

acceleration.

B.6 PIEZORESISTANCE COEFFICIENTS

This section demonstrates how the piezoresistance coefficients used in resistor
calculations were obtained. The results are from experimental work done on heavily
doped diffiised layers in silicon by Tuft and Stelzer [52].

The first result discovered by Tuft and Stelzer is the independence of the
piezoresistance coefficients to layer thickness for a given concentration.

The second result is the dependence of the principal coefficients on concentration.
Figure 91 presents the results. At a boron surface concentration of 1019 and a temperature
of 27 °C, the p-type 1:44 coefficient is 100x10-3 um-szlg.

The third result is the dependency of major coefficients on temperature. This is
presented in Figure 92. The closest concentration tested to the proposed concentration of

1019 is 9x1018 cm‘3. Table 33 presents an estimate of the 1144 values obtained from the

graph.

B.7 BEAM THICKNESS VARIATIONS

This section develops the formulas used to examine the effects of beam thickness
on stress and firndamental frequency. Figure 93 shows how a change of At due to etch
variations modifies the device geometry. Only those dimensions affected by the change in

thickness are shown. The change in beam thickness will cause a change in the maximum

223

 

I I I

7027'6 “

   
 
 

    

1 a 10'2 lent/dye l
a
0

Norm: LAYERSl-rrul

   

 

   

1 1 I

 

I. .019 |020 .0 '022

suancs couceurnmou Iani’

Figure 91. Piezoresistance vs. dopant concentration [52].

 

'50 T l I l r r 1— ; T

 

 

 

 

 

 

 

 

«oo 40 40 «0 -20 o 20 40 so so 100
reunuwnexc

Figure 92. 7144 vs. temperature for p-type silicon [52].

224

Table 33. P-type 1:44 vs. temperature for 9x 1018 concentration.

 

 

 

 

 

 

 

 

 

Temperature 1:44
(°C) (X 10'8 pm'SZ/g)

—40 1 15
—20 109
O 104

20 99

40 95

60 91

80 88

100 85

 

 

 

 

edge to neutral surface distance, 0, the cross-section area moment of inertia, I, and the

suspended mass, m.

c_10+At 16Q+4At
3 100+2At’

 

3 37,000+ 140At + A12

1: 10 At
( + ) 18(50+At) ’

 

m=1—%{(10+At)[3(2320+2N)2’6(2320+2A’)(10+m)+4(10+Al)2]+

(390 — At)[3(2320 + 2A1)2 - 6(2320 + 2At)(390 — At) + 4(390 — At)2]}_

These values can then be substituted into the formulas for 60 and f0.

225

 

 

 

 

\ J wig; / \
fl—70-2Ar —.){\ F60+2A(—’|
beam

 

2300+2Ar

 

 

 

l
\ 10+At

390-13!

/V

mass

dimensions in micrometers
not to scale

Figure 93. Beam thickness variations.

APPENDIX C

Appendix C provides supporting material for Chapter 4. Section C.l discusses the
register widths required for the H300, H120 and H012 architectures. Section C.2 shows
that ripple-carry adders will work for all decimator architectures. Section C.3 develops
the frequency characteristics for the antialiasing filter that precedes the Sigma-delta
modulator. Section C.4 derives the switched capacitor functions used in the antialiasing
filter and develops an expression for the relative capacitor area. Sections CS and C6
discuss the worst-case antialiasing and noise power calculations. Section C.7 discusses

the simulation used to obtain the total signal-to-noise ratio values for the converter.

C. 1 DECIMATOR FILTER REGISTER WIDTHS

This section discusses the register widths for the H300, H120 and H012 registers.
Regardless of the width, all data values are represented by two's complement numbers in
the range [—1, 1). Two factors affect the width of the decimator registers, modulo
arithmetic in the IIR stage and rounding due to the FIR stage.

The discussion of the modulo arithmetic is directly from Chu and Burrus [108].
All the filter types have three poles at z = 1. These poles force the filters to be
asymptotically stable. Depending on the input value, the filter output may overflow any
finite number of bits. Despite this difficulty, the filter will still provide the correct output if
a modulo arithmetic is used. This arithmetic can be explained by considering the sine filter
in Figure 94.

Let the number range of the HR accumulator be the integers in [-R/2, R/2). Let

(MR represent the residue of N modulo R. The output of the accumulator is

226

 

 

227

 

 

 

 

x(n) ‘ 1 v(n)

-1 l _Z-o . y(n) f I

 

 

 

 

 

 

Figure 94. Sinc filter.

v(n) = <ix(n —i)> .

The output of the filter, y(n), is then

y(n) = (v(n) — v(n " D))R

where D is usually the decimation ratio [108].

The modulo of the FIR section must be the same as that of the HR section for y(n)
to recover information about the input, x(n) [108].

In order for the filter to put out the correct result,

D-l D—l
<Zx(n—i)> =Zx(n—i).
i=0 ' R

i=0

If R, is the number range of the input, then a bound on the sum is

228

s Elan—0| s 0%.

i=0

 

D—l
Zx(n—i)
r=0

 

A necessary and sufficient condition for the filter to work for any input is that
R 2 DR,.

A concatenation of M sinc filters can be modeled by M IIR accumulators followed

by M Fm cells. If the moduli of the stages are equal, then the output of the mth FIR cell is

D-l D-l

D—l
yM-m(")=<ZZ'”ZxM-m("'-il'12----i,,,)> ISmsM,
1, r, 1,, R
where y0 (n) = y(n) is the output of the final stage. A necessary and sufficient condition

that y(n) not overflow for any input of size R, is
RZDMR.

To preserve meaning, the modulo of the data entering the FIR must be the same as
the modulo of the data at the output of the FIR. The FIR stages of the Method I and II

filters can be modeled as a concatenation of three stages, each with the form
Hn(z)=1—2'D.

This sum could have a value one bit wider than the widest input value. Since the modulo
does not increase, the additional bit at the output of the stage represents an arbitrary
increase in precision. Also, since the coefficients represent fractional numbers this
unnecessary increase can be eliminated by truncating the least-significant hit, an operation
that does not affect the modulo arithmetic [108].

The Method I implementations are different from the model above in that the order

of the FIR stages and the decimator are switched. This does not affect the calculation

229

because the register width depends on the operation of the IR stage and the following
FIR stage must have the same modulo [109]. Since the input to the filter is the 21:1 output
of the SDM, R, is 2. The register widths for each filter type are listed in Table 34, where
’7 = 1082““)-

In the Method 11 architecture, the HR stage follows the FIR stage. This allows the
size of each registers in the IIR stage to be only as wide as is necessary to contain the
result up to that register [95, 109]. The width of each register is determined by DkRk,
where D, is the decimation rate of the [cm stage and R, is the data width into the klh stage.

As is discussed in Section 4.4.2.2, the outputs of the FIR stage for H300 can be
expressed as the integers between and including —4 and 4, requiring 4 bits. The output of
the FIR stage for both H120 and H012 can be expressed as the integers between and
including -3 and 3, requiring 3 bits. Since the input to the FIR stage is a one bit value, the
additional bits in the output represent arbitrary precision. These are eliminated by
rounding at the output of the first IIR accumulator.

Table 35 shows the size of the three IIR registers, REG], REG2 and REG3, for
each of the three filter types. For H120 and H012, where D takes on two different values,

the larger value is used with the first register to yield a worst-case size.

Table 34. Method I register widths.

 

 

 

 

 

 

 

Filter Type .DMR, Number of Bits
H300 N?(2) 3n + 1
H120 N1(%N1)2(2) 3n -1
H012 (%NI)(%N.)2(2) 3n — 4

 

 

uh 'J- .vfifi!
L.

"s! "n.“

 

 

Table 35. Method H register widths.

230

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Filter Type Register D), (R), ) Number of Bits
H300 REGl Nl (2) n + 1
REG2 N1(2N1) 2n + 1
REG3 N,(2Nf) 3n +1
H120 REG] N,(2) 12 +1
REG2 %NI(2N1) 2n
REG3 2N1 (N?) 3n — 1
H012 REG] 3131(2) 11
REG2 iN1(Nr) 2n — 2
REG3 4Nl(%N12) 3n — 4
2
1.5 «
1 .

 

 

 

    

 

 

 

 

 

 

 

 

 

 

I51—r’01rdwfi

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1::
'3
a
o .
'0 = 0.5 i
a a?
a, o
2.3
-2 ,
1 2 3 6 7 9 10 11
REGI, REG2, REG3 time (ms)
— 7,12, 17 ——— 5, 12, 17 ----- 7,10,17 —— 7, 12, 16

 

 

Figure 95. Register width Simulation results.

231

Simulations were used to verify the register width calculations. Figure 95 presents
the results of one simulation for H120 Method 11 with N1 = 64. The bold line represents a
filter having registers with sufficient widths. The other three plots Show the same filter
with either REG], REG2 or REG3 having insufficient width.

The method IH implementation consists of two parts, the coefficient generator and
the accumulator. The width of the accumulator will be the same as the register widths in
the Method 1 implementation, since it represents the output of the filter. The coefficient
generator contains three registers, COUNT, A(i) and h(i). Consider the H120 filter. The
COUNT register provides the control by cycling through the length of the filter. The
length of the H120 filter is

N,+%N,+%Nl =2N,,

requiring n + 1 bits.
The other register widths can be determined from the formulas for A(i) and h(i).

The coefficient formula is

 

 

 

 

 

 

’ Liz-EL) 03i<§N1
%N,(%2N,+1)+(%N1_IXi_%N1)_(i—ITNI‘;)(i_%Nl) 1N, si<N,
h(i)=i yji_(i—Nl)(;-Nl+l) NI si<%NI
I %N1(%2N1+1)—§Nl(i-%Nl +1)+(i-%N1X;-%N1+1) gN, si<2N,.

The maximum and minimum values for h occur at values that make the difference zero.

A(i) is defined as h(i) - h(i—l), or

i OSi<-;-Nl
A(i)= Nl—i %NISi<§Nl
i—2Nl %N, Si<2N1

232

A(i) is zero at i of 0 and N. The range of values for h is

l
IA
D
C
v‘
IA
N L?

requiring n + 1 bits.

C.2 USE OF RIPPLE-CARRY ADDERS

Ripple-carry adders (RCAS) are the simplest adder architecture, requiring the

smallest area to implement for a given number of bits. This section verifies the assumption

that RCAS are sufficient for performing the additions in all architecture types.

An RCA can be used in a particular implementation if the delay through the adder
is less than the rate at which values are put into the adder. An m-bit RCA can be built

from m — 1 fiill-adder cells and a half-adder cell. For simplicity, only full-adder cells will

be used. The implementation is Shown in Figure 96.

The delay through each full-adder cell depends upon how the cell is constructed.

A conservative estimate is derived from the equations for the outputs, or

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ant-le-l A2 B2 A. Bl A0 B0 0
l l [__— l l [_— l l l"— l L I ,
A B C; A B C; A B C; A B Ci
C, S Cn's C. s C, s
l l _J l . J I .__j |

Sm-I 82 S] SO

Figure 96. Ripple-carry adder.

233

s =KBCi +ABC, +XBCi +ABC,,
C, =AB+BC,+AC,.

This results in 3 gate delays (A8) for the sum (S) and two for the carry out (Co).
The longest delay for the adder is through the first m—l carry outs and the last

sum. The delay of the adder is then

AFA = 2A8(m- 1) +3A8 = (2m+1)Ag.
The largest possible adder must meet the criteria

[2m + 1111, < fl,
where fs, the sampling frequency, is the frequency at which data is put into the adder. A
mixed analog and digital BiCMOS process has typical gate delays of 4.5 ns [67]. A delay
of 9 ns will be used to include a conservative estimate for interconnection delays and
process variations. For a sampling frequency of 2.56 MHz, the longest adder is 21 bits.

Each of the H120 implementation methods requires at least one (3n—1)-bit adders,
where n is the log2 (Nl ). This indicates that ripple-carry adders can be used for first-
stage downsampling of up to 128.

An adder/subtractor circuit is required for Methods I and HI. A ripple-carry
adder/subtractor (RCAS) is shown in Figure 97. The circuit delay for the RCAS is the
delay through an m-bit RCA plus the delay through a 2-to-1 MUX. Using 3 A8 for the
MUX, the device must meet the criteria,

1
2 4A —.
[m+]8<f

S

1‘12! ‘ a-.. 1.1

 

 

'\

 

 

 

 

 

234

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bn’.‘ 32 Bl Bo
I 0 _ 1 0 1 0 1 0 5
Ant-l A A “__—
l I'— 12 1'— I1 1——‘ AI" I“ Qzl R: A+B
A B C, A B C, A B C, A B Cl Q=0 R: A-B
Cn S Cn S C,, S Co S - —
I I _:r I __l I __I I ‘ A+B+1
81111 82 SI So

Figure 97. Ripple-carry adder/subtractor.

Using calculations similar to those for the RCA, the longest RCAS is 19 bits. For the
Method IH H120 implementation, this results in a maximum first stage decimation ratio of
64.

The second coefficient generator (generator 1) for the reduced area Method 111
H120 architecture has a longest path through a (2n—1)-bit adder, a 2-to-1 MUX and a
(n+1)-bit adder. In order to use ripple-carry adders with a clock rate of 2.56 MHz, 12 must

satisfy
1
[6n ‘1' 5]Ag < 7 ,

S

using a delay of 3 A, for the MUX. This results in a maximum downsampling ratio of 64

for ripple-carry adders.

C.3 ANTIALIASING FILTER CHARACTERISTICS

This section develops the characteristics for the second-order antialiasing filter that
precedes the sigma-delta modulator. The cutoff frequency and damping ratio can be
adjusted to partially compensate for the droop in the decimation filter. Keeping the

damping ratio and cutoff fiequency as low as possible to minimize the electronic noise

235

passed through the filter is of secondary importance. Figure 98 summarizes the relevant

system components.

The frequency response of the system through the ADC, H(f), is the product of the

responses of the transducer, H,,,,,(/), the amplifier, HMO), the prefilter, HMO), and the

decimator, Hdch). The transfer firnctions, with pass-band gain normalized to l, are

H(/) = Hm(f)><thr(f)><HmI(f) de..(f),

 

 

 

f3...
Htransm = , ,
H = .—— ,
hp") 1f + 1....
f 1121:
Hfil (f) = , ,
t fnzrr ‘f2 +12Cfinf
H (f) = Sin(647th_¢,)-4sin2 (3211fTS )0
d“ 643 sin3 (Ty/TS)
where TS = sampling period (391 ps),
ftrans = transducer cutoff frequency (1 7.7 kHz),
Cm, = transducer damping ratio (1.0),
fhpf = offset high-pass filter cutoff frequency (10 Hz),
ff," = antialiasing filter cutoff frequency,

Cm, = antialiasing filter damping ratio.

The filter coefficients ff," and cm are chosen to make H(f) as flat as possible in the

 

acceleration ~OI Transducer

 

 

 

 

A'mplifier &
Prefilter

 

 

 

 

ADC
(Decimator)

Feature
—> Extraction

 

Logic

 

Figure 98. System components that affect frequency response.

236

pass band without sacrificing antialiasing and electronic noise reduction characteristics.
This is accomplished by choosing a target filter with acceptable characteristics and then
finding the coefficients that minimize the mean square error between the magnitude of
H(f) and the target filter. The target filter used has a gain of 1 up to 5 kHz, has zero gain
above 10 kHz and a linear transition between 5 and 10 kHz. The gradual change
minimizes the "ringing" in fi'equency that results fi'om approximating a discontinuity with a
finite number of sampled points (Gibbs phenomenon).

A C program was developed to find ffilt and Cm, by exhaustive enumeration.
Values for ff," and Cm: are selected. The resulting |H(/)| is compared to the target filter
between 100 Hz and 6 kHz in increments of 100 Hz to produce an error. The errors are
squared, summed together and averaged to produce a mean squared error. The ffin and
Cm, that result in the minimum mean squared were chosen. The result of the simulation is
presented in Figure 99, where the inverse of the mean squared error is plotted against fin,
and Cm:-

The parameters yielding the closest fit to the target filter are ffilt = 7 kHz and
Cm, = 0.56. The magnitude frequency response through the first stage decimator is shown
in Figure 100. The heavy line Shows the overall system magnitude response. The light
solid line is the response of the antialiasing prefilter only. The dashed line is the response

of the first stage decimator only.

C.4 SWITCHED CAPACITOR FILTER

This section derives the expressions for the second-order switched capacitor (SC)
antialiasing filter. A firnction for comparing the capacitor areas of SC filters based on the
filter sampling fi'equency is developed. The SC filter approximates a continuous filter that
can be represented by the normalized RLC network shown in Figure 101. The transfer

function for this circuit is

237

    
 

40 _
Inverse mean

20 squared error

fl... (kHz)

Figure 99. Antialiasing filter parameter relationships.

__-
_-
‘
~

_2 ..

  

 

   

 

 

 

 

 

a I
S -4 -- . -
_3 — — — decrmator ,
g -6 -- — antialiasing
E 8 combined ;
----- ideal

-10 - ' .

 

0 2000 '4000 6000 8000 10000
frequency (Hz)

Figure 100. System frequency response.

2E38

 

l(s) ‘
W
VI(S) K: “Sc" T v,(s)

 

Figure 101. Second-order low-pass network.

 

 

 

 

L.C..

H(s) , 1
s + “s+

n ann
(02

s2 +2§wns+w:’

where 0),, = normalized analog cutoff frequency,
«5 = damping ratio,
R = 2 4‘,
l

L,=C, =—.
(0

n

The operation of the network can be described with two Laplace integral equations

as

0)"

I(s) = [v.(s)-V.(s)—2§I(s)],

S

 

v,(s) = 3811(5).

These equations can be implemented using two stray-insensitive switched capacitor
integrators in inverting and noninverting configurations. Figure 102 shows the two

configurations and their transfer fiinctions [50]. The resulting pair of equations in the

z-domain are

 

 

 

 

 

 

 

 

 

 

C C
(1)1 A ¢2 n
- )1 O
+ T l_‘°/' D W +
VI ¢2\] (l): \’ V2
.__<32/ 13>. $1 ..
+ J ' +
VI $1 \I (Dr \’ . V2

 

—(Z)

noninverting

—1
CA 2

=—C_3-;3-l—z'l

V2

 

V1

inverting

v CA1

—2(z)= ———

V1 CB 1—2‘1

Figure 102. Switched capacitor integrators [50].

 

 

 

 

 

 

 

 

 

 

0+

O—

Figure 103. Second-order switched capacitor filter.

240

1(2) = $[anz'lVi (z) — a,,v, (z) — a311(z)],

 

 

 

 

1 _
V0(Z) =1—_-z—_Tanz 11(2).
1‘] _ C11 _ we
w ere all - C— : a), — ,
1 p
= $1. _ _ a),
a21 Cl — a), f, ,
_ h _ 250’.-
a3] "' C1 — 260)" — fp a
z 92. _ a),
a12 C2 (0,, f, ,
a)C = filter cutoff frequency (r/s),
j}, = SC sampling frequency (Hz).

The replacement of 0),, with the ratio (0,le results from mapping s into the z—domain.
Figure 103 Shows an implementation of these equations in a SC circuit. The resulting

transfer function is

—2
an arzz

 

H(z) = 2 .
(l —z'1) + a31 (1 —z‘1 ) + a12 61212-1

The goal of the SC filter design is to match the magnitude response of the

continuous antialiasing filter. For each sampling rate, the SC filter parameters fc and 6
were chosen to minimize the squared error between the SC filter and the continuous filter.
Comparisons were made between 100 and 6000 Hz in 100 Hz steps for j; in 10 Hz steps
and 4" in 0.001 steps.

The filter coefficients are implemented through the ratio of capacitors. To simplify

the design, a common value can be used for the denominator capacitor value, or

The SC filter capacitor values can be expressed as ratios of C. For example,
Cll = aHC.
The total capacitor area required by the filter, AC, is
AC 2 2C + aHC + a2,C + a3,C + aIZC.

For comparison, the area is normalized by anC, resulting in

2 a
ACN =——+3+—3l
all all

fp
=2—32.
f++§

3

CS WORST-CASE ANTIALIASING

When the output of the first-stage decimator filter is downsampled, the spectrum is
folded at intervals of 20 kHz (fD/2). The portion that lies within the desired signal band (0
to 5 kHz) introduces permanent distortion into the signal. The portion outside the signal
band (5 to 20 kHz) will also become part of the signal band due to final downsampling by
4. The second-stage decimator filter, therefore, must remove the bulk of this signal before
final downsampling.

The folding is demonstrated in Figure 104 for predownsampled frequencies up to
100 kHz. The graphed frequency response includes the first-stage decimator, SC low-
pass filter and transducer responses. The 10 Hz high-pass offset filter effect has been
removed for clarity. The frequencies before downsampling at the folding points are listed

in the margins of the graph.

 

 

242

 

 
 

pass band

  

20 kHz

 

magnitude (dB)
'5'

 

 

 

 

-90 _ - . , ; ~ ~ ' 60 kHz
-110 . g ‘ _ 100 kHz
_130 _ /—

40, 80 kHz - .-
-150 u I I I
0 5000 10000 1 5000 20000

aliased frequency (Hz)

Figure 104. First-stage spectral folding.

The worst-case antialiasing value of 63.2 dB attenuation results from a

predownsampled frequency of 35 kHz.

C.6 NOISE POWER

The noise power represents the effects of thermal noise seen at the input of the
feature extraction logic section. The two major sources of thermal noise are the
piezoresistors in the transducer, producing resistor noise, and the amplifier immediately
following the transducer, producing amplifier or electronic noise.

The effective resistor noise power is the area of the power spectral density (PSD)
found by passing the flat thermal PSD produced at the resistor through the amplifier,
including the offset reduction high-pass‘filter, antialiasing SC low-pass filter and first—stage

decimation filter. The effective resistor noise power value, derived in section 3.6.2, is

 

 

243

PR gfmSR(w)dw

=4kTR f IH.(1)|2 d1
= 4.367 x 10‘” [0111,1112 d1.

where Hl (f) is the single-sided transfer fiinction from the amplifier through the
decimation filter and the device is at room temperature (293 °K).

The effective electronic noise power, PE, is the area of the PSD found by passing
the input-referred, flat thermal PSD produced by the amplifier through the amplifier,
antialiasing SC low-pass filter and first-Stage decimation filter. The effective electronics

power value is

P, = 6.4 x10'17JSOwIH,(f)|2 df.

Both power values require the area of the square of H1 (f). This area, G, is

estimated with a C program implementing Simpson's ;— rule. The approximate integration

is expressed as [110]

I?
G : 3-[go +4(gr +83 +°"+gN-2)+2(gz +34 +°H+gN-3)+gN“‘]’

where h 2 step size (10 Hz),
2
80‘) =Ithf(x)XHscm,(x)deec(x)| 5
gt = 8(10i)3

i = 0,1, 2, ..., 128000.

The area for fp = 160 kHz is 8782 Hz.

 

244

C.7 TSNR SIMULATION

No direct analytical technique exists for calculating the TSNR of a Sigma-delta
modulating ADC due to the nonlinearity of the device. Hence, the TSNR is estimated by
comparing a sinusoidal input to the resulting output. This section discusses two critical
issues associated with using a simulation to find the "total" signal-to-noise ratio, the
method for performing the comparison and the number of samples required.

The difficulty in performing the comparison arises from the phase delay between

the input sinusoid, x(n), and the ADC output, y(n). The sinusoidal input is

x(n) = M, sin(2nT,f,n),

where M , magnitude,

m—l
ll

sampling period,

f,r = frequency.

The TSNR is derived from the error between y(n) and the delayed input, x'(n).

This error, e(n), is

901) = y(n) - X'(n).
x'(n) = M. PW. )| sin[22rT.1. [n_{1+ £81- 1]H+arg(H(f.))].

The transfer function, H(fx ), can be the decimator if only the ADC is being considered or
can be the product of the transducer, anti-offset filter, antialiasing filter and decimator
transfer functions if the entire system is being considered. The term in brackets, {},
accounts for digital circuit delays. The' factor of 1 accounts for the average delay of the
second-order sigma-delta modulator. The remaining term is the average delay of the SC
filter.

The TSNR can be calculated as

 

245

_ signal power

 

 

 

 

TSNR _-
error power
_ x'2 (n) — x'(n)2
e2 02) - 3623’ ’
where g(n) = time average of g(n)
‘ E‘
= — g(n)-
N n=0

The second issue associated with obtaining the TSNR is the number of samples, N,
used in calculating the averages. Figure 105 shows the TSNR average and a 3 standard
deviation range for various values of N.

Thirty simulation runs were used to develop the average and standard deviation

 

65

TSNR

 

 

 

 

59 F
0.01 0.1 ’ 1 10

Simulation time (sec)

.-

Figure 105. TSNR vs. simulation time.

 

246

values. The input is converted to a random process with the inclusion of a uniformly

distributed angle random variable,

x, (n) = M,r sin(271TSfxn + 19,. ), 0: U[0, 27:].

The shifted input, x'(n), also has 6,. added to its argument. For this simulation, a
magnitude of 0.2 and a frequency of 625 Hz were used.

To initialize the simulated filters, 16,000 samples were generated before gathering
data for statistics. Since the output of the ADC is 40,000 samples/second, this represents
0.4 seconds of time. The slowest responding Simulated filter is the first-order offset
reduction high-pass filter, with a time constant of 0.1 seconds.

On the basis of the results of the above simulation, a sample number of 50,000, or
5 seconds of Simulated time, was chosen for the simulations in Section 4.5. This value

results in a standard deviation of 0.02 dB in the TSNR.

 

APPENDIX D DIGITAL BUTTERWORTH FILTERS

Appendix D describes the design of sixth-order Butterworth band-pass filters
converted to digital filters using the bilinear transformation. The design begins by
designing a third-order Butterworth filter. This is converted to a sixth-order band-pass
filter using a frequency transformation. The bilinear transformation with frequency
prewarping is next used to convert the continuous transfer function into the 2 domain.
Finally, the coefficients are converted to 12-bit signed-magnitude numbers for use in the
bearing monitor's IIR filter cells. Two examples used in Chapters 5 and 6 are provided.

A low-pass Butterworth filter with unity DC gain has a magnitude transfer

fiinction of

 

IHLPF (Jam =

 

l
J1+(ar/w,)2x ’

where K is the filter order and cor is the cutoff frequency. The Butterworth filter has the
flattest pass-band region for a given order because the first 2K — 1 derivatives of HLPF are
zero at DC [111]. The poles ofHLPF can be found by substituting 52 for 032. The 2K poles
are spaced evenly on a circle of radius 03, centered in the s-plane. The K poles on the left-
hand portion of the plane form the stable low-pass filter HLpr(S)- For a third-order filter,
the transfer fiinction is

w3 0J3

H s = ’ = ' .
”*0 (s+w,)(s+w,z60°)(s+(ax—60°) s3+2w,s2+2wfs+w3

 

 

A low-pass filter of order K can be converted to a band-pass filter of order 2K

using the well-known geometric transformation [112]

32 +60% '

S

HBPF (S) : HLPF (S)|
s(-—

247

 

248

The mapping results in a Sixth-order band-pass filter with center frequency 03c and
bandwidth 03,.

In order to implement the filter in 3 second-order cells, the transfer function must
be factored into the product of 3 realizable second-order transfer fiinctions. Algebraic

techniques for accomplishing this have been developed [111]. The result can be written as

 

H (S) _ a),s XS 0) s as
BPF s2 +w,s+a)f 2+C(Da) /E)s+D2a): >(s 2+(cI),,/DE)s+a):/D2 ’
where =60 /a), ,

 

 

 

’

EH1+4Q + (1+4Q22—) 4Q2

i{(E/Q+\/ (E/Q) —4}

The continuous filter in s is converted to a discrete filter in 2 through the bilinear

transformation. The transformation is accomplished by replacing s with the relation [112]

where C = a) cot[—— ”f" ‘1}
fs

fS = sampling frequency.

The value C implements frequency prewarping. The bilinear transform maps the left-half
plane in the s-domain into a circle in the z-domain, with s = 3:00 mapping to z = 21:11. This
creates a fairly linear relationship between a low steady-state frequency in s (1'00) and the
corresponding frequency in z (eja’T’ ). However, as the analog frequency being considered

approaches % f3, large variations in the analog frequency produce only slight changes in

the corresponding digital frequencies. Frequency prewarping exactly matches any one

4M1

 

 

 

 

249

analog frequency to a corresponding digital frequency, in this case the center frequency of
the band-pass filter [1 12].

Applying the bilinear transform to a general second-order band-pass transfer
fiinction results in

Rs | A0 + Ag”1 + A22“2

s2+Ms+P z-I: 1--13,z“—13,z'2 ’

2+1

 

 

H(Z) =

 

s4—C—

where d =C2 +MC+P,
A0 = RC/d,
A = 0,

A2 = -RC/d,

B =(2C2 —2P ),/d

B = (MC Cz- P)./d

The coefficients M and P are different for each of the 3 second-order terms in the sixth-
Order filter. The IIR filter hardware, described in Section 5.4, implements each second

order term as the difference equation

y[nT,] = 2{A,x[nT,]+Al x[(n -1)T,]+A2 x[(n— 2)T,]

+B, y[(n —1)T,]+ B, y[(n— 2)T,]}.

The multiplicative factor of 2 is described below.

Two example filters were implemented for this project. The first, BPF 1, has a
center frequency of 1 kHz and a bandwidth of 400 Hz and is used in the hardware
simulation discussed in Section 5.7. .The second, BPF 2, has a center frequency of 200 Hz
and a bandwidth of 300 Hz and is used in the system simulation of Section 6.2. The

coefficient values derived for each of the filters are listed in Table 36.

 

 

250

Table 36. Band-pass filter coefficients.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Term, BPF 1 BPF 2
coefficient decimal hex decimal hex
1, A0 0.115 076 0.086 058
1, A1 0.0 000 0.0 000
1, A2 —0.115 876 —0.086 858
1, B1 1.640 68F 1.814 741
1, B2 —0.905 B9B -0.828 B50
2, A0 0.106 06C 0.087 059
2, A1 0.0 000 0.0 000
2, A2 —0. 106 86C —0.087 859
2, B1 1.388 58D 1.812 740
2, B2 —O.876 B80 -O.864 B75
3, A0 0.105 06B 0.092 05F
3, A1 0.0 000 0.0 000
3, A2 —0.105 86b -0.092 85F
3, Bl 1.448 5CA 1.955 7D2
3, B2 -0.790 B28 —0.960 BD7

 

 

251

The coefficients are stored as 12-bit sign-magnitude numbers in the 1m cells.
Typical filters with unity gain have coefficients in the range [—2, 2). The coefficients are
scaled by a factor of ‘/2 prior to digitizing to facilitate the multiplication implementation.
The partial products are left-shifted before accumulation to compensate for the scaling.
The resulting 12-bit coefficients that will be shified into the IR cells are listed in Table 36
in the "hex" column.

Figures 106 and 107 Show the analog and resulting digital filter's frequency
response curves for BPF 1 and BPF 2. The second filter Shows a deviation in the pass-

band region due to the finite bit length in the digitized coefficients and the small ratio of fc

to fS.

 

1

252

 

 

i

5 .. - - - analog filter
, — digital filter

 

.....4

 

gain
O
O\

 

 

‘~
1 --
. —--

 

500 1000 1500 2000
frequency (Hz)

Figure 106. Frequency response of BPF 1.

1.2

 

 

' - - - analog filter
— digital filter

---‘

 

 

 

.. ......i, .....x. . ......._.......,.,._._.. .. ...... ....

 

 

 

 

 

 

 

800 1000

frequency (Hz)

Figure 107. Frequency response of BPF 2.

 

BIBLIOGRAPHY

 

[1]

[2]

[3]

[4]

[5]
[6]

[7]

181
191

[10]

BIBLIOGRAPHY

G. Brawley, "Diagnostic health condition performance monitoring - does this make
sense? " Proceedings of the 1 st International Machinery Monitoring and
Diagnostics Conference, Las Vegas NV, pp. 215-221, Aug 1989.

N. Higbie, "Automatic fault detection in machinery," Proceedings of the lst
International Machinery Monitoring and Diagnostics Conference, Las Vegas NV,
pp. 541-545, Aug 1989.

J. Xu, S. Shang and Y. Lin, "Fuzzy diagnosis method in machinery condition
monitoring and failure diagnosis, " Proceedings of the 2nd International
Machinery Monitoring & Diagnostics Conference, Los Angeles CA, pp. 227-233,
Sep 1990.

T. Koizumi, M. Kiso and R. Taniguchi, "Preventive maintenance for roller and
journal bearings of induction motor based on the diagnostic signiture analysis,"
Transactions of the ASME, vol. 108, pp. 26-31, Jan 1986.

P. Cleaveland, "Industrial LANs: Where's the action?" 1&CS - Industrial &
Process Control Magazine, pp. 27-31, Nov 1989.

C. Kembossos and D. Bout, "Machine monitoring with a difference," Process and
Control Engineering, vol. 44, no. 10, pp. 32-34, Oct 1991.

J. Renwick, "Condition monitoring of machinery using computerized vibration
signiture analysis," IEEE Transactions on Industry Applications, vol. IA-20, no. 3,
pp. 519-527, May-Jun 1984.

'K. Wise, "Circuit techniques for integrated solid-state sensors," IEEE 1983

Custom Integrated Circuits Conference, Rochester NY, pp. 23-25, May 1983.

J. Brignell, "Interfacing solid 'state sensors with digital systems," Journal of
Physics E, vol. 18, no. 7, pp. 559-565, Jul 1985.

T. Sanker and G. Xistris, "Failure proediction through the theory of stochastic

excursions of extreme vibration amplitudes, " ASME Journal of Engineering for
Industry, pp. 133-137, Feb 1972.

253

 

 

[11]

[12]

[13]

[14]

[15]

[16]

[17]

[13]

[19]

[20]

[21]

[22]

254

G. Xistris, T. Sankar and G. Ostiguy, "Reliabitlity of machinery using fatigue
damage accumulation due to random vibrations, " Journal of Mechanical Design,
ASME, vol. 100, pp. 619-625, Oct 1978.

T. Henry, "Monitoring rolling element bearing condition," Bearings: Searchingior
a Longer Life. Cheltenham Bearing Conference, Chartered Mechanical Engineer,
pp. 63-69, Oct 1984.

S. Braun and B. Datner, "Analysis of roller / ball bearing vibrations," Journal of
Machine Design, ASME, vol. 101, pp. 118-125, Jan 1979.

L. Meyer, F. Ahlgren and B. Weichbrodt, "An analytical model for ball bearing
vibrations to predict vibration response to distributed defects," Journal of
Mechanical Design, ASME, vol. 102, pp. 205-210, Apr 1980.

J. Tranter, "The fundamentals of and application of computers to condition
monitoring and predictive maintenance," Proceedings of the 1st Annual Machinery
Monitoring and Diagnostics Conference, Las Vegas NV, pp. 394-401, Aug 1989.

J. Mathew and R. Alfredson, "The condition monitoring of rolling element
bearings using vibration analysis, " Journal of Vibration, Acoustics, Stress and
Reliability in Design, vol. 106, pp. 447—453, Jul 1984.

D. Dyer and P. Stewart, "Detection of rolling element bearing damage by
statistical vibration anlysis," Journal of Mechanical Design, ASME, vol. 100, pp.
229-235, Apr 1978.

J. Taylor, "Identification of bearing defects by spectral analysis," Journal of
Mechanical Design, ASME, vol. 102, pp. 199-204, Apr 1980.

J. Reason, "Continuous vibration monitoring moves into diagnostics," Power, vol.
131, no. 1, pp. 47-51, Jan 1987.

J. Berry, "How to track rolling element bearing health with vibration signiture
analysis," Sound and Vibration, vol. 25, no. 11, pp. 24-35, Nov 1991.

Z. Reif and M. Lai, "Detection of developing failures by means of vibrations,"
Proceedings of the I2th Biennial Conference on Mechanical Vibration and Noise,
Montreal Quebec, pp. 231-236, .Sep 1989.

M. Lai and Z. Reif, "Prediction of ball bearing failures," Proceedings of the [st
Annual Machinery Monitoring and Diagnostics Conference, Las Vegas NV, pp.
122-126, Aug 1989. 5

 

[23]

[24]

[25]

[26]

[27]

[28]

[29]

[30]

[31]

[32]

[33]

255

G. Xistris, G. Boast and T. Sankar, "Time domain analysis of machinery vibration
signals using digital techniques," Journal of Mechanical Design, ASME, vol. 102,
pp. 211-216, Apr 1980.

G. Chaturvedi and D. Thomas, "Bearing fault detection using adaptive noise
cancelling," Journal of Mechanical Design, ASME, vol. 104, pp. 280-289, Apr
1982. _

P. Bradshaw and R. Randall, "Early detection and diagnosis of machine faults of
the Trans Alaska pipeline," MSA - Mechanical Signature Analysis, S. Braun ed.,
9th Biennial Conference on Mechanical Vibration and Noise, ASME, Detroit Nfl,
pp. 7-18, Sep 1983.

1. Martin, D. Pearce and A. Self, "The use of a distributed vibration monitoring
system for on-line mechanical fault diagnosis, " Proceedings of the Software
Engineering for Real Time Systems Conference, Cirencester UK, pp. 277-283,
Sep 1991.

1. Howard and G. Stachowiak, "Detection of surface defects in rolling contact
bearings, " Mechanical Engineering, Transactions of the Institution of Engineers,
pp. 158-163, 1989.

A. Lifshits, H. Simmons and R. Smalley, "More comprehensive vibration limits for
rotating machinery," Journal of Engineering for Gas Turbines and Power, ASME,
vol. 108, pp. 583-560, Oct 1986.

H. Martin and D. Robinson, "Kirtosis measurrnents on bearings at low speeds,"
Proceedings of the 198 7 Sensors Expo, Detroit MI, pp. 147-151, Sep 1987.

J. Mathew, "Monitoring the vibrations of rotating machine elements - an
overview," Proceedings of the 12th Biennial Conference on Mechanical Vibration
and Noise, Motreal Quebec, ASME DE-vol 18-5, pp. 7-14, Sep 1989.

S. Dumbacher and G. Slater, "Dynamic modeling of bearing failures. "Proceedings
of the 2nd Annual Machinery Monitoring and Diagnostics Conference, 1990, Los
Angeles CA, pp. 549-553, Sep 1990.

J. Banks and J. Carson, Discrete-Event System Simulation. Prentice-Hall Series in
Industrial and Systems Engineering, W. Fabrycky and J. Mize eds, Englewood
Clifi‘s NJ, pp. 318-319, 1984.

A. Oppenheim and R. Schafer, Discrete Signal Processing, Prentice-Hall Signal
Processing Series, A. Oppenheim ed., Englewood Cliffs NJ, pp. 158-163, 1989.

[34]

[35]

[36]

[37]

[33]

[39]

[40]

[41]

[42]

[43]

[44]

A45}

14461

[47]

256

P. Behrendson, Supervisor of Development, Delco Chassis, General Motors Co.,
Personal conversation, January 14, 1993.

S. Rao, Mechanical Vibramons. Addison-Wesley Publishing, Reading MA, pp.
130-133, 1986.

K. Peterson, "Silicon as a mechanical material," Proceedings of the IEEE, vol. 70,
no. 5, pp. 420-457, May 1982.

B. Puers et al., "A new uniaxial accelerometer in silicon based on the piezojunction
effect," IEEE Transactions on Electron Devices, vol. 35, no. 6, pp. 764-769, June
1988.

Y. Fung, A First Course in Continuum Mechanics. Prentice-Hall Inc., Englewood
Cliffs NJ, pp. 171-176, 1977.

R. Huston and C. Passerello, Finite Element Analysis. an Introduction. Marcel
Dekker Inc., New York NY, p. l, 1984.

NISA 11 User's Manual. Engineering Mechanics Research Co., PO Box 696, Troy
MI, 48029.

R. Christensen, Mechanics of Composite Materials. John Wiley and Sons, New
York NY, pp. 152-155, 1979.

H. Skimin and P. Andreatch Jr., "Elastic moduli of silicon vs. hydrostatic pressure
at 25.0 °C and -195.8 °C," Journal of Applied Physics, vol. 35, no. 7, pp. 2161-
2165, Jul 1964.

K. Bathe, Finite Element Procedures in Engineering Analysis, Prentice-Hall Inc.,
NJ, pp. 114-121, 1982.

F. Pourahmadi, telephone conversation, Nova Sensors, 1055 Mission Court,
Fremont CA, 94539, 1991, Sep 22.

S. Kim and K. Wise, "Temperature sensitivity in silicon piezoresistive pressure
transducers," IEEE Transactions on Electron Devices, pp. 802-810, 1983.

E. Obermeir, "Polysilicon layers lead to a new generation of pressure sensors,"
International Conference on Solid-State Sensors and Actuators, Transducers '85,
pp. 430-433.

W. Mason and R. Thurston, "Use of piezoresistive material in the measurement of
displacement, force and torque," Journal of the Acoustical Society of America,
vol. 29, no. 10, pp. 1096-1101, Oct 1957.

 

[43]

[49]

[50]

[51]

V [521

[53]

[54]

[55]

[56]

I/ [57]

‘~/ [58]

[59]

[60]

257

M. Chuey and T. Grotjohn, "An introduction to the effects of mechanical stress on
the resistivity of Silicon," Technical Report MSU—ENGR-89-007, Michigan State
University, Apr 1989.

C. Smith, "Piezoresistance effect in germanium and silicon," Physics Review, vol.
94, no. 1, pp. 42-49, Apr 1954.

R. Geiger, P. Allen and N. Strader, VLSI Design Techniques for Analog and
Digital Circuits, McGraw-Hill Publishing Co., pp. 108-126, 1990.

K. Kada, "Piezoresistance effect of silicon," Sensors and Actuators A, vol. 28, pp.
83-91, 1991.

O. Tufte and E. Stelzer, "Piezoresistive properties of silicon diffused layers,"
Journal of Applied Physics, vol. 94, no. 2, pp. 313-318, Feb 1963.

L. Roylance and J. Angell, "A batch-fabricated silicon accelerometer," IEEE
Transactions on Electron Devices, vol. ED-26, no. 12, pp. 1911-1917, Dec 1979.

ICSensors product literature on models 3140, 3031, 3026 and 3021
accelerometers, ICSensors, 1701 McCarthy Blvd, Milpitas CA, 95035.

SenSym 1989 Solid-State Sensor Handbook, SenSym, Inc., 1244 Reamwood
Avenue, Sunnyvale CA, 94089.

J. Binder, K. Becker and G. Ehrler, "Silicon pressure sensor for the range 2 kPa to
40 MPa," Siemens Components (English ed), vol. 20, no. 2, Germany, pp. 64-67,
Apr 1985.

J. Bryzek, "A new generation of high accuracy pressure transmitters employing a
novel temperature compensation technique, " WESCON Conference Record, vol.
25, pp. 15.4.1-15.4.10, 1981.

J. Wang et al., "A novel structure of pressure sensors, " IEEE Transactions on
Electron Devices, vol. 38, no. 8, pp. 1797-1802, Aug 1991.

T. Jackson, M. Tischler and K. Wise, "An electrochemical p-n junction etch-stop
for the formation of silicon microstructures," IEEE Electron Device Letters, vol.
EDL-2, no. 2, pp. 44-45, Feb 1981.

M. Hirata, S. Suwazono and H. Tanigawa, "A silicon diaphragm formation for
pressure sensor by anadic oxidation etch-stop," Proceedings of the International
Conference on Solid State Sensors and Actuators, Philidelphia PA, pp. 260-263,
1985.

 

[61]

[62]

[63]

[64]

[65]

[66]

[67]

[68]

l69l

[70]

[71]

258

W. Riethmiiller et al., "Development of commercial CMOS process-based
technologies for the fabrication of smart accelerometers, " 1991 lntemational

Conference on Solid-State Sensors and Actuators, San Fransisco CA pp. 416-
419, Jun 1991.

M. Lee, B. Lee and S. Jung, "A bipolar integrated silicon pressure sensor," Sensors
and Actuators A, vol. 34, pp. 1-7, 1992.

I. Baskett, R. Frank and E. Ramsland, "The design of a monolithic, signal
conditioned pressure sensor, " IEEE 1991 Custom Integrated Circuit Conference,
San Diego CA, p. 4p, May 1991.

R. Payne and A. Dinsmore, "Surface micromachined accelerometer: A technology
update, " SAE International Congress and Exposition, Detroit MI, pp. 574-582,
Feb 1991.

R. Hadaway et al., "A sub-micron BiCMOS technology for telecommunications,"
Microelectronic Engineering (1991), vol. 15, pp. 513-516.

J. Kendall et al., "BANCMOS: A 25V mixed analog-digital BiCMOS process,"
IEEE 1990 Bipolar Circuits and Technology Meeting, Minneapolis MN, pp. 86-
89, Sep 1990.

B. Graindourze and H. Casier, "Mixed analog/digital in a mixed bipolar/MOS
technology," Proceedings of the 3rd Annual IEEE ASIC Seminar and Exhibit,
Rochester NY, p. 4.4p, Sep 1990.

E. Berkcan, "MxSICO: A mixed analog digital compiler: Application to
oversampled A/D converters," IEEE 1990 Custom Integrated Circuits
Conference, Boston MA, p. 14.9.1, May 1990.

K. Soejima et al., "A BiCMOS technology with 660 MHz vertical PNP transistor
for analog/digital ASICS, " IEEE Journal of Solid-State Circuits, vol. 25, no. 2, pp.
410-416, Apr 1990.

B. Wooley, "BiCMOS analog circuit techniques," 1990 IEEE lntemational
Symposium on Circuits and Systems, New Orleans LA, vol. 3, pp. 1983-1986,
May 1990.

K. Mahmoud and R. Wolffenbuttel, "Compatibility between bipolar readout
electronics and rnicrostructures in silicon," Sensors and Actuators A, vol. 31, pp.
188-189, 1992.

 

[72]

[73]
[74]
[75]

[76]

,I77]
[78]

[79]

/ [80]

[81]

[82]

[83]

[84]

259

T. Tschan, N. De Rooij and A. Bezinge, "Oil-damped piezoresistive silicon
accelerometers, " 1991 International Conference on Solid-State Sensors and
Actuators, San Fransisco CA, pp. 112-114, Jun 1991.

H. Allen, S. Terry and D. DeBruin, "Accelerometer systems with self-testable
features," Sensors and Actuators, vol. 20, pp. 153-161, 1989.

Nova Sensors product literature on NAS and NAH series accelerometers, 1055
Mission Court, Fremont CA, 94539, 1990.

"Temperature compensation IC pressure sensors," ICSensors Application Note,
TN-002, Milpatas CA, Mar 1985.

J. Borky and K. Wise, "Integrated signal conditioning for silicon pressure sensors, "
IEEE Transactions on Electron Devices, vol. ED-26, no. 12, pp. 1906-1910, Dec
1979.

H. Tanigawa et al., "MOS integrated silicon pressure sensor," IEEE Transactions
on Electron Devices, vol. ED-37, no. 7, pp. 1191-1195, Jul 1985.

H. Muro et al., "Stress analysis of SiOz/Si bi-metal effect in silicon accelerometers
and it compensation," Sensors and Actuators A, vol. 34, pp. 43-49, 1992.

J. Gakkestad, H. Jakobsen and P. Ohlckers, "A front end CMOS circuit for a full-
bridge piezoresistive pressure sensor," Sensors and Actuators A, vols. 25-27, pp.
859-863, 1991.

K. Suzuki et al., "Nonlinear analysis of a CMOS integrated silicon pressure
sensor, " IEEE Transactions on Electron Devices, vol. ED-34, no. 6, pp. 1360-
1366, Jun 1987.

Quattro Pro for Windows User's Guide. Borland International Inc., Scotts Valley
CA, 1992, pp. 309-316, 1992.

R. Spencer et al., "A theoretical study of transducer noise in piezoresistive and
capacitive silicon pressure sensors," IEEE Transactions on Electron Devices, vol.
35, no. 8, pp. 1289-1297, Aug 1988.

A. Papoulis, Probability, Random Variables, and Stochasjc Processes, McGraw-
Hill Inc., New York NY, pp. 360-361, 1965.

A. Baschirotto, "An analog BiCMOS integrated circuit for front-end RDS
decoder, " IEEE Transactions on Consumer Electronics, vol. 37, no. 3, pp. 585-
590, Aug 1991.

[35]

[86]

[37]

[88]

[39]

[90]

[91]

[92]

[93]

[94]

[95]

[96]

260

M. Monti, D. Rossi and M. Belloli, "Low-noise tape preamplifier with new self-
biasing architecture, " IEEE Journal of Solid State Circuits, vol. 37, no. 7, pp. 966-
972, Jul 1992.

J. Bryzek et al., "New technologies for silicon accelerometers enable automotive
applications," SAE Technical Paper 920474, Proceedings of the 1992 SAE
International Congress and Exposition, Detroit MI, Feb 1992.

J. Candy and G. Temes, "Oversampling methods for A/D and D/A conversion,"

Oversampling Delta-Sigma Data Converters Theory. Design and Simulation,
IEEE Press, Piscataway NJ, pp. 1-25, 1992.

 

J. Candy, B. Wooley and 0. Benjamin, "A voiceband codec with digital filtering,"
IEEE Transactions on Communications, vol. CON-29, pp. 815-830, Jun 1981.

R. Koch et al., "A 12-bit sigma-delta analog-to-digital converter with a lS-Mhz
clock rate," IEEE Journal of Solid-State Circuits, vol. SC-21, no. 6, pp. 1003-
1010, Dec 1986.

J. Candy, "A use of limit cycle oscillations to obtain robust analog-to-digital
converters," IEEE Transactions on Communications, vol. COM-22, pp. 298-305,
Mar 1974.

J. Candy, "A use of double integration in sigma delta modulation," IEEE
Transactions on Communications, vol. COM-33, pp. 249-258, Mar 1985.

M. Hauser, P. Hurst and R. Brodersen, "MOS ADC-filter combination that does
not require precision analog components," ISSCC Digital Technical Papers, pp.
80-81, Feb 1985.

V. Friedman et al., "A dual-channel vioce band PCM codec using 2A modulation
technique," IEEE Journal of Solid-State Circuits, vol. SC-24, pp. 274-280, Apr
1989.

A. Huber et al., "FIR lowpass filter for signal decimation with 15 Mhz clock
frequency," IEEE Proceedings of the ICASSP '86, Tokyo, pp. 1533-1536, Apr
1986.

B. Agrawal and K. Shenoi, "Design methodology for 2AM," IEEE Transactions
on Communications, vol. COM-31, pp. 360-370, Mar 1983.

J. Candy, "Decimation for sigma delta modulation," IEEE Transactions on
Communications, vol. COM-34, pp. 72-76, Jan 1986.

 

[97]

[98]

[99]

[1001

[101]

[102]

[103]

[104]

[1051

[106]

[107]

[108]

[109]

11101

261

H. Meleis and P. LeFur, "A novel architecture design for VLSI implementation of
an FIR decimation filter," IEEE Proceedings of the ICASSP ’85, pp. 1380-1383,
Mar 1985.

N. Weste and K. Eshraghian, Principles of CMOS VLSI Design. A System
Persgctive. Addison-Wesley Publishing Co., pp. 202-316, 1985.

B. Boser and B. Wooley, "The design of sigma delta modulation analog-to-digital
converters," IEEE Journal of Solid-State Circuits, vol. SC-23, pp. 1293-1308,
Dec 1988.

A. Karabucikas et al., "A high-frequency fully differential BiCMOS operational
amplifier," IEEE Journal of Solid-State Circuits, vol. 26, no. 3, pp. 203-208, Mar
1991.

R. Castello and L. Tomasini, "1.5-V high-performance SC filters in BiCMOS
technology," IEEE Journal of Solid State Circuits, vol. 26, no. 7, pp. 930-936, Jul
1991.

K. Hwang, Computer Arithmetic Prica3les. Architecture and Desigr_1, John Wiley
& Sons, New York, pp.130-135, 1979.

Verilog-XL Reference Manual. Version 1.6, vol. 1, pp. 1-1 - 1-4, Mar 1991.
Silicon Microstructures Inc. product literature on models 7501 and 7502, rev. 1.0 -
15-02, Silicon Microstructures Inc., 46725 Fremont Boulevard, Fremont CA,

94538.

M. Neuberger and S. Ewlls, Silicon, Electronic Properties Information Center,
Hughes Aircraft Co., Culver City CA, Oct 1969.

 

E. Oberg, F. Jones and H. Horton, Machinery‘s Handbook. 22nd Ed, Industrial
Press Inc., New York NY, pp. 262-263, 1984.

J. Nye, Physical Properties of Crystals. Oxford University Press, London, 1957.

S. Chu and C. Burrus, "Multirate filter designs using comb filters," IEEE
Transactions on Circuits and Systems, vol. CAS-31, pp. 913-924, Nov 1984.

E. Dijkstra et al., "On the use .of modulo arithmetic comb filters in sigma delta
modulators, " IEEE Proceedings of the ICASSP '88, pp. 2001-2004, Apr 1988.

P. Davis and P. Rabinowitz, Numerical Integration. Blaisdell Publishing Co,
Waltham MA, pp. 20, 1967.

 

262

[111] J. Johnson, Introduction to Digital Signal Procesmg, Prentice-Hall Inc.,
Englewood NJ, pp. 211-212, 236-239, 1989.

[112] W. Stanley, Digital Sigaal Processing, Reston Publishing Company, Inc., Reston
VA, pp.139-144, 168-174, 1975.

 

“11111111711IIII