W LIBRARY 1 menu“ State University 1‘ PLACE IN RETURN BOX to remove this checkout from your record. TO AVOID FINES return on or before date due. ‘u DATE DUE DATE DUE DATE DUE H MSU Is An Affirmative Action/Equal Opportunity Institution cmmwt . , , INTERFACE CIRCUIT FOR PIEZORESISTIVE PRESSURE SENSORS By Muhammad Akbar A DISSERTATION Submitted to Michigan State University in partial fulfillment of the requirements for the degree of DOCTOR OF PHILOSOPHY Department of Electrical Engineering 1991 g 77- 75'5” 5 ABSTRACT INTERFACE CIRCUIT FOR PIEZORESISTIVE PRESSURE SENSORS By Muhammad Akbar A major problem associated with piezoresistive pressure sensors is their cross- sensitivity to temperature. Moreover, in batch fabrication, minor process variations change the temperature characteristics for individual units. An important economic implication for the success of smart sensors is the use of batch fabrication techniques to bring down the cost of individual units. This research fulfills this need by develop- ing a new temperature compensation technique suitable for batch fabricated sensors for a temperature range of -40°C to 130°C over a pressure range of O to 45 psi. Hardware for the implementation of the technique and digitization of sensor output is also developed. The sensor model is developed from the viewpoint of simulating the sensor I/O characteristics as a function of pressure, temperature, and processing variations. The model includes the effects of temperature, resistor mismatch, and appropriate structural details. The simulation results provide the worst case error band for sensors coming from the same wafer or different wafers. All sensor parameters are functions of tem- perature and the tracking errors. The temperature compensation technique is implemented in two parts, using a compensation bridge and a temperature half bridge. The zero pressure offset is reduced ii below the measurement precision limit for the entire pressure and temperature range. For the sensor output, the technique is very effective for the pressure values below 35psi and provides reasonable results for higher pressures. The possible use of a software approach to implement part of the compensation technique is also discussed. The hardware for the amplification, temperature compensation, and the digitiza- tion of the sensor output has been designed and verfied. A dual slope AID conversion has been identified as a simple and precise conversion technique, suitable and compati- ble for on-chip integration with the sensor. The bipolar dual slope ADC with a word length of 10-bits and the clock frequency of SOKHz has been designed and verfied. The temperature compensation technique is suitable for batch fabrication. More- over, it does not require compensation of individual units under sensor operating con- ditions. The resulting interface circuit is simple, requiring modest chip area. It can be implemented using standard IC fabrication techniques. iii To my mother and my father iv Acknowledgements First of all I would'thank Allah (SWT), the creator and sustainer, of this universe for providing me with the abilities and opportunity to complete this work. I am grateful to the government of Pakistan for supporting me financially during my studies. Without this support, this research effort would not have been possible. I would like to express my deepest gratitude to my advisor Dr. Michael A. Shan- blatt for his continuous moral and professional support and guidance throughout my doctoral program. It was a profound learning experience to work under his able gui- dance. It has greatly enhanced my academic and professional growth. He was very helpful and understanding throughout my work. I owe my thanks to Dr. Donnie K. Reinhard for serving on my committee and providing me with his valuable suggestions and helpful comments about my research work. I also express my gratitude to Dr. Chin-Long Wey, Dr. Abdol H. Esfahanian, and Dr. Roy V. Erickson for serving on my guidance committee and evaluating and reviewing this research work. I express my sincere appreciation for Dr. Mohammad Aslam for his encouragement during my work and help in obtaining the software for my research. I am indebted to many friends for their encouragement and support during this work. I owe my thanks to my family and my wife’s family for their continued prayers, encouragement, and patient wait for the successful completion of this work. My wife Tahira and children Ammar, Aaisha, Aamina, and Safaa deserve a special thanks for their support and understanding through out this research effort. Table of Contents List of Tables ............................................................................................................ xi List of Figures ..... xii Chapter 1. Introduction ......................................................................................... 1 1.1 Problem Statement ........................................................................................ 4 1.2 Approach ....................................................................................................... 5 1.3 Organization of Dissertation ......................................................................... 7 Chapter 2. Background .......................................................................................... 10 2.1 Definitions .................................................................................................... 11 2.2 Integrated Smart Sensors ............................................................................. 11 2.2.1 Development Stages .......................................................................... 12 2.2.2 Salient Features ................................................................................. 12 2.2.3 Application Areas ............................................................................. 13 2.3 Silicon Sensors ............................................................................................. 13 2.3.1 Design Principles .............................................................................. 14 2.3.2 Silicon Bulk Properties ..................................................................... 15 2.3.3 Electronic Transducer Devices ......................................................... 15 2.3.4 Fabrication Considerations ............................................................... 17 2.3.5 Mechanical Structures for Silicon .................................................... 19 2.3.5.1 Manufacturing Methods ...................................................... 19 2.3.5.2 Mechanical Structures ......................................................... 20 2.3.5.3 The Cutting Edge ................................................................ 21 2.4 Smart Sensor Interface Electronics ............................................................. 22 2.4.1 Interface Considerations ................................................................... 23 2.4.2 Specific Components ........................................................................ 25 2.4.3 High Temperature Microelectronics ................................................. 28 vi 2.5 Silicon Pressure Sensors .............................................................................. 29 2.5.1 Capacitive Pressure Sensors ............................................................. 30 2.5.2 Piezoresistive Pressure Sensors ........................................................ 32 2.5.3 Other Types ....................................................................................... 35 2.6 Temperature Compensation of Piezoresistive Pressure Sensors ................ 35 2.6.1 Temperature Characteristics ............................................................. 36 82.6.1.1 Temperamre Coefficient of Pressure Sensitivity ................ 37 2.6.1.2 Temperature Coefficient of Offset ...................................... 37 2.6.2 Temperature Compensation Techniques .' ......................................... 38 2.6.2.1 Laser Trimming ................................................................... 38 2.6.2.2 Matching Temperature Coefficients ................................... 40 2.6.2.3 Mathematical Compensation ............................................... 42 2.7 Modeling and Simulation of Piezoresistive Pressure Sensors ................... 44 2.8 Summary ...................................................................................................... 46 Chapter 3. Sensor Modeling ......................................................................... 47 3.1 Introduction ................................................................................................... 47 3.2 Objectives ...................................................................................................... 47 3.3 Approach ....................................................................................................... 49 3.4 The Simulator ................................................................................................ 49 3.4.1 Overview of the Program .................................................................. 50 3.4.2 Program Verification .......................................................................... 51 3.4.3 Revalidation ........................................................................................ 51 3.5 The Sensor Model ......................................................................................... 53 3.6 Simulation Methodology and Results ........................................................... 56 3.6.1 Methodology and Organization ......................................................... 57 3.6.2 Simulation Results: Ideal Sensor ....................................................... 57 3.6.3 Simulation Results: Batch Fabrication .............................................. 60 3.6.3.1 Batch Fabrication Model ...................................................... 61 3.6.3.2 Simulation Organization ....................................................... 62 3.6.3.3 Simulation Results ................................................................ 63 vii 3.7 Summary ........................................................................................................ 66 Chapter 4. Temperature Compensation .............................................................. 68 4.1 Introduction ................................................................................................... 68 4.2 Temperature Characteristics .......................................................................... 68 4.2.1 Review ................................................................................................ 69 4.2.2 Temperature Errors ............................................................................ 69 4.3 Objectives ...................................................................................................... 71 4.4 Approach ....................................................................................................... 71 4.5 Compensation Technique .............................................................................. 72 4.5.1 Compensation: Same Wafer Variations ............................................ 73 4.5.1.1 The Double Bridge Technique ............................................. 73 4.5.1.2 Results ................................................................................... 76 4.5.2 Compensation: Wafer-to-Wafer Variations ....................................... 79 4.5.2.1 Approach ............................................................................... 79 4.5.2.2 The Half Bridge Technique ................................................. 80 4.5.2.3 Results ................................................................................... . 82 4.5.2.4 Discussion ............................................................................. 86 4.6 Summary ........................................................................................................ 88 Chapter 5. Interface Hardware ............................................................................. 90 5.1 Introduction .................................................................................................. 90 5.2 Design Objectives and Philosophy ............................................................ 91 5.3 Design Specifications ................................................................................... 92 5.4 Amplification ................................................................................................ 93 5.4.1 Design Approach for the Op-amp .................................................... 94 5.4.2 The Op-amp Circuit .......................................................................... 94 5.4.3 The Amplifier Circuit ....................................................................... 97 5.5 Analog Subtraction ...................................................................................... 98 5.6 Analog to Digital Conversion ..................................................................... 99 5.6.1 Types of ADCs ................................................................................. 101 viii 5.6.1.1 Successive Approximation .................................................. 101 5.6.1.2 Flash or Parallel .................................................................. 102 5.6.1.3 Ramp or Integration ............................................................ 102 5.6.1.4 Tracking or Servo ............................................................... 104 5.6.2 Selection of the Analog to Digital Conversion Technique ............. 104 5.6.3 The Dual Slope ADC ....................................................................... 105 5.6.4 Designof the Dual Slope ADC ....................................................... 108 5.6.4.1 Design Specifications .......................................................... 110 5.6.4.2 Analog Circuit for the ADC ............................................... 113 5.6.4.2.1 Sign Detector ...................................................... 115 5.6.4.2.2 Integration Control .............................................. 115 5.6.4.2.3 The Integrator Circuit ......................................... 117 5.6.4.2.4 Zero Crossing Detector ....................................... 118 5.6.4.2.5 Performance of the Analog Circuit ..................... 118 5.6.4.3 Digital Circuit for the ADC ................................................ 119 5.6.4.3.1 Timing Pulse Generator ...................................... 119 5.6.4.3.2 The ADC Counter and Register ......................... 12] 56.4.3.3 Control Circuit .................................................... 122 5.7 The Half Bridge Compensation Hardware ................................................. 123 5.8 Summary ...................................................................................................... 125 Chapter 6. Conclusion ............................................................................................ 127 6.1 Summary and Contributions ........................................................................ 127 6.2 Future Research ........................................................................................... 131 Appendix A. SENSIM Simulations ....................................................................... 133 Al Sensor Structures and Model Parameters ................................................... 133 A2 The Simulation Code for the Sensor with no Tracking Errors ................. 134 A3 The Simulator Output for the Sensor with no Tracking Errors ................ 135 Appendix B. Simulation Results ........................................................................... 141 ix B.l Piezoresistive Bridge Outputs ..................................................................... 141 B2 Compensation Bridge Outputs .................................................................... 153 3.3 The Compensated Outputs .......................................................................... 156 3.4 The Half Bridge Outputs ............................................................................ 162 3.5 The Final Temperature Compensated Outputs ........................................... 163 Appendix C. PSpice Simulation Code .................................................................. 167 ' C.1 'nte Op-amp Circuit .................................................................................... 167 C2 The Analog Circuit for the ADC ............................................................... 168 Appendix D. VHDL Simulation Code ................................................................... 170 Bibliography .............................................................................................................. 177 2.1 2.2 3.1 4.1 5.1 5.2 5.3 List of Tables Physical effects for sensors in silicon [4]. Silicon devices that can be used for sensing [91]. Characteristics of various piezoresistor layouts. Piezoresistor tracking error values. Characteristics of the op-amp [137]. ADC characteristics as functions of word length, frequency, and reference voltage. Characteristics of the Bipolar Dual Slope ADC. xi 14 18 59 77 96 112 113 2.1 2.2 2.3 2.4 2.5 2.6 2.7 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 The compensated output for the sensor with 20% tracking errors. ................... 4.11 The pressure sensitivity for the sensor with -20% tracking errors. ................... List of Figures Diaphragm types [101,102]. Smart sensor technology temperature range and cost [122]. Typical silicon pressure sensing structures. Pressure-voltage characteristic for the sensor described in [7]. Temperature response of the sensor with 10% tracking errors. Zero pressure offset of the sensor with 10% tracking errors. Typical calibration/compensation circuit [5]. The measured and simulated diaphragm center deflection [17]. Stress distribution over the diaphragm. The sensor structure. Piezoresistor layouts on a diaphragm and their Cartesian coordinates in micrometers (Not to scale). Pressure sensitivity for the three layouts. Output voltage for the three layouts. The sensor response as a function of pressure and temperature. Pressure sensitivity for various tracking errors. The zero pressure offset for various tracking errors. The error voltages for the sensor. The double bridge temperature compensation technique. The improved double bridge temperature compensation technique. .................... The compensated zero pressure offset voltage. The compensated output voltage. The half bridge temperature compensation technique. Flow chart for the half bridge temperature compensation technique. ................. The compensated sensor response as a function of the temperature. .................. The compensated output for the sensor with no tracking errors. xiii 21 29 3 1 34 39 39 41 52 53 54 58 6O 61 64 65 66 70 74 76 78 79 81 83 84 84 85 86 CHAPTER 1 INTRODUCTION Sensors are used to acquire physical information in a usable form, usually electri- cal. Historically, sensors were mechanical components which used physical means to convey their responses. The next generation of sensors were solid-state. Currently, a new generation of sensors is evolving by integrating the interface circuitry on the sen- sor chip. The prime advantage of such a sensor is the proximity of transducer and associated electronics. For many smart sensors, the performance of the overall device depends more on the interface electronics rather than on the transduction element. An important economic implication for the success of smart sensors is the use of batch fabrication techniques to bring down the cost of individual units. One such sensor of current interest is the piezoresistive pressure sensor. Presently this is the most common pressure sensing technique followed by capacitive pressure sensors. For both techniques a thin diaphragm is etched from the silicon as the basic sensing element. The capacitive pressure sensor uses the flexible diaphragm as one plate of a variable air-gap capacitor. Capacitive pressure sensors have higher sensitivity and are less vulnerable to temperature but introduction of any electronics with the sensing device is a difficult process [1]. For the piezoresistive pressure sensors the stress sensing resistors are generally formed in a wheatstone bridge configuration on the thin diaphragm. The piezoresistive sensors are easier to manufacture and, as a result, cost less. Additionally the response is more linear so the output requires less signal conditioning. The major problem of piezoresistive pressure sensors is their cross-sensitivity to temperature. Moreover, in batch fabrication, minor process varia- tions change the temperature characteristics for individual units. The primary aim of this research is to develop an interface circuit for the piezoresistive pressure sensors to provide a compensated digital output over a wide pressure and temperature range. The sensor is intended to be used in a temperature range of -40°C to 130°C over a pressure range of 0 to 45 psi. This pressure and tem- perature range is sufficient to cover the automotive [2,3] and other general applications [4-6]. The interface should also take care of the processing variations, eliminating the need for temperature compensation of individual units. The interface circuit should be simple and suitable for the batch fabrication of such sensors. This aspect is very important for the economical development of the integrated sensors since batch fabri- cation is the key factor in lowering the costs of these devices. As stated earlier, the major problem associated with piezoresistive pressure sen- sors is their cross-sensitivity to temperature. Recognizing this difficulty many research- ers have devoted considerable effort in developing new hardware and software tech- niques for temperature compensation of piezoresistive pressure sensors. Temperature compensation techniques have been reported using laser trimming, external resistors, mathematical compensation, and clever use of material properties [7-16]. Generally these techniques are for limited temperature and pressure ranges, and in many cases for specific applications such as biomedical devices. Moreover, these techniques involve additional processing steps performed under sensor operating conditions which add time and cost to the device fabrication process. Therefore, these techniques may not have an immediate large user base because of their high cost. Such cost require- ments are best matched by a technique which is suitable for batch fabrication and still utilizes standard IC fabrication techniques. Temperature affects the transducer and measurand in a variety of ways. The influence of temperature is manifested as a change in the span and offset of the sensor response. The errors in the piezoresistive sensor response are mainly caused by three sources: on-chip tracking errors, wafer-to-wafer tracking errors, and the temperature dependency of the coefficient of piezoresistivity. A new temperature compensation technique is developed in two parts in this work. The first part employing an identical compensation bridge, takes care of the zero pressure offset and the errors caused by on-chip tracking errors. The second part of the technique uses a temperature half bridge and companion digital circuit to remove the remaining temperature dependence from the sensor output. Both the techniques are simple, use standard IC technologies, and are suitable for batch fabrication. The use of this technique make the sensor response temperature independent. The only variation left in the output of the sensor is caused by wafer-to-wafer tracking errors. This can be taken care of during the calibra- tion of the sensors. Piezoresistive pressure sensors are modeled from the viewpoint of batch fabrica- tion. Sensim, a simulation program for the piezoresistive and capacitive pressure sen- sors [17] is used to. simulate the sensor I/O characteristics as a function of pressure, temperature, and processing variations. The simulation program requires a low level physical model and produces diaphragm deflection, stress distribution over the diaphragm, average stress over the piezoresistors, node voltages, changes in resistance due to stress, and capacitance changes with pressure. The analog output of the com- pensation circuit is digitized by a dual slope analog to digital converter. The conver- sion technique is simple, precise, and compatible with on-chip integration with the sen- sor [18]. The design for the bipolar dual slope analog to digital converter is presented. The analog portion of the interface circuit is verified by PSpice 4.03, the de facto standard for analog circuit simulation. The digital portion is tested by VHDL, the IEEE standard hardware description language (HDL). 1.1 Problem Statement Ongoing advancement of IC fabrication, micromachining, and packaging techno- logies have given rise to the concept of integrated smart sensors in the form of monol- ithic silicon chips containing both sensors and circuitry. Though some very convincing advantages are attached to smart sensors, only a few such devices are commercially available at present. Some of the obvious concerns in achieving the integration are the possible drop in yield, package design, and the need for process compatibility between the sensing element and the associated electronics. Pressure sensors are one of the most developed type of sensors at present. Of these, piezoresistive pressure sensors show better process compatibility for the integra- tion of on-chip electronics [1]. Piezoresistive pressure sensors offer good linearity over a wide dynamic range, moderately high pressure sensitivity, and freedom from hysteresis, however they have experience a high degree of temperature sensitivity. Their pressure sensitivity as well as zero pressure offset are a function of temperature. The temperature dependence is determined by the transducer structure and the bridge resistors tracking errors. Therefore the temperature characteristics for individual units differ slightly because of minor processing variations. As a result of this, temperature compensation of individual units must be used at the present time. Techniques like precise laser trimming of individual units [5,8,9,11,13,16,19-22] are used but are expensive and time consuming processes. One possible way to address this problem is the development of temperature com- pensation techniques which are not specific to individual units. Some of these tech- niques have been developed, but for a limited temperature range and for specific appli- cations such as certain biomedical devices [23-25]. This limits the application variety for pressure sensors, especially for the applications requiring operation over a wide temperature range. One of the urgent needs is the development of a simple but generalized temperature compensating circuit which covers a wide temperature range and does not have to be adjusted for individual units. To fulfill the smartness concept the sensor output must be compatible with the digital world. Therefore the output has to be amplified and converted to digital form. In response to these needs, the aim of this research is to develop an interface circuit which takes the sensor output and pro- duces a corresponding temperature compensated digital number for -40°C to 130°C over a pressure range of 0 to 45 psi. 1.2 Approach The general approach of this research is to 1) review the design, architecture, and existing temperature compensation techniques for the piezoresistive pressure sensors; 2) develop a realistic model for the sensor and generate sensor performance data over the desired pressure and temperature range; 3) deve10p a temperature compensation technique for the sensor; and 4) design and verify the temperature compensation and the digitization circuitry. The first task, an in-depth review of existing piezoresistive pressure sensors and their associated electronics, serves four purposes. First, it provides an understanding of the physical structure of the sensor and its effects and demands on the interface elec- tronics. Second, the more advanced and useful techniques can be adopted as part of the new design. Third, critiques on previous approaches enable the avoidance of known pitfalls in the design decisions. Fourth, the research areas which need urgent attention but are not covered by this research may be identified. The review is focused on four key areas: silicon mechanical structures, the associated interface electronics, tempera- ture compensation techniques, and modeling and simulation of piezoresistive pressure sensors. An understanding gained fiom this study will help in developing a better sen- sor model and interface circuit. For the second task, the sensor model is developed from the viewpoint of simulat- ing the sensor I/O characteristics as a function of pressure, temperature, and process variations. The model lays a foundation for further work. It enables functional simula- tion of the sensor and provides an input source for the interface circuit. The model is also used to study the temperature characteristics of the sensor. The model includes the effects of temperature, resistor mismatch, and structural details of the sensor. Sensim, the piezoresistive and capacitive sensor simulation program is used for the simulation. The simulator is validated and used to generate data over the desired pressure and tem- perature range. The third task is to develop a compensation technique to remove the effects of temperature and processing variation for a temperature range of -40°C to 130°C overia pressure range of 0 to 45 psi. Temperature dependence of the sensor output and mro pressure offset are the major drawbacks of piezoresistive pressure sensors. The effects of temperature are studied with respect to these two parameters, using the data gen- erated in the second task. The temperature compensation technique has been developed in two parts. The first part makes use of two bridges: a piezoresistive bridge fabri- cated on the diaphragm and an identical compensation bridge located on the bulk part of sensor chip. Output of the first bridge is a function of pressure, temperature, and processing variations whereas the compensation bridge response is dependent on tem- perature and processing variations only. The difference of the two bridge outputs removes the zero pressure offset and the variations caused by on-chip tracking errors. The second part of the technique uses a temperature half bridge located on the bulk part of the chip to generate the temperature signal. This signal and some digital circui- try is used to remove the remaining temperature dependency from the sensor output. The fourth task is the specification of a circuit design for amplification, tempera- ture compensation, and digitization of the sensor output. This task will produce the hardware for interface circuit. The amplification of the bridge signals is implemented using an op-amp based amplifier circuit. The amplifier also serves the purpose of con- verting the double ended bridge outputs to the single ended signals. The difference of the piezoresistive bridge and the compensation bridge outputs is obtained from an op- arnp based analog subtractor circuit. Use of analog subtraction results in considerable savings of chip area. One of the key requirements for expanding microtransducers into smart sensors is simple, and process compatible analog-to-digital conversion. To cope with the process- ing variations, the technique should not require precise components. To fulfill these requirements the dual slope conversion technique is selected for the interface circuit. The design of the bipolar dual slope analog to digital converter is carried out in bottom-up fashion. The final task involves interface hardware behavioral modeling to fine tune and verify the design. The sensor model developed in second task is used as the input source for the simulations. The design and testing of the circuit is carried out in bot- tom up fashion. Initially small blocks, such as op-amp, comparator, counter, and decoder are simulated to ensure desired behavior. Then these blocks are integrated to form the complete circuit. Finally the complete analog and digital portions of the cir- cuit are simulated and tested. PSpice, the de facto standard for analog circuit simula- . tion is used for the analog portion of the circuit and VHDL, the IEEE standard hardware description language is used for digital simulations. The necessary refinements, modifications, and parameter and component selection is documented in the design process. 1.3 Organization of the Dissertation In Chapter 2 an overview of smart integrated sensors and their associated inter- faces is presented. First, a set of definitions used in this dissertation is presented. Then silicon based sensors are reviewed with two issues highlighted: the use of silicon bulk properties, and micromachining techniques used to create three dimensional intricate structures in silicon. With this background the smart sensor interface electronics are reviewed from the viewpoint of understanding possible interface functions and approaches taken to implement these functions for the fulfillment of the smart sensor concept. Then various approaches to implement smart pressure sensors are discussed and a review of the temperature characteristics of the piezoresistive pressure sensors is presented. Previous efforts for temperature compensation are reviewed and reassessed from the viewpoint of their usefulness for a generalized, low cost interface, suitable for batch fabrication. Finally previous efforts in modeling and simulation of piezoresistive pressure sensors are reviewed in order to gain an understanding of the existing design aids. In chapter 3 the sensor is modeled and simulated to provide data for the develop- ment of temperature compensation circuitry. Sensim, the piezoresistive and capacitive sensor simulation program is described and tested for its correctness. A realistic sensor structural model is developed and used to generate the sensor response for the desired pressure and temperature range. The results of the simulations are organized and stu- died. With this background, the sensor is modeled from the viewpoint of batch fabrica- tion and simulations are run again to include the effects of processing variations. Again the results are organized and used to gain a better understanding of the influence of processing variations on the temperature characteristics of the sensor. In Chapter 4 the temperature compensation technique for the offset and sensor output is described. Sensor responses from the previous chapter are evaluated and the compensation technique is developed in two parts. In the first part the double bridge technique is proposed for temperature compensation. Sensirn and PSpice are used to test the effectiveness of the technique. The compensation effectively removes the zero pressure offset and errors caused by on-chip processing variations but the sensor output is still a function of temperature. The second part of the technique employs a tempera- ture half bridge and some digital circuin to eliminate the remaining temperature dependency. The resulting response is independent of temperature variations. In Chapter 5 the interface hardware is described. The analog portion of the circuit is simulated with PSpice 4.03 and the digital portion with VHDL. The design of the interface circuit went through numerous refinements during its course. Desirable as it may be, documenting all the changes is itself a formidable task. The objective is to discuss and document the important design decisions. First, the design objectives, phi- 1030phy, and specifications are set. Then the implementation details for the amplifier and the subtractor circuit are presented. This is followed by the description of the selection and retrofitting of the analog to digital conversion circuit. Basic analog to digital conversion techniques are reviewed from the standpoint of selecting the one best suited for the interface circuit. The dual slope technique is selected and the design for a dual slope analog to digital converter is presented. Finally, the proposed digital circuit for the implementation of the half bridge temperature compensation technique is described In Chapter 6, a summary of major results and contributions of this research is presented. Further research issues are identified and discussed. CHAPTER 2 BACKGROUND In this chapter an overview of integrated smart sensors and their associated inter- faces is presented. First, a set of definitions used in this dissertation is presented. This is followed by a brief review of integrated smart sensors. Silicon based sensors are then reviewed from the perspective of understanding how silicon can be used to fabricate integrated smart sensors. Two issues are specially addressed: the use of silicon bulk pro- perties, and micromachining techniques used to create three dimensional intricate struc- tures in silicon. Then the smart sensor interface electronics are reviewed from the viewpoint of understanding possible interface functions and approaches taken to imple- ment these functions for the fulfillment of the smart sensor concept. Then various approaches to implement smart pressure sensors are discussed. This is followed by a review of the temperature characteristics of piezoresistive pressure sensors. Previous efforts for the temperature compensation are reviewed and reassessed from the viewpoint of their usefulness for a generalized, low cost interface suitable for batch fabrication. Finally previous efforts in modeling and simulation of piezoresistive pressure sensors are reviewed in order to gain an understanding of the existing design aids for piezoresistive pressure sensors. 10 11 2.1 Definitions Numerous permutations of some basic definitions of sensors and related devices can be found in the current literature. Since the purpose of this chapter is primarily to sum- marize the background work in this area, it is appropriate at this point to put forth a stan- dard set of definitions as will be used throughout this dissertation. In the most general sense, a sensor can be anything from the most simplistic trans- ducer, like a bi-metal strip, to an intelligent device, like a digital fever thermometer. It takes one form of energy (a sensed input) and converts it to another form of energy, often an electrical signal or some other form which is useful for interpreting or processing. The terms sensor and transducer are used interchangabily. If the sensor is integrated onto sili- con or some other substrate material then, for the purpose of this dissertation, it is referred to as an integrated sensor. A smart sensor is a device which, in addition to containing a transducer, also con- tains some degree of additional circuitry such as signal conditioning and/or interface cir- cuits. If these devices all reside on the same substrate then, again for the purpose of this dissertation, they are referred to as integrated smart sensors. A hybrid smart sensor is a device in which more than one sensor and their associ- ated smart circuin are incorporated into one conglomerate functional unit. If the device resides on a single, or sometimes in a closely related package of multiple chips, it is referred to as an integrated hybrid smart sensor. 2.2 Integrated Smart Sensors Sensors are used to acquire physical information in a usable form, usually electrical. They are the input to all control and monitoring systems and, therefore, form a very important class of devices. A review of development stages, advantages, and application areas for these modern sensing devices is presented in this section. 12 2.2.1 Development Stages Historically all sensors were mechanical components, which used physical means to convey their responses. Consequently, when electronic sensors were developed they used analog signals to transmit their responses. The sensing element was still mechanical, which was specially designed to take care of all abnormalities such as nonlinearity, cross-sensitivities, compensation, etc. This resulted in complex bulky sensors. The next generation of sensors were solid-state. The sensor and analog signal conditioning circuits were implemented in. a discrete or hybrid module amplifying the sensor output and com- pensating for some secondary parameters. This output was hardwired to a remote analog-to-digital converter over a one way analog line. Currently, a new generation of sensors is evolving by integrating the interface circuitry on the sensor chip. Thus, the semiconductor sensor research and application efforts encompass not only the design of silicon-based transducers but also the on-chip incorporation of additional circuitry for signal processing and conditioning. Additionally, micromachining techniques, which involve the production of mechanical components in and on silicon, have opened new vistas in the area of silicon-based sensing of mechanical functions. 2.2.2 Salient Features Integrated sensors have the inherent advantages of small size, light weight, high performance, low cost, and high reliability. These sensors provide a better signal-to- noise ratio, improve sensitivity, and provide a digital output which is less prone to noise. The sensor design is simplified and the electronics and the processor take the burden of correcting parameters and removing cross-sensitivity effects. The on-chip electronics include amplification, calibration, and digitization of the sensor output signal. The effects to be corrected may include non-linearity, cross-sensitivity, hysteresis, stability, repeata- bility, and excitation voltage variations. Apart from this, communication and interface electronics are also necessary to make the smart sensor chip addressable and capable of 13 communicating with a central processor and, in some cases, other sensors or actuators. 2.2.3 Application Areas The integrated smart sensors have wide ranging applications in a variety of fields. Integrated sensors currently available or under development include pressure [6,7,9,12,25-43], temperature [4,26,28,44,45], chemical (ion concentration) [27,29,44,46-49], optical [4.28.50], magnetic field [4,51-56], motion and acceleration [57-63], vibration and frequency [61,64,65], force [66-71], gas composition [72-79], and humidity sensors [33,80,81]. Integrated sensors have been used in the automobile indus- try, robotics, biomedical applications, hydraulics control, the marine and aeronautical engineering, industry, and the semiconductor industry itself. 2.3 Silicon Sensors Nearly all present integrated sensors are silicon based. Silicon as a sensor material is very promising because it shows sensitivity to many physical parameters, makes batch fabrication possible, and permits the integration of sensing elements and electronic circu- itry on the same chip (providing, of course, that the processing requirements are compati- ble). Effects shown by silicon for various types of physical signals are summarized in Table 2.1 [4]. ' Fabrication technology of silicon is very mature and can be used for creating very precise patterns on the wafer. The ease of forming silicon dioxide and its effective use as a mask to define various regions enables the creation of fine three dimensional geometries in silicon. The art of doing so is called micromachining. To obtain some insight into this new technology the basics of silicon bulk properties and micromachining techniques are reviewed in this section. The use of these concepts in fabricating microsensors as well as other novel miniature devices and structures is summarized. 14 Table 2.1. Physical effects for sensors in silicon [4]. Physical Signal Effect Radiant Signals photovoltaic effect, photoelectric effect, photoconductivity, photomagneto-electric effect Mechanical Signals piezoresistivity, piezoelectric effect, piezojunction effect Thermal Signals Seebeck effect, temperature dependence of conductivity and junctions, Nemst effect Magnetic signals Hall effect, magnetoresistance, Suhl effect Chemical signals ion-sensitive field effect 2.3.1 Design Principles Silicon can be employed in three basic ways to produce a microsensing element. Firstly its bulk properties can be exploited. Secondly it can be used as substrate to deposit films of other materials. Finally micromachining can be used to fabricate intricate mechanical structures such as thin diaphragms, cavities, apertures and cantilevered beams. Sensors are being developed using all these approaches. Magnetic and optical sensors make use of the bulk properties of silicon. Chemical and humidity sensors employ chemically sensitive semiconductor devices (CS SD). These devices are special types of field-effect transistors (FETs) with an overlay of chemically sensitive or selective materials over their gate electrode. Flow and temperature sensors make use of micromachined structures. Some form of heating of the fluid at two dif- ferent points is employed for flow sensors. Finally both types sense/measure the tempera- ture. Pressure, tactile force, motion, acceleration, vibration, and frequency sensors use micromachining to fabricate diaphragms, cantilever beams or bridges on which films are 15 deposited. An alternate approach uses diffusion or ion implantation to create electronic components in these structures. The sensing element may be a variable capacitor, a sin- gle resistor, a resistor bridge, or a transistor/diode. Capacitance change, piezoresistive effect, piezoelectric effect, or piezojunction effect is used to convert motion or stress into an electrical signal. 2.3.2 Silicon Bulk Properties The silicon wafers used for smart sensors are the same as those used for integrated circuits. They are composed of single crystal silicon, extremely pure except for the trace presence of elements intentionally introduced to provide excess charge carriers. Because of the purity and single crystal structure, there are few slip planes and dislocation sites to allow for the plastic deformation common in metals. Hence, silicon based mechanical devices have less creep and hysteresis than metal or plastic based devices. Silicon is, in fact, about three times stronger than stainless steel [82]. In general silicon has very impressive mechanical properties. Silicon also has good temperature characteristics, with electronic devices constructed using a silicon basis capable of functioning up to 200°C or higher with modifications to the substrate and packaging. Bulk silicon is sensitive to five basic properties [53]. First, it demonstrates a sensi- tivity to electric fields which modify the flow of carriers. Second, magnetic fields can create a potential difference due to the redistribution of charge (Hall effect) or a deflection of charge carriers [55]. Third, radiation striking the material can generate car- riers. Fourth, strain changes the resistivity and junction potentials. Fifth, temperature variations also affect both the resistivity and junction potentials. 2.3.3 Electronic Transducer Devices Various electronic devices are being used to transduce physical parameters into electrical signals. These devices are usually standard electronic building blocks that have 16 been modified in their material and/or construction to make them sensitive to the desired phenomenon. Modifications to MOS field effect uansistors form an important area of sensor research [83]. The threshold voltage of a MOSFET is a function of the gate-to- semiconductor work function, charges in the silicon and the insulator, the insulator capa- citance, and the Fermi work function. One of the keys to using the MOSFET structure as a transducer is to modify its threshold voltage by the physical or environmental parame- ter to be measured. This can be accomplished by one of several methods. First, the gate can be constructed of a material sensitive to the parameter being measured [74,84—87]. Second, the gate can be separated from the insulator with an electrolyte [87,88]. This produces the ion sensitive FET (ISFET). In order to increase sensitivity to particular ions, a thin membrane may be placed on the insulator to produce a chemically sensitive FET (CI-IEMFET). If the environment is hostile to silicon dioxide, the insulator may be coated with other oxides. Third, the gate can be eliminated entirely, producing the open gate FET (OGFET) for detecting gases. Undercutting the gate of a MOSFET to expose the insulator yields the surface accessible FET (SAFET). Bipolar transistors are also being used to implement sensors. Because they are junc- tion devices, they find usage detecting the bulk sensitivities of silicon. One example is the sensitivity to magnetic fields. A two dimensional and a three dimensional magnetic field detector has been constructed by splitting the collector [55,56]. Diodes can also be modified to sense physical parameters. Like MOSFETs, one of the electrodes is made of a material or metal sensitive to the physical parameter. Thus, the V-I characteristics of the diode are modified in response to variations in the desired physical parameter. This provides information about the parameter being sensed. Chemi- cal and gas sensors have been implemented using this technique [87,89]. Many transducers use the piezoresistance effect to convert strain into resistance [7,8,30,58]. This effect utilizes the change in resistance of bulk silicon when l7 mechanically stressed. The piezoresistors can be created in the silicon by diffusion or ion implantation. These resistors changes anisotropically under stress due to the crystalline nature of silicon, resulting in sensitivities based on orientation as well as construction parameters. The piezoresistors can also be formed over silicon using film deposition techniques. In this case silicon dioxide is used as a dielectric isolation between the polysilicon resis— tor and the silicon substrate. This construction has the advantages of being isotropic and also makes possible on-chip laser trimming of piezoresistors [8,16,22,90]. Possible disad- vantages include the capacitive coupling of the substrate td the resistor and a lower pres- sure sensitivity. The devices which can be fabricated in and on silicon which give an electric output are summarized in Table 2.2 [91]. Most of these devices are already being used for the implementation of integrated sensors. 2.3.4 Fabrication Considerations For most of the manufacturing of the sensors discussed above, the fabrication tech- niques are the same as are usually required for standard VLSI constructions [44]. One of the difficulties that still exists in the mass production of microsensors, however, is that techniques used to optimize the transducer manufacturing tend to compromise the elec- tronics manufacturing and vice-versa. The same techniques that traditionally have been used for deposition can still be applied to sensor manufacturing. Metals can be sputtered [73,76,92] or vacuum eva- porated [75-77,93,94]. Metal oxides are deposited by sputtering [74,79], low power chemical vapor deposition [89], or by exposing the metal to an oxygen atmosphere at an elevated temperature after it has been deposited [75,79]. Spin casting, used for deposit- ing masking materials, can be used to place parameter sensitive polymer films on the chip [95,33]. Ion implantation is available to drive chemicals into existing materials [49]. 18 Table 2.2. Silicon devices that can be used for sensing [91]. Domain Silicon device Radiant Photodiode, Solar cell, Phototransistor Photoconductor, MIS diode, Strip detector Mechanical Piezoresistor, Piezojunction, Piezo-MOSFET ‘ Thermal Therrrristor, Therrnodiode, Thermotransistor Magnetic Hall plate, Magnetoresistor Magnetodiode, Magnetotransistor Chemical ISFET, Pd- gate MOSFET, Chemdiode Chemcapacitor, Chemresistor In addition, some new methods not used for traditional IC fabrication have also been developed One technique is the Langmuir-Blodgett film transfer technique used to deposit a lipid sheet, one molecule thick, on the chip [96,97]. Another very important technique developed for sensors is the micromachining of mechanical structures into sili- COII. 19 2.3.5 Mechanical Structures for Silicon Because bulk silicon has such good mechanical properties, it is well suited for pro- viding physical structures for sensors. The advantages of making micromechanical trans- ducers include small size, the ability to include on chip electronics, and a resistance to creep and hysteresis common in larger structures. Manufacturing methods, mechanical structures for silicon sensors, and recent expansion of micromachining techniques into other research areas are reviewed in this section. 2.3.5.1 Manufacturing Methods Silicon can be machined to form three dimensional shapes through the use of chem- ical and plasma etching techniques. The process of micromachining is used to create mechanical structures on a silicon wafer using anisotropic and isotropic etching of silicon [82]. Micromachining was initially developed for the fabrication of microsensors but now it is being used to create a variety of structures in silicon. In addition to micromachining, several additional manufacturing techniques for sup- porting mechanical structures are necessary. The first is the ability to accurately align masks on either side of the silicon wafer for double-sided or back etching. Alignment can be achieved with infrared optics or by placing alignment marks on both sides of the wafer at the first production step [98]. Another technique for supporting the fabrication of mechanical structures is the use of anodic glass bonding to silicon. The glass produces a supporting structure with about the same thermal expansion coefficient as silicon [82]. A pyrex plate and the silicon wafer are placed in contact, raised to 400 °C, and a high voltage is applied across them. This yields a strong, long lasting, low stress bond [46]. A new silicon/silicon bonding technique, silicon fusion bonding (SFD), has been developed for diaphragm based sensors [99]. Using this technique, single crystal silicon wafers can be reliably bonded with near-perfect interfaces without the use of 20 intermediate layers. This technique makes it possible to fabricate ultraminiature diaphragm based structures. It has also been used to fabricate high pressure sensors suit- able for pressure ranges from 1000psi to 10,000psi [99]. 2.3.5.2 Mechanical Structures In recent literature, the most popular mechanical structure has been the thin diaphragm [7,8,,15,16,19,22,24,30,34,68,100-103]. Initially, circular or annular diaphragms were used [20,24,42,104-107] but currently, the square diaphragms are pre- ferred for most applications [7,19,22,34,35]. Rectangular diaphragms have also been used in some designs [8,108,109]. The popularity of square diaphragm stems from case of fabrication and higher pressure sensitivity [98]. The principal physical parameter for a diaphragm is the pressure sensitivity, which is inversely proportional to the square of the thickness and proportional to the area of the diaphragm [25,101]. This implies that the thinner diaphragms provide higher pressure sensitivity. There are two leading methods for manufacturing diaphragms, examples of which appear in Figure 2.1. In the first method, shown in Figure 2.1(a) the silicon is back etched from the opposite side that will contain the logic circuitry. After the logic manufacturing is done, the chip is bonded to glass as described above. Diaphragms as thin as 20 um i 2 um have been produced using this method [101]. A new method, shown in Figure 2.1(b), does not require back etching and, there- fore, dispenses with the need for anodic glass bonding and mask alignment. This tech- nique uses a channel through etch-resistant masks to laterally etch a v-groove. Because the etch process is self stopping, very accurate devices can be made. A 1.4 um thick, 80 um x 80 um square diaphragm has been produced [34,68,102]. SFB can also be used to create the same type of structure. A v-groove is etched first, followed by the bonding of a thin p-type silicon wafer with n-type epi-layer on top [99]. The thickness of the epi-layer corresponds to the required thickness of the final diaphragm for the sensor. 21 Metal -:zir::€:3:é:223:3:3:::3:5::.3532355332.:3v:3r2r-::§:é:?:3:?3-::5:':=::::r;:i:§:3'3’5.3:§-§-‘:3ra-::1' Si 0 2 If: ¥ . Diffused piezoresistor Silicon m Si 02 a) Back etched diaphragm. m lllllllllllllllllllllll ~ L—— nitride I oxide seal polysilicon plate—2 ‘ ‘7 cavity etch channel Si (100) b) Laterally etched diaphragm. Figure 2.1. Diaphragm types [101,102]. 2.3.5.3 The Cutting Edge Besides diaphragms, many other structures have been micromachined. One exam- ple is a 1.5 m long channel etched in a spiral pattern on a 5 cm diameter chip. This chan- nel serves as the capillary column for a gas chromatograph [77]. Another example is the silicon ink jet nozzle for printers with an orifice of about 20 um in diameter [82]. Other structures implemented utilizing micromachining techniques include cavities, nozzles, 22 trenches, and bridges [90]. Apart from integrated smart sensors, micromachining is opening new avenues in other areas of solid-state research. For example, a new generation of vacuum microelec- tronic valves is evolving through the use of innovative micromachining techniques. These devices offer the advantages of small size, faster speed, extended operating tem- perature range, and better immunity to radiations. Miniature, vacuum diodes and triodes have been sculpted in silicon [110,111]. These micrometer sized devices employ field emission instead of thermionic emission. These are specially suited for use in electronics in the hazardous environments. It has been reported that all the processing steps are completely compatible with the existing integrated circuit fabrication techniques [110]. On—chip microcoolers have also been developed for superconducting junctions and for closely packed high-speed integrated circuits [82]. A new generation of miniature control devices is also emerging. These fleas-sized mechanical structures might well transform the control of mechanical elephants like air crafts and automobiles. Intricate structures like motors, gear-trains, turbines with a rotor blade, a pair of tongs, fixed-axle pin joints, springs, cranks, slider and spring combina- tions, and miniature valves and pumps have been fabricated through the micromachining of single and polycrystalline silicon [90,112,113]. 2.4 Smart Sensor Interface Electronics The prime advantage of integrated sensors is the proximity of their associated elec- tronics. For many smart sensors, the performance of the overall device depends more on the interface electronics rather than on the transduction element itself. Typical circuit functions for signal conditioning are signal amplification, multiplexing, analog-to-digital conversion, buffering, cross-sensitivity compensation, offset reduction, non-linearity correction, drift reduction, auto-calibration, impedance matching, output formatting, and communication with other sensors and the central processing unit. 23 This section contains a background discussion of the major considerations in the signal conditioning and practical interfacing of integrated smart sensors. First a broad overview of signal conditioning tasks and interfacing considerations is presented fol- lowed by a discussion of salient individual issues. Finally, efforts in the field of high tem- perature microelectronics are reviewed briefly. 2.4.1 Interface Considerations Signal processing and conditioning issues deal with getting the signal from the sen- sor to the decision making logic. One central issue is the type of analog-to-digital (AID) conversion used. Particularly for a smart integrated sensor, the choice of an A/D scheme can have secondary impact on design considerations such as chip area, accuracy, sensor interrogation time, and manufacturing. Another primary issue is the method used to solve the problems of cross-sensitivity and offset reduction. This includes the use of auxiliary "dummy" sensors sensitive only to the cross parameter, dedicated cross parameter sen- sors, table look-up compensation, and algorithmic techniques. Decision making logic enables the smart sensor to come to some conclusion about the condition of the measured system. This represents the highest level of sophistication attainable in a sensor. Possible decision algorithms range from simple static thresholding to artificial intelligence applied to the time and frequency statistics of the system changes. Thoughtful use of sensor-distributed decision making logic has become manda- tory in many large, real-time control systems. Also critical are communication and system issues. These deal with the bidirec- tional transfer of information between sensors and central processing units, and the integration and control of distributed processing sensors. A key in the mass usage of smart sensors will be the development of standard connection schemes, protocols, and central control and analysis algorithms. 24 Integration of some or all of these functions on the chip is determined by the specific needs of a particular sensor. For example, piezoresistive pressure sensors have a linear output but need temperature compensation. On the other hand, the case is reversed for capacitive pressure sensors which need little temperature compensation but have highly nonlinear outputs. Apart from performance, the economic considerations are also an important factor for on-chip integration. The integration of on-chip circuits for many sensors only adds a few extra masks since these sensors already utilize a rather broad spectrum of IC techniques. The circuit process need only be accommodated in the existing passive sensor process (or vice versa). For example, piezoresistive pressure sensors rely for their operation on the opera- tion of an electronic circuit anyway and incorporating additional circuitry does not greatly complicate the process. However, fabrication steps for some sensors, such as capacitive pressure sensors, make the introduction of any electronics very difficult [1]. Therefore, the question of whether circuitry should be integrated on-chip' not only becomes dependent on the performance, but also on how complicated the final process becomes and how this complication effects the yield and cost of the final device. It should also be noted that with all the signal conditioning and digital means one can never get more measurement information from a sensor or a group of sensors than originally produced by those sensors. So, it remains essential to design primary sensors with a high precision and a high signal-to-noise ratio. And, a prerequisite to signal condi- tioning is that it must not deteriorate the accuracy of the sensor, but must sufficiently preserve the measurement accuracy. The first important consideration in this regard is that the impedance levels of sensor, circuit and load are properly adapted. The second consideration is that signal operations must be determined by the least number of accu- rate components. Both of these considerations can be handled with the concept of opera- tional amplifiers [18]. 25 2.4.2 Specific Components Sensitivity: The sensitivity of a sensor is defined as the ratio of change in the output magnitude to the change in the input after a steady state has been reached. It is expressed as a ratio with the units of measurement of the quantities stated. The. ratio is constant over the range of a linear device representing the slope of the input-output characteristic. For a nonlinear device, the applicable input level must be stated. The sensitivity is one of the most important characteristics of a sensor. On-chip amplification of the sensor output is the most general solution to achieve the highest pos- sible sensitivity. But for some transducers, on-chip amplification is a necessity forced by the extremely small transducer variations in the primary variable to be measured [57]. In capacitive pressure sensors, for example, capacitance variations of a few femto-farads may need to be resolved [29]. Cross-sensitivity: Cross sensitivity is defined as the sensitivity of a sensor to param- eters other than the primary variable under measurement. Techniques employed to correct these effects include structural compensation, table look-up, computational and mathematical methods, use of sensor arrays, and the addition of compensation circuitry. Temperature is the prime culprit as a cross-sensitive parameter. Many sensor chips employ a separate temperature sensor to take care of this cross-sensitivity [27,45,52,53,61,81]. Temperature affects the transducer and measurand in a variety of ways. For example, six possible sources of temperature drift have been identified for a piezoresistive pressure sensor in [19]. Structural compensation is achieved by creating design symmetry or by matching material properties. The aim here is to cancel out the offending parameter. The simplest form of this compensation is the adoption of bridge structures [7,34]. In some cases spe- cial analog electronic circuits are included on the chip to take care of cross-sensitivities [28,114,115]. Laser trimming can also be used for adjustment of film resistors to reduce cross-sensitivity to temperature [84,116,117]. Use of a separate temperature sensor to 26 measure the temperature and then use of this information to compensate the cross- sensitivity is also employed in some cases. Computational or mathematical compensation of cross-sensitivities is one of the major advantages of smart sensors. In this approach, the offending parameter, most commonly the temperature, is measured separately and compensation is applied via a known algorithm or some mathematical model used to compute corrections [26,114,118]. The compensation approaches take the burden off the the designer to produce sensors as insensitive as possible to cross parameters. Drift: Drift is defined as a slow change in the offset or gain over time [53]. The drift may contain both systematic and random components [118]. If the majority of the drift is due to systematic components, it can be calculated as a function of time. An on- chip clock can be used to keep track of the time since the last calibration. The drift can then be estimated and subtracted from the sensor output. If the majority of the drift is random, several different approaches are possible. First, the transducer can be redesigned to minimize the drift. Second, a method can be provided for periodically presenting the sensor with a reference input with which the sen- sor could calibrate itself (autocalibration). Third, an array of identical sensors could be exposed to the same environment, with any transducer’s output value lying outside of a specified difference from the average value being discarded, and that sensor being recali- brated using the average. Calibration: Due to variations in fabrication, two transducer parameters usually need to be adjusted: the offset and the gain. The offset represents the difference between the actual output and the desired output at the minimum input value. The gain sets the output difference between the minimum and maximum input values (the span). The u’aditional method for calibration is to include laser trimmable resistors in the transducer circuit [9,16,22]. These are usually placed in series with the sensing element. This method has two drawbacks. First, the laser trimming adds an additional manufac- turing step that must be performed under the sensor operating conditions. Second, if the ———-— 27 reference voltage is not increased, the additional series resistance results in a loss of span [119]. Another approach towards calibration is to digitize the sensor output and correct the signal computationally [57,119]. Power Supply: The power supply is an integral part of all electronic circuits. Spe- cial circuits are used to regulate and stabilize the power supply outputs. Stability of power supply is especially important for microtransducers because in some cases even minute variations in supply voltage may alter the weak output signals of the transducer. Thus it is very important to have a stable power source. AID Conversion: One of the key components for expanding microtransducers into integrated smart sensors is the AID converter. In addition to the requirements normally placed on an AID converter, namely accuracy, reliability and repeatability, there are spe- cial requirements that may be imposed on a design used for integrated smart sensors. A very precise AID converter requires a large and complex amount of circuitry and may occupy more chip area than available. Thus a simple AID converter is desired which will accomplish the task and is compatible with the sensor integration process. Frequency ratio measurement, sigma-delta modulator [120], and the well known dual slope AID converter have been identified as AID converter candidates for on-chip integration with the sensor [18]. These AID converters offer good precision as well. Other types of AID converters, such as successive approximation, cascade, or flash A/D converters, require accurate element matching, sample-and-hold circuits, or a complexity that limits their accuracy when integrated together with a sensor on a single chip [18]. However, these methods generally allow higher conversion rates. The normal AID conversion technique converts the analog transducer output vol- tage or current into a digital number. Some new techniques have also been developed that directly convert the sensed parameter into a discrete value. The first of these new techniques is based on an array of similar binary transducers tuned to different parameter values. A second new technique, based on the power-up unpredictability of a flip-flop, 28 can be used with resistive transducers [116]. A third technique, based on the exponential RC time constant, can be used with capacitive transducers [45]. The circuit uses a thres- hold detector to start or stop a counter. This method, however, exhibits strong tempera- ture dependencies that are difficult to compensate for. Communications: A sensor should not be considered as an isolated, independent element. In most cases it forms part of an organization within which it interacts with other sensors, computational elements, and actuators. Robots, automobiles, industrial process control, and biomedical applications are common examples of such environ- ments [26,66,121]. It is inherent in the smart sensor concept that the sensor be address- able and capable of communicating with a central processor and other sensors [26,45,57,121]. If the sensor is addressable, the capability of remote testing and/or cali- bration by the processor also becomes possible [114]. Presently there are no communication standards for sensors but on the basis of economy, reliability, and convenience, adherence to serial communication over a bus using ASCII characters has most often been suggested [52.53.114.121]. 2.4.3 High Temperature Microelectronics In many cases, sensing requirements call for ambient temperatures which are higher than what the electronics can tolerate. Thus new circuit approaches and materials are being investigated which can operate reliably at elevated temperatures. Circuit approaches to raise the operating temperature of silicon CMOS circuitry to 300°C have been presented in [122,123]. Silicon on insulator (SOI), wider bandgap materials (gallium arsenide, silicon car- bide, and diamond, etc.), and miniature vacuum devices using field or thermionic emis- sion, are some of the alternatives for high temperature electronics. Development of these approaches ranges from unproven principles, to working but expensive large scale integration models. Cost and ease of processing are the major determining factors for 29 adoption of a technique. Thus, for high temperature smart sensors, SOI, epi-CMOS, and conventional bulk CMOS are the preferred technologies. The choice among these is based upon cost trade-offs between the various strategies (technology, layout rules, and circuits) which could be used to achieve the required temperature and reliability level. The cost versus operating temperature trade-off for the three technologies is shown in Figure 2.2 [122]. 5 ___________________________________ I" " “I i s o I I 4_ :. ____________________________________ J Relative T Cost 2 _ ................................................................. epi—CMOS 1 _ ................ B. ulkClVIOHS ................................. 0 r T l I I O 50 100 150 200 250 300 Temperature (°C) Figure 2.2. Smart sensor technology temperature range and cost [122]. 2.5 Silicon Pressure Sensors Pressure sensors are transducers that convert a measure of pressure into an electrical signal. Pressure sensors at present are one of the most highly developed types of sensors and account for a major portion of commercial market. The pressure sensors are available in two forms that permit measurements of abso- lute, differential, and gauge pressure. Absolute pressure, such as barometric pressure, is measured with respect to a built-in vacuum reference. A pressure differential, such as the 30 pressure drop across a damper or filter in an air duct, is measured by applying pressure to opposite sides of the sensor simultaneously. Gauge pressure, as in blood pressure meas- urement, is a special case of differential pressure, where atmospheric pressure is used as a reference. The sensing element for integrated pressure sensors is usually one of two types: varying capacitance or piezoresistive. Both techniques employ micromachining to fabri- cate a thin diaphragm to implement the silicon pressure sensor. Typical structures for the two types are shown in Figure 2.3. The thickness of the diaphragm, its surface area, and the geometrical arrangement of the resistor on the diaphragm, determine the pressure range. Although at the wafer level silicon is brittle, at chip level it has a strength on the order of stainless steel. This fact, combined with their extreme low mass, enables silicon sensors to measure pressures in excess of 10,000psi [28]. Presently the piezoresistive sensors are more commonly used. These are easier to manufacture and, as a result, cost less. Since they also have a more linear response than the capacitive type, the output requires less signal conditioning. On the other hand, the capacitive sensor is an order of magnitude more stable, has higher sensitivity, and is less vulnerable to temperature changes. Many piezoresistive and capacitive pressure sensors are presently in use. Variations of these two approaches and some other techniques have also been developed. A brief review of available types of pressure sensing techniques is presented in this section. 2.5.1 Capacitive Pressure Sensors The capacitive pressure sensor has a flexible diaphragm that acts as one plate of a variable air-gap capacitor [29,31]. Pressure on the diaphragm causes a proportional change in capacitance value, which can be converted to a voltage or frequency output. 31 Pad Si QZ Piezoresistor ./ / Diffused (a) Piezoresistive Metalized Plate On-chip Circuits Seal Reference Plate \ J LBJ— Silicon Diaphragm | External Pressure (b) Capacitive [124] Figure 2.3. Typical silicon pressure sensing structures. The capacitive pressure sensor’s stability gives it the edge for use in harsh environ- ments, such as an automobile engine. Some capacitive pressure sensors work by detect- ing minute capacitance changes, and the signal conditioning electronics must be at least as stable as the sensing element. For example, capacitive pressure sensors build for such biomedical applications as measuring blood and spinal-fluid pressure must show capaci- tance changes on the order of 2 to 3 pF only [29]. Thus, on-chip signal amplification and 32 conditioning is the only choice. In this technique a pressure sensitive capacitor is charged against a reference capacitor through an on—chip switching bridge circuit composed of CMOS transmission gates. A sensor of this type has been developed which measures 90x150 mils with a diaphragm thickness of about 27 um. Experimental results have indi- cated a typical sensitivity of 56 uV/mmHg-V in the range from 0 to 300 mmHg. This sensitivity is approximately five times the typical value of a piezoresistive sensor of simi- lar size. Another capacitive sensor developed by the Center for Industrial Research, Norway, provides a frequency modulated output with a reported sensitivity of 1000 ppm/m Bar [31]. The sensor uses two separate chips, one for the pressure sensor diaphragm and another for the detection circuitry. A third silicon chip is used for support. The three chips along with a tiny glass tube are sealed together to form the complete integrated hybrid smart sensor. The sensor performance is adversely effected by the stray capaci- tances and is being modified to reduce the stray capacitance and improve other sensor characteristics. 2.5.2 Piezoresistive Pressure Sensors In a piezoresistive pressure sensor, the diaphragm is etched from the silicon as the basic sensing element. Thick or thin film metal or polysilicon stress sensing resistors are then deposited on the diaphragm in a wheatstone-bridge configuration. Stress on the diaphragm causes a current imbalance in the bridge, indicative of pressure. Laser trim- ming is sometimes used to adjust film resistors to achieve linearity and temperature com- pensation. The wheatstone-bridge resistors can also be diffused into the silicon diaphragm or they can be ion-implanted for more immunity from stress-induced instabilities. An alter- native to the wheatstone-bridge configuration is to form a single piezoresistive element in or on the silicon diaphragm. Applying pressure to the diaphragm results in a resistance 33 change, causing a change in output voltage in direct proportion to the applied pressure. NEC Corporation, Japan, has developed an intelligent CMOS pressure sensor, which employs a four arm piezoresistive bridge circuit, an amplifier and a bridge excita- tion circuit to suppress supply voltage and temperature variations on the same chip [7]. The piezoresistors are fabricated using boron ion implantation. The sensor provides a voltage output with less than 10.50% sensitivity and offset voltage temperature shifts for 0—70°C range. The sensor response is linear over the entire temperature and pressure range. The pressure-voltage characteristic for the sensor is shown in Figure 2.4. Use of polysilicon film resistors increases the operating temperature range of the sensor and also permits the on-chip adjustment of resistor values by laser trimming. Toy- ota Research Labs., Japan, have used polysilicon film piezoresistors over a silicon nitride diaphragm to implement their pressure sensor with a sealed cavity to measure absolute pressure [34]. The output sensitivity obtained is more than 100 uV/V with respect to a pressure of 100 KPa. The temperature coefficient of the sensitivity is approximately -O.13%I°C at the temperature range between -50°C and 150°C. Polysilicon resistors over a rectangular diaphragm have also been used by Fraunhofer-Institute, W. Germany, to implement the pressure sensor for an extended temperature range of -60°C to 200°C [8]. 34 2.1 1.4 -- Output Voltage (V) 0.7 - I I I 0 0.5 1 1.5 2 Pressure (kg/cmz) Figure 2.4. Pressure-voltage characteristic for the sensor described in [7]. Unlike conventional pressure sensors which use a wheatstone bridge configuration, the Motorola MPX series uses a single four terminal shear stress sensitive piezoresistive strain gauge [9,28]. A transverse voltage strain gauge is placed at the midpoint of the edge of a square diaphragm at an angle of 45° with the edge in order to maximize sensi- tivity to shear stress and minimize non-linearity effects. A detailed study of the theory of piezoresistivity in semiconductors has lead to this specific design. The Motorola MPX- 100D silicon pressure sensor uses this technique. It is an uncompensated, uncalibrated differential pressure sensor, which covers the pressure range from 0 to 100 KPa. 35 2.5.3 Other Types A resonant diaphragm pressure sensor has been developed at Twente University, Netherlands [30]. The excitation of the diaphragm is accomplished by means of a dif- fused resistor acting as a thermal exciter. A pressure over the diaphragm changes the resonant frequency by 0.5 Hz/Pa. The diaphragm resonance is detected by a piezoresis- tive wheatstone-bridge. Another approach has been adopted in [32] to implement the pressure sensor using a ring oscillator. The change of carrier mobility in silicon under mechanical stress has been utilized to vary the drain current of the transistor. Two ring oscillators are used to provide a differential frequency output, which greatly reduces the effect of temperature. Use of I 2L oscillators to detect pressure has been reported in [36]. The sensor uses two oscillators which are located on the silicon diaphragm such that with the application of pressure the frequency of one oscillator increases while the other’s frequency decreases. The differential frequency output has been used to remove first order tempera- ture effects. 2.6 Temperature Compensation of Piezoresistive Pressure Sensors As stated before the major problem with silicon is its strong cross-sensitivity to tem- perature. Many sensor chips employ a separate temperature sensor to take care of this offending parameter [27,45,52,53,81]. Temperature affects the transducer and measurand in a variety of ways. For example, six possible sources of temperature drift have been identified for a piezoresistive pressure sensor [19]: 1) temperature dependence of the piezoresistive coefficient, 2) resistor tracking errors, 3) gas expansion in the reference cavity (if present), 4) junction leakage currents, 5) thermally-induced stress at silicon- silicon dioxide interface, and 6) packaging effects. The temperature characteristics of the piezoresistive pressure sensors are described first in this section. Then the previous efforts for temperature compensation are presented 36 and evaluated for their usefulness for a generalized, low cost interface circuit. 2.6.1 Temperature Characteristics The influence of temperature changes on a sensor is exhibited by a change of zero pressure offset and span. A typical piezoresistive pressure transducer was shown in Fig- ure 2.3(b). Arrangement of resistors in a full bridge cancels the temperature coefficients of the individual resistors to the degree the resistors track each other. This is called struc- tural compensation. For a full bridge of nominally identical diffused resistors, the bridge output voltage [19] is given by V0 1 _.A_R_ __A_’i _ _ -——[1 II. t W where V0 = output voltage, Vcc = bridge supply voltage, R = nominal value of resistors, AR = fractional change in R due to applied stress, 0. = pressure induced stress (perpendicular to resistor), o. I = pressure induced stress (parallel to resistor), or = differential stress arising from thermal or non-pressure sources, rt = piezoresistive coefficient, [3 = sum of any additional nonstress related offsets. (2.1) 37 2.6.1.1 Temperature Coefficient of Pressure Sensitivity Pressure sensitivity of the sensor is given by [19] _ 1 3V0._ _a_[c -0 )+6] S—Vcc aP —1taP (l n r. (2.2) Temperature coefficient of the pressure sensitivity (TCS) is defined as the deviation of the pressure sensitivity with temperature. Mathematically it is given by [19] The pressure sensitivity and its temperature coefficient are primarily determined by the behavior of piezoresistive coefficient for a given structure. It has been shown in [125] that piezoresistive coefficient decreases with increasing surface concentration of diffused layers and it is independent of diffused layer thickness. Iris also influenced by the resis- tor tracking errors. It has been reported in [19] that for an absolute deviation of 2 percent in the resistors from their nominal values, the value of 1: will shift by about 1.2 percent and its temperature coefficient will change by about 25 ppm/°C. The effect of a 10 per- cent mismatch of bridge resistors on the output voltage as a function of temperature is shown in Figure 2.5. 2.6.1.2 Temperature Coefficient of Offset The offset error is defined by the maximum deviation of the offset voltage from its specified value. Temperature sensitivity of the offset (T 80) is given by 8V 3 TSO=——1- 0 an(Ol-Cll)+g—;Cf+flfl+gg VCC in = 5? ar 37" (2'4) T80 is affected by all the six sources mentioned above. Expansion of gas with tem- perature in the sealed cavity makes a significant contribution to TSO, but the bridge offset voltage is most strongly influenced by the resistor mismatch. Moreover errors 38 produced by resistor mismatch are random for individual units. Zero pressure offset for a piezoresistive sensor with 10% tracking errors is shown in Figure 2.6. The contribution of junction leakage currents, oxide stress and packaging effects to the T80 are relatively small. 2.6.2 Temperature Compensation Techniques The most common problem associated with piezoresistive pressure sensors is their sensitivity to temperature. It has been suggested in [114] that if the temperature coefficient (TC) of the sensor is linear and reproducible, design of the interface circuitry for an equal and opposite TC may be a practical solution. However, if either the trans- ducer or the circuit TC is nonlinear with temperature it may be more practical to bring temperature out as a separate parameter and compensate via a microcomputer algorithm or look-up table. If either is unpredictable, the only solution may be the laser trimming on a unit-by-unit basis, which is both slow and expensive. In this section previous work in the field of temperature compensation of piezoresis- tive pressure sensors is reviewed. Laser trimming, matching temperature coefficients, and mathematical compensation techniques are presented and evaluated from the viewpoint of on-chip integration, cost, compatibility with IC technology, and temperature range covered. 2.6.2.1 Laser Trimming As mentioned in previous section the major contribution in TCS and T80 comes from resistor mismatch. The most common temperature compensation methods employed presently is laser trimming of film resistors for individual devices [5,8,9,1l,13,l6,19,20-23,28]. In some cases external temperature-stable resistors are also used to achieve this [10,13,21,115]. 39 0.8 Vout (V) 0 I I I I fl I I I -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 2.5. Temperature response of the sensor with 10% tracking errors. 0.4 10% Tracking Errors ............ No Tracking Errors 0.2 — Offset Voltage 0 (V) -0.2 - '04 I I I I I I I I -40 -20 0 20 40 60 80 100 120 Temperature (°C) , Figure 2.6. Zero pressure offset of the sensor with 10% tracking errors. 40 A separate signal conditioning IC using three types of resistors has been designed in [11]. It uses diffused as well as two types of thin film metal resistors and the compensa- tion is achieved through laser trimming. The IC is analog and uses bipolar technology. In another effort eight polysilicon resistors have been used for temperature compensation of pressure sensitivity and offset [16]. Sensor bridge resistors are implanted while the com- pensation resistors are deposited using thin-film techniques to allow laser trimming. Seven of these have a roughly zero temperature coefficient of resistivity (TCR) while the eighth one has a large negative TCR. The offset voltage and the TCO must be measured for each unit to select the two resistors from a group of four, to determine the resistors to be laser trimmed for the offset compensation. A typical calibration/compensation circuit for disposable blood pressure sensor using laser trimming is shown in Figure 2.7. The calibration/trimming process is not as straight forward as it sounds, because there is significant interaction between different components. For example, trimming the offset by changing the value of R4 will also change the pressure sensitivity. It will also affect, to a certain degree, the temperature coefficient of offset, symmetry of output voltage in reference to excitation voltage, the output impedance, and the input impedance. Not only is the laser trimming expensive and time consuming, but it also adds an additional manufacturing step which must be performed under the sensor operating conditions. Another drawback of laser trimrnin g comes from the fact that the compensation circuit design must use the film resistors. Moreover, laser trimming resistors are added in series with the sensing element, thus the sensitivity of the transducer goes down. To achieve the same sensitivity it is necessary to increase the power supply voltage. 2.6.2.2 Matching Temperature Coefficients The temperature coefficient of piezoresistivity is negative. Therefore, in some designs this is matched with the positive temperature coefficient of a single or a 41 combination of resistors. Different variations of this basic principle are applied. The major drawback of this technique lies in the fact that the accuracy of compensation is determined by the precision of the control of the impurity concentration for compensa- tion resistors. 0+ R6 Ou ut R2 tP + 0 IF 4W» R 8 R7 Excitation O _ R1 Figure 2.7. Typical calibration/compensation circuit [5]. A temperature-sensitive integrated feedback resistor R0 (T) has been used for tem- perature compensation in [7,10]. Both circuits make use of NMOS technology and pri- marily reduce TCS over a temperature range of 0-70°C. RG(T) is used in the amplifier feedback loop in [10] whereas in [7] it varies the bridge excitation voltage. Both circuits use an external resistor and bias voltage to set the gain and offset of the sensor. The per- formance of these circuits is dependent on the Ra’s resistance temperature coefficient which in turn is dependent on its impurity concentration. A similar technique using two 42 resistors and an operational amplifier has been reported in [108]. The ion-implanted resistors used for the feedback circuit of the operational amplifier have different impurity concentrations to give them an opposite temperature coefficient. Temperature compensation circuits for biomedical applications to be used in a catheter have been presented in [23,24]. These designs were aimed at a small size, low power consumption, long term stability, and a temperature range of 25-45°C. A separate interface circuit, employing a double bridge active compensation technique, has been developed in [23]. The pressure transducer bridge is used as one leg of a second bridge which is used to derive a temperature dependent signal. This signal along with the pres- sure dependent output is used for temperature compensation. Bipolar technology has been used for interface circuitry in [24]. Positive TCR of diffused resistors is used to compensate the negative TCS of transducer bridge. The interface circuit provides a high-frequency FM analog signal output on two leads. This technique allows mounting of several sensors on two leads, running through the catheter. 2.6.2.3 Mathematical Compensation This technique uses a mixture of computation and table look-up. The microproces- sor power is utilized to mathematically model the sensor and the table look-up is used to obtain the calibration coefficients stored in an on-chip PROM. The corrected response is computed based on the measured information and calibration coefficients. This technique is complex in terms of hardware and software and requires memory to store the calibra- tion coefficients, which may have to determined for individual units under sensor operat- ing conditions. The two chip package, with signal conditioning on a separate chip, uses mathemati- cal modeling to digitally trim the gain, offset, and other sensor parameters [14]. No implementation details for the technique are given. Two mathematical compensation techniques for the multichannel Electronically Scanned Pressure module have also been 43 reported [15]. In the first technique, three or more known reference pressures are applied to the pressure sensor and the electronic outputs are recorded. Curve fitting this data to a second order polynomial equation generates three coefficients for offset, pressure sensi- tivity, and non-linearity. These coefficients are used later to calculate the applied pres- sure. The method is stated to be very accurate but extremely expensive and difficult to implement in terms of hardware and software. The second technique, improving these shortcomings is presented in the same paper. The new technique makes use of an 8-bit microprocessor with on-chip serial communication and memory management. The inter- face also includes 16K RAM, 136K EPROM, an AID converter, and a real time clock. The interface measures the output of pressure sensor, its excitation voltage, and the tem- perature signal from the internal temperature thermometer. The stored calibration coefficients are used to mathematically compute the corrected pressure. This interface chip can be used with other sensors having analog outputs. The complete system consists of two printed circuit boards housed in a 10.16cm long enclosure. Thus, the size and complexity of the interface make it unsuitable for integration with the sensor. A generalized interface design for the bus-organized sensors has been reported in [126]. A host computer, acting as the system controller, interfaces with up to 256 nodes over a bus. The standards for the bus have also been proposed. The interface circuit per- forms the functions of multiplexing, amplification, and digitization under the control of an on-chip microprocessor. Actual compensation is carried out by the host system, where much greater processing power is assumed. The compensation is based on the stored compensation coefficients and statistical computations. The interface circuit and the sen- sor array are located on two separate chips. An off-chip commercial PROM, encoded at sensor test time, is used to hold the information about the features of the sensor. 44 2.7 Modeling and Simulation of Piezoresistive Pressure Sensors The implementation of silicon IC technology and elaborate micromachining tech- niques for preparation of thin silicon diaphragms have made the pressure sensor fabrica- tion a relatively high-yield batch process. Until recently most design work has been intuitive and no detailed design aids exist with which to optimize the design of advanced structures. In recent years some effort has gone into the modeling and simulation of piezoresistive pressure sensors [10,17,125,127-129]. Progress in this area would lead to computer aided-design (CAD) of pressure sensors. The modeling and simulation also provides an accurate means of characterizing sensor performance which can lead to the optimized design of sensors. It also provides a means to study the effect of various cross parameters and design compensation and interface circuitry without having in depth knowledge of physics and mechanics of the sensor structure. SENSIM, a simulation program for piezoresistive and capacitive pressure sensors has been developed at the University of Michigan [17,125]. It provides the output response as a function of pressure and temperature for both types of sensors. Both analyt- ical and finite difference solution methods are available, depending on the sensor struc- ture. Diaphragm thickness taper, oxide and package stress, and rim effects are simulated The user-specified outputs available are diaphragm deflection, stress distribution over the diaphragm, average stress over piezoresistors, node voltages, changes in resistance due to stress, capacitance changes with pressure and thermally induced bending moments and/or stress. The simulation program consists of about 7000 Fortran statements. Excellent agreement between simulation results and experimental data has been reported A similar simulation program called Silicon Pressure Sensors Simulation Program (SIPSES) has been reported in [128]. It has been developed on the same lines and uses the 'experimental data from [125] for its verification. It places somewhat more emphasis on the simulation of sensors with a single four-terminal piezoresistor. 45 The Pressure/Transducer Simulator (PRESENTS) has been developed and used for the simulation and analysis of MOS integrated silicon pressure sensor developed at NBC Japan [10]. The simulation program is based on the finite-element method. Analog and digital modeling techniques for piezoresistive pressure sensors have been described in [119]. The application areas for these models include calculation of temperature compensation components based on sensor test results and direct pressure calculation based on a stored numerical sensor model and measured sensor outputs. The four model elements are derived from the results of measurements performed with a con- stant current source for sensor excitation. The procedure is repeated for each test tem- perature and for each test current as well as for each additional pressure needed to model pressure nonlinearity. For digital modeling, single segment and polynomial based numer- ical models are used to model and store the constants for the sensor on a one-time basis. Later the corrected pressure can be calculated based on the stored model constants, the output voltage, and the bridge voltage. The finite element analysis packages may also be used to model the sensor struc- tures. GRAFEMIIFAD package of the Applicon BRAVO! CAD system has been used to model silicon based aerospace pressure sensors [129]. The square diaphragm and the complete sensor package were modeled separately. The diaphragm model provided the stress distribution profile. A post processor may be used to achieve a clear view of the deformation pattern and stress contours of the structure. For the package model, the sili- con structure is supported by a glass base and housed in a steel case. The finite element model provides insight into the effects of packaging on the performance of the sensor. The data was used to design a rugged and compact package with negligible effects on the performance of the silicon diaphragm. The same finite element package was also used to simulate a circular diaphragm and a beam [127]. The stress values computed from the analysis were converted to strain and the voltage response for the wheatstone bridge configuration was calculated. The data compared well with the measured results from 46 thirteen prototype sensors. 2.8 Summary Recent advances in silicon sensor technology have been reviewed. Issues concern- ing fabrication and interface electronics for integrated smart sensors have been discussed Various pressure sensing techniques and some of their recent implementations were described Temperature characteristics of piezoresistive pressure sensors were discussed and various temperature compensation techniques were surveyed. The pressure sensi- tivity as well as the zero pressure offset for piezoresistive pressure sensors are functions of temperature. Moreover, the temperature characteristics for individual units differ slightly because of processing variations. Laser trimming, matching temperature coefficients, and table look-up or mathematical compensation are the prevalent tempera- ture compensation techniques. These approaches are expensive, time consuming, com- plex and based on the compensation of the individual units. In some cases processes used are complicated and/or not directly compatible with standard IC technology. There is a need for temperature compensation technique which is cost effective, covers a wide tem- perature range and readily lends itself to compatible batch fabrication. CHAPTER 3 SENSOR MODELING 3.1 Introduction In this chapter the simulation results for the piezoresistive pressure sensors are presented for a temperature range of -40°C to 130°C over a pressure range of 0 to 45 psi. The sensor is modeled from the viewpoint of batch fabrication. First, the modeling and simulation objectives are outlined followed by the description of the approach adopted to fulfill these objectives. Then the simulation program is described from the viewpoint of functionality, accuracy, and the computational errors. Next the structural, processing, and control parameters are discussed and specified for the sensor model. The remainder of the chapter describes the simulation results for the sensor. First, the simulation results for the ideal sensor with no tracking errors are presented. Then the sensor model is enhanced to include the batch fabrication effects. Simulation results are presented and discussed in the last section. 32 Objectives The ultimate aim for the modeling and simulation is to study the sensor I/O charac- teristics as functions of pressure, temperature, and tracking errors. The simulation objec- tives and modeling decisions are primarily governed by this aim. With this understand- ing, the important issues are discussed and the objectives for the modeling and simulation are set in this section. 47 48 The simulation results are studied to develop a new temperature compensation tech- nique. The simulation data will be used as an input source to exercise the interface circuit models. The interface circuit and the sensor are intended to be integrated on the same chip and batch fabricated. The aim here will be to produce a realistic and generalized sensor model. So that the simulation results can be utilized to produce an effective inter- face circuit and the same results are also extendible to the similar structures and other sensors using piezoresistive effect for their operation. The characteristics of piezoresistive pressure sensors are determined by their struc— ture. Moreover, the stress distribution over the diaphragm is not uniform. Therefore, the sensor response is dependent on the shape, size, value, and location of the piezoresistors. To account for this, the sensor model should include all the structural, processing, and electrical details for the sensor. A major problem associated with piezoresistive pressure sensors is their inherent cross-sensitivity to the temperature. Temperature affects the transducer and measurand in a variety of ways. The influence of temperature on a piezoresistive pressure sensor is exhibited by a change in the span and offset of the sensor output. Moreover, minor pro- cess variations give rise to piezoresistive tracking errors, which in turn change the tem- perature characteristics for individual units. These variations are more realistically modeled from the viewpoint of the batch fabrication. This requires modeling of the same wafer as well as the wafer-to-wafer processing variations. To summarize, the simulations should generate data for the sensor response as a function of pressure and temperature for the same wafer as well as the wafer-to-wafer processing variations. The data will be used to evaluate the effect of these factors on the sensor output, pressure sensitivity, and zero pressure offset. 49 3.3 Approach The accuracy of the simulation data produced is primarily determined by two fac- tors, the quality of the model and the capabilities of the simulation program. The basic sensing element to be modeled is the piezoresistor diffused in a thin diaphragm. Piezoresistive effect is not new and many researchers have studied its characteristics since its discovery in 1954 [130-132]. Similarly the fabrication and characteristics of the diffused resistors are also well documented [133-136]. Therefore, a careful study of the books and the literature was carried out to deduce the electrical and structural parameters for the sensor model. These parameters were used to produce a very accurate model for the sensor structure, piezoresistors, and the processing variations. The second factor determining the accuracy of the simulation results is the simula- tion program. SENSIM, a simulation program for capacitive and piezoresistive pressure sensors, is useful for modeling and simulating both types of sensing elements under vari- ation of physical and electrical parameters. The program has been verified through com- parison with data from the actual sensing structures [17]. Minor changes were made to upgrade the program to Fortran 77, compatible with the computing environment used for this research. After these changes the program was verified again to ensure correct opera tion. The procedure is documented in the next section. 3.4 The Simulator SEN SIM, a simulation program developed at the University of Michigan was used to obtain the sensor response [17]. First, a brief overview of the functionality of the pro- gram is presented from the viewpoint of simulating piezoresistive pressure sensors. Then the approach adopted for the program verification and the errors associated with the pro- gram are described Finally the changes made and the revalidation of the program is presented. 50 3.4.1 Overview of the Program SENSIM is a simulation program for silicon pressure sensors with a thin square diaphragm. It provides the output response as a function of pressure and temperature for piezoresistive and capacitive pressure sensors. The user can specify structural, process- ing, electrical, and control parameters for the sensor and the simulation program. Both analytical and finite difference solution methods are available, depending on the sensor Structure. Diaphragm thickness taper, oxide and package stress, and rim effects are simu- lated Available outputs are diaphragm deflection, stress distribution over the diaphragm, average stress over piezoresistors, node voltages, changes in resistance due to stress, and capacitance changes with pressure. The geometry, dimensions, processing parameters, and the arrangement of piezoresistors are specified by the user. The piezoresistors are specified in terms of their locations on the diaphragm, processing parameters, electrical circuit node numbers, and resistance values. The piezoresistor location (center of resistor) on the diaphragm is specified using the standard two dimensional X-Y coordinate system with the origin placed at the center of the diaphragm. The diaphragm deflection for the piezoresistive and the capacitive sensors is found by solving the governing differential equations. For the piezoresistive sensors, the deflection is used to determine the stress profile over the diaphragm. The stress distribution is used to calculate the average stress over the piezoresistors. The sensor structure is defined through the specification of geometrical dimensions and the material parameters for the diaphragm and the structural layers. The calculated stress and the piezoresistive coefficients are used to determine the fractional change in the piezoresistor values. Finally nodal analysis is used to compute the electri- cal response of the sensor. 51 3.4.2 Program Verification The validity of SENSIM has been assessed by comparing experimental data from actual device structures with the simulation results. The experimental measurements involved diaphragm deflection and the associated output from capacitive and piezoresis- tive pressure sensors [17]. Figure 3.1 shows the measured diaphragm center deflection and compares it with the simulated response. The dotted curve is for the ideal straight diaphragm edges and the solid curve for the sloped edges. Complete details of experi- mental set up can be found in [17]. Accuracy of deflection is very important because it forms the basis for the determination of the stress distribution over the diaphragm, which in turn is used to compute the sensor response. The major numerical errors in SENSIM are associated with the grid size used for the finite-difference method. Other numerical errors (round-off or truncation errors) are relatively small, and experiments have shown that overall computational accuracy is good up to five significant digits using double pre- cision representation (64 bits). This overall accuracy is satisfactory except for the errors introduced by the finite grid size. A detailed analysis was carried out for these errors and it was concluded that the errors associated with the finite-difference method are very small, and the simulated diaphragm deflection is accurate enough to be used in the design and analysis of silicon pressure sensors [17]. 3.4.3 Revalidation SENSIM consists of 90 subroutines and functions. Moreover, these routines are nested in a complex fashion. More than 200 global variables and arrays are defined for passing parameters. It is very difficult to make any analytical changes in the program. However, some syntax changes were necessary to upgrade the program so as to be com- patible with the local computing environment. Few other errors were also observed and corrected. In order to ensure that no change was made in the functioning of the program the sample simulation program given in the user guide and the structures used in the 52 original verification process [17] were simulated. A perfect match was observed for all simulation results. 10 Experiment e ' Sloped edge 8 7 Built-in edge ............ Maximum 6 T Deflection (micron) 4 _ .33.”. 2 _ 0 I I I I O 150 300 450 600 750 Applied Pressure (mmHg) Figure 3.1. The measured and simulated diaphragm center deflection [17]. An effort was also made to simulate some sensor structures using data from the research literature. Unfortunately, almost all of the published data does not provide enough information about the physical structure of the sensors. SENSIM needs physical details for the diaphragm (dimensions, shape, bulk thickness, edges, layers, etc.) and piezoresistors (location, dimensions, impurity concentrations, junction depth, etc.). Two structures however, were found suitable and simulated. Firstly the 27pm thick, 1mm x 1mm square diaphragm structure reported in [35] was simulated and the normal stress distribution 0,, and oy reported in the paper was obtained. The resultant stress 53 distribution for 14.5psi (1kg/cm2) is shown in Figure 3.2. The simulation and reported experimental results compare favorably. Secondly the physical details of another sensor were extracted form two papers written by the same authors [7,35]. Simulation showed similar results but an exact comparison was not possible since the results presented in the papers were for the complete device which included the signal conditioning circuits. Ox ......... o , 4 J ............. y Y = 0 ‘ X = 0.5 ....... Normal 2 _ Stress (X108 dancmz) o- I I I 0 100 200 300 400 500 XIY Distance (micron) Figure 3.2. Stress distribution Over the diaphragm. 3.5 The Sensor Model After confirming the correct functionality of SENSIM, the first major task was to develop a suitable sensor structure for the study of the temperature and pressure charac- teristics of the piezoresistive pressure sensors. Some structural constraints are placed (shape, orientation, silicon, etc.) by the simulation program while others were chosen to obtain a model as close as possible to reality. The structure used for the evaluation of the simulation program provides a good practical example. This was used as the starting structure and some parameters were kept same while others were modified to suit the 54 goals of this research. The sensor is composed of three layers: the thin silicon diaphragm, 1mm thick layer of silicon dioxide grown over the diaphragm at 850°C, and the package (Corning glass support plate) sealed at 450°C with a hole for the applied pressure. The piezoresistors are diffused in a wheatstone bridge configuration in the thin silicon diaphragm. The sensor structure is shown in Figure 3.3. This structure is the same as is used for the original verification of the simulation program [17]. It also takes care of packaging effects. SiO2 Piezoresistor Silicon Diaphragm W \\\\\\\\\\\\\\\\\\\N<— Package Pressure Hole Figure 3.3. The sensor structure. Diaphragm thickness determines pressure sensitivity since the stresses caused by applied pressure are inversely proportional to the square of diaphragm thickness. The effect of process induced thickness variation can be made smaller by increasing the nom- inal thickness but at a cost of pressure sensitivity. Therefore a trade-off based on the per- formance of available and expected processing technology emerged. The size of diaphragm also effects the pressure sensitivity. The larger diaphragm is more sensitive 55 and the stress increases from the center to the diaphragm edge. Therefore a piezoresistor placed close to the edge is more sensitive but its sensitivity is more vulnerable to process variations in diaphragm size, alignment and piezoresistor location. Based on the con- siderations discussed above, the diaphragm is assumed to be square with side length of 1000um and a uniform thickness of 10m. All piezoresistors are placed 20pm from the diaphragm edge. There also is a trade-off between pressure sensitivity and reproducibility for the piezoresistors. Specifically, an increase in resistor size improves device reproducibility but decreases the sensitivity because of the stress averaging effect. A smaller size (width) also implies increased tracking errors. A decrease in resistor width from 15m to 5pm results in an increase of design tolerance from i20% to 140% [133]. The piezoresistor width for our model has been set to 10am to strike a balance. The sheet resistance is chosen to be 2009/square with a junction depth of 2.7um. It is a good compromise for producing resistors since the sheet resistance is convenient and the tolerances and tem- perature coefficients are acceptable [133,135]. Typical measured sheet resistance values plotted in [133] show that the temperature coefficient for a 2009/square value is fairly linear over the desired temperature range. Moreover, these are typical values for the base diffusion [133,135,136] and may save a diffusion step if BJTs are included elsewhere in the circuit. The piezoresistor values obtained for our dimensions are 2K9. Piezoresistor values in the range of 500 to 500052 have been reported by the manufacturers and in the literature [10,13,35,133]. The temperature coefficient of the piezoresistors is another important model param- eter. One of the most critical factors affecting the value of the temperature coefficient is the impurity surface concentration of the resistor surface. Therefore, the temperature coefficient of diffused resistors is determined to a great extent by the sheet resistance. The temperature coefficient is positive for the diffused resistors and it increases with the sheet resistance. The temperature coefficient of resistivity for the piezoresistor model was 56 set to l900ppm/°C. The same value of temperature coefficient has been reported in [135] for 2000/square sheet resistance. The pressure sensitivity for a given structure is primarily determined by the value of the piezoresistive coefficients. The piezoresistive coefficients in silicon have been inves- tigated and documented by many researchers since the discovery of piezoresistive effect in 1954 [130,132]. For the diffused layers the coefficient values increase with a decrease in the surface concentration. The coefficient value is independent of the junction depth of the piezoresistor. The temperature coefficient of piezoresistivity (TCPI) is negative. For the simulation purposes, TCPI can be specified directly or the program can compute it from either the substrate doping, junction depth, and sheet resistance, or from the surface concentration and the junction depth. If the surface doping is not specified, the needed concentration is found from Irvin’s model for diffused layers (Gaussian impurity d0ping profile) [17]. For the sensor model the substrate doping concentration of 101°Icm3, sheet resistance of 2009/square and a junction depth of 2.7um were provided to the program. The TCPI value computed by SEN SIM for these parameters is -2308.29ppm/°C. 3.6 Simulation Methodology and Results This section describes the simulation methodology and the results for the piezoresis- tive pressure sensors. First, the methodology and the organizational details for the con- duct of the simulations are outlined. Then the ideal sensor with no tracking errors is simulated. Various piezoresistive layouts are tried and their performance results are dis- cussed. The remainder of the section presents the simulation results for the batch fabri- cated sensors. First, the model for the batch fabrication of the piezoresistive sensors is presented. Then the organizational details for the simulations utilizing this model are described Finally the simulation results are presented and the effects of the temperature and the tracking errors on the pressure sensitivity, sensor output, and zero pressure offset are discussed. 57 3.6.1 Methodology and Organization The sensor performance data is required for a temperature range of -40°C to 130°C over a pressure range of 0 to 45 psi. The effects of processing variations for the batch fabrication are also to be incorporated in the simulations. For the purposes of simulation, the temperature range is divided into 10°C steps and the pressure range into 5psi steps. The program can not handle the entire temperature and pressure range in one simulation run (too many analysis points). Thus each simulation was subdivided into four tempera- ture and pressure subranges and four simulations were run for each sensor structure. Each simulation produced a volume of data. The redundant data was removed and the results i from four sub-simulations were combined into one file for each structure. SENSIM allows the user to specify control parameters setting the accuracy for the analysis. For all simulations the analysis level (LEVEL) is set to the highest value of 3. This is required because of the three layered structure and to include thermal effects due to package and thermal rrrismatch. The diaphragm grid is set to 25pm (GSIZE). Since the diaphragm is square with uniform thickness the symmetry (SYM) is set to four-fold. This saves considerable computational effort because only a quarter of the diaphragm region is analyzed As a first step, the ideal sensor with no tracking errors, was simulated. Various piezoresistor layouts were tried and the configuration with highest pressure sensitivity and minimum nonlinearity was selected for further analysis. The sensor model for this structure was modified to include the tracking errors caused by processing variations. This model was simulated to generate data for the interface circuit. 3.6.2 Simulation Results: Ideal Sensor Various piezoresistor layouts on a diaphragm are possible. Moreover, pressure sen- sitivity and linearity are a function of piezoresistor locations. A number of layouts with 58 differing locations and arrangements, some gleaned from the previous literature [125,35], were simulated as an initial step. Three of these layouts were evaluated further. These layouts are shown in Figure 3.4. Cartesian coordinates for the. piezoresistor center, using the diaphragm center as the origin, are also shown in the figure. Some of the characteris- tics for these layouts are summarized in Table 3.1. Layout 1 Layout 2 Layout 3 :;RP1 t:.":IRP1 EDUUUE RTll RT21 RP11 RTllgRT21 RP21 R“ Rm [3 [3 RP12 RT12§RT22 m2 r——1 7 ..... f f t____. C] i I: . : RT12 RT22 L:§:I RP2 I::I RP2 , RP1(0, 475) RP1(0, 475) RP11(-95,475) RP12(-95,445) RP2(0,-475) RP2(0,-475) RP21( 95,475) RP22( 95,445) arm-430,0) RT11(-455,15) RT12(-455,15) RT11(-45,455) RTl2(—15,455) am 430,0) RT21( 455,15) RT22(455,-15) RT21( 15,455) RT22( 45,455) Figure 3.4. Piezoresistor layouts on a diaphragm and their Cartesian coordinates in micrometers (Not to scale). 59 Table 3.1. Characteristics of various piezoresistor layouts. Characteristic Layout 1 Layout 2 Layout 3 Pressure Sensitivity 33.25 35.65 31.62 (mV/psi) % Nonlinearity 1.023 0.242 -0.419 Temperature Coefficient 78.66 81.98 70.94 of Pressure Sensitivity mV/psi-°C) Layout 1 has two parallel and two transverse piezoresistors. Each resistor is 100um long and 10pm wide. The resistors are placed near the four edges of the diaphragm. This layout provides a pressure sensitivity of 33.25mv/psi. The second layout provides an improvement over the first one. In this case the transverse resistors were broken into two identical legs to increase the average stress over the piezoresistors. Now each transverse resistor is 50m long but with the same width of 10m. This increased the sensitivity to 35.65mv/psi. A third layout places all resistors close by and near one diaphragm edge to reduce the tracking errors. In this third case, all the piezoresistors are broken into two parts to improve the average stress over the piezoresistors. The pressure sensitivity for this layout is 31.62mv/psi. Pressure sensitivity as a function of temperature is plotted in Figure 3.5. Layout 2 has the highest pressure sensitivity. For all three layouts the pressure sensitivity decreases with temperature because the temperature coefficient of piezoresistivity is negative. 6O 45 Layout 1 ----- Layout 2 __ 40 —- Layout 3 ............ Pressure Sensitivity (mV/psi) 20 I I I I I I I I -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 3.5. Pressure sensitivity for the three layouts. Figure 3.6 shows the output voltage for the three layouts for applied pressures of 15 and 45 psi. Again layout 2 produces the maximum output with the least nonlinearity. Zero pressure offset for all three layouts is nil since the bridge is composed of matching resistors. Moreover, the offset remains zero over the entire temperature range because temperature changes for individual piezoresistors are cancelled due to the bridge struc- IUI‘C. 3.6.3 Simulation Results: Batch Fabrication In this section the piezoresistive sensors are analyzed from the viewpoint of batch fabrication. First, the model of Section 3.5 is enhanced to include the effects of batch fabrication. Then the organizational details to run the simulations using this model are described. Finally the simulation results are presented and discussed 61 2 1.6 -- Output 1,2 _ Voltage (V) 0.8 - 0.4 -4 0 I I I I I I I I Temperature (°C) Figure 3.6. Output voltage for the three layouts. 3.6.3.1 Batch Fabrication Model Based on the results of the previous section, layout 2 is chosen for further analysis. In this section a model will be developed from the viewpoint of batch fabrication of the piezoresistive pressure sensors. As discussed earlier, batch fabrication gives rise to track- ing errors. Tracking errors are caused by variations in temperature, time period, impurity concentration, mask alignment and other environmental changes seen by different silicon wafers processed in a batch. There is no cost-effective technique for monitoring resis- tance while the diffusion is taking place; in fact, at the temperatures used, silicon is no longer a semiconductor. Thus the effect of diffusion can be measured only after the wafer has been cooled when a subsequent correction is difficult and expensive. The end result is a variation in resistance values. These variations need to be modeled and handled in two different ways: wafer-to-wafer variations and variations on the same wafer. 62 Wafer-to—wafer variations are large compared to the variations seen on the same wafer. Variations of 10% to 25% from the nominal values have been reported for dif- ferent wafers [133-136]. Variations on the same wafer are caused by temperature gra- dients, uneven flow of (10th gas within the furnace, shape and size of resistors, and mask accuracy. Variations on the order of 1% to 3% have been reported for IOum wide resistors [133-136]. To model the two types of tracking errors, rather large figures of :l:20% and i2.5% were chosen for wafer-to-wafer and same wafer variations, respectively. It may be noted here that the same wafer variations in actuality are same chip variations which are expected to be even smaller than i2.5%. Simulations were run by introducing errors in various possible combinations of four piezoresistors. It was concluded that the worst case errors in the output voltage are obtained by introducing total error in either the parallel or transverse resistor pair. Thus to represent wafer-to-wafer variations, all the piezoresistors are changed by i20% of their nominal values. To add the effect of variations on the same wafer, the 120% wafer-to—wafer variation for transverse resistors was modulated by a :l:2.5% variation. Appropriate changes were also made in the sheet resistance and the temperature coefficient of resistivity. Thus the individual units have piezoresistor values within 12.5% whereas values for the batch fall within i22.5% of the nominal values. 3.6.3.2 Simulation Organization To include the effects of wafer-to-wafer variations three sensor structures with 0%, 20%, and -20% tracking errors were simulated. To modulate the effects of the same wafer variations (32.5%) on the wafer-to wafer tracking errors a total of 9 sensor struc- tures are possible. The list of these 9 sensor structures and their corresponding processing parameters are given in Appendix A]. 36 simulations were run to cover all these struc- tures and the complete pressure and temperature range. A sample input file for the SEN- SIM code for the sensor with no tracking errors is given in Appendix A.2. Simulation 63 code for other structures is same with parameters changed to the values given in Appen- dix A.1. The sample output for the sensor with no tracking errors for a temperature range of -40°C to 0°C and pressure range of 10 to 20psi is given in Appendix A.3. Data from all the simulations were organized and tabulated according to various temperature and pressure values. This summarized data is given in Appendix B.l. The data in Appendix BI is the output voltage of piezoresistive bridge produced as a function of pressure, tem- perature, and tracking errors. Appendix B.1 also includes the modified piezoresistor values for the desired pressure and temperature range. This organization of data pro- vides some insight into the sensor characteristics but to gain a full understanding the sen- sor response, plots provide a convenient tool. The plots and performance evaluation of the sensor is presented in the next section. 3.6.3.3 Simulation Results A large number of simulations were run to obtain sensor performance data for the desired pressure and temperature range as a function of tracking errors. Results of these simulations provide a worst case error band for various characteristics of the batch fabri- cated piezoresistive pressure sensors. It was noted that all the Sensor parameters are functions of temperature and tracking errors. The sensor response as a function of pres- sure and temperature is shown in Figure 3.7. The plots are for the sensor with 20% wafer-to-wafer tracking error and 2.5% same chip variations. The zero pressure offset voltage of 56.8 to 68.7mV is caused by the same chip tracking errors. Moreover, the offset is also a function of temperature. Higher outputs are obtained for the lower tem- peratures because the temperature coefficient of piezoresistivity is negative. The error caused by temperature is near zero for low pressures and it increases linearly with pres- sure. The maximum variation of 0.642V iS observed between the temperature values of -40°C and 130°C. 64 2 1.5 — Output Voltage 1 — (V) 0.5 — 0 . ' Zero pressure offset l l 0 15 30 45 Pressure (psi) Figure 3.7. The sensor response as a function of pressure and temperature. The error bands for the pressure sensitivity are shown in Figure 3.8. The narrow bands result from the tracking variations on the same wafer. At room temperature a max- imum variation of 0.105 mV/psi is observed for the sensors located on the same wafer. The wider band extending from 39.45 mV/psi to 42.60 mV/psi at -40°C indicates the error band for the whole batch. At room temperature a maximum variation of 1.35 mV/psi is observed for the batch. It is also observed that higher pressure sensitivity is obtained with larger bridge resistance values and for the units with negative tracking errors. The pressure sensitivity is a function of temperature even for the sensor with the perfectly matched piezoresistors, although the variation is linear. For the structure with no tracking errors of any type, the pressure sensitivity decreases fi'om 41.13 mV/psi to 27.20 mV/psi as the temperature rises from -40°C to 130°C. The error band is much smaller for on-chip variations compared to the wafer-to-wafer variations. Moreover, the error band is wider for lower temperatures. 65 20:1;2.S% Tracking Errors ............ “it“: 012.5% Tracking Errors "it. . -2o:2.5% Tracking Errors ————— 39.5 — Pressure Sensitivity 35 — (mV/psi) 30.5 - 26— I I I I I I I I -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 3.8. Pressure sensitivity for various tracking errors. Another error voltage, the zero pressure offset, contributed mainly by the same chip tracking errors, is shown in Figure 3.9. Offset values of 56.8 to 68.7mV are observed for 12.5% tracking errors for the temperature range of -40°C to 130°C. The temperature dependency of the zero pressure offset also shows a nonlinearity of 1.30% for positive tracking errors and 1.26% for negative tracking errors. The offset voltage for the positive and negative tracking errors is almost of the same magnitude. 66 100 25 % Tracking Errors 50 — ———————— Offset Voltage 0 ' (mV) -50 — ......................... -2.5% TI'aCking Emrs -100 l l l l I I I r -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 3.9. The zero pressure offset for various tracking errors. 3.7 Summary The simulation details and results for the piezoresistive pressure sensors have been presented in this chapter. Sensor performance data from these] Simulations will be used to develop a new temperature compensation technique. The data will also be used as the input for the interface circuit simulation. Simulation objectives have been discussed with a goal to produce a generalized and realistic sensor model. SENSIM, the sensor simula- tion program for the piezoresistive and capacitive pressure sensors was used to run the simulations. The program has been validated through comparison with the experimental data from the actual devices. The program allows the user to choose structural, process- ing, electrical, and control parameters. Each model parameter was discussed with refer- ence to the previous literature. The values for the model parameters were deduced from these discussions and reviews. Various piezoresistors layouts on the diaphragm were dis- cussed and Simulation results for the ideal sensor, with no tracking errors, were 67 presented The sensor model was enhanced to include the batch fabrication effects. :l:20% variations in the piezoresistors values were modulated with :t2.5% variations to represent the wafer-to-wafer and same wafer variations, respectively. 36 simulations were run to cover the entire pressure and temperature range and the tracking errors caused by the pro- cessing variations. The Simulation results provide the worst case error band for the sen- sors coming from the same wafer or different wafers. The simulation results have been used to study the temperature response of the sensor as function of tracking errors. All sensor parameters are functions of temperature and the tracking errors. The worst case nonlinearity for the sensor output is only 0.24%. The sensor output is a function of tem- perature even for the sensors with no tracking errors. The zero pressure offset is also tem- perature dependent. It varies from 56.8 to 68.9mV over the desired temperature range. Moreover, the temperature dependency shows a maximum nonlinearity of 1.30%. The simulation results are, in general, in agreement with other reported results. The simula- tion results have provided a better understanding of the temperature characteristics of the piezoresistive sensors as a function of tracking errors. The sensor performance data will be very useful for devising a new temperature compensation technique and for the designing and testing of the interface hardware. CHAPTER 4 TEMPERATURE COMPENSATION 4.1 Introduction In this chapter a new temperature compensation technique for piezoresistive pres- sure sensors is presented for a temperature range of -40°C to 130°C over a pressure range of 0 to 45 psi. The technique has been implemented in two parts. First, the double bridge compensation removes the errors caused by the same wafer variations and then a tem- perature half bridge is used to compensate temperature errors for wafer-to-wafer varia- tions. First, the temperature characteristics and Simulation results for the piezoresistive pressure sensors are discussed from the viewpoint of understanding the errors caused by the temperature variations and the tracking errors. Then, the two parts of the temperature compensation technique are presented. Each part is described and the Simulation results are presented and discussed. 4.2 Temperature Characteristics The major problem associated with piezoresistive pressure sensors is their inherent cross-sensitivity to temperature. In this section the behavior of a piezoresistive pressure sensor as a function of temperature is explained. First, a brief review of the temperature characteristics of a batch fabricated sensor is presented. Then, an analysis of the Specific temperature errors deduced from the simulation results of the last chapter is presented. 68 69 4‘.2.1 Review The influence of temperature on a piezoresistive pressure sensor is exhibited by a change in the Span and the offset of the sensor output. Moreover, process variations, which are random, give rise to piezoresistive tracking errors, which in turn change the temperature characteristics for the individual units. The processing variations cause two types of piezoresistive tracking errors: those on the same wafer and those which may vary from wafer-to-wafer. Zero pressure offset and the sensor output are functions of the tracking errors as well as the temperature. The zero pressure offset is not encountered for a sensor with matching piezoresistors but the sensor output is a function of temperature even for the sensors with no tracking errors. This results from the temperature depen- dency of the piezoresistive coefficients. Temperature compensation techniques have been reported using laser trimming, external resistors, and clever use of material properties [10,11,23]. Generally these techniques are for limited temperature and pressure ranges, and in most cases for Specific applications such as biomedical devices. Moreover, these techniques involve additional processing steps performed under sensor operating condi- tions which add time and cost to the device fabrication process. 4.2.2 Temperature Errors The sensor model for the batch fabrication of piezoresistive pressure sensors has been presented in the last chapter. The sensor was Simulated and the required data pro- duced over the desired pressure and temperature range including the effects of processing variations. The error analysis of the simulation results is presented in this section. The errors caused by tracking errors and temperature can be subdivided into three partsas eTotal = eoffset + etc + etemp- 70 eafigm is the zero pressure offset voltage mainly caused by the on-chip tracking errors, which cause an imbalance in the piezoresistive bridge. The offset error is also a function of temperature. em is the error caused by wafer-to-wafer and same wafer track- ing errors. These errors only shift the sensor response curve as a function of the magni- tude of the tracking errors. camp are the errors solely due to the temperature, Since the piezoresistive coefficients are a function of the temperature. These errors are present even in a sensor with perfectly matched piezoresistors. The good thing about the tem- perature dependency is that the relation is linear. The magnitude of these errors as a func- tion of temperature is Shown in Figure 4.1 for the sensor with positive tracking errors. Room temperature is taken as the reference for the emmp error plot. Thus, the error is zero at 27°C and increases linearly on either Side. 400 300 — Error e Voltage 200 ._ .. temp (mV) e 100 — Le .-_-_-_-_-_-— -—-—.,.t'.— ________________ . eofiset 0 I l I I I I I l Temperature (°C) Figure 4.1. The error voltages for the sensor. 71 4.3 Objectives The compensation circuit and the sensor are intended to be integrated on the same chip and batch fabricated. A proposed hardware design for implementation of the tech- nique will be developed in the next chapter. The ultimate objective is to produce a low cost interface circuit. The key to reducing the cost of any integrated circuit is batch fabri- cation. Moreover, reduction in design time is also a must for achieving a lower cost. To meet this end, the resulting hardware should be structurally simple to reduce the area consumed by the compensation circuit on the chip. The technique should be implement- able using the standard integrated circuit fabrication technologies. Moreover, temperature compensation of the individual. units under the sensor operating conditions must be avoided. The technique should result in a flexible design with possible extensions to other sensors utilizing the piezoresistive effect and batch fabrication. To summarize, the temperature compensation technique should be structurally sim- ple, cost effective, use Standard IC fabrication techniques, and suitable for batch fabrica- tion. It should not require handling of the individual units for the trimming of their tem- perature characteristics under sensor operating conditions. 4.4 Approach The sensing element consists of four piezoresistors in a wheatstone bridge configuration diffused in the thin diaphragm. The sensor and the interface circuit is to be batch fabricated which will result in tracking errors for the piezoresistors. Moreover, the sensor is to operate over a wide pressure and temperature range. To ensure Similar pro- cessing, pressure, and temperature variations, the temperature compensation techniques developed are based on the bridge configurations. The diffused compensation bridge resistors have the same mask patterns and values as the piezoresistors. This is the key to eliminating the need for the compensation of the individual units because the sensing bridge and the compensation resistors undergo exactly the same processing conditions. 72 Moreover, during Operation the two share the same temperature environment. The compensation bridge resistors are located on the bulk part of the chip, away from the effects of the pressure induced stress, to differentiate the pressure effects from the temperature variations. The resistors are modeled using the parameters discussed in Sections 3.5 and 3.6.3.1. Two approaches were considered for obtaining the temperature response of the resistors. The simplest option was to use piezoresistive bridge output for the zero applied pressure. This output is available as part of the piezoresistive bridge simulations but may not be realistic since the piezoresistors are located on the thin diaphragm. Moreover, the Simulator used, SENSIM, is primarily for the pressure simula- tion and also includes other effects such as package Stress, and thermal mismatch. The second option was to use PSpice for the simulations as this program is also used for the simulation of the analog portion of the interface circuit. Therefore, the second option was adopted for Simulating the compensation bridge and the temperature half bridge. The double ended bridge output is amplified and converted to a single ended Signal through the use of an op—amp based amplifier circuit. The circuit is identical to the amplifier for the piezoresistive bridge output. The overall behavior of this circuit is deter- mined by the ratio of the resistors, thus making the circuit insensitive to processing varia- tions and temperature changes. 4.5 Compensation Technique In this section a new temperature compensation technique for the piezoresistive pressure sensors is presented. Same wafer and wafer-to-wafer variations are handled in two parts. First, the zero pressure Offset and same wafer variations are compensated, pro- ducing an output free of variations caused by same wafer tracking errors. The resulting output is Still a function Of the temperature. Then in the second part, the technique to remove this dependency is developed. The technique developed utilizes a temperature half bridge as the primary compensation element. 73 In this section the two parts of the new temperature compensation technique are described and the simulation results are presented and discussed. 4.5.1 Compensation: Same Wafer Variations In this section the double bridge technique for the temperature compensation Of errors caused by same wafer tracking errors is described Initially the technique was developed and simulated. Later, on the basis of the simulation results, the hardware implementation of the technique was improved to reduce the chip area. First, the double bridge technique and its improvements are described. Then the simulation results for the technique are presented and discussed. 4.5.1.1 The Double Bridge Technique Based on the results of Chapter 3 a new temperature compensation technique using two bridges is developed. The block diagram Of this technique is shown in Figure 4.2. A piezoresistive bridge is located on the thin diaphragm and its output is a function of pres- sure and temperature. The compensation bridge is located on the bulk part of the chip; thus its response is dependent on the temperature only. The Shape and Size of the com- pensation bridge resistors are identical to the corresponding resistors of the pressure sen- sitive bridge. Physically, the corresponding arms of the two bridges are located as close as possible to each other. To prevent the effects of induced stress in the diaphragm, a safe distance of 100nm from the diaphragm edge has been suggested for the peripheral cir- cuits [35]. These physical considerations and the close proxirrrity of resistors eliminates the factors contributing to the tracking errors on the same chip rendering the variations between the corresponding bridge arms negligible [133]. Therefore, the effect of same wafer tracking errors can be eliminated by taking the difference of the two bridge out- puts. Differential amplifiers are used to amplify and convert the double-ended bridge out- put to a Single-ended Signal. Two analog to digital converters are used to digitize the 74 pressure and the temperature outputs. A digital subtractor is employed to obtain the difference of the two bridge signals. The digital temperature Signal is available and may be used else where in the circuit and/or provided as temperature output for the chip. I VB AID : V (RT) Converter __ T , Di 'tal Piezoresistive Bridge gr . VG”) Compensation .—> 1 Circuit V __ B A / D : vm Converter Temperature Bridge Figure 4.2. The double bridge temperature compensation technique. To see the effectiveness of the technique, the temperature bridge was Simulated and its output subtracted from the piezoresistive bridge output. The results indicate that the temperature bridge output is not dependent on temperature alone, as initially presumed. Rather the temperature bridge response is dependent on the temperature as well as the on-chip tracking errors. Thus, if there are no tracking errors present for a particular sen- sor unit, the bridge is balanced and its output remains zero for the entire temperature 75 range. These observations led to two conclusions. First, the double bridge technique will only compensate the errors contributed by the same wafer tracking errors. Therefore, the technique will only compensate for the zero pressure Offset and the differences in the out- putsof the devices fabricated on the same wafer. The second observation was that the so called temperature bridge output does not provide a true temperature signal. Thus, the temperature bridge output does not provide enough real information about the tempera- ture to be utilized in the digital part of the temperature compensation circuit or elsewhere on the chip. Therefore, digitizing this Signal is not of much use. Instead it was discovered to be more advantageous to subtract it from the piezoresistive bridge output in analog form. The resulting signal then may be digitized. The improved block diagram implementing this change is shown in Figure 4.3. In the improved circuit, an analog subtractor circuit is used to generate the differ- ence of the two bridge outputs. The use Of the subtractor eliminates the need for two AID converters. Moreover, the output of the subtractor is a unipolar signal which doubles the resolution of the AID converter. The output of the subtractor is digitized for further pro- cessing to produce a temperature compensated digital output. The improved implementation offers a number of advantages. First and foremost is the savings of the chip area taken by the AID converter, register, and the digital subtrac- tor circuit for the temperature bridge. Secondly the output of the subtractor circuit, which is the difference of the outputs of the two bridges, is unipolar over the entire temperature and pressure range. Therefore, the analog input to the A/D converter is a unipolar signal for a particular sensor unit. This doubles the resolution of a carefully designed AID con- verter because the analog voltage range of 10V (iSV) has been reduced to 5V (either +5V or -5V). Moreover, if there are any differences in the Operation of the A/D con- verter for the two polarities of the input signal it will not effect the individual units. These differences just Shift the response curve and can be resolved during the calibration of the sensors. 76 — Differential Amplifier I . Digital Piezoresistive Bridge A I D __ Compensation __, Converter Circuit v(p) Subtractor VB : Differential Amplifier Compensation Bridge Figure 4.3 The improved double bridge temperature compensation technique. 4.5.1.2 Results ' To Simulate the double bridge technique rather large figures were chosen to model the tracking errors. The tracking error values are summarized in Table 4.1. The data in 0 Appendix B2 is the output voltage of the compensation bridge for same wafer tracking errors. The data is organized according to the appropriate temperature ranges. 77 Table 4.1. Piezoresistor tracking error values. Configuration Component Tracking Error Wafer to wafer Compensation bridge :l:20% Piezoresistive bridge i20% Same wafer/chip Compensation bridge :l:2.5% Piezoresistive Bridge i2.5% Same chip Corresponding bridge arms Negligible Simulations for the double bridge compensation technique for a temperature range of -40°C to 130°C show encouraging results for the temperature compensation of the zero pressure offset and the errors caused by the processing variations on the same chip. The simulation results showing the compensated output are given in Appendix B.3. The, data is organized according to the appropriate pressure and temperature ranges. Zero pressure offset, which is a function of tracking errors and temperature, Shows a maximum nonlinearity Of 1.30% with a worst case error band of 3:68 mV over the desired temperature range. It is reduced to a fraction of a microvolt for the compensated sensor, which is below the measurement precision limit. Zero pressure offset curves for the com- pensated and uncompensated sensors with i2.5% tracking errors are Shown in Figure 4.4. The curve in the middle, centered around zero, Shows the compensated zero pressure offset for all types of tracking errors. The curves on the top and bottom represent the offset values for positive and negative tracking errors, respectively. 78 100 Uncompensated (+2.5 % Tracking Errors) L __________________________________ 50 — Offset Compensated (All Tracking Errors) Voltage 0 (mV) -50 _D ....................... uncompensated (-2.5% TraCKing Errors) ‘100 I r I I I l j l -40 -20 0 20 40 60 80 100 120 Temperature (°C) Figure 4.4. The compensated zero pressure Offset voltage. The sensor output is also a function of the temperature and the tracking errors. Sen- sors with 32.5% tracking errors Show a worst case error band of i3.04% of the full scale output at 45psi. The error band is reduced to i0.24% of the full scale output for the com- pensated sensor. A plot of the sensor response for both cases is shown in Figure 4.5. The double bridge technique eliminates the zero pressure offset and compensates for the output variations caused by the same wafer tracking errors. The technique is not effective for wafer-to-wafer tracking errors and the errors contributed by the temperature dependency Of the piezoresistance. 79 2 . g ‘ 2.5% Tracking Errors ----- I ..... : No Tracking Errors __ ......... -2.5% Tracking Errors ............ 1.75 — ., - ., . Compensated Output .. ., Voltage 1.5 - . (V) - ......... 1.25 -— ........... 1 l | l I l I I I -40 -20 0 20 4O 60 80 100 120 Temperature (°C) Figure 4.5. The compensated output voltage. 4.5.2 Compensation: Wafer-to-Wafer Variations The double bridge compensation technique effectively removes the zero pressure offset and the errors caused by same wafer tracking errors. Thus the task of temperature compensation is reduced to the compensation of the wafer-to-wafer processing variations only. Although the resistors are matChed, the sensor output is still a function of tempera- ture. In this section a new temperature compensation technique is developed to remove the remaining temperature errors from the output of the double bridge technique. 4.5.2.1 Approach It is observed that the piezoresistive pressure sensor response with the matched resistors is also a function of the temperature. This dependence is caused by the tempera- ture sensitivity of piezoresistive coefficients. Moreover, the wafer-to-wafer tracking errors also vary the values Of the piezoresistive coefficients. camp, the error solely caused 45 nit tio pr: bu sir of: sur‘ Hm rest CHI 80 by the temperature was shown in Figure 4.1. The magnitude of the error voltage increases linearly with the temperature on the either Side of the reference temperature. To compensate for this error, a diffused resistor which has a positive temperature coefficient of resistivity, is used to derive a temperature Signal of the corresponding magnitude. The magnitude Of this Signal is not a function of the applied pressure. The sensor outputs as functions of pressure and temperature were shown in Figures 3.6 and 3.7. The Slope Of the output signals is negative for all pressure values. Moreover, the error magnitude increases with the applied pressure. This implies that the temperature signal can not be used directly for all pressure values. To overcome this difficulty the temperature signal is scaled digitally to take care of various pressure ranges. The scaled temperature Signal is then added to the pressure output. The temperature signal may be positive or negative depending on the pattern of tracking errors. 4.5.2.2 The Half Bridge Technique Based on the Observations of Section 4.5.1.1, a new temperature compensation tech- nique is developed. This technique processes the results of the double bridge compensa- tion technique to produce the final temperature compensated output for the piezoresistive pressure sensors. A proposed circuit to implement the technique is shown in Figure 4.6. The temperature half bridge, driven by a constant current source, is located on the bulk part of the sensor chip. Its response is dependent on the temperature alone. Even a Single resistor is sufficient to obtain the temperature Signal but R1 has been added to Offer a higher load resistance to the current source. Any value may be chosen for R1 to suit the design of the current source Since it does nOt effect the operation of the tempera- ture compensation technique. The Shape, Size, and value of R2 is identical to the parallel resistors on the piezoresistive bridge. This is to ensure same wafer-to-wafer tracking errors forRz and the piezoresistors. in 15 Sin 81 Figure 4.6. The half bridge temperature compensation technique. The current source provides a constant current of 1.25mA. This value has been chosen as the center of the tracking errors and the temperature range. The output for the compensation resistor with no tracking error at the room temperature for this current is 2.5V. The current value is used to set a reference for the design with respect to the sensor structure and the temperature range. The variations in the reference temperature do not alter the effectiveness of the technique. With another reference, the sensor response will still be insensitive to temperature, but a corresponding shift will result in the compen- sated output which may be calibrated out. The voltage across R2 is subtracted from a 2.5V reference to obtain the temperature signal. The resulting temperature Signal is unipolar or bipolar depending on the value of the tracking error for a particular sensor unit. Theoutput voltages for the 0%, 20%, and -20% tracking errors are given in Appendix B4. The temperatrue signal is amplified, digitized, and Stored in a register. The response of the double bridge compensation circuit is Simultaneously available in a second register. The temperature bridge output is scaled 82 down for various ranges of applied pressure and added to the compensation bridge out- put. The temperature signal may be positive Or negative. The flow chart for the compen- sation algorithm is shown in Figure 4.7. The hardware and the implementation details for the technique are given in Chapter 5. 4.5.2.3 Results Three sensor Structures with 0%, 20%, and -20% were Simulated. A large number of simulations were run to obtain sensor performance data for the desired pressure and tem- perature range. The final compensated output voltages for the sensor are given in Appen- dix B5. The data in the appendix is organized according to appropriate pressure and tem- perature ranges. The compensated and the uncompensated sensor response as a function Of tempera- ture for the sensor with no tracking errors is Shown in Figure 4.8. The uncompensated output shows a large sensitivity to the temperature variations. This is caused by the tem- perature dependence of the piezoresistive coefficients. The compensated output for lower Pressure values is Slightly overcompensated. The uncompensated output for 30psi shows a temperature coefficient of -2.44mV/°C. The temperature coefficient of the compensated Ontput for the same applied pressure is reduced to a modest value of 74.9uV/°C. The Compensated response as a function of pressure for the same sensor structure is shown in Figure 4.9. 83 C ) l Read pressure and temperature No Yes Pressure > 22.5psi No Pressure < 11.25psi I Divide temperature Divide temperature Divide temperature output by 8 output by 4 output by 2 i Add temperature and pressure outputs l < > Figure 4.7. Flow chart for the half bridge temperature compensation technique. 84 Compensated ............ Uncompensated I -40 0 40 80 120 Temperature (°C) Figure 4.8. The compensated sensor response as a function of the temperature. 2 1.6 - Output 12 ._ Voltage (v) 0.8 — - 0.4 — 0 I I I 5 15 25 35 45 Pressure (psi) Figure 4.9 The compensated output for the sensor with no tracking errors. 85 The plots provide the worst case error band for the extreme temperature values of -40°C and 130°C over the entire pressure range. The solid curve in the middle shows the response at the room temperature. The sensor response at the intermediate temperature values will lie inside the error band. The compensation becomes less effective for the pressure values higher than 35psi. It is noted that the reduction in the effectiveness is more pronounced for the extreme temperature values. For the temperature range of 0°C to 80°C, the worst case error band is reduced to less than half the value shown in the figure. The maximum error voltages observed for -40°C and 130°C are less than one tenth of a volt with the full scale output of 1.69V. The compensated response Of the sen- sor with 20% tracking errors is shown in Figure 4.10. 2 -40°C -------- .I 30°C ”xv". , ’ 1.6— 130°C ............ ,..-°'°" Output 12 _ Voltage (v) 0.8 - 0.4 — 0 I I I 5 15 25 35 45 Pressure (psi) Figure 4.10 The compensated output for the sensor with 20% tracking errors. The response is Similar to that of the sensor structure with no tracking errors. The maximum output in this case iS 2.0V. The error voltage for the pressure values below 35psi is less than 0.025V. The error band expands above this pressure to a maximum 86 value Of 0.1V for 45psi at 130°C. The pressure sensitivity for the compensated and the uncompensated sensor with -20% tracking errors is Shown in Figure 4.11. 45 Compensated ............ Uncompensated Pressure Sensitivity (mV/psi) Temperature (°C) Figure 4.11 The pressure sensitivity for the sensor with -20% tracking errors. Again the effectiveness of the technique is reduced for 45 psi. The pressure sensi- tivity for the uncompensated sensor is 77.67uV/psi-°C. It improves to 35.4uV/psi-°C for a pressure range of 45psi and becomes almost independent of the temperature for the pressure range of 25psi with an insignificant value of 1.05uVIpsi-°C. 4.5.2.4 Discussion The temperature compensation technique presented above has been developed for the large tracking errors values of i20%. The technique also covers a wide temperature and pressure range. The balancing of these three parameters to minimize the compensa- tion errors is a very complicated task. The half bridge technique provides very accurate 87 results for the pressure values below 35psi over the entire temperature range of -40°C to 130°C. The accuracy is reduced for higher pressure values at extreme temperatures. The technique is suitable for the applications requiring reasonable accuracies such as automo- biles. For more precision applications, the higher pressure range may need further refinement. The temperature outputs are fixed for a particular tracking error pattern. The tem- perature output is divided by powers Of 2 to obtain corrections for various pressure ranges. The division by 2 (Shift right) is conveniently handled by the digital circuit. The response for the lower pressure values is trimmed well by sealing the temperature values by factors of 4 and 8 but for higher pressure values the correction step of divide by 2 pro- vides a rather coarse trimming. This expands the error band for the pressure values above 35psi. The output for the higher pressure values can be refined and errors reduced by using a scale factor between 0.5 and l (non-power of 2)..This will require a large amount of compensation and control circuitry and may defeat the goal of the structural simpli- city. The temperature bridge output and the partially compensated pressure outputs may also be processed using software. This approach assumes the availability of a micropro- cessor or a microcomputer. The register contents for the pressure and the temperature are read and manipulated by the processor. The temperature bridge response in this case may be scaled down to any desired value and added/subtracted to the pressure output. This approach may be developed to produce very precise compensation results, but at a lower speed. Moreover, the availability of a processor is a must for this alternate approach. Hardware processing is faster and doesn’t consume much in chip area as well. The only circuits required are the 2-tO-3 multiplexers and a controlled adder circuit. The exact choice of the approach will be determined by the need for the required accuracy, and the temperature and pressure ranges to be covered for a specific application. 88 4.6 Summary The temperature compensation technique for the piezoresistive pressure sensors has been presented. The technique has been implemented in two parts, using a compensation bridge and a temperature half bridge. The double bridge technique is very effective for the zero pressure offset and the temperature errors caused by the same wafer processing variations. The zero pressure offset is reduced below the measurement precision limit for the entire pressure and the temperature range. The output errors for the sensor, caused by the same wafer variations, are reduced by a factor of 100. The output of the double bridge technique compensates sufficiently for same wafer variations but still shows tem- perature dependency caused by the temperature sensitivity of the piezoresistive coefficients. Anyhow, the task Of temperature compensation is reduced to the compensa- tion of wafer-to—wafer variations only. The remaining temperature errors for the sensor output are removed by the second part of the compensation technique. A temperature half bridge has been employed to implement this technique. The technique is very effective for the pressure values below 35psi and provides reasonable results for the higher pressure values at extreme tempera- tures. The causes of this degradation of accuracy have been discussed and the irnprove- ment techniques have been suggested. The possible use of software approach to irnple- ment part of the compensation technique has also been out lined and discussed. The sen- sor output becomes temperature independent, showing only a Shift in the output for vari- ous tracking errors. These shifts can be resolved during the calibration of the sensors car- ried out at room temperature. The temperature compensation technique presented in this chapter has very cOn- vincing advantages. The compensation circuitry is structurally simple and suitable for batch fabrication. It is implementable using the available IC fabrication technologies. The technique does not require the compensation of the individual units under sensor operating conditions. Moreover, no external components are required for the 89 implementation of the technique. All these features make the technique very cost effec- tive, the ultimate Objective for the design of the interface circuit. CHAPTER 5 INTERFACE HARDWARE 5.1 Introduction The analog portion of the circuit was Simulated with PSpice 4.03 and the digital portion was simulated in VHDL (VHSIC (V ery High Speed Integrated Circuit) Hardware Description Language. The design and simulation were carried out in a bottom-up fashion. Analog and digital building block circuits including op-amp, comparator, sub- tractor, switch, zero crossing detector, integrator, flip flop, decoder, counter, register, and various gates were tested first. The testing and refinement of analog circuits involved pro- vision of typical inputs and then comparison of the outputs to the expected responses. In many cases the analog components were adjusted and/or changed to tailor the response to the desired values. For the digital blocks, a typical set of data was provided as input to the modules (VHDL programs). The simulated responses of the output signals were then compared to what was expected from the truth tables to verify correctness. The design of the interface circuit went tluough numerous refinements during its course. Desirable as it may be, documenting all the changes is itself a formidable task. But even if it can be done, documentation alone is not a substitute for the understanding, which is what this work sets out to accomplish in the development of an interface circuit for the piezoresistive pressure sensors. In this chapter the interface hardware for piezoresistive pressure sensors is presented. First, the design objectives, philosophy, and specifications are for the hardware design. Then the implementation details for the amplifier and the subtractor cir- cuit are presented. The remainder of the chapter describes the selection and designing of 91 the analog to digital converter circuit. Basic analog to digital conversion techniques are studied with a goal to select the one best suited for the interface circuit. The dual slope analog to digital conversion technique is selected and complete details for its design are presented. In the end the hardware for the implementation of the half bridge temperature compensation technique is described. 5.2 Design Objectives and Philosophy The clear understanding of the design objective and philosophy is an integral part of the decision making process, because these are the ultimate justifications of the designer’s decision. With this understanding, the objectives for the interface design are outlined first, followed by a discussion of the bearing of these objeCtives on the design of the circuit. The interface circuit is intended to be integrated on the same chip as the piezoresis- tive sensing element. Moreover, the complete device is to be batch fabricated for mass production. The sensor should be operable over a temperature range of 440°C to 130°C to make its application area wider. An effort was made to come up with a design as close as possible to these objectives. In some cases it was possible, while in others a compromise was required as will be described. The circuit is to be batch fabricated {thus the problem of tracking errors for piezoresistors as well as other circuit resistors and components becomes important. The best remedy for this problem is to design for resistive ratios instead of absolute values for the resistors. Also it is better to choose design techniques in which the overall behavior is less sensitive to component tolerances. These principles were applied in all the designs. The integration of the sensOr and the interface circuit leads to two conclusions. Firstly the circuit should be structurally simple so that it consumes a minimum of real estate on the chip. Secondly the fabrication process should be, as far as possible, compa- tible with the sensor processing steps. Because of the broader temperature range. the 92 design should be such that its output is least dependent on the temperature. Again the use of ratios instead of absolute values reduces the effect of temperature. The lowest level of design is at the transistor level whereas the highest level consti- tutes a design at the block level. The design approach adopted here was to take the mid- dle path, that is, use small blocks such as a comparators or flip flops. Analog circuits were Simulated at transistor level while digital circuits were simulated at gate and/or block level. The designs were not geared towards a particular technology but fabrication and implementation details were kept in mind. Literature and books were searched when setting design parameters to obtain Simulation models close to reality. Extremes were examined and parameters were set to a reasonable value somewhere in the middle. The same approach was used for making some assumptions about the circuit operation and/or its characteristics. Moreover it is not the objective here to specify the implementation technology at the lowest level, but of course such details were kept in mind while making design decisions. These objectives provided guidelines to streamline the design approach. It was not possible to fulfill these requirements completely in all cases. In many cases there were a trade-off necessitated to balance certain requirements. 5.3 Des'gn Specifications The input to the circuit comes from the piezoresistive bridge and the compensation bridge. The output signal is double ended in both cases. Moreover, the voltage variations caused by temperature and/or pressure ride over a common mode signal. The magnitude of the differential mode Signal varies fi-om 0 to 1.962V. The signal is low frequency, or to be more specific, it is a slow varying DC signal. The polarity of the signal is random which is determined by the pattern of tracking errors. In some cases the signal is positive or negative over the entire temperature and pressure range while in other cases it may switch polarity over the temperature and pressure range. The interface circuit is operable from a dual power supply of :tSV. 93 The interface circuit is to provide a 10-bit digital output. Ideally the output should be linear and independent of the temperature and tracking errors. This output could be calibrated for the individual units (not part of this work) for the desired pressure range. Linearity, as was described, in Chapters 2 and 3 is not a major concern for piezoresistive pressure sensors. 5.4 Amplification The first task of the interface circuit is to convert the double ended bridge outputs to Single ended outputs. Secondly the outputs must be amplified to cover the entire analog input range of the ADC. The natural choice to accomplish both these tasks was an opera- tional amplifier (op-amp). The same op-amp could be used in the subtractor and for the integrator in the ADC circuit. Op-amps are amplifiers (controlled sources) that have sufficiently high forward gain so that when negative feedback is applied, the closed-loop transfer function is practically independent of the gain of the op-amp. Ideally, an op-amp has infinite differential- voltage gain, infinite input impedance, and zero output impedance. In reality an op-amp only approaches these values. In this section the design approach and the op-amp circuits are described first. Then the details of the op-amp based amplifier, used for the interface circuit, are presented. 94 5.4.1 Design Approach for the Op-amp For the interface circuit, the op-amp could be designed from the scratch, that is from transistor level. On the other hand, a Short cut could be taken to simply model and simu- ' late it as a voltage controlled voltage source. These two approaches represent two extremes. A compromise was made to follow the middle path to have realistic simula- tions without wasting undue effort. Thus the op-amp was not designed from scratch instead the available circuits were surveyed and simulated. A number of circuits fi'om various books [137-139] were tried. The aim here was to find a circuit with high open lOOp gain, large common-mode rejection ratio, high power supply rejection ratio, and a low offset voltage. Slew rate, bandwidth, and frequency response were not major con- cerns since it was to be used for a low frequency application. A symmetric voltage swing with saturation voltages approaching the power supply was also desired. Simulations were run to pick the op-amp with a linear output over the the entire output range of iSV. 5.4.2 The Op-amp Circuit The op-amp circuit shown in Figure 5.1 was selected for the interface. This is a two stage op-amp with an MOS/BJT output stage consisting of emitter-follower Q1 and MN9 [137]. Except for these devices, the circuit is a two stage op-amp. The BJT in the output reduces the output resistance of the op-amp without adding complex circuitry. This characteristic allows the op-amp to drive the large capacitive and the small resistive loads. All devices, except Q1, used in the circuit are enhancement mode NMOS and PMOS transistors. The BJT used is a Special type called substrate BJT. The fabrication process for this transistor is compatible with the basic sin gle-well CMOS fabrication pro- cess even though the collector terminal is constrained to V4,, (or V”). The emitter is the source or drain diffusion of the NMOS device, the base is the P-well and the n“ substrate is the collector. The primary advantage of a BJT in the output stage is a low resistive 95 output impedance. The major disadvantage is the requirement for a base current causing a Slew rate limitation. MP8 ‘ MP5 3 T MP7 - l 12 L13 Vdd 8 Q1 _ + — MNII Vin , Vin 11 V‘l MP1 MP2 +0 Vss 5 2 ‘ 1 I vdd | V Vout MPlO dd 6 11 L MP12 —I_ 7 Vss tfl MN3 ' ‘ MN4 MN13 . 4 L t], -9 r——T 1L Figure 5.1. The op-amp circuit [137]. 96 The complete design details and the calculations are contained in [137]. The sum- mary of the relevant performance characteristics of the op-amp is given in Table 5.1. Table 5.1. Characteristics of the op-amp [137]. Parameter Value Open loop low frequency gain 12,000 (81.6dB) Power consumption 4mW Output resistance 4.5K Output voltage swing No load -5 to 4.4V 1K load -3.8 to 4V Common mode rejection ratio 0V input 88.9dB 1V input 63dB Power supply rejection ratio Negative 97dB Positive 89.5dB Unity Gain bandwidth 1.3MI-lz Slew rate 6/-15V/us 1%Settling time with 100pF load Sits The node numbers for the PSpice simulation program are also shown in Figure 5.1. The simulation program for the circuit is included in Appendix C. 1. The op-amp circuit was included in the PSpice library to be used as a subcircuit block for other circuit simu- lations. I3” t‘ 97 5.4.3 The Amplifier Circuit The op-amp is used as an inverting amplifier in a closed loop configuration with negative feedback. Since the output of the bridges is double ended, the balanced configuration was used for the amplifier circuit. The amplifier circuit is shown in Figure 5.2. The bridge is isolated from the ground, and the two conductors are used to connect it to the amplifier. Each conductor has the same resistance (R1 + Rp) to ground. The bal- anced input also has the added advantage of cancelling any noise pickup along the signal paths since it is common to both the inputs. To compute the circuit response it is assumed that half the input Signal is connected to each input and the principle of superposition is used. The circuit response is given by RF Vout = VB ('5?)- . (4-1) Figure 5.2. The amplifier circuit. 98 The maximum output from the bridges is 1.96V. Thus the gain for the circuit is set to 2.25 with R]: as 5K and R1 being 2.2K. The linear transfer function for an input of :l:2V is Shown in Figure 5.3. The gain of the amplifier circuit is not dependent on the absolute values of the components but rather is determined by the ratio of RF and R1. Thus the output of the amplifier is insensitive to component tolerance caused by process- in g variations. 2.5 — / OUtpllI I ’ Voltage 0 — / (V) , . ’ -2.5 — / ’ ‘ _ I I I I I -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 Input Voltage (V) Figure 5.3. The DC transfer characteristics of the amplifier. 5.5 Analog Subtraction The subtractor circuit is built using the op-amp circuit discussed in Section 5.4.2. The subtractor circuit is shown in Figure 5.4. The circuit was Simulated using different resistor values. Various resistor values were tried to minimize the conversion error. Based on these results 2K resistors were selected for the circuit. Increasing the resistor value above this does not improve the accuracy whereas going below this value intro- duces significant conversion error. 99 . O V01“: VA" VB a 1 Figure 5.4. The subtractor circuit. The inputs to the subtractor are from the piezoresistive and the compensation bridges. The inputs may have either polarity but simulations have shown that the subtrac- tor circuit works fine for all combinations. The piezoresistive and compensation bridge output data from Chapters 3 and 4 has indicated that the nature of bridge outputs is such that the output of the subtractor circuit would always be of the same polarity for a partic- ular sensor unit. 5.6 Analog to Digital Conversion The temperature half bridge response and the difference of piezoresistive and com- pensation bridge outputs are analog signals. Conversion of these signals to the digital form, using an ADC, is a salient step towards building a digital interface circuit. An ADC is a device which converts a continuous range of input amplitude levels into a discrete, finite set Of digital words. Therefore, there is an inherent quantization uncertainty of i1/2 LSB in the conversion process. In addition, an ADC is characterized by offset, scale 100 factor or gain, integral linearity, and differential linearity errors. Typically, Offset and gain errors are calibrated out, in either hardware or software. Linearity errors are harder to handle requiring special hardware or software linearizing techniques for correction. In many ADC designs a Digital to Analog Converter (DAC) is also part of the design. Figure 5.5 shows block diagram of a representative ADC circuit. Analog input is sampled and held for a prespecified time by a sample-and-hold circuit. The output of the. sample-and-hold circuit is connected to the comparator. This input along with me is used to determine the digital word that best represents the analog input signal, Va. The means by which conversion is accomplished is dependent on the specific ADC design. Analog . Comparator rnput Sample and | Digital ’ hold circuit ' ' Va , Switch I::I>—> output >213“? u u v ref circuit tp A l ' Timing and control logic Figure 5.5. Block digram of a representative ADC. In this section the four basic AID conversion techniques are surveyed from the viewpoint of their suitability for use in this interface circuit. The dual slope technique is selected and the design for the bipolar dual slope ADC is presented. 101 5.6.1 Types of ADCS A vast number of circuit designs for ADCS exist and are being developed for vari- ous applications especially for fast data acquisition circuits. Selection of an ADC for integrated sensor use has been discussed in detail in [18]. Most designs are extensions of the basic conversion techniques. As an initial step a study was carried out to review the available analog to digital conversion techniques and pick the one best suited for the interface circuit design. There are four basic classes of ADCS; successive approximation, flash or parallel, counter-ramp or series, and tracking or servo type. 5.6.1.1 Successive Approximation This conversion technique consists of comparing the analog signal against a precise voltage or current generated by a digital to analog converter (DAC). To start the conver- sion the DAC’S MSB output (0.5V,,f) is compared with the sampled input signal. If the input is greater than the DAC’S MSB output, the MSB remains set (HIGH) and the next significant bit is tried. If the analog input is less than the DAC’S MSB output, the MSB is reset (LOW) and the next bit is tried. The process continues in order of descending bit weights until the last bit (the LSB) has been tried. The bit pattern formed by the com- parisons gives the equivalent digital word. In an alternate design a precise resistor net- work is used in place of the DAC. Successive approximation converters are classified as medium speed ADCS with conversion times ranging from 1 to 100|rs [140]. An analog input is converted to an n-bit digital word in approximately n clock cycles. Thus the conversion time is constant and it is independent of the magnitude of the input voltage. The circuit takes up more chip area because the DAC is an integral part of the converter. Moreover, rather complex timing and control circuitry is required. Accuracy, linearity, and speed are primarily affected by the properties of the DAC, and the comparator. In general, the settling time of the DAC and the response time of the comparator are considerably slower than the switching time 102 of the digital elements. Bipolar analog to digital conversion can be achieved by using a Sign bit to choose either V",- or - ,4. 5.6.1.2 Flash or Parallel Flash converters use parallel techniques to achieve very short conversion times of less than 100ns [140]. The ultimate conversion speed is one clock cycle, which would typically consist of set-up and convert phases. Some high-speed architectures comprom- ise speed with area and require more than one clock cycle but less than 11 cycles. Flash converters are used for high speed data acquisition and signal processing applications. For a flash converter W4 is divided into 2"-l levels (1 LSB apart), using a resistive voltage divider network. These reference levels and the analog input is applied simul- taneously to the two inputs of 2"—1 latched comparators. The outputs of the comparators are taken to a digital decoding network that determines the digital output word from the comparator outputs. Many versions of this basic concept exist. For example, the number of voltage levels may be increased or the voltage divider resistor string could be con- nected between wa and - ,4 to achieve bipolar conversion. Unfortunately, the number of elements (comparators, resistors, and decoding logic network) increases geometrically with resolution. For n greater than 6, too much chip area is required. Moreover, the technique requires precision resistors which may not be fabricated using a process compatible with the sensor fabrication. 5.6.1.3 Ramp or Integration This family of converters is popular for the low frequency applications. Its members perform an indirect conversion by first converting to a function of time and then converting from the time function to a digital number using a counter. Relatively longer conversion times result in noise reduction through signal averaging. 103 A Single slope ADC consists of a ramp generator, an interval counter, a comparator, and a counter that generates the output digital word. At the beginning of the conversion cycle, the analog input is applied to the noninverting terminal of the comparator. The counter is reset and the ramp generator begins to integrate the reference voltage, which is applied to the inverting terminal of the comparator. The counter counts until the refer- ence voltage equals the analog input. At this instant the comparator fires and the counter is frozen. The binary number representing the state of the counter is converted to the desired digital word format. Single slope ADC is Simple in operation but it is very sensi- tive to any types of errors in the ramp generator and any variations in the clock fre- quency. An improvement over the single slope design is implemented by adding a discharge cycle for the integrator capacitor, which gives rise to the dual Slope ADC. The basic advantage of this architecture is that it eliminates the dependence of the conversion pro- cess on the linearity and the accuracy of the ramp slope. Initially the analog input is integrated for a specified number of clock pulses. As a second step, a reference voltage of the opposite polarity is applied to the integrator circuit, and now it integrates oppositely A with a constant Slope, because the reference voltage is constant. Counter is stopped when the output reaches zero or a prespecified level, and the binary count of the clock pulses gives the digital word. The dual slope conversion technique offers a number of advantages, foremost being the independence of the resolution of both the capacitance and the clock frequency. This is because they affect both the up-slope and the down-slope in the same ratio. The dual slope technique also offers excellent noise rejection. Since the input voltage is integrated over a period of time, any high-frequency noise riding over the input Signal is cancelled out. Thus, good resolution is relatively easy to obtain and can be varied by adjusting the size of the internal counter and the clock frequency. The dual-slope converters are slow but generally quite adequate for the low frequency applications. Bipolar operation 104 requires the polarity sensing and the reference polarity-switching. 5.6.1.4 Tracking or Servo This class of ADCS is faster than the dual slope converters. The conversion tech- nique in this case uses an internal signal to hack the analog input signal. Again a DAC is used to convert the binary (digital) output from the counter to an analog voltage. The counter starts counting up and the DAC output increases in a staircase fashion, each vol- tage Step corresponding to a particular binary count. When the Staircase voltage exceeds the analog input Signal, the comparator fires and the counter is frozen giving the equivalent digital number. A variation of the above technique is the "servo" type converter which employs an up-down counter. If the output of DAC is less than the analog input, the counter counts up. On the other hand if the DAC output is greater than the analog input, the counter counts down. Its small signal frequency response is good, because it can follow small bidirectional input changes within one clock period. However its slew capability is very poor. The conversion time for this technique is proportional to the magnitude of the ana- log voltage. The DAC requirement increases chip area. Moreover, the converter charac- teristics are dependent on the DAC. For bipolar operation a bipolar DAC is required. 5.6.2 Selection of the Analog to Digital Conversion Technique Four basic classes of the ADCS have been discussed above. Each class has charac- teristics that make it most useful for a specific application, based on the speed, accuracy. cost, size, and versatility. Upon careful examination of the performance of the ADCS and the specific requirements of interface circuit, the dual-lepe integration technique comes out to be the best choice for the following reasons: 105 The major disadvantage of the dual-Slope ADC is its low conversion rate but it is not important because the interface circuit needs only 10 to 40 conversions per second which can easily be handled by a dual slope ADC. The dual Slope technique is very accurate and versatile. It is independent of both the clock frequency and the integrator component values, because they affect both the integration and the de-integration process in the same ratio. This advantage makes it more suitable for batch fabrication and operation over a wider temperature range. The circuit is simple and does not employ a DAC as its integral part, thus econom- izing on chip area. This makes it suitable for on-chip integration. There is no need for a separate sample-and-hold circuit because the first operation step integrates the analog input signal for a predetermined amount of time. This also saves on chip area. The ADC can be made bipolar simply by switching the polarity of the reference voltage. The integration provides rejection of the high-frequency noise and the averaging of the changes that occur during the sample period. The resolution and speed of the ADC can be varied by adjusting the size of the internal counter and the clock frequency. This makes the converter design very flexible. 5.6.3 The Dual Slope ADC This section describes the theoretical details of the dual slope conversion technique. A block diagram of a basic dual slope ADC and its waveforms are shown in Figure 5.6. To start the conversion, the integrator capacitor is discharged (not shown) and the output of the integrator V,- is 0 or some predetermined value V0,. At this instant the counter is reset and the analog input, Va is applied through the switch to the integrator circuit. Va is 106 integrated for an number of clock pulses. At the end of the integration interval the accu- mulated charge on the integrator capacitor is proportional to the average value of the ana- log signal over the interval. Figure 5.6(b) illustrates the conversion process. It is seen that the slope of the voltage V,- is proportional to the magnitude of Va. The voltage V,-(t) during the integration is given by ‘1 mo =K [Vadt + V,-(0) for to < t < t1. (4.2) ‘0 Assuming Va is constant during this interval, V,- at :1 is given by Vi(t 1) = KVaNrechlk + V”! (4.3) where i K = a constant, Va = analog input voltage, Tc”, = time period of the clock, N",- = number of reference clock pulses, V”, = comparator threshold. At t1 the counter is reset and the input to the integrator is switched to - ,4. Now the integrator proceeds with a downward constant slope, because V"; is constant. When V,- becomes less than the value of V”, the counter is stopped and the binary number is converted to a digital word. During this interval, V; is given by ‘2 V,-(t2)=V,-(t1)+K j(—V,,,)dt for r, < r < t2. (4.4) ‘1 107 Vref Reference mput Counter Binary output (a) Block diagram. Vi( t) A Va” Va” > Va’ > Va va’ Va th f"— Nref Tclk +‘ Nout Tclk —>' (b) Waveforms. Figure 5.6. The dual slope ADC and its waveforms. 108 At t = t2, V; is gIVCI'l by vt(r2>= [KI/amber” Va] -Kv,.,~,,,r,,,. (4.5) Since V;(t2) = V0,, it can be Simplified to KVaNrechIk = KVre/NoutTclk: (4-6) 01' V Nora = ref—0° (4.7) Vref Thus, Now, the number of output pulses, is a fraction of N, , the number of refer- ence pulses. Moreover, the output of the converter (Now), is not a function of the thres- hold of the comparator, the Slope of integrator, or the clock frequency. It is also obvious that W4 is inversely proportional to the converter output. W4 is derived from the bridge excitation voltage. Thus any change in the excitation voltage causes a variation in the same direction for the pressure and the temperature bridge outputs. Therefore, variations in the excitation voltage are counteracted by the dual slope conversion technique. 5.6.4 Design of the Dual Slope ADC The bipolar dual SIOpe ADC for digitization of the temperature half bridge output and the difference of piezoresistive and compensation bridge outputs was built using an op-amp, comparators, voltage controlled switches, and passive components. The block diagram along with necessary waveforms and control signals for the circuit is Shown in Figure 5.7. The complete circuit can be partitioned into distinct analog and digital parts. The analog portion was Simulated using PSpice while VHDL was used for the simulation of the digital part. 109 Initially each block was designed and simulated separately to ascertain the correct operation. Subsequently the small portions were integrated to form the complete design. - + Va Va Vrcr Vrer Sign . Integration “—3 Charge detector 813“ + control d— Discharge Si f‘ gn ._J Convert * Integrator + Start Control —> Reset “mu" —> Start i + I . I crossing Charge Discharge detector 1 Clock —> Clock Timing pulse generator Clock * J—L Timing pulse l Counter and register ’d— Reset Ii. . . . .Ii Figure 5.7. Block diagram of the bipolar dual slope ADC. 110 The conversion process starts with a convert pulse from an external source. The integration control connects the analog input to the integrator for a fixed time interval. This generates a ramp in positive or negative direction depending on the polarity of the input Signal. At the end of the interval, the Sign detector selects the reference voltage of the opposing polarity and connects it to the integrator. The integrator output now follows a ramp in the opposite direction. The integrator output is connected to the zero crossing detector whose output is complemented when its input crosses the zero volt reference from either direction. The timing pulse circuit receives its input from the analog circuit. The circuit gen- erates a tinting pulse whose width is proportional to the magnitude of the analog input signal. This pulse is used to gate the clock signal to the counter, which produces an equivalent 10-bit digital word and Stores it in the register. The counter is a lO-bit synchronous counter which Operates during the charge as well as the discharge phase of the integrator circuit. The counter output is transferred to a 10-bit register at the completion of the conversion cycle. Inputs to the control circuit are the convert pulse and the second most significant bit from the counter. The convert pulse remains high for a time sufficient to reset the counter and other control circuit blocks. The control circuit produces start pulse, charge pulse, discharge pulse, and reset pulse for the ADC counter and the integrator capacitor. In this section, first the design specifications are set for the dual slope ADC. Then, architectures for the analog and digital parts of the’ ADC circuit are described. 5.6.4.1 Design Specifications The bipolar dual SIOpe ADC was designed for an analog input range of 0 to 5V or 0 to -5V. The analog input represents a pressure range of 0 to 45psi. As a first step, a Study was done to select various parameters of the ADC and to define its specifications. 111 The major portion of conversion time is taken by the integrator circuit. This time is determined by the clock frequency, digital word Size, and the reference voltage. The maximum value of the input voltage is 5V. Initially the reference voltage was set to 5V but later it was lowered to 2.5V. The lowering of the reference voltage cuts the integra- tion time in half while maintaining the same resolution. The reference voltage of 5V needs 2048 clock pulses while 1536 pulses are required for the reference voltage of 2.5V. The waveforms for the two cases are shown in Figure 5.8. 7 ° I 0 512 1024 1536 2048 Number of Clock Pulses Figure 5.8. The charge and the discharge time for an = 5V and 2.5V. The next Step was to select the clock frequency and the word size. These two parameters determine the speed and resolution of the converter, respectively. ADCS with word lengths of 8 to 12 bits have been reported in the literature [2,126]. The conversion speed of 1 to 100 conversion/second has been reported for the existing dual slope ADCS [140]. Increasing the frequency for a given design (integration time) reduces the resolu- tion of the ADC. To keep the same resolution a higher charging current is needed which may introduce nonlinearity in the ramp. Another factor in selecting the frequency is the noise frequency, if known. To average out noise, the integration time should be a 112 multiple of the noise frequency period. With this understanding word lengths of 8, 10, and 12-bits and clock frequencies of 50KHz and 60 KHz were considered initially. Table 5.2 summarizes results of various combinations of these two parameters and the refer- ence voltage. Table 5.2. ADC characteristics as functions Of word length, frequency, and reference voltage. Number , Number of Conversions per Second Resolution of bits 50KI-Iz 60KI-lz mV psi V,,f=5V V,4=2.5V V,4=5V V,,f=2.5V 8 19.53 0.1758 97.66 130.21 117.19 156.25 10 4.88 0.0439 24.41 32.55 29.30 39.06 12 1.22 0.0109 6.10 8.14 7.32 9.77 It may be noted that the conversions/sec are approximate since they do not include the time taken by digital circuit which is negligible compared to the-time taken by the integrator circuit. To obtain a reasonable resolution and conversion Speed, a fiequency of 50KHz and a word length of lO-bits was selected for the interface circuit. It provides 32 conversion/second with a resolution of 4.88mV. The design is very flexible and any fie- quency or word length may be selected to suit a particular application without making any changes in the basic design. The only modification required to the circuit will be the change of clock frequency and change the length (number of flip flops) of the counter and the register. The resulting ADC characteristics for the selected reference voltage. 113 frequency, and word length are summarized in Table 5.3. Table 5.3. Characteristics of the bipolar dual slope ADC. Parameter Value Analog input voltage 0 to 5V or 0 to -5V Digital output word 10 bits Reference voltage i2.5V Voltage resolution 4.88mV Pressure resolution 0.0439psi 0.0029 atmosphere 2.8millibar Oscillator frequency 50KI-Iz Number of conversions 32.55/sec Integration time 512 pulses 10.24ms Maximum de-integration time 1024 pulses 20.48ms 5.6.4.2 Analog Circuit for the ADC The heart of the analog portion of the ADC circuit is the integrator. An array of vol- tage controlled switches selects various voltages. Two zero crossing detectors determine the polarity of the analog input signal and the polarity switching of the integrator output. The PSpice code for the complete analog circuit is included in Appendix C2. The analog portion of the bipolar dual slope ADC is shown in Figure 5.9. The architectural and func- tional details for this circuit are described in this section. 114 .Oo< 8% sec 585 be toe ease moses 2:. a.“ some vm. . _ _ / CAM mm .H mm_ flemma ll owes—Lemma om .Il mm w 6 K / =me + 50> I NM :— U M as tl— Em 0am / o a> 2 mm / I 8% embezu Co + > 1 15 5.6.4.2.] Sign Detector A Sign detector was implemented using the LM139 comparator and some passive components; the circuit being extracted from a library [141]. The comparator operates from a single 5V supply. The output of the detector is close to 5V for an input greater than 0 and near zero otherwise. The transfer characteristic for the detector circuit is shown in Figure 5.10. The detector is being used to sense the polarity of the input signal. The output of the detector is used to select the polarity of the reference voltage. The out- put is also used by the timing pulse circuit in the digital portion of the circuit. 5 4— ‘. Output 3 _ 1 Voltage I. (V) 2 - : 1— a g 0 I I l -0.1 -0.05 0 0.05 0.1 Input Voltage (V) Figure 5.10. The transfer characteristics of the zero crossing detector. 5.6.4.2.2 Integration Control The integration control consists of four voltage controlled switches arranged to select the analog input signal or the reference voltage of either polarity. The ON and OFF resistance of the switches is 4009 and 1012!), respectively. The resistance varies con- tinuously in this range. The ON voltage for S4 is 1V and the OFF voltage is 3V. For the 116 other switches the ON voltage is 3V and the OFF voltage is IV. 81 and 82 are controlled by the positive going charge and discharge control pulses provided by the control circuit. 83 and S4 are operated by the output of the Sign detector. The switches are complement of each other, thus only one of these is closed at any one time. The transfer characteristics of the switch are shown in Figure 5.11. Initially the ana- log input voltage is connected to the integrator for 512 clock pulses and then the refer- ence voltage of opposing polarity is connected for the duration of the cycle. 5 r . 'I 4 _ I I Output 3 _ : Voltage 'I (V) 2 - ; 1 — I t' I O I [J I I 2 3 4 5 Input Voltage (V) Figure 5.11. The transfer characteristics of the switch. 117 5.6.4.2.3 The Integrator Circuit The integrator is composed of the op-amp, a resistor, a capacitor and a voltage con- trolled switch. The op-amp is same as discussed in Section 4.4.2. At the start of a new conversion cycle the capacitor is quickly discharged by closing 85 by the start pulse from the control circuit. Then, the analog input is integrated for 10.24ms, which is followed by integration of the reference voltage of the opposing polarity. This generates a ramp in the opposite direction. The time taken by the integrator output to become zero again will depend on the magnitude of the analog input with a maximum value of 20.48ms. Since the reference voltage is constant, the slope of the discharge ramp is also constant. Thus the time taken to completely discharge the capacitor is proportional to the magnitude of the capacitor voltage which in turn is determined by the magnitude of the analog input signal. The ramp generated by the integrator is given by =—, 4.8 V0 RC! ( ) The maximum value for VC, the integrator capacitor voltage, is 5V and the max- imum value for t is 10.24ms. For a maximum output of 5 volts the overall value of the time constant is 10.24ms. Various combinations of R and C were tried to obtain better charging and discharging characteristics for the integrator (linear ramp). Based on the results, R1 is set to 1.3M!) and C 1 to 8.3nF. The integrator waveforms and the start pulse for the integrator capacitor are shown in Figure 5.12. The waveforms in Figure 5.12 are for a sample input of -3.5V with a reference voltage of 2.5V. 118 5 r Integrator input 2.5 t I Voltage o ..................... ., (V) I I -25 — '5 I I 0 0.009 0.018 0.027 Time (sec.) Figure 5.12. The integrator waveforms. 5.6.4.2.4 Zero Crossing Detector The zero crossing detector at the output of the integrator detects the completion of the discharging of the integrator capacitor (integrator output = 0). This point may be approached from either direction depending on the polarity of the input signal. In either case, the output of the detector is complemented at the completion of the discharge phase. The zero crossing detector circuit is same as the Sign detector described in Sec- tion 4.6.4.2.1. 5.6.4.2.5 Performance of the Analog Circuit The analog portion of the ADC was simulated and tested separately by applying voltages from -4.99V to +4.99V in 0.5V increments. The Start, charge, and discharge control pulses for the integrator circuit were set to 40p.s, 10.24ms, and 20.48ms, respec- tively. The timing diagram (waveforms) for an analog input of -3.5V is as shown in 119 Figure 5.12. The variation of the discharge time and the maximum voltage across the integrating capacitor with analog input voltage is shown in Figure 5.13 and Figure 5.14, respectively. The discharge time represents the magnitude of the analog input signal. As indi- cated in the Figure 5.13, the time varies linearly with the analog voltage. The discharge time is converted to a timing pulse which is fed to the digital portion of the converter cir- cuit for conversion to a corresponding digital word. 5.6.4.3 Digital Circuit for the ADC The function of the digital part of the circuit is to convert the timing pulse to a corresponding 10—bit digital word. It is also responsible for generating the tinting and control Signals for the entire circuit. The circuit diagram for the digital section of the ADC is shown in Figure 5.15. The VHDL code for the circuit is Shown in Appendix D. The architectural details for this circuit are presented in this section. 5.6.4.3.1 Timing Pulse Generator The timing pulse generator Simply consists of three gates. The XOR gate is used as a controlled complementer for the zero crossing detector output. The Signal is comple- mented only if the analog input is negative, otherwise it is passed as is. The first gate is used for ANDing the XOR gate output and the discharge control Signal. The output of this gate is a positive pulse of 5V, irrespective of the polarity of the analog input signal. The duration of this pulse is proportional to the magnitude of the analog input signal. Even if the input voltage polarity switches for some pressure or temperature values, the ADC operation will be unchanged. The OR gate is used to provide the clock signal to the counter during the charge and the discharge phases. 120 25 Positive input ..... Negative input 20 — 15 — Time (m8) 10 1 5 _ 0 I I I I 0.5 1.5 2.5 3.5 4.5 Magnitude of the analog input voltage (V) Figure 5.13. The discharge time. 5 Positive input ..... Negative input Output (V) I I I I 0.5 1.5 2.5 3.5 4.5 Magnitude of the analog input voltage (V) Figure 5.14. The maximum integrating capacitor voltage. 121 One Ch arge Q9 Control 2 X 4 Shot counter Decoder Tic Disch e Convert T iIL OR arg Preset Start ‘0’ D Q flip-flop OR Sign Reset From _ analog . section ADC Counter , Q10Q9° " ' 'Q2Q1 Load Register Q10 Q9 Q2 Q1 Figure 5.15. The digital section of the ADC. 5.6.4.3.2 The ADC Counter and Register The clock produces a SOKHz Signal for the circuit. The ADC counter is used to con- vert the timing pulse into a lO-bit digital word. The ADC counter is synchronous made up of JK flip-flops and AND gates. The register is composed of the D flip-flops with a 122 parallel-in-parallel out facility. The output of the timing pulse generator is used to gate the clock Signal to the counter. The counter is used in the charge as well as the discharge phase. In the charge phase it counts to 512 and then is reset by a pulse form the control circuit. During the charge phase the control circuit also produces the positive pulse to connect the analog input signal to the integrator. At the end of the charge phase, a posi- tive pulse switches the integrator input to the reference voltage of the appropriate polar- ity. The counter is reset and it starts counting again. The discharge phase is completed when the output of the zero crossing detector is complemented. The count for this phase depends on the magnitude of the analog signal being converted, with a maximum value of 1024. At the end of this phase, a pulse from the control circuit inhibits the clock to the counter thus freezing the count. At this instant the counter output is loaded, in parallel, into the lO—bit register. The falling edge of the clock inhibition pulse is used to control this action. 5.6.4.3.3 Control Circuit The control circuit is responsible for timing the events of the ADC circuit. The con- trol circuit is composed of a 2-bit counter, a D flip-flop, a 2x4 decoder, a one shot and some glue logic. The conversion cycle is started by the positive going convert pulse. The duration of the pulse should be sufficient to discharge the integrator capacitor. For an 8.3nF capacitor and 4009 ON resistance of the switch, the pulse width should at least be 17115. The convert pulse sets the D flip-flop which normally is kept in the reset State. The positive pulse produced by the D flip-flop is used to discharge the capacitor and reset the two counters and the decoder. The second most significant bit from the ADC counter is used as a clock signal for the 2-bit control counter. The negative edge triggered control counter is composed of two JK flip-flops. The counter output is used to select the outputs of the 2x4 decoder. For the first 512 clock pulses, 01 remains high and provides the charge pulse. The falling edge 123 of this pulse triggers a one Shot which provides a positive going pulse of 40ns duration. This pulse is used to reset the ADC counter which starts counting again for the discharge phase. For the next 1024 pulses (control counter = 01 and 10), 02 and 03 go high during the first and the second half of the counting, respectively. These outputs provide a posi- tive pulse for the discharge phase. Note that this phase will be interrupted by a pulse from the timing pulse circuit before it reaches the maximum count. This is done by inhi- biting the clock pulses to the ADC counter. The falling edge of the timing pulse is also used to parallel load the frozen count into the output register. 5.7 The Half Bridge Compensation Hardware The digital circuit for the implementation of the half bridge temperature compensa- tion technique is shown in Figure 5.15. The function of the circuit is to shift the output of the temperature half bridge and then add it to the pressure output derived from the differ- ence of the compensation and the piezoresistive bridges. The pressure output is always positive whereas the temperature output may either be positive or negative. Moreover, the magnitude of the temperature output is smaller than half the pressure output and thus it can fit in a 9 bit register. At the end of the conversion cycle the output of the two ADCS is stored in the pres- sure and the temperature registers. The temperature output is divided by two by ignoring the LSB and hardwiring the remaining 8 bits to the shifting circuit. The shifting of the temperature register contents is implemented by an array of 8, 2-to-3 multiplexers. Zeros are hardwired to M7 and M8, to pad the high order bits of the temperature signal for 2 . and 3-bit shifts. The control inputs (number of shifts), co and CI, to the multiplexers are determined by the three higher order bits of the pressure output. A simplification of the Boolean function yields co and (:1 as p10 and 510 p9, respectively. The Sign bit of the temperature bridge output is stored in the MSB of the temperature register. 124 FromADC FromADC Pressure register . l Temperature register I II.'....II- 41.....11 91099 P2 P1 51%“ T9 ' T2 T1 ‘0’ ‘0' T9 ‘0’ T9 r3 r9 r8 r7 t8 t7 t6 Pro‘O’ P9 ‘0’ P8 ‘8 P2 t2 P1 t1 I 10-Bit controlled adder I17 Sign 311 s10 . s2 81 Figure 5.16. Hardware for the half bridge temperature compensation technique. The shifted temperature output and the pressure output are added by a 10-bit con- trolled adder circuit to produce a temperature compensated output for the sensor. Zeros are hardwired in the t9 and (10 bit positions of the adder to make the temperature signal a 10-bit number. 1’s complement or 2’s complement implementations may be used for the controlled adder circuit. The hardware and the time delay requirements for the two approaches are similar. In both cases the Sign bit and an array of XOR gates is used to obtain the controlled complementation of the shifted temperature output. For, the 2’s 125 complement approach the sign bit is also used as the carry input to the adder. 5.8 Summary The interface hardware for the piezoresistive pressure sensors has been described. The major design decisions for the circuit have been documented. First, the design objectives and the philosophy were outlined followed by a description of the architectural and functional details of the circuit. The outputs of the piezoresistive bridge and the compensation bridge are amplified and converted to a single ended Signal. The amplified signals from the two bridges are subtracted using an op-amp based analog subtraction circuit. The output of the subtractor circuit is a 0 to 5V or 0 to -5V signal. The use of analog subtraction has eliminated the need for a separate bipolar ADC, the digital subtractor circuit, and the additional digital control circuitry. This yields a substantial saving in the chip area. The dual slope AID conversion has been identified as a Simple and precise conver- sion technique, suitable and compatible for on-chip integration with the sensor. The con- verter response is not a function of the slope of the integrator and the clock frequency. The converter design is flexible to allow changes in Speed, and accuracy to suit a particu- lar application. The bipolar dual Slope ADC with a word length of 10-bits and the clock frequency of 50KI-lz has been designed and tested. The Sign bit is stripped off at the first stage and the ADC essentially converts the magnitude of the analog voltage to the digital word. The Sign bit is used for the operation of the ADC and the half bridge temperature compensation technique. It is also available as a 0/5V signal which may be used else- where. The 10-bit ADC design actually provides an 11 bits of resolution. In terms of pressure, the resolution is 0.439psi (4.88mV). Two ADCS have been used for the digitization of the half bridge output and the difference of the piezoresistive and compensation bridge outputs. The digital output is Stored in the registers and processed further by digital circuit to generate the temperature 126 compensated output signal. The circuit is simple requiring modest chip area. It can be implemented using stan- dard IC techniques. Use of ratios instead of absolute values and the dual slope AID conversion technique reduces the circuit sensitivity to the temperature and the processing variations. The design is flexible and modular. Thus, it can very easily be modified to suit the accuracy and other requirements for a specific application. CHAPTER 6 CONCLUSION The objective of is research was to develop an interface circuit for the amplification, temperature compensation, and digitization of the piezoresistive pressure sensors for a temperature range of -40°C to 130°C over a pressure range of 0 to 45 psi. The objective has been accomplished. The sensor is modeled form from the viewpoint of batch fabrication and its performance Simulated over the desired pressure and temperature range. A new temperature compensation technique has been developed and its effectiveness evaluated over the desired pressure and temperature range as a function of the tracking errors. The hardware for the amplification temperature com- pensation, and the digitization hardware of the sensor has been designed and verified. The next section summarizes the major results of this research and outlines the contri- butions made in the field of smart integrated piezoresistive pressure sensors. This is followed by the identification of the issues for further research in this field. 6.1 Summary and Contributions To provide an understanding of the physical structure and its effects and demands on the interface electronics, an in-depth review of existing piezoresistive pressure sen- sors and their associated electronics has been carried out. The review focused on four key areas: silicon mechanical structures, the associated interface electronics, tempera- ture compensation techniques, and modeling and simulation of piezoresistive pressure SCIISOI'S. 127 128 The sensor model has been developed from the viewpoint of simulating the sensor I/O characteristics as a function of pressure, temperature, and processing variations. The model includes the effects of temperature, resistor mismatch, and structural details of the sensor. The model parameters have been discussed with reference to the previous litera- ture. The values for the model parameters were deduced from these discussions and reviews. Various piezoresistors layouts on the diaphragm were discussed and simulation results for the ideal sensor, with no tracking errors, were presented. The sensor model was enhanced to include the batch fabrication effects. :l:20% variations in the piezoresis- tors values were modulated with i2.5% variations to represent the wafer-to-wafer and same wafer variations, respectively. SENSIM, the sensor simulation program for piezoresistive and capacitive pressure sensors was used to run the simulations. The program has been validated through com- parison with the experimental data from actual devices. The simulation results provide the worst case error band for sensors coming from the same wafer or different wafers. The simulation results have been used to Study the temperature response of the sensor as a function of tracking errors. All sensor parameters are functions of temperature and the tracking errors. The sensor output is a function of temperature even for the sensors with no tracking errors. The zero pressure offset is also temperature dependent. A new temperature compensation technique for the piezoresistive pressure sensors was presented The technique has been implemented in two parts, using a compensation bridge and a temperature half bridge. The first part makes use of two bridges: a piezoresistive bridge fabricated on the thin diaphragm and an identical compensation bridge located on the bulk part of the sensor chip. Output of the first bridge is a function of pressure, temperature, and processing variations whereas the compensation bridge response is dependent on temperature and processing variations only. The difference of the two bridge outputs removes the zero pressure offset and the variations caused by the on-chip tracking errors. The second part of the technique uses a temperature half bridge 129 located on the bulk part of the chip to generate the temperature signal. This signal and some digital circuitry is used to remove the remaining temperature dependency fiom the sensor output. The double bridge technique is very effective for the zero pressure offset and the temperature errors caused by the same wafer processing variations. The zero pressure offset is reduced below the measurement precision limit for the entire pressure and tem- perature range. The output errors for the sensor, caused by the same wafer variations, are reduced by a factor of 100. The output of the double bridge technique compensates sufficiently for same wafer variations but still shows temperature dependency caused by the temperature sensitivity of the piezoresistive coefficients. The remaining temperature errors for the sensor output are removed by the second part of the compensation tech- nique. The technique is very effective for the pressure values below ,35psi and provides reasonable results for the higher pressure values. The possible use of software approach to implement part of the compensation technique has also been outlined and discussed. The new temperature compensation technique has very convincing advantages. The compensation circuitry is structurally simple and suitable for batch fabrication. It is implementable using the available IC fabrication technologies. The technique does not require the compensation of the individual units under sensor operating conditions. Moreover, no external components are required for the implementation of the technique. The hardware for the amplification, temperature compensation, and the digitization of the sensor output has been designed and simulated. The simulations of these com- ponents, however, have been carried out at the room temperature. The analog portion of the circuit was Simulated with PSpice 4.03 and the digital portion with the VHDL. Final component level design of this hardware must ensure the correct operation of the circuit over the desired temperature range. The outputs of the piezoresistive bridge and the compensation bridge are amplified and converted to a single ended signal. The amplified signals from the two bridges are 130 subtracted using an op-amp based analog subtraction circuit. The operation of these cir- cuits is determined by the ratio of the resistors rather than the absolute values. Thus their output is less sensitive to temperature changes and the component tolerances caused by the processing variations. The use of analog subtraction has eliminated the need for a separate bipolar ADC, the digital subtractor circuit, and the additional digital control cir- cuitry. This yields a substantial saving in the chip area. The dual slope AID conversion has been identified as a simple and precise conver- sion technique, suitable and compatible for on-chip integration with the sensor. The con- verter response is not a function of the slope of the integrator and the clock frequency. The converter design is flexible to allow changes in speed, and accuracy to suit a particu- lar application. The bipolar dual Slope ADC with a word length of 10-bits and the clock frequency of 50KHz has been designed. The Sign bit is stripped off at the first stage and the ADC essentially converts the magnitude of the analog voltage to the digital word. The Sign bit is used for the Operation of the ADC and the half bridge temperature com- ' pensation technique. It is also available as a 0/5V signal which may be used elsewhere. Thus the 10-bit ADC design actually provides 11 bits of resolution. In terms of pressure, the resolution is 0.439psi (4.88mV). Two ADCS have been uSed for the digitization of the half bridge output and the difference of the piezoresistive and compensation bridge outputs. The digital output is Stored in the registers and processed further by the digital circuitry to generate the temperature compensated output signal. The digital circuit is composed of two registers, a controlled adder circuit, and a shifting mechanism. The temperature compensation technique is structurally simple and suitable for batch fabrication. The resulting interface circuit is simple, requiring modest chip area. It can be implemented using standard IC fabrication techniques. Use of the dual slope AID conversion technique and the resistor ratios instead of absolute values reduces the circuit sensitivity to temperature and the processing variations. The design is flexible and modu- lar. Thus, it can be easily modified to suit the accuracy and other requirements for a 131 specific application. The complete or part of the interface circuit may be integrated with the sensor. In the later case, the compensation bridge, the temperature half bridge, and the amplification circuits may be placed on the sensor chip and rest of the circuit fabri- cated on a separate chip. All these features make the interface circuit very cost effective, the ultimate objective for the design of the interface. 6.2 Future Research Piezoresistive pressure sensors are being successfully used for the measurement of many physical parameters such as pressure, force, motion and acceleration, and vibration and frequency. With the advancement in the integrated circuit and the micromachining technologies, silicon based smart sensors can be miniaturized and have a great potential as a low cost, high performance devices for many applications. This section outlines some of the issues that must be addressed in order to ensure the continued advancement of the smart sensors, focusing on those concerns of special interest to the computer engineers. The first issue is the continuation of this research and advancing the work which has been accomplished in this research. To complete the interface design, the first step is the fabrication of , the interface circuit and comparison of experimental results with the simu- lation results. As a second step the sensor and the interface circuit may be integrated on the same chip and their performance evaluated over the desired pressure and the tempera- ture range. The digital part of the compensation circuitry is structurally simple, utilizing regis- ters, a controlled adder and multiplexers to implement the shifting. This part may also be implemented in the software as outlined in Section 4.5.2.4. The digitized output of the temperature half bridge and the difference of compensation and piezoresistive bridge out- puts may be read and processed by a microcomputer. The performance of the hardware and the software approaches may be compared and the application areas for the two may 132 be further specified. Although the major part of the interfacing has been accomplished, fulfillment of the complete smart sensor concept requires integration of more electronic functions into the interface circuit. The first being the calibration of the sensor output. Digital calibration implemented through hardware and software techniques requires further exploration. The autocalibration of the sensor may be used by subjecting the sensor to the known pressure values and storing the sensor output in a EEPROM. It is inherent in the smart sensor concept that the sensor be addressable and capable of communicating with a central processor and other sensors. The minimum requirement is to add the address decoding logic to allow the sensor to be part of a bus architecture. Depending on a Specific application and the available resources, more hardware and/or software may be used to add the intelligence to the sensor unit. Moreover, presently there are no communication Standards and protocols for the sensors. A key in the mass usage of the smart sensors will be the development of standard connection schemes, protocols, and central control and analysis algorithms. A final issue is the investigation of the new materials and techniques for raising the operating temperature of the sensor and the companion electronics above 300°C for the high temperature applications. Wider band gap materials (diamond, gallium arsenide, and silicon carbide) and miniature vacuum devices are some of the candidates being investi- gated for the high temperature applications. With the deveIOpment of these new tech- niques there will be a need for the development of the design automation tools for these techniques. New models and simulation techniques will be required to analyze the pro- cessing and operating characteristics of these new devices, and identify the parameters to be compensated and corrected. The existing simulation programs, sensor models, and compensation techniques may be used as the parallel examples for the future work on the new devices. APPENDICIES APPENDIX A SENSIM SIMULATIONS APPENDIX A SENSIM SIMULATIONS A.l Sensor Structures and Model Parameters SNSS: Structure-2, No tracking errors. RP = 2K RST = 200 TCR = 1.9E-3 RT = 1K RST = 200 TCR = 1.9E-3 SNSSl: Structure-2, +2.5% tracking errors. RP = 2K RST = 200 TCR = 1.9E-3 RT = 1.025K RST = 205 TCR = 1.925E-3 SNSSZ: Structure-2, -2.5% tracking errors. RP = 2K RST = 200 TCR = 1.9E-3 RT = 0.975K RST = 195 TCR = 1.875E-3 SNSSa: Structure-2, +20% tracking errors. RP = 2.4K RST = 240 TCR = 2.1E-3 RT = 1.2K RST = 240 TCR = 2.1E-3 SNSSa1:Structure-2, +2.5% tracking errors from snSSa (20%) RP = 2.4K RST = 240 TCR = 2.1E-3 RT = 1.23K RST = 246 TCR = 2.125E-3 SNSSa2:Structure-2, -2.5% tracking errors from snSSa (20%) RP = 2.4K RST = 240 TCR = 2.1E-3 RT = 1.17K RST = 234 TCR = 2.075E-3 SNSSb: Structure-2, -20% tracking errors. RP = 1.6K RST = 160 TCR = 1.7E-3 RT = 0.8K RST = 160 TCR = 1.7E-3 SNSSb1:Structure-2, +2.5% tracking errors from snSSb (-20%) RP = 1.6K RST = 160 TCR = 1.7E-3 RT = 0.82K RST = 164 TCR = 1.725E-3 SNSSb2:Structure-2, -2.5% tracking errors from snsSb (-20%) RP = 1.6K RST = 160 TCR = 1.7E-3 RT = 0.78K RST = 156 TCR = 1.675E-3 133 134 A.2 The Simulation Code for the Sensor with no Tracking Errors * PRPS-snsS Structure-2 No tracking errors * .PARAM LEVEL=3 SYM=4 GSIZE=25U * PIEZORESISTORS * RPl 2 3 2K PAR W=10U L=100U YCNT=475U XCNT=0 RP2 5 0 2K PAR W=10U L=100U YCNT=475U XCNT=0 RTll 1 2 1K PAR W=10U L=50U XCNT=455U YCNT=15U RT12 l 0 1K PAR W=10U L=50U XCNT=455U YC =-15U RT21 3 4 1K PAR W=10U L=50U XCNT=455U YCNT=15U RT22 4 5 1K PAR W=10U L=50U XCNT=455U YCNT=-15U * INDEPENDENT VOLTAGE SOURCE * VDD 3 0 DC 5 RS=0.0001 * STRUCTURAL ELEMENTS * DIAPH 3 SILICON UNIFORM L=1000U ANGLE=45 LSIOZ 4 OXIDE TYPE=1 H0=1U T=800 LPYREX 5 PYREX TYPE=2 H0=200U H1=200U T=450 * MODEL CARDS * .MODEL PAR PIEZOR(NSUB=1.0E16 XJ=2.7U RST=200 TCR=1.9E-3) .MODEL SILICON M (81 1=.764P 812=-.214P S44=1.256P ALPHA=2.65E-6) .MODEL OXIDE M (E=6.6E11 G=l.188E11 PO=0.18 ALPHA=0.5E-6) .MODEL PYREX M(E=6.1E10 G=2.67E10,PO=0.1,ALPHA=4.3E-6) .MODEL UNIFORM DIAPH(HO=10U H1=200U) * TEMPERATURE LOOP * .TEMP -40 40 10 ***.TEMP 50 130 10*“ * PRESSURE LOOP * PRESSURE 0 20 5 PSI ***.PRESSURE 25 45 5 PSI*** * OUTPUT * .PRINT .P RPl RTll .PRINT .P VOUT(2,5) .END 135 A.3 The Simulator Output for the Sensor with no Tracking Errors *****************************t********#**********************#*t******** * PRPS-snSS Structure-2 No tracking errors * 13:26:35 10-15-1991 (SENSIM 4. OCT. .1981) #*********************************************************************** * LIST OF SOURCE PROGRAM * * PRPS-snSS Structure-2 No tracking errors * .PARAM LEVEL=3 SYMfl GSIZE=25U * PIEZORESISTORS * RPl 2 3 2K PAR W=10U 1:100U YCNT=475U XCNT=0 RP2 5 0 2K PAR W=10U L=100U YCNT=475U XCNT=0 RTll 1 2 1K PAR W=10U L=50U XCNT=455U YCNT=15U RT12 1 0 1K PAR W=10U L=50U XCNT=455U YCNT=-15U RT21 3 4 1K PAR W=10U L=50U XCNT=455U YCNT=15U RT22 4 5 1K PAR W=10U L=50U XCNT=455U YCNT=-15U * INDEPENDENT VOLTAGE SOURCE * VDD 3 0 DC 5 RS=0.0(X)1 * STRUCTURAL ELEMENTS * DIAPH 3 SILICON UNIFORM L=1000U ANGLE=45 LSIOZ 4 OXIDE TYPE=1 H0=1U T=800 LPYREX 5 PYREX TYPE=2 H0=200U H1=200U T=450 * MODEL CARDS * .MODEL PAR PIEZOR(NSUB=1.0E16 XJ=2.7U RST=200 TCR=1.9E-3) .MODEL SILICON M (81 1=.764P 812=-.214P S44=1.256P ALPHA=2.65E-6) .MODEL OXIDE M (E=6.6E11 G=1.188E11 PO=0.18 ALPHA=0.5E-6) .MODEL PYREX M(E=6.1E10 G=2.67E10,PO=0.1,ALPHA=4.3E-6) . .MODEL UNIFORM DIAPH(H0=10U H1=200U) * TEMPERATURE LOOP * .TEMP -40 0 10 ***.TEMP 50 130 10*" * PRESSURE LOOP * .PRESSURE 10 20 5 PSI ***.PRESSURE 25 45 5 PSI*** * OUTPUT * .PRINT .P RPl RTll .PRINT .P VOUT(2,5) .END ****************tit************************t*****#*********************** * PRPS-snsS Structure-2 No tracking errors * 136 13:26:35 10-15-1991 (SENSIM 4. OCT. .1981) ************************************************************************* m INPUT DATA SUMMARY m * RESIST ORS * NODEl NODEZ VALUE TCR W (MICRON) L (MICRON) RPl 2 3 0.20000d+04 0. 19000d-02 10.00 100.00 RP2 5 0 0.20000d+04 0.19000d-02 10.00 100.00 RT] 1 1 2 0.10000d+04 0.19000d-02 1011) 50.00 RT12 1 0 0.10000d+04 0.19000d-02 10.(X) 50.00 RT21 3 4 0.10000d+04 0.19000d-02 101]) 50.00 RT22 4 5 0.10000d-I-04 0. 19000d-02 10.00 50.00 VDD 3 0 05le RS OR G0 = 0.10000d-03 CENTER(X,Y) ( 0.00, 475.00) ; PRESSURE SENSITIVE R. ( 0.00,-475.00) : PRESSURE SENSITIVE R. ( 455.00, 15.00) ; PRESSURE SENSITIVE R. ( 455.00, -15.00) ; PRESSURE SENSITIVE R. (455.00, 15.00) ; PRESSURE SENSITIVE R. (455.00, -15.00) ; PRESSURE SENSITIVE R. * PIEZO-RESISTIVE COEFFICIENTS FOR P-TYPE DIFFUSED LAYER ( X 1.0E-12 CM**2/DYNE ) AT T = 27.00 C P111, P112, P144 * COEFF. ALONG THE CRYSTALOGRAPHIC AXIS P(L) : COEF. FOR NORMAL STRESS (PARALLEL TO CURRENT ) P(T) : COEF. FOR NORMAL STRESS (TRANSVERSE TO CURRENT) P(SHEAR) : COEF. FOR SHEAR STRESS IN X-Y PLANE R-NAME MOD. NAME PI(L) PI(T) PI(SHEAR) TCPI(PPM) RPl PAR 57.47 -51.97 0.00 -2308.29 RP2 PAR 57.47 -5 1.97 0.00 -2308.29 RT] 1 PAR 57.47 -51.97 0.00 -2308.29 RT12 PAR 57.47 -5 1.97 0.00 -2308.29 RT21 PAR 57.47 -5 1.97 0.00 -2308.29 RT22 PAR 57.47 -5 1.97 0.00 -2308.29 P11 1 P112 P144 6.60 -1. 10 109.43 6.60 -1.10 109.43 6.60 -1.10 109.43 6.60 -1.10 109.43 137 6.60 -l.10 109.43 6.60 -1.10 109.43 * STRUCTURAL ELEMENTS * DIAPHRAGM ; LENGTH = 1000.00 MICRON EDGE DIRECTION = 45.00 DEGREE EDGE CONDITION = 0.00000d+00 THICKNESS MODEL = UNIFORM (TYPE = 0) NAME MATERIAL H (MICRON) TEMP. YOUNG“S MODULUS DIAPH SILICON 10.00 0.00 0.1697 8d+13 4 1.8102 OXIDE 1.00 800.00 0.66m0d-i-l2 U) POISSON’S RATIO SHEAR MODULUS ALPHA 0.66214d-01 0.62267d+12 0.26500d-05 0.18000d+00 0.1 l880d+12 0.500(0d-06 NAME MATERIAL H (MICRON) TEMP. YOUNG’S MODULUS 3 DIAPH SILICON 200.00 0.00 0.16978d+13 5 LPYREX PYREX 200.00 450.00 0.6 roood+1 l POISSON'S RATIO SHEAR MODULUS ALPHA 0.66214d-01 0.62267d+12 0.26500d-05 0.10000d+00 0.26700d-I-l l 0.430(XJd-05 * SENSOR ANALYSIS METHOD "' FOR INSIDE DIAPHRAGM ANALYSIS ; DEFLECTION/STRESS LEVEL = 3 : FINITE DIFFERENCE METHOD (DMS) MULTI-LAYERED DIAPHRAGM. GRID SIZE = 26.32 MICRON * ANALYSIS TYPE * PRESSURE = 0.10000d+01 0.2(XDOd+02 0.50000d+01 PSI ************************************#*****tit******#********#*************** * PRPS-snSS Structure-2 No tracking errors * 13:26:35 10-15-1991 (SENSIM 4. OCT. . 1981) **************************************************************************** 138 TRANSFER FUNCTION: INPUT (PRESSURE = 0.10d+10 0.200d-I-02 0.5(XJd+01 PSI * PRESSURE SENSITIVE RESISTORS * TEMPERATURE = 40.000 DEGREE (C) PRESSURE PSI RPl RTll 0.1m00d+02 0.1599742d+04 0.9419248d+03 0.15000d+02 0.1526553d+04 0.9763570d+03 0.20000d+02 0.1453364d+04 0.1010789d+04 * PRESSURE SENSITIVE RESISTORS * TEMPERATURE = -30.000 DEGREE (C) PRESSURE PSI RPl RTll . 0.1(D00d+02 0.1637500d-IO4 0.9610387d+03 0.15000d+02 0.156419ld+04 0.9955285d+03 0.2m00d+02 0.1490882d+04 0.1030018d-I-04 * PRESSURE SENSITIVE RESISTORS * TEMPERATURE = -20.000 DEGREE (C) PRESSURE PSI RPl RTll 0.10000d+02 0.1675384d+04 0.9800924d-I-03 0.15000d+02 0.1602019d+04 0.1014610d+04 0.2m00d+02 0.1528654d+04 0.1049127d+04 * PRESSURE SENSTTIVE RESISTORS * TEMPERATURE = -10.000 DEGREE (C) PRESSURE PSI RPl RTll 0.1(XIOOd-I-02 0.1713396d+04 0.9990857d+03 0.15000d+02 0.1640038d+04 0.1033601d+04 0.2(XJ00d+02 0.1566680d+04 0.10681 16d+04 139 * PRESSURE SENSTTIVE RESIST ORS * TEMPERATURE = PRESSURE PSI 0. 1m00d+02 0. 15000d+02 0.2(XJOOd+02 0.000 DEGREE (C) RPl RTll 0.1751534d-I-04 0.1018019d+04 0.1678247d+04 0.1052501d+04 0.160496ld+04 0.1086984d-I-04 * OUTPUT VOLTAGE AT NODE (1,1) * TEMPERATURE = 40.000 DEGREE (C) PRESSURE PSI 0. 1m00d+02 0. 15000d+02 0.2(X)00d+02 VOUT (2. 5) ( 0.4077790d+00 0.6124288d+00 0.8175880d+00 * OUTPUT VOLTAGE AT NODE (l,J) * TEMPERATURE = -30.000 DEGREE (C) PRESSURE PSI , 0.10000d+02 0. 15000d+02 0.2(D00d+02 VOUT (2. 5) ( 0.3997346d+00 0.6003321d+00 0.8014188d+00 * OUTPUT VOLTAGE AT NODE (1,1) * TEMPERATURE = —20.000 DEGREE (C) PRESSURE PSI 0. 1m00d+02 0. 15000d+02 0.2(XXXId-t-02 VOUT (2. 5) ( 0.3916859d+00 0.5882296d+00 0.7852426d-I00 140 * OUTPUT VOLTAGE AT NODE (I,J) * TEMPERATURE = -10.000 DEGREE (C) PRESSURE PSI VOUT (2. 5) ( 0.1m00d+02 0.3836329d-I-00 0.15000d+02 0.5761211d+00 0.2m00d+02 0.7690593d-I-00 * OUTPUT VOLTAGE AT NODE (I,J) * TEMPERATURE = 0.000 DEGREE (C) PRESSURE PSI VOUT (2. 5) ( 0. lm00d+02 0.375575 6d+00 0. 15000d+02 ‘ 0.5640068d+00 0.2m00d+02 0.7528690d+00 * Job Concluded * * Job Finished at 13:51:24 on 10-15-1991 APPENDIX B SIMULATION RESULTS APPENDIX B SIMULATION RESULTS B.l Piezoresistive Bridge Outputs *******************************#**it*************************t********48*4! snSS(No tracking errors-structure 2) Sensitivity (mv/psi) 41.1353760 40.3167343 39.4979362 38.6790009 37.8599129370406876 36.2213326 35.401821] 34.5821571 33.7623558 32.9424019 32.1223106 31.3020687 30.4816666 29.6611328 28.8404446 28.0195999 27.1986008 V(2,5) for T=27 "C 0.0000000 0.1767098 0.3537990 0.5312686 0.7091199 0.8873542 1.065973 1.244977 1.424367 1.604146 0.7981891 V(2,5) for T=30 "C 0.0000000 0.1755017 0.3513774 0.5276283 0.7042557 0.8812607 1.058645 1.236409 1.414554 1.593082 0.7927110 V(2,5) for T=-40 "C 0.0000000 0.2036367 0.4077790 0.6124288 0.8175880 1.023258 1.229442 1.436141 1.643357 1.851092 0.9203592 V(2,5) for T=0 "C 0.0000000 0.1875738 0.3755756 0.5640068 0.7528690 0.9421636 1.131892d 1.322056 1.512657 1.03696 0.8839256 V(2,5) for T=40 "C 0.0000000 0.1714729 0.3433026 0.5154903 0.6880371 0.8609441 1.034213 1.207843 1.381838 1.556197 0.7744455 V(2,5) for T=80 "C 0.0000000 0.1553339 0.3109599 0.4668790 0.6230918 0.7795994 0.9364024 1.093502 1.250898 1.408593 0.7013087 V(2,5) for T=120 "C 141 142 0.0000000 0.1391567 0.2785473 0.4181725 0.5580327 0.6981287 0.8384610 0.9790303 1.119837 1.260882 0.6280512 V(2,5) for P=15psi 0.6124288 0.6003321 0.5882296 0.5761211 0.5640068 0.5518866 0.5397604 0.5276283 0.5154903 0.5033464 0.4911965 0.4790407 0.4668790 0.4547113 0.4425376 0.4303580 0.4181725 0.4059809 0.5312686 V(2,5) for P=30psi 1.229442 1.205067 1.180683 1.156292 1.131892 1.107484 1.083069 1.058645 1.034213 1.009772 0.9853238 0.9608672 0.9364024 0.9119294 0.8874482 0.8629587 0.8384610 0.8139551 1.065973 V(2,5) for P=45psi 1.851092 1.814253 1.777407 1.740555 1.703696 1.666831 1.629960 1.593082 1.556197 1.519306 1.482408 1.445504 1.408593 1.371675 1.334751 1.297820 1.260882 1.223937 1.604146 III#41411“:********##1##!!!**************#*********#***************************** snsSl (2.5% tracking errors-structure 2) Sensitivity (mv/psi) 41.0128365 40.1976929 39.3825493 38.5673256 37.7520599 36.9367027 36.1212234 35.3056259 34.4899139 33.6740227 32.8579559 32.0417099 31.2252789 30.4086285 29.5917778 28.7746849 27.9573765 27.1397953 V(2,5) for T=27 "C 0.06172839 0.2386797 0.4158303 0.5931805 0.7707307 0.9484812 1.126432 1.304585 1.482938 1.661493 V(2,5) for T=-40 "C 0.0569264 0.2608638 0.4650815 0.6695802 0.8743604 1.079423 1.284768 1.490396 1.696308 1.902504 V(2,5) for T=0 "C 0.05994938 0.2477881 0.4358562 0.6241542 0.8126824 1.001441 1.190431 1.379653 1.569106 1.758792 V(2,5) for T=30 "C 0.06191478 0.2376553 0.4135920 0.5897252 0.7660551 0.9425822 1.119307 1.296229 1.473349 1.650668 V(2,5) for T=40 "C 143 0.06252101 0.2342242 0.4061132 0.5781884 0.7504501 0.9228986 1.095534 1.268357 1.441368 1.614567 V(2,5) for T=80 "C 0.06473535 0.2202652 0.3759438 0.5317711 0.6877475 0.8438732 1.000148 1.156573 1.313148 1.469873 V(2,5) for T=120 "C 0.06666202 0.2059803 0.3454154 0.4849675 0.6246366 0.7644229 0.9043266 1.044348 1.184487 1.324744 V(2,5) in mVs for OFFSET(P=0psi) 56.92640 57.73082 58.50142 59.24030 59.94938 60.63042 61.28505 61.91478 62.52101 63.10502 63.66802 64.21111 64.73535 65.24168 65.73102 66.20420 66.66202 67.10520 61.72839 V(2,5) for P=15psi 0.6695802 0.6582803 0.6469413 0.6355654 0.6241542 0.6127094 0.6012326 0.5897252 0.5781884 0.5666235 0.5550317 0.5434139 0.5317711 0.5201043 0.5084142 0.4967017 0.4849675 0.4732122 0.5931805 V(2,5) for P=30psi 1.284768 1.261241 1.237675 1.214071 1.190431 1.166756 1.143048 1.119307 1.095534 1.071731 1.047899 1.024038 1.000148 0.9762321 0.9522893 0.9283206 0.9043266 0.8803080 1.126432 - V(2,5) for P=45psi 1.902504 1.866627 1.830716 1.794770 1.758792 1.722782 1.686740 1.650668 1.614567 1.578436 1.542276 1.506088 1.469873 1.433630 1.397361 1.361065 1.324744 1.288396 1.661493 ****************************************:1:******************************** snS52(-2.5% tracking errors-structure 2) Sensitivity (mv/psi) 41.2521858 40.4297333 39.6070290 38.7840996 37.9610100 37.1377029 36.3142624 35.4906769 34.6669579 33.8431244 33.0191841 32.1951408 31.3710365 30.5468502 29.7226009 28.8983078 28.0739651 27.2495880 V(2,5) for T=27 "C -0.06329ll4 0.1131233 0.2901001 0.4676417 0.6457510 0.8244307 1.003684 1.183512 1.363920 1.544908 144 V(2,5) for T=40 ”C 0.0584984] 0.1447851 0.3488036 0.5535610 0.7590613 0.9653087 1.172307 1.380061 1.588574 1.797850 V(2,5) for T=O "C 0.06151341 0.1257416 0.3136266 0.5021448 0.6912993 0.8810935 1.071530 1.262614 1.454346 1.646732 V(2,5) for T=30 "C 0.06347754 0.1117314 0.2874952 0.4638166 0.6406981 0.8181425 0.9961524 1.174731 1.353880 1.533603 V(2,5) for T=40 "C 0.06408399 0.1071049 0.2788245 0.4510771 0.6238654 0.7971918 0.9710588 1.145469 1.320425 1.495929 V(2,5) for T=80 "C 0.06630168 0.08878392 0.2443075 0.4002710 0.5566763 0.7135251 0.8708195 1.028561 1.186752 1.345395 V(2,5) for T=120 "C 0.06823446 0.07071084 0.2100091 0.3496617 0.4896699 0.6300352 0.7707588 0.9118422 1.053287 1.195094 V(2,5) in mVs for OFFSET(P=0psi) -58.49841 -59.29999 -60.06837 -60.80555 -61.51341 -62.19366 -62.84788 -63.47754 -64.08399 -64.66851 -65.23225 -65.77630 -66.30168 -66.80933 -67.30014 -67.77492 -68.23446 -68.67947 -63.29114 V(2,5) for P=15psi 0.5535610 0.5406684 0.5278027 0.5149621 0.5021448 0.4893490 0.4765734 0.4638166 0.4510771 0.4383539 0.4256459 0.4129519 0.4002710 0.3876024 0.3749451 0.3622985 0.3496617 0.3370340 0.4676417 V(2,5) for P=30psi 1.172307 1.147079 1.121875 1.096693 1.071530 1.046387 1.021262 0.9961524 0.9710588 0.9459795 0.9209138 0.8958607 0.8708195 0.8457894 0.8207697 0.7957597 0.7707588 0.7457665 1.003684 V(2,5) for P=45psi 1.797850 1.760038 1.722248 1.684479 1.646732 1.609003 1.571294 1.533603 1.495929 1.458272 1.420631 1.383005 1.345395 1.307799 1.270217 1.232649 1.195094 1.157552 1.544908 145 t******************************i**********#**************t*************** 1990 sns5a(20% tracking errors-structure 2) "H“ Sensitivity (mv/psi) 42.4687347 41.6130028 40.7571564 399011765 39.0451126 38.1889343 37.3326416 36.4762230 35.6197128 34.7630653 33.9063110 33.0494461 32.1924667 31.3353558 30.4781322 29.6208019 28.7633553 27.9057770 ***** V(2,5) for T=27 "C 0.0000000 0.1819579 0.3643392 0.5471456 0.7303784 0.9140392 1.098129 1.282651 1.467604 1.652992 ****** V(2,5) for T=-40 "C 0.000000 0.2100561 0.4206787 0.6318701 0.8436326 1.055968 1.268880 1.482370 1.696440 1.911093 0.9497287 "in" V(2,5) for r=o "C 0.000000 0.1932943 0.3870672 0.5813206 0.7760561 0.9712757 1.166981 1.363174 1.559856 1.757030 0.8736053 “we V(2,5) for r=30 "C 0.0000000 0.1806971 0.3618119 0.5433456 0.7252999 0.9076761 1.090476 1.273700 1.457351 1.641430 0.8164352 ****** V(2,5) for T=40 "C 0.0000000 0.1764932 0.3533845 0.5306753 0.7083671 0.8864610 1.064959 1.243861 1.423170 1.602887 0.7973637 ****** V(2,5) for T=80 "C 0.0000000 0.1596526 0.3196303 0.4799341 0.6405649 0.8015239 0.9628119 1.124430 1.286379 1.448661 0.7210033 "H" V(2,5) for T=120 "C 0.0000000 0.1427725 0.2858044 0.4290964 0.5726492 0.7164636 0.8605402 1.004880 1.149483 1.294351 0.6445237 ****** V(2,5) for OFFSE'T(P=0psi) Offset is ZERO for all cases ......... ****** V(2,5) for P=15psi 0.6318701 0.6192417 0.6066073 0.5939669 0.5813206 0.5686683 146 0.5560099 0.5433456 0.5306753 0.5179990 0.5053167 0.4926284 0.4799341 0.4672337 0.4545273 0.4418149 0.4290964 0.4163719 0.5471456 ' "M" V(2,5) for P=30psi 1.268880 1.243417 1.217946 1.192467 1.166981 1.141487 1.115985 1.090476 1.064959 1.039434 1.013901 0.9883603 0.9628119 0.9372557 0.9116917 0.8861199 0.8605402 0.8349527 1.098129 "N" V(2,5) for P=45psi 1.911093 1.872585 1.834072 1.795553 1.7570301.718502 1.679969 16414301602887 1.564338 1.525784 1.487225 1.448661 1.410091 1.371516 13329361294351 1.255760 1.652992 ***********#**********************4!************************************** 1990 snsSal (2.5% tracking enor from snSSa {20%} ) ******* Sensitivity (luv/psi) 42.3339005 41.4820442 40.6302071 39.7783699 38.9265289 38.0746536 37.2227020 36.3706741 35.5185356 34.6662636 33.8138618 32.9613190 32.1085854 31.2556973 30.4025917 29.5492878 28.6957722 27.8420391 V(2,5) for T=27 "C ****** V(2,5) for T=-40 "C 005685142 0.2672009 0.4778787 0.6888854 0.9002218 1.111889 1.323887 1.536217 1.748880 1.961877 “in" V(2,5) for r=0 "C 0.05993919 0.2534920 0.4473134 0.6414040 0.8357645 1.030395 1.225297 1.420470 1.615915 1.811633 ****** V(2,5) for r=30 "C 0.06191467 0.2428450 0.4240050 0.6053952 0.7870160 0.9688679 1.150951 1.333267 1.515814 1.698595 ****** V(2,5) for T=40 "C 0.06251901 0.2392370 0.4161727 0.5933265 0.7706989 0.9482902 1.126101 1.304131 1.482382 1.660853 ****** V(2,5) for T=80 "C 0.06470669 0.2245509 0.3845692 0.5447618 0.7051289 0.8656709 1.026388 1.187281 1.348349 1.509593 ****** V(2,5) for T=120 "C 147 0.06658534 0.2095162 0.3525835 0.4957877 0.6391288 0.7826070 0.9262226 1.069976 1.213867 1.357895 "In" V(2,5) in mVs for OFFSET(P=0psi) 56.85142 57.67899 58.46773 59.22032 59.93919 60.62654 6128442 61.91467 62.51901 63.09899 63.65606 64.19155 64.70669 65.20263 65.68040 66.14100 66.58534 67.01425 61.72839 Mu" V(2,5) for P=15psi 0.6888854 0.6770785 0.6652276 0.6533354 0.6414040 0.6294356 0.6174321 0.6053952 0.5933265 0.5812275 0.5690996 0.5569440 0.5447618 0.5325541 0.5203219 0.5080662 0.4957877 0.4834873 0.6090097 ****** V(2,5) for P=30psi 1.323887 1.299303 1.274675 1.250([16 1.225297 1.200551 1.175768 1.150951 1.126101 1.101218 1.076305 1.051361 1.026388 1.001387 0.9763587 0.9513036 0.9262226 0.9011162 1.158400 "H“ V(2,5) for P=45psi 1.961877 1.924371 1.886827 1.849247 1.811633 1.773986 1.736306 1.698595 1.660853 1.623081 1.585280 1.547451 1.509593 1.471709 1.433797 1.395859 1.357895 1.319906 1.709911 ***********************4!************************************************* 1990 snSSa2 (-2.5% tracking error from sns5a (20%} ) ****** Sensitivity (mv/psi) 42.5979729 41.7380295 40.8778610 40.0175056 39.1569405 38.2962418 37.4353828 36.5744286 35.7133789 34.8522301 33.9910278 33.1297493 32.2684441 31.4070930 30.5457439 29.6843662 28.8229656 27.9616032 V(2,5) for T=27 "C 0.3917051 0.5687816 0.7451061 0.9206833 1.095518 1.269615 1.442979 1.615614 1.787525 1.958717 Hun V(2,5) for T=~40 ”C 005842372 0.1512851 0.3618031 0.5731350 0.7852854 0.9982592 1.212061 1.426696 1.642169 1.858485 ****** V(2,5) for r=0 "C 006150323 0.1314772 0.3251499 0.5195186 0.7145871 0.9103591 1.106838 1.304029 1.501935 1.700559 148 "H" V(2,5) for r=30 "C 0.06347743 0.1169312 0.2979484 0.4795773 0.6618210 0.8446827 1.028165 1.212273 1.397007 1.582372 an" V(2,5) for T=40 ”C 0.06408199 0.1121312 0.2889259 0.4663052 0.6442720 0.8228290 1.001979 1.181726 1.362072 1.543020 "H" V(2,5) for T=80 "C 0.06627295 009313437 0.2530203 0.4133871 0.5742368 0.7355717 0.8973939 1.059706 1.222509 1.385807 ****** V(2,5) for T=120 "C 0.06815748 0.07440578 0.2173533 0.3606866 0.5044073 0.6485169 0.7930170 0.9379092 1.083195 1.228876 ****** V(2,5) in mVs for OFFSE'T(P=0psi) 08.42372 09.24833 00.03476 00.78561 01.50323 02.18978 02.84725 03.47743 04.08199 04.66247 05.22027 05.75669 06.27295 06.77016 07.24936 07.71150 08.15748 08.58813 “u" V(2,5) for P=15psi 0.5731350 0.5596857 0.5462682 0.5328799 0.5195186 0.5061824 0.4928692 0.4795773 0.4663052 0.4530515 0.4398147 0.4265936 0.4133871 0.4001941 0.3870136 0.3738447 0.3606866 0.3475384 ****** V(2,5) for P=30psi 1.212061 1.185715 1.159397 1.133106 1.106838 1.080594 1.054370 1.028165 1.001979 0.9758103 0.9496570 0.9235185 0.8973939 0.8712823 0.8451827 0.8190946 0.7930170 0.7669494 ****** V(2,5) for P=45psi 1.858485 1.818963 1.779469 1.740002 1.700559 1.661141 1.621745 1.582372 1.543020 1.503688 1.464376 1.425082 1.385807 1.346549 1.307309 1.268085 1.228876 1.189684 *****************************************************4!************* 1990 sns5b(-20% tracking errors-Structure 2) ******* Sensitivity (mv/psi) 39.5721130 38.7968674 38.0214195 37.2458229 36.4700203 35.6940651 34.9179306 34.1415977 33.3651123 32.5884438 31.8115788 31.0345535 30.2573547 29.4799557 28.7023773 27.9246216 27.1466885 26.3685780 V(2,5) for T=27 "C 0.5555555 0.3830373 0.2086031 0.03222066 0.1461428 0.3265208 0.5089476 0.6934585 0.8800893 1.068877 149 mm V(2,5) for T=-40 "c 0.0000000 0.1960958 0.3926294 0.5896022 0.7870157 0.9848713 1.183171 1.381915 1.581106 1.780745 ****** V(2,5) for T=0 "C 0.0000000 0.1808537 0.3620787 0.5436764 0.7256478 0.9079941 1.090716 1.273816 1.457294 1.641151 we" V(2,5) for r=30 "C 0.0000000 0.1693982 0.3391216 0.5091712 0.6795480 0.8502529 1.021287 1.192651 1.364346 1.536372 ****** V(2,5) for T=40 "C 0.0000000 0.1655751 0.3314608 0.4976579 0.6641673 0.8309899 0.9981266 1.165578 1.333346 1.501430 ****** V(2,5) for T=80 "C 0.0000000 0.1502601 0.3007753 0.4515463 0.6025737 0.7538583 0.9054006 1.057201 1.209261 1.361581 "we V(2,5) for T=120 ”C 0.0000000 0.1349085 0.2700221 0.4053413 0.5408667 0.6765986 0.8125375 0.9486840 1.085038 1.221601 tsetse V(2,5) for OFFSET(P=OPSI) Offset for all cases is ZERO. ****** V(2,5) for P=15psi 0.5896022 0.5781294 0.5666509 0.5551665 0.5436764 0.5321805 0.5206788 0.5091712 0.4976579 0.4861387 0.4746137 0.4630829 0.4515463 0.4400038 0.4284555 0.4169013 0.4053413 0.3937754 an“ V(2,5) for P=30psi 1.183171 1.160070 1.136960 1.113843 1.090716 1.067582 1.044438 1.021287 0.9981266 0.9749579 0.9517807 0.9285949 0.9054006 0.8821977 0.8589862 0.8357662 0.8125375 0.7893003 ****** V(2,5) for P=45psi 1.780745 1.745859 1.710964 1.676062 1.641151 1.606233 1.571307 1.536372 1.501430 1.466480 1.431521 1.396555 1.361581 1.326598 1.291607 1.256608 1.221601 1.186586 #*******#*******#**********4!*14!****************************************** 1990 sns5b1 (2.5% tracking enor from sns5b {-20%} ) ****** Sensitivity (luv/psi) 39.4541969 38.6821709 37.9100800 37.1379128 36.3656120 35.593193] 150 34.820629] 34.0479126 33.2750206 32.501953] 31.7286854 30.9552212 30.1815434 29.4076309 28.6334877 27.8590832 27.0844402 26.3095493 V(2,5) for T=27 "C 0.4945055 0.3213255 0.1463911 0.03032433 0.2088483 0.3892086 0.5714337 0.7555528 0.9415955 1.129592 ****** V(2,5) for T=-40 "C 0.05699906 0.2533336 0.4499013 0.6467025 0.8437377 1.041007 1.238512 1.436251 1.634226 1.832438 "H" V(2,5) for r=0 "C 005995944 0.2410227 0.4222764 0.6037209 0.7853566 0.9671836 1.149202 1.331413 1.513816 1.696412 ****** V(2,5) for r=30 "C 006191489 0.2315014 0.4012507 0.5711628 0.7412382 0.9114770 1.081879 1.252446 1.423176 1.594071 ****** V(2,5) for T=40 "C 006252303 0.2282795 0.3941901 0.5602552 0.7264748 0.8928492 1.059379 1.226063 1.392904 1.559899 ****** V(2,5) for T=80 "C 0.06476459 0.2151782 0.3657151 0.5163752 0.6671587 0.8180659 0.9690969 1.120252 1.271531 1.422934 ****** V(2,5) for T=120 "C 006674122 0.2017754 0.3369064 0.4721342 0.6074590 0.7428809 0.8783999 1.014016 1.149730 1.285541 ****** V(2,5) in mVs for OFFSET(P=0psi) 56.99906 57.78130 58.53439 59.25995 59.95944 60.63426 61.28567 61.91489 62.52303 63.11112 63.68015 64.23102 64.76459 65.28167 65.78300 66.26929 66.74122 67.19940 "H" V(2,5) for P=15psi 0.6467025 0.6360071 0.6252774 0.6145149 0.6037209 0.5928968 0.5820437 0.5711628 0.5602552 0.5493217 0.5383633 0.5273809 0.5163752 0.5053470 0.4942970 0.4832259 0.4721342 0.4610226 "H" V(2,5) for P=30psi 1.238512 1.216236 1.193926 1.171581 1.149202 1.126792 1.104351 1.081879 1.059379 1.036849 1.014292 0.9917077 0.9690969 0.9464601 0.9237980 0.9011111 0.8783999 0.8556648 "H" V(2,5) for P=45psi 15] 1.832438 1.798479 1.764488 1.730466 1.696412 1.662328 1.628214 1.594071 1.559899 1.525699 1.491471 1.457216 1.422934 1.388625 1.354290 1.319928 1.285541 1.251129 ***************************************************************#********* snsSbZ (-2.5% tracking error from sme {-20%} ) Sensitivity (mv/psi) 39.6843948 38.9056053 38.126583] 37.3473129 36.567810] 35.7881203 35.008232] 34.2281685 33.4479332 32.6675453 31.8870087 31.1063614 30.3255558 29.5446548 28.7636280 27.9825153 27.2012863 26.4200020 V(2,5) for T=27 "C 0.6179775 0.4461827 0.2723089 0.09631825 0.08182824 0.2621704 0.4447490 0.6296061 0.8167844 1.0)6328 ******* V(2,5) for T=-40 "C 0.05857079 0.1372357 0.3336886 0.5307909 0.7285460 0.9269571 1.126027 1.325760 1.526159 1.727227 ******* V(2,5) for r=0 "C 0.06152346 0.1190688 0.3002167 0.4819228 0.6641897 0.8470201 1.030417 1.214382 1.398918 1.584028 ******* V(2,5) for r=30 "C 0.06347765 0.1056802 0.2753288 0.4454702 0.6161066 0.7872402 0.9588732 1.131008 1.303646 1.476790 ******* V(2,5) for T=40 "C 0.06408602 0.1012559 0.2670676 0.4333509 0.6001081 0.7673410 0.9350517 1.103242 1.271915 1.441071 ******* V(2,5) for T=80 "C 006633099 008372492 0.2341702 0.3850065 0.5362352 0.6878578 0.8398760 0.9922913 1.145105 1.298319 ******* V(2,5) for T=120 "C 006831398 006642039 0.2014702 0.3368365 0.4725205 0.6085232 0.7448458 0.8814895 1.018455 1.155744 ***** V(2,5) in mVs for OFFSET(P=0psi) -58.57079 -59.35031 00.10125 00.82515 01.52346 02.19749 02.84850 03.47765 04.08602 04.67462 05.24440 05.79624 06.33099 06.84943 07.35228 07.84025 08.31398 08.77408 **"'**** V(2,5) for P=15psi 0.5307909 0.5185416 0.5063147 0.4941089 0.4819228 0.4697551 152 0.4576046 0.4454702 0.4333509 0.4212458 0.4091539 0.3970744 0.3850065 0.3729494 0.3609025 0.3488651 0.3368365 0.3248162 ******* V(2,5) for P=30psi 1.126027 1.102098 1.078187 1.054294 1.030417 1.006555 0.9827072 0.9588732 0.9350517 0.9112419 0.8874432 0.8636548 0.8398760 0.8161063 0.7923451 0.7685917 0.7448458 0.7211068 ******* V(2,5) for P=45psi 1.727227 1.691402 1.655595 1.619804 1.584028 1.548268 1.512522 1.476790 1.441071 1.405365 1.369671 1.333990 1.298319 1.262660 1.227011 1.191373 1.155744 1.120126 **************************4333**4!*1!*Itllnlnt*4“!******************************** 153 8.2 Compensation Bridge Outputs ************************************************************************* SNSS], 2.5%tracking enors from $1185 (Structur-Z) Rpl 2 3 R‘I'EMP 2K Rt] 0 2 RTEMP12.05K MODEL RTEMP RES(R=1 TC]=0.00]9 TC2=0) MODEL R'I'EMP] RES(R=1 TC1=0.001925 TC2=0) RT (-40 to 130 C) P=0 1786 1825 1865 1904 1943 1983 2022 2062 2101 2141 2180 2220 2259 2299 2338 2378 2417 2456 2000 V(2,5) for (-40 to 130 C) P=0 0.0569263 0.0577307 0.0585012 0.0592403 0.0599494 0.0606303 0.0612850 0.0619149 0.0625210 0.0631051 0.0636683 0.0642114 0.0647354 0.0652418 0.0657310 0.0662045 0.0666623 0.0671058 ***************t**********************$*************** SNSSZ, -2.5%tracking errors from snsS (Stmctur—Z) Rp] 2 3 RTEMP 2K Rt] 0 2 RTEMP] 1.95K MODEL RTEMP RES(R=1 TC]=0.0019 TC2=0) MODEL RTEMP] RES(R=] TC1=0.001875 TC2=0) RT (-40 to 130 C) P=0 1705 1742 1778 1815 185] 1888 1924 1961 1998 2034 2071 2107 2144 2180 2217 2253 2290 2327 2000 V(2,5) for (-40 to 130 C) P=0 0.0584984 0.0592999 0.0600681 0.0608053 0.0615134 0.0621934 0.0628476 0.0634775 0.0640841 0.0646687 0.0652323 0.0657763 0.0663018 0.0668097 0.0673003 0.0677752 0.0682349 0.0686798 ******t**********************************************it SNSSal, 2.5%tracking cums from snsSa:20% (Structur-Z) Rpl 2 3 RTEMP 2.4K Rt] 0 2 RTEMP12.46K MODEL RTEMP RES(R=1 TC1=0.0021 TC2=0) MODEL RTEMP] RES(R=1 TC1=0.002]25 TC2=0) 154 RT (-40 to 130 C) P=0 2110 2162 2214 2267 2319 237] 2423 2476 2528 2580 2633 2685 2737 2789 2842 2894 2946 2998 2460 V(2,5) for (40.10 130 C) P=0 0.0568514 0.0576787 0.0584674 0.0592203 0.0599389 0.0606265 0.0612845 0.0619144 0.0625191 0.0630989 0.0636563 0.0641918 0.0647068 0.0652027 0.0656805 0.0661416 0.0665860 0.0670147 0.0617284 ***********tt****************************************** SNSSaZ, -2.5%tracking enors from snsSa:20% (Structur-Z) Rpl 2 3 R'I'EMP 2.4K R11 0 2 RTEMP12.34K MODEL RTEMP RES(R=1 TC1=0.0021 TC2=0) MODEL R'I'EMP] RES(R=1 TC1=0.002075 TC2=0) RT (-40 to 130 C) P=0 2015 2063 2112 2160 2209 2257 2306 2355 2403 2452 2500 2549 2597 2646 2694 2743 2792 2840 2340 V(2,5) for (-40 to 130 C) P=0 0.0584235 0.0592480 0.0600348 0.0607853 0.0615034 0.0621896 0.0628471 0.0634775 0.0640821 0.0646625 0.0652204 0.0657568 0.0662732 0.0667706 0.0672498 0.0677118 0.0681577 0.0685887 0.0632912 ****************************************************** SNS5bl, 2.5%tracking 8111018 fmm snsSb:-20% (Structur-2) Rpl 2 3 RTEMP 1.6K R11 0 2 RTEMP] 1.64K Model RTEMP RES(R=1 TC1=0.0017 TC2=0) Model RTEMP] RES(R=1 TC1=0.00]725 TC2=0) RT (-40 to 130 C) P=0 1450 1479 1507 1535 1564 1592 1620 1648 1677 1705 1733 1762 1790 1818 1847 1875 1903 1931 1640 V(2,5) for (-40 to 130 C) P=0 0.0569987 0.0577812 0.0585341 0.0592599 0.0599594 0.0606341 0.0612855 0.0619149 0.0625229 0.0631113 0.0636802 0.0642314 0.0647650 0.0652819 0.0657830 0.0662694 0.0667415 0.0671997 155 0.0617284 *************4|*IIHIHOHI*Ik****************************************** SNSSb2, -2.5%tracking errors fnom snsSb:-20% (Stmctur-Z) Rp1 2 3 RTEMP 1.6K R11 0 2 RTEMP] 1.56K Model RTEMP RES(R=] TC]=0.0017 TC2=0) Model RTEMP] RES(R=1 TC1=0.001675 TC2=0) RT (-40 to 130 C) P=0 1385 141] 1437 1463 1489 1516 1542 1568 1594 1602 1646 1672 1698 1725 1751 1777 1803 1829 1560 V(2,5) for (-40 to 130 C) P=0 0.0585704 0.0593500 0.0601010 0.0608249 0.0615234 0.0621972 0.0628486 0.0634775 0.0640860 0.0646749 0.0652447 0.0657964 0.0663314 0.0668497 0.0673528 0.0678406 0.0683146 0.0687742 0.0632912 156 B.3 The Compensated Outputs ************************************************************** snsSl (2.5% tracking enors-stmctuneZ) ***** V(out) mVs for OFFSET(P=0psi) 0.0001 0.0001 0.0002 0.0000 0.0000 0.0001 0.0000 0.0001 0.0000 0.0001 0.0003 0.0003 0.0000 0.0001 0.0000 0.0003 0.0003 0.0006 ***** V(out) for P=15psi 0.6126539 0.6005496 0.5884401 0.5763251 0.5642048 0.5520791 0.5399476 0.5278103 0.5156674 0.5035184 0.4913634 0.4792025 0.4670357 0.4548625 0.4426832 0.4304972 0.4183052 0.4061064 ***** V(out) for P=30psi 1.2278417 1.2035103 1.1791737 1.1548307 1.1304816 1.1061257 1.0817630 1.0573921 1.0330130 1.0086259 0.9842307 0.9598266 0.9354126 0.9109903 0.886558308621161 0.8376643 0.8132021 mm V(out) for P=45psi _ 1.8455777 1.8088963 1.7722148 1.7355297 1.6988426 1.6621517 1.6254550 1.5887531 1.5520461 1.5153309 1.4786078 1.4418766 1.4051375 1.3683882 1.331630012948605 1.2580817 1.2212902 ***** V(out) for T=40 "C 0.0000001 0.2039375 0.4081552 0.6126539 0.8174341 1.0224967 1.2278417 1.4334698 1.6393818 1.8455777 ***** V(out) for T=0 "C 0.0000000 0.1878387 0.3759068 0.5642048 0.7527330 0.9414916 1.1304816 1.3197036 1.5091566 1.6988426 ***** V(out) for T=40 "C 0.0000000 0.1717032 0.3435922 0.5156674 0.6879291 0.8603776 1.0330130 1.2058361 1.3788470 1.5520461 ***** V(out) for T=80 ”C 0.0000000 0.1555298 0.3112084 0.4670357 0.6230121 0.7791378 0.9354126 1.0918376 1.2484126 1.4051375 mm V(out) for T=120 "c 0.0000003 0.1393180 0.2787531 0.4183052 0.5579743 0.6977606 0.8376643 0.9776857 1.1178247 1.2580817 ************************************************************* 157 sn852(-2.5% tracking enors-structureZ) ***** V(out) in mVs for OFFSET(P=0psi) 0.0000 0.0001 0.0103 0.0003 0.0000 0.0003 0.0003 0.0000 0.0001 0.0002 0.0001 0.0000 0.0001 0.0004 0.0002 0.0003 0.0004 0.0003 “*1"- V(out) for P=15psi 0.6120594 0.5999683 0.5878708 0.5757674 0.5636582 0.5515424 0.5394210 0.5272941 0.5151612 0.5030226 0.4908782 0.4787282 0.4665728 0.4544121 0.4422454 0.4300737 0.4178966 0.4057138 ***** V(out) for P=30psi 1.2308054 1.2063789 1.1819432 1.1574984 1.1330434 1.1085804 1.0841097 1.0596299 1.0351429 1.0106481 0.9861461 0.9616370 0.9371213 0.9125991 0.8880700 0.8635349 0.8389937 0.8144463 ***** V(out) for P=45psi 1.8563484 1.8193380 1.7823161 1.7452843 1.7082454 1.6711963 1.6341416 1.5970805 1.5600131 1.5229406 1.4858633 1.4487814 1.4116968 1.3746086 1.3375173 1.3004242 1.2633289 1.2262318 ***** V(out) for T=-40 "C 0.0000000 0.2032835 0.4073020 0.6120594 0.8175597 1.0238072 1.2308054 1.4385594 1.6470724 1.8563484 ***** V(out) for T=0 "C 0.0000000 0.1872550 0.3751400 0.5636582 0.7528127 0.9426069 1.1330434 1.3241274 1.5158594 1.7082454 ***** V(out) for T=40 "C 0.0000001 0.1711890 0.3429086 0.5151612 0.6879495 0.8612759 1.0351429 1.2095530 1.3845091 1.5600131 ***** V(out) for T=80 "C 0.0000001 0.1550857 0.3106093 0.4665728 0.6229782 0.7798269 0.9371213 1.0948628 1.2530538 1.4116968 **“‘** V(out) for T=120 "C 0.0000004 0.1389457 0.2782440 0.4178966 0.5579048 0.6982701 0.8389937 0.9800771 1.1215219 1.2633289 *tfitiltttttidllddltt******************************************** SNSSal, 2.5%tl'acking errors from snsSa:20% (Stmcmr-Z) ***** V(out) in 1nVs for OFFSET(P=0psi) 0.0000 0.0003 0.0003 0.0000 0.0003 0.0000 158 0.000] 0.0003 0.0001 0.0001 0.11302 0.0003 0.0001 0.0001 0.0001 0.0006 0.0007 0.0005 mm V(out) for P=15psi 0.6320340 0.6193998 0.6067602 0.5941151 0.5814651 0.5688091 0.5561476 0.5434808 0.5308074 0.5181286 0.5054433 0.4927522 0.4800550 0.4673514 0.4546414 0.4419246 0.4292017 0.4164726 ***** V(out) for P=30psi 1.2670356 1.2416244 1.2162076 1.1907856 1.1653581 1.1399245 1.1144835 1.0890366 1.0635819 1.0381191 1.0126487 0.9871691 0.9616812 0.9361843 0.9106782 0.8851620 0.8596366 0.8341015 ***** V(out) for P=45psi 1.9050256 1.8666923 1.8283596 1.7900267 1.7516941 1.7133595 1.6750214 1.6366806 1.598334015599821 1.5216236 1.4832592 1.4448862 1.4065063 1.3681165 1.3297174 1.291309012528913 V(out) for T=27 "C 0.0000950 0.1768928 0.3525745 0.5271509 0.7006319 0.8730289 1.0443499 1.2146080 1.3838100 1.5519681 ***** V(out) for T=-40 "C 0.0000000 0.2103495 0.4210273 0.6320340 0.8433704 1.0550376 1.2670356 1.4793656 1.6920286 1.9050256 ***** V(out) for T=0 "C 0.0000003 0.1935531 0.3873745 0.5814651 0.7758256 0.9704561 1.1653581 1.3605311 1.5559760 1.7516941 ***** V(out) for T=40 "C 0.0000001 0.1767179 0.3536536 0.5308074 0.7081798 0.8857712 1.0635819 1.2416120 1.4198630 1.5983340 ***** V(Out) for T=80 "C 0. 0000001 0.1598441 0.3198624 0. 4810550 0. 6404221 0.8009641 0.9616812 1.1225742 1.2836422 1.4448862 ***** V(out) for T=120 "C 0.0000007 0.1429302 0.2859975 0.4292017 0.5725428 0.7160210 0.8596366 1.0033900 1.1472809 1.2913090 ##1##!!!*#***********************************#***********#****** snsSaZ (-2.5% tracking error from snsSa {20%} ) ***** V(out) in mVs for OFFSET(P=0psi) 0.0002 0.0003 0.0000 0.0003 0.0002 0.0002 159 0.0001 0.0001 0.0001 0.0000 0.0001 0.0001 0.0002 0.0004 0.0004 0.0003 0.0002 0.0006 "m V(out) for P=15psi 0.6315585 0.6189337 0.6063030 0.5936652 05810220 0.5683720 0.5557163 0.5430548 0.5303873 0.5177140 0.5050351 0.4923504 0.4796603 0.4669647 0.4542634 0.4415565 0.4288443 0.4161271 ***** V(out) for P=30psi 1.2704846 1.2449629 1.2194318 1.1938913 1.1683414 1.1427835 1.1172172 1.0916425 1.0660611 1.0404727 1.0148774 0.9892753 0.9636671 0.9380529 0.9124325 0.8868064 0.8611747 0.8355381 ***** V(out) for P=45psi 1.9169085 1.8782110 1.8395038 1.8007873 1.7620624 1.7233306 1.6845921 1.6458495 1.6071022 1.5683504 1.5295963 1.4908388 1.4520802 1.4133196 1.3745588 1.3357968 1.2970337 1.2582728 V(out) for T=27 "C 0.0000949 0.1769816 0.3533061 0.5288833 0.7037180 0.8778151 1.0511789 1.2238140 1.3957250 1.5669169 ***** V(out) for T=-40 "C 0.0010002 0.2097086 0.4202266 0.6315585 0.8437089 1.0566827 1.2704846 1.4851195 1.7005925 1.9169085 ***** V(out) for T=0 "C 0.0000002 0.1929806 0.3866533 0.5810220 0.7760905 0.9718625 1.1683414 1.3655324 1.5634384 1.7620624 ***** V(out) for T=40 "C 0.0000001 0.1762133 0.3530080 0.5303873 0.7083541 0.8869111 1.0660611 1.2458081 1.4261541 1.6071022 ***** V(out) for T=80 "C 0.0000002 0.1594076 0.3192935 0.4796603 0.6405100 0.8018449 0.9636671 1.1259792 1.2887822 1.4520802 ***** V(out) for T=120 "C 0.0000002 0.1425635 0.2855110 0.4288443 0.5725650 0.7166746 0.8611747 1.0060669 1.1513526 1.2970337 ****************#********#****************************¢****** snsSb] (2.5% tracking error from sns5b {-20%} ) **“* V(out) in rnVs for OFFSET(P=0psi) 0.0004 0.0001 0.0003 0.0001 0.0000 0.0002 160 0.0002 0.0000 0.0001 0.0002 0.0001 0.0004 0.0004 0.0002 0.0000 0.0001 0.0003 0.0003 ***** V(out) for P=15psi 0.5897038 0.5782259 0.5667433 0.5552550 0.5437615 0.5322627 0.5207582 0.5092479 0.4977323 0.4862104 0.4746831 0.4631495 0.4516102 0.4400651 0.4285140 0.4169565 0.4053927 0.3938229 m" V(out) for P=30psi 1.1815133 1.1584548 1.1353918 1.1123211 1.0892426 1.0661578 1.0430655 1.0199641 0.9968561 0.9737377 0.9506118 0.9274763 0.9043319 0.8811783 0.8580150 0.8348417 0.8116584 0.7884651 ***** V(out) for P=45psi 1.7754393 1.7406977 1.7059538 1.6712061 1.6364526 1.6016939 1.5669285 1.5321561 1.4973761 1.4625877 1.4277909 1.3929846 1.3581691 1.3233432 1.2885070 1.2536587 1.2187996 1.1839293 V(out) for T=27 "C 0.0000945 0.1732745 0.3482089 0.5249243 0.7034483 0.8838086 1.0660337 1.2501528 1.4361955 1.6241920 ***** V(out) for T=-40 "C 0.0000004 0.1963349 0.3929026 0. 5897038 0. 7867390 0.9840083 1.1815133 1.3792523 1.5772272 1.7754393 ***** V(out) for T=0 "C 0.0000000 0.1810633 0.3623170 0.5437615 0.7253972 0.9072242 1.0892426 1.2714536 1.4538566 1.6364526 ***** V(out) for T=40 "C 0.0000001 0.1657566 0.3316672 0.4977323 0.6639519 0.8303263 0.9968561 1.1635401 1.3303812 1.497376] "-1" V(out) for T=80 "c 0.0000004 0.1504132 0.3009501 0.4516102 0.6023937 0.7533009 0.9043319 1.055487012067660 1.3581691 ***** V(out) for T=120 "C 0.0000003 0.1350339 0.2701649 0.4053927 0.5407175 0.6761394 0.8116584 0.9472746 1.0829885 1.2187996 *****##******43***************************************** snsSb2 (-2.5% tracking error from snsSb {-20%} ) ***** V(out) in mVs for OFFSET(P=0psi) 0.0004 0.0003 0.0002 0.0002 0.0001 0.0003 161 0.000100001001110 0.01113 00103 0.0002 0.0004 0.0003 0.01115 0.01134 0.(X)06 0.0001 ***** V(out) for P=15psi 0.5893613 0.5778916 0.5664157 0.5549338 0.5434462 0.5319523 0.5204532 0.5089477 0.4974369 0.4859207 0.4743986 0.4628708 0.4513379 0.4397991 0.4282553 0.4167057 0.4051511 0.3935904 ***** V(out) for P=30psi 1.1845974 1.1614480 1.1382880 1.1151189 1.0919404 1.0687522 1.0455558 1.0223507 0.9991377 0.9759168 0.9526879 0.9294512 0.9062074 0.8829560 0.8596979 0.8364323 0.8131604 0.7898811 ***** V(out) for P=45psi 1.7857974 1.7507520 1.7156960 1.6806289 1.6455514 1.6104652 1.5753706 1.5402675 1.5051570 1.4700398 1.4349157 1.3997864 1.3646504 1.3295097 1.2943637 1.2592136 1.2240585 1.1889002 V(out) for T=27 "C 0.0000225 0.1718173 0.3456911 0.5216817 0.6998282 0.8801703 1.0627489 1.2476060 1.4347844 1.6243279 ***** V(out) for T=-40 "C 0.0010004 0.1958061 0.3922590 0.5893613 0.7871164 0.9855275 1.1845974 1.3843304 1.5847294 1.7857974 ***** V(out) for T=0 "C 0.0000001 0.1805922 0.3617401 0.5434462 0.7257131 0.9085435 1.0919404 1.2759055 1.4604415 1.6455514 ***** V(out) for T=40 "c 0.0000000 0.1653419 0.3311536 0.4974369 0.6641941 0.8314270 0.9991377 1.167328013360009 1.5051570 ***"'* V(out) for T=80 ”C 0.0000004 0.1500563 0.3005016 0.4513379 0.6025666 0.7541892 0.9062074 1.0586227 1.2114364 1.3646504 **"‘** V(out) for T=120 "C 0.0000006 0.1347350 0.2697848 0.4051511 0.5408351 0.6768378 0.8131604 0.9498041 1.0867696 1.2240585 162 13.4 The Half Bridge Outputs ************ half bridge outputs with subtractor ************* snsS (Temperatulc), V (7,0) 0.308213 0.260822 0.213430 0.166036 0.118642 0.0712477 0.0238526 0.0235429 0.07093710.118326 0.165711 0.213090 0.260465 0.307835 0.355203 0.402565 0.449926 0.497284 0.00932422 snsSa (Temperature), V (7,0) 0.125588 0.182340 0.239082 0.295815 0.352538 0.409251 0.465954 0.522648 0.579332 0.636006 0.692670 0.749325 0.805971 0.862608 0.919237 0.975857 1.03247 1.08908 0.50564] sns5b ('1‘e1nperatu1e), V (7.0) 0.742622 0.704634 0.666642 0.628646 0.590647 0.552645 0.514640 0.476632 0.438621 0.400608 0.362591 0.324570 0.286545 0.248520 0.210488 0.172452 0.134411 0.0963648 0.488035 163 11.5 The Final Temperature Compensated Outputs *************** Final compensated data #:1111111!**#****************** snsS (No Tracking errors) **** Pressure Sensitivity (mV/psi) 37.71 36.540 35.370 34.200 32.724 "11* goes (includes snsS] and 811852) Temp = 40 c 0.0000000 0.1651100 0.3307258 0.5353755 0.7405347 0.8691515 1.0753355 1.2820345 1.4892505 1.6969855 **** sns5 (includes snsSl and 811852) Temp = 0 C 0.0000000 0.1727435 0.3459151 0.5343463 0.7232085 0.8828426 1.0725709 1.2627350 1.4533360 1.6443750 **** snsS (includes snsS] and 811852) Temp = 30 C 0.0000000 0. 0.3572631 0.5335140 0.7101414 0.8930321 1.0704165 1.2481804 1.4263254 1.6048534 **** snsS (includes sn851 and sns52) Temp = 40 C 0.0000000 0.18034 0.3610369 0.5332246 0.7057714 0.8964126 1.0696815 1.2433115 1.4173065 1.5916656 **** snsS (includes MS] and 811852) Temp = 80 C 0.0000000 0.1878920 0.3760762 0.5319952 0.6882080 0.9098319 1.0666349 1.2237345 1.3811305 1.5388255 **** 81185 (includes sns5] and 811852) Temp = 120 C 0.0000000 0. 0.3910288 0.5306540 0.6705142 0.9230917 1.0634240 1.2039933 1.3448000 1.4858450 **** snsS (includes snsS] and 811852) Temp = 130 C 0.0000000 0.1972669 0.3947542 0.5303019 0.6660711 0.9263833 1.0625972 1.1990340 1.3356949 1.4725790 Pressure output at -40,0,40,80,130 ** Pressure = 5psi 0.1651100 0.1727435 0.18034 0.1878920 0.1972669 ** Pressure = 15psi 0.5353755 0.5343463 0.5332246 0.5319952 0.5303019 ** Pressure = 30psi 164 1.0753355 1.0725709 1.0696815 1.0666349 1.0625972 ** Pressure = 45psi 1.6969855 1.6443750 1.5916656 1.5388255 1.4725790 4!************************************************************* mm“ snsSa (20% tracking errors) **** Pressure Sensitivity (mV/psi) 43.860 42.962 42.060 41.150 40.001 **** snsSa (includes snsSa] and sns5a2 ) Temp = -40 C 0.0000000 0.2257546 0.4520757 0.6632671 0.8750296 1.1187620 1.3316740 1.5451640 1.7592340 1.9738870 **** snsSa (includes snsSa] and snsSaZ ) Temp = 0 C 0.0000000 0.2373615 0.4752017 0.6694551 0.8641906 1.1475446 1.3432500 1.5394430 1.7361250 1.9332991 **** snsSa (includes snsSa] and snsSaZ ) Temp = 30 C 0.0000000 0. 0.4924739 0.6740075 0.8559619 1.1690001 1.3518000 1.5350239 1.7186749 1.9027541 **** snsSa (includes snsSa] and sns5a2 ) Temp = 40 C 0.0000000 0.2489097 0.4982175 0.6755083 0.8532001 1.1761270 1.3546250 1.5335269 1.7128360 1.8925531 **** snsSa (includes snsSa] and sn85a2 ) Temp = 80 C 0.0000000 0.2603990 0.5211231 0.6814269 0.8420577 1.2045095 1.3657974 1.5274155 1.6893644 1.8516464 **** snsSa (includes snsSa] and snsSaZ ) Temp = 120 C 0.0000000 0. 0.5439219 0.6872139 0.8307667 1.2326987 1.3767753 1.5211149 1.6657180 1.8105860 **** sns5a (includes 8118581 and snsSaZ ) Temp = 130 C 0.0000000 0.2746813 0.5496067 0.6886419 0.8279225‘ 1.2397192 1.3794928 1.5195135 1.6597819 1.8002999 Pressure output at -40,0,40,80,130 ** Pressure = 5psi 0.2257546 0.2373615 0.2489097 0.2603990 0.2746813 ** Pressure = 15psi , 0.6632671 0.6694551 0.6755083 0.6814269 0.6886419 165 “- Pressure = 30psi 1.3316740 1.34325001.354625013657974 1.3794928 ** Pressure = 45psi 1.9738870 1.9332991 1.8925531 1.8516464 1.8002999 **********************I!*****##1-*4!*#************************#****** ****** snsSb (-20% tracking errors) **** Pressure Sensitivity (mV/psi) 31.320 29.910 28.490 27.070 25.300 **** Pressure Sensitivity (mV/psi) for Pmax = 30psi 27.062 26.513 25.960 25.404 24.704 **** Pressure Sensitivity (mV/psi) for Pmax = 25psi 25.542 24.507 24.467 24.423 24.363 **** snsSb ( includes snsSb] and snsSb2 ) Temp = -40 C 0.0000000 0.1032680 0.2069739 0.4039467 0.6013602 0.6135603 0.8118600 1.0106039 1.2097950 1.4094341 **** snsSb ( includes snsSbl and snsSb2 ) Temp = 0 C 0.0000000 0.1070228 0.2144170 0.3960146 0.5779861 0.6126706 0.7953925 0.9784925 1.1619705 1.3458275 **** snsSb ( includes snsSbl and sns5b2 ) Temp = 30 C 0.0000000 0. 0.2199636 0.3900132 0.5603900 0.6119369 0.7829710 0.9543350 1.1260300 1.2980559 **** sns5b ( includes snsSbl and snsSb2 ) Temp = 40 C 0.0000000 0.1107475 0.2218055 0.3880026 0.5545120 0.6116794 0.7788161 0.9462675 1.1140355 1.2821195 **** sns5b ( includes snsSbl and snsSb2 ) Temp = 80 C 0.0000000 0.1144420 0.2291390 0.3799101 0.5309374 0.6105858 0.7621281 0.9139285 1.0659884 1.2183084 **** snsSb ( includes snsSb] and snsSbZ ) Temp = 120 C 0.0000000 0. 0.2364193 0.3717386 0.5072639 0.6093931 0.7453320 0.8814785 1.0178324 1.1543955 **** snsSb ( includes sns5b] and sns5b2 ) Temp = 130 C 0.0000000 0.1190192 0.2382320 0.3696842 0.5013309 0.6090811 0.7411179 0.8733503 1.0057787 1.1384037 Pressure output at 40.040.80.130 166 ** Pressure = 5psi 0.1032680 0.1070228 0.1107475 0.1144420 0.1190192 ** Pressure = 15psi 0.4039467 0.3960146 0.3880026 0.3799101 0.3696842 ** Pressure = 30psi 0.8118600 0.7953925 0.7788161 0.7621281 0.7411179 ** Pressure = 45psi 1.4094341 1.3458275 1.2821195 1.2183084 1.1384037 APPENDIX C PSPICE SIMULATION CODE APPENDIX C PSPICE SIMULATION CODE C.1 The Op-amp Circuit CMOS Operational Amplifier VDD 3 0 5.0 V88 4 0 -5.0 *VP 1 0 ;non-inverting input *VM 2 0 ;inverting input MP1 6 2 13 3 PMOS L=30U W=60U MPZ 7 1 13 3 PMOS L=30U W=60U MN3 6 6 4 4NMOS L=15U W=210U MN4 7 6 4 4NMOS L=15U W=210U MN6 8 7 4 4 NMOS L=6U =240U MP8 12 12 3 3 PMOS L=6U W=12U MP5 13 12 3 3 PMOS IFOU W=12U MP7 8 12 3 3 PMOS L=6U W=18U MN9 5 7 4 4 NMOS L=6U W=360U MP1011 711 3PMOS L=96U W=96U MNll 8 311 4 NMOS L=6U W=6U MP12 8 411 3PMOS b6U W=6U MN131212 4 4NMOS L=6U W=12U Q1 3 8 5 QMOD CPAR 11 0 4P .MODEL NMOS NMOS LEVEL=2 VTO=0.8 KP=36.72U LAMBDA=0.01 + GAMMA=1.4 TOX=650E-10 LD=0.4U UO=680 CGSO=4.32E-16 + CJ=5.4E-4 CGDO=4.32E-16 CGBO=6.48E-16 RSI-1:25 CJSW=5.4E-10 .MODEL PMOS PMOS LEVEL=2 VTO=0.8 KP=13.5U LAMBDA=0.01 + GAMMA=0.4 UO=250 CJ=1.22E~4 TOX=650E-10 LD=0.5U + CGSO=4.32E-16 CGDO=4.32E-16 CGBO=6.48E-16 RSH=15 CJSW=1.22E-10 .MODEL QMOD NPN IS=1E-15 BF=100 NF=1 VAF=200 IKF=.01 ISE=lE—l3 + NE=2 BR=0.1 NR=1 VAR=200 IKR=.01 ISC=1E~13 NC=1.5 RB=100 + IRB=.1 RBM=10 RE=1 RC=10 CJE=2P VJE=.6 MJE=.33 TF=.1N + CJC=2P VJC=.5 MJC=.5 TR=10 *RL 5 0 ;output .END 167 168 C.2 The Analog Circuit for the ADC ADC Analog Circuit * .Options nopage ITLS=5000 .LIB oamp.1ib ************************************************* Voltages ************************************************* VDD 3 0 DC 5.0 V88 4 0 DC 00 VIN 8 0 DC -3.5 VREFP 13 0 DC 2.5 VREFN 14 0 DC ~2.5 VG 7 0 PULSE(0.0 5.0 0.0 ION 10N 0.04M 30.9M) ; Discharge C VCON] 11 0 PULSE(0.0 5.0 0.06M 10N 10N 10.24M 30.9M) ; integrate Vin VCON2 12 0 PULSE(0.0 5.0 10.3M 10N ION 20.48M 30.9M) ; De-integrate ************************************************* Circuit Resistances t******************************************f$**** RINTEG 6 1 1.3MEG ;integrator resistor CINTEG 1 5 8.3N ;integrator capacitor RLS 16 0 25K ;Load for sign comparator RPS 16 3 5.1K ; Pull up for sign comparator RLO 21 0 25K ; Load for output comparator RPO 21 3 5.1K ; Pull up for output comparator ************************************************* The subcircuits ************************************************* Xoamp 0 1 3 4 5 oamp ;opamp for integration Xst 1 5 7 0 idswp ;control discharge of C XszN 8 6 11 0 idswp ;control Vin XszEF 9 6 12 0 idswp ;control Vref XpREF13 9 16 0 idswp ;control positive Vref XnRBF 14 9 16 0 idswn ; control negative Vref Xsign 42 41 3 0 16 LM139 ; comparator for sign Xout 32 31 3 0 21 LM139 ; comparator for output ************************************************* 169 Zero Crossing Detector Components ************************************************* R1 5 30 5.1K R2 30 3] 5.1K R3 31 3 100K R4 32 3 100K R5 32 0 10K R6 32 21 20MEG Dout 0 30 DMOD .model DMOD D ************************************************* Sign Detector Components ************************************************* R11 8 40 5.1K R12 40 41 5.1K R13 41 3 100K R14 42 3 100K R15 42 0 10K R16 42 16 20MEG DsgnO 40 DMOD ************************************************* Analysis ************************************************* .TRAN 10.0U 30.9M 0.0 .PRINT TRAN V(5) V(7) V(6) **** V(11)V(12) V(6) V(7) V(16) V(9) V(21) V(23) .END APPENDIX D VHDL SIMULATION CODE APPENDIX D VHDL SIMULATION CODE __**************************************************** «Description of an AND gate ENTITY andgate 1S PORT ( in]. in2 : BIT; out] : OUT BIT ); END andgate; ARCHITECTURE behav OF andgate IS BEGIN out] <= in] AND in2 AFTER 4 ns; END behav; ."**********t*#*************************************** --Description of an OR gate ENTITY orgate 18 PORT ( in]. in2 : BIT; outl : OUT BIT); END orgate; ARCHITECTURE behav OF orgate IS BEGIN out] <= in] OR in2 AFTER 4 ns; END behav; .u**************************************************** -- Description of a 50Khz Clock Circuit. ENTITY clock IS PORT (go : 1N BIT; clok : OUT BIT ); END clock; ARCHITECTURE behav OF clock IS BEGIN PROCESS BEGIN IF go = ’0’ THEN WATT UNTIL go = ’1’: END IF; 170 171 clok <= ’1’.’0’ after 10 us; wait FOR 20 us; END PROCESS; END behav; _- *************************************************It -- Description of a 2x4 Decoder with reset ENTITY dec IS PORT ( c1. c0. clr : IN BIT; zer. one. two. thr : OUT BIT ); END dec; ' ARCHITECTURE behav OF dec IS BEGIN PROCESS (c1. c0. clr) CONSTANT delay: time := 8 ns ; BEGIN -- check for clear IF (clr = ’1’) THEN zer <= ’0’ AFTER delay ; one <= ’0’ AFTER delay ; two <= ’0’ AFTER delay ; thr <= ’0’ AFTER delay ; ELSIF (c1 = ’0’) AND (CO = ’0’) THEN zer <= ’1’ AFTER delay ; one <= ’0’ AFTER delay ; two <= ’0’ AFTER delay ; thr <= ’0’ AFTER delay ; ELSIF (c1 = ’0’) AND (CO = ’1’) THEN zer <= ’0’ AFTER delay ; one <= ’1’ AFTER delay ; two <= ’0’ AFTER delay ; thr <= ’0’ AFTER delay ; ELSIF (c1 = ’1’) AND (CO = ’0’) THEN zer <= ’0’ AFTER delay ; one <= ’0’ AFTER delay ; two <= ’1’ AFTER delay ; thr <= ’0’ AFTER delay ; ELSIF (c1 = ’1’) AND (CO = ’1’) THEN zer <= ’0’ AFTER delay ; one <= ’0’ AFTER delay ; two <= ’0’ AFTER delay ; 172 thr<= ’1’ AFTER delay; END IF; END PROCESS; END behav; __**********#************t**************************** -- Description of a level triggered D type flip flop -- with preset. ENTITY dff IS PORT(set:INBTT;q:OUTBTT); END dff; ARCHITECTURE behav OF dff IS BEGIN -- flip flop operation PROCESS (set) CONSTANT delay: time := 10 n8 ; BEGIN -- check for clear IF set = ’1’ THEN q <= ’1’ AFTER delay ; ELSE q <= ’0’ AFTER delay ; END IF; END PROCESS; END behav; --**************************************************** -- Description of a edge triggered ONE SHOT - (40 microsecond pulse) ENTTTY shot IS PORT ( in] : IN BIT; outl : OUT BTI‘ ); END shot; ARCHTTECTURE behav OF shot IS BEGIN PROCESS (inI) BEGIN IF (inI’EVENT) AND (inl = ’0’) THEN out1<= ’1’ AFTER 20 ns. ’0’ AFTER 60 ns; END IF; END PROCESS; END behav; 4173 .“**************************************************** -- Description of a 10 bit Counter ENTTTY tenbit 18 PORT (clok. clr : IN BTT; q9 : OUT BTT ); END tenbit; ARCHTIECTURE behav OF tenbit IS BEGIN PROCESS (c1r.clok) CONSTANT delay: time := 20 ns ; VARIABLE counter: integer := 0; BEGIN IF (clr = ’1’) THEN q9 <= ’0’ AFTER delay ; counter := 0; ELSIF (clok’EVENT) and (clok = ’0’) THEN counter 2: counter + 1; IF (counter = 8) THEN q9 <= ’1’ AFTER delay ; ELSIF (counter = 16) THEN q9 <= ’0’ AFTER delay; counter := 0; END IF; END IF; END PROCESS; END behav; .“**************************************************** -- Description of a 2 bit Counter ENTITY twbit IS ' PORT (clok. clr : IN BTT; out]. out2 : OUT BIT ); END twbit; ' use std.simulator_standard; ARCHTIECTURE behav OF twbit IS BEGIN PROCESS (clr.clok) CONSTANT delay: time := 20 ns ; VARIABLE counter: integer := 0; VARIABLE mem: bit := ’0’; BEGIN 1F clr = ’1’ THEN 174 out] <= ’0’ AFTER delay; out2 <= ’0’ AFTER delay; ELSIF clok’EVENT and clok = ’0’ THEN counter := counter + 1; IF counter = 1 THEN out] <= ’1’ AFTER delay; out2 <= ’0’ AFTER delay; ELSIF counter = 2 THEN out] <= ’0’ AFTER delay; out2 <= ’1’ AFTER delay; ELSIF counter = 3 THEN outl <= ’1’ AFTER delay; out2 <= ’1’ AFTER delay; counter := 0; END IF; END IF; END PROCESS: END behav; -_******#**************ItIll=1!************************Illin]!!! -- Description of the control circuit for the ADC ENTTTY conckt IS PORT ( conv. pulse : IN BTT; charg. discharg. Ok : OUT BIT); END conckt; ARCHTTECTURE conckt_struc OF conckt IS SIGNAL start. reset. again. msb. clk : BIT; SIGNAL 8e10, sell. dischargl. discharg2 : BTT; SIGNAL nc. run, done. conv]. conv2 : BTT; -- Circuit components: COMPONENT andgate - PORT ( in]. in2 : BTT; out] : OUT BTT ); END COMPONENT; FOR AND]. AND2. AND3. AND4 : andgate USE ENTTTY work.andgate(behav); COMPONENT orgate PORT ( in]. i112 : BTT;out1 : OUT BTT ); END COMPONENT; FOR OR]. 0R2. 0R3 : orgate USE ENTITY work.orgate(behav); COMPONENT dff PORT(set:INBTT;q:OUTBIT); 175 END COMPONENT; FOR ff : dff USE ENTTTY work.dff(behav); COMPONENT twbit PORT ( clok. clr : 1N BIT; outl. out2 : OUT BTT ); END COMPONENT; FOR conctr : twbit USE ENTTTY work.twbit(behav); COMPONENT tenbit PORT ( clok. clr : 1N BTT; q9 : OUT BIT ); END COMPONENT; FOR adcctr : tenbit USE ENTTTY work.twbit(behav); COMPONENT dec PORT ( c1. c0. clr : IN BTT; zer, one. two. thr : OUT BIT ); END COMPONENT; FOR decoder : dec USE ENTTTY work.dec(behav); COMPONENT shot PORT ( in] : IN BTT; out] : OUT BIT ); END COMPONENT; FOR oneshot : shot USE ENTTTY work.shot(behav); COMPONENT clock PORT ( go : 1N BTT; clok : OUT BTT ); END COMPONENT ; FOR cktclk : clock USE ENTTTY work.clock(behav); -- Structural details BEGIN OR] : orgate PORT MAP (start. again. reset): 0R2 : orgate PORT MAP (dischargl. discharg2. conv2); 0R3 : orgate PORT MAP (done. convl. run); AND] : andgate PORT MAP (pulse. conv2. done); AND2 : andgate PORT MAP (convl. convl. charg): AND3 : andgate PORT MAP (conv2. conv2. discharg): AND4 : andgate PORT MAP (done. done. 0k); 176 ff : dff PORT MAP (conv. start); conctr : twbit PORT MAP (msb. start. 8e10, sell); decoder : dec PORT MAP (sell. 8e10, start. convl. dischargl. discharg2. nc); adcctr : tenbit PORT MAP (clk. reset. msb); oneshot : shot PORT MAP (convl. again); cktclk : clock PORT MAP (run. clk); END conckt_struc; --*******#31:************************=1!*Ilnll****************** -- A test bench to test the above circuit ENTTTY conckt_test IS END conckt_test; ARCHTTECTURE behav OF conckt_test IS COMPONENT conckt PORT (conv. pulse : IN BTT; charg. discharg. ok : OUT BTT); END COMPONENT; FOR ALL : conckt USE ENTITY work.conckt(conckt_struc); SIGNAL do, analog. integ. deinteg, opulse : BTT := ’0’; BEGIN tester : conckt PORT MAP (do. analog, integ. deinteg, opulse); do <= ’1’ AFTERO us. ’0’ AFTER 40 us. ’1’ AFTER 1150 ns; analog <= ’1’ AFTER 0 us. ’0’ AFTER 1100 us; END behav; BIBLIOGRAPHY 10 11 12 BIBLIOGRAPHY K. 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