. £21 :1 . .5 x k 2.. 7.. y l ‘ . 1.... .. Fiji. p )6»: , .- T. w 3... 3?... 3.3. I :1 z 1. .Ili ?. . fling}; . Man. 3.... 36... z. a; "93%.... . ark? ‘ .. .mpfiwflmfimm am?! 3%.... aw. in”....... $5.36. 34.. 1 CK . . r; c.920547 LIBRARIES MICHIGAN STATE UNIVERSITY EAST LANSING, MICH 48824-1048 This is to certify that the thesis entitled The Rapid Design of RF Amplifiers presented by Alexander N. Stewart has been accepted towards fulfillment of the requirements for the Master of degree in Electrical and Computer Science ErLgineering g/(‘h /(\_/ Major Professor’s Signature 14* Dec 200 ‘1‘ Date MSU is an Afiinnative Action/Equal Opportunity Institution PLACE IN RETURN BOX to remove this checkout from your record. TO AVOID FINES return on or before date due. MAY BE RECALLED with earlier due date if requested. DATE DUE DATE DUE DATE DUE 6/01 c:/ClRC/DateDue.p65-p.15 The Rapid Design of RF Amplifiers By Alexander N. Stewart A THESIS Submitted to Michigan State University in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE Department of Electrical and Computer Engineering 2004 ABSTRACT The Rapid Design of RF Amplifiers By Alexander N. Stewart Today’s electronics market has seen an increase for high frequency, wireless tech- nology. Associated with this trend is the need for suitable RF amplifiers to handle the reception and transmission of these signals. Unfortunately, the cost of these ampli- fiers from traditional vendors is quite high. It is therefore advantageous to investigate methods to reduce the acquisition cost, such as a custom design. The design of RF amplifiers is a time consuming and repetitive process if the calculations were to be done by hand. There are commercially available packages which can aid in the design process; however, this is an expensive alternative for creating these types of amplifiers. The purpose of this thesis will be to develop such a design methodology and tool. First, all of the necessary background in electromagnetic theory is needed to develop the models used in RF amplifier design. Then there is a discussion on how to design these types of amplifiers while pointing out the shortcomings of doing these designs by hand. Next, a Matlab based GUI is introduced which will reduce the time required in the design process. Other software packages are also discussed used in the design process. Finally, results are shown to verify the design process. It is the intent of this work to provide an educational tool for undergraduate students. Copyright © by Alexander N. Stewart 2004 To my parents, Robert and Jane iv ACKNOWLEDGMENTS First, I would like to thank my family for their support and giving me a hand when I needed it. Without it, college would have been near impossible. I would also like to thank my graduate advisor, Dr. Leo Kempel, for taking me on as his student and allowing me the opportunity to attend graduate school at Michigan State University. Next, I would like to thank Catherine Beauduy and her family for their support. They have been there to offer their advice and support and have been like a second family to me. Finally, I would like to thank the National Science Foundation (NSF) for their support by funding my way through graduate school with grants ECS-0134236 and DUE—0231312. TABLE OF CONTENTS LIST OF TABLES LIST OF FIGURES 1 Introduction 2 Theory 2.1 Transmission Lines ............................ 2.2 Microstrip ................................. 2.3 Two Port Networks ............................ 2.3.1 S-Parameters ........................... 2.3.2 Power Waves ........................... 2.4 Matching Networks ............................ 2.5 Signal Flow Graphs ............................ 2.6 Noise .................................... 2.6.1 Noise Sources ........................... 2.6.2 Noise in Systems ......................... 3 Amplifier Design 3.1 3.2 3.3 3.4 3.5 3.6 3.7 Stability .................................. Standing Wave Ratio ........................... Bilateral Conjugate Match ........................ 3.3.1 Design Procedure ......................... Operating Power Gain .......................... 3.4.1 Design Procedure ......................... Available Power Gain ........................... 3.5.1 Design Procedure ......................... SWR Circles ................................ 3.6.1 Design Procedure ......................... Noise Figure Circles ............................ vi viii ix 1 3 3 9 12 12 15 21 27 36 36 37 40 40 43 46 48 48 50 51 52 53 55 57 3.7.1 Design Procedure ......................... 4 Software Tools with Updated Design Procedures 4.1 Using the Design Program ........................ 4.2 Design using the GUI ........................... 4.3 Circuit Design ............................... 4.3.1 Microstrip Implementation .................... 4.3.2 Lumped Element Design ..................... 5 Designs and Analysis 5.1 S-Parameter Measurement ........................ 5.2 Amplifier Designs 5.2.1 AT—41486 Design ......................... 5.2.2 MPSH10 Design .......................... 5.2.3 MPSH17 Design .......................... 5.2.4 Summary 6 Conclusion BIBLIOGRAPHY ooooooooooooooooooooooooooooo vii 58 60 60 64 67 67 71 73 73 81 81 87 94 96 98 101 LIST OF TABLES 5.1 Transistor S Parameters used in Designs ................ 81 5.2 Design Values ............................... 81 5.3 Measured Values Summary ........................ 97 viii LIST OF FIGURES 2.1 Transmission Line Model ......................... 3 2.2 Finite 'Itansmission Line ......................... 7 2.3 Microstrip Geometry ........................... 10 2.4 Two Port Network ............................ 13 2.5 BJT Two Port Model ........................... 15 2.6 Two Port Model with Load ....................... 16 2.7 Reactance of an Open Transmission Line ................ 22 2.8 Reactance of a Shorted Transmission Line ............... 23 2.9 Smith Chart ................................ 25 2.10 Two port signal flow graph model .................... 27 2.11 Port 1 equivalent circuit and signal flow graph ............. 29 2.12 Port 2 equivalent circuit and signal flow graph ............. 30 2.13 Two port signal flow graph ........................ 31 2.14 Model for PIN computation ........................ 32 2.15 Model for P Avg computation ....................... 33 2.16 System noise figure model ........................ 37 3.1 Reflection coefficient diagram of a two port model ............ 40 3.2 Transistor amplifier with input and output matching networks. . . . . 41 4.1 Screenshot of the Microwave Amplifier Design Program ........ 61 5.1 DC Bias Circuit Used in S—Parameter Measurement for the MPSH10 74 5.2 DC Bias Circuit Used in S-Parameter Measurement for the MPSH17 74 5.3 8'11 of MPSH10 .............................. 76 5.4 512 of MPSH10 .............................. 77 5.5 821 of MPSH10 .............................. 77 5.6 822 of MPSH10 .............................. 78 5.7 511 of MPSH17 .............................. 78 5.8 5'12 of MPSH17 .............................. 79 5.9 521 of MPSH17 .............................. 79 ix 5.10 8'22 of MPSH17 .............................. 80 5.11 Schematic of AT-41486 Amplifier Bias Circuit ............. 82 5.12 Layout of AT-41486 Amplifier on Microstrip .............. 83 5.13 511 and SWR,“ of Compensated AT-41486 Amplifier .......... 84 5.14 521 of Compensated AT-41486 Amplifier ................ 85 5.15 822 and SWR“, of Compensated AT—41486 Amplifier ......... 87 5.16 Biconjugate Match Network for MPSH10 at 100MHz ......... 88 5.17 Sn of Biconjugate Matched MPSH10 Amplifier ............ 89 5.18 521 of Biconjugate Matched MPSH10 Amplifier ............ 90 5.19 822 of Biconjugate Matched MPSH10 Amplifier ............ 90 5.20 Mismatched Network for MPSH10 at 100MHz ............. 91 5.21 511 of Mismatched MPSH10 Amplifier ................. 92 5.22 321 of Mismatched MPSH10 Amplifier ................. 92 5.23 822 of Mismatched MPSH10 Amplifier ................. 93 5.24 Biconjugate Matched Network for MPSH17 at 100MHz ........ 94 5.25 5'11 of Biconjugate Matched MPSH17 Amplifier ............ 95 5.26 521 of Biconjugate Matched MPSH17 Amplifier ............ 95 5.27 322 of Biconjugate Matched MPSH17 Amplifier ............ 96 CHAPTER 1 Introduction Amplifiers are common parts of any electronic circuit. In wireless systems, they are typically the first element after the receive antenna. When used in this sort of application, it is important that the input impedance of the amplifier be very close to the impedance of the antenna and add little noise to the system. This increases the dynamic range of the receiver, thereby improving its performance [6]. Finding a commercial amplifier which meets these criteria may be difficult, leaving the designers to develop their own amplifier. The theory of designing RF transistor amplifiers requires a broad range of topics to be discussed. Chapter two is dedicated to giving the reader the basic knowledge of these topics including transmission line theory, two port networks, and signal flow graphs, to name a few. Chapter three pools all of this basic knowledge together and creates the framework on how to design an RF amplifier without the aid of any design tools. This leads to the discussion of how difficult the design process can be without the aid of a design tool. Chapter four presents the reader with the design tool developed by the author of this thesis and explains how to use this program. This design tool computes design parameters necessary to develop the amplifier, and proceeds to explain how to implement this design. Also, other software packages are discussed which aid in the design process. Chapter five presents a few designs that were made by the author and discusses the results of these designs as compared to the design goals. CHAPTER 2 Theory 2. 1 Transmission Lines For a better understanding of the means in which microstrip geometries will be used, it is necessary to include a brief explanation about transmission lines The model that will be used to develop the theory is shown in Figure 2.1 where the wave is TEM with propagation in the 2 direction [2]. |(z,t) |(z+A2.t) —> R A2 L AZ —> __/VV\/___/YYY\ + + V(z,t) V(z+A,t) 0 A2 I: G Az - l - l A‘ A. Figure 2.1. Transmission Line Model It will be assumed that there will be a series resistance R per unit length as well as an inductance per unit length L. Between the two conductors there will be some capacitance per unit length C as well as an conductance per unit length G. Applying Kirchhoff ’s voltage law around the loop yields v(z + Az, t) -— v(z, t) _ . Bi(z, t) A2 —— Rz(z,t) L at (2.1) Taking the limit of (2.1) and allowing Az —-> 0 shows 80(z,t) _ . 6i(z,t) 02 — Rz(z,t) L at (2.2) Performing the Kirchhoff current law at the v(z + A2, t) node gives i(z + A2, t) — z'(z, t) _ 811(2 + A2, t) A2 -— C at Gv(z + Az, t) (2.3) Taking the limit of (2.3) as A2 -—> 0 leads to 0i(z,t) _ 0v(z,t) 62 — C 8t Gv(z, t) (2.4) It is convenient to assume that the system involved will be time-harmonic, there- fore phasor notion can be used to simplify the equations by defining two new terms: v(z, t) = Re[V(z)ej“’t] i(z, t) = Re[I(z)ej“’t] and so the time convention 63"“ will be assumed and suppressed. The motivation for this is to turn a partial differential equation into an ordinary differential equation. The simultaneous solving of equations (2.2) and (2.4) give the following two second order ordinary differential equations ‘12:?) = We) (25) ([21:22) — 721(2) (2 6) where 7 = a + jfl = (/02 + ij)(G + M) (27) Equation (2.7) has the terms a and [3 which represent the attenuation constant and the phase constant respectively. The solutions to (2.5) and (2.6) are V(z) = V+e‘TZ+V‘eTz (2.8) 1(2) = Fee—"+1?” (2.9) where the superscripts represent the direction of travel for each wave. The positive superscript is for wave travel in the +2 direction and negative superscript is for wave travel in the —2 direction when referring to Figure 2.1. Rewriting equation (2.2) into the time-harmonic form yields dV(z) dz = (—R — ij)I(z) (2.10) Taking equations (2.8) and (2.9) then substituting into (2.10) gives 7(V+e"’z — V‘s") = (R + ij)(I+e‘7z + I'elz) 7(V+e‘7’ — V7272) = 1+ -'72 I— 72 (R+ij) e + e (G -l- ij) (R +ij) (Viki-72 — V‘s”) = I+e‘7‘ + I—eTZ (2.11) Equation (2.11) is similar to Ohm’s Law if we define (R + ij) (G + ij’) where Z0 is the characteristic impedance of the transmission line. This will allow the writing of equation (2.11) in the form (V+e"7’ — V‘s”) Zo = (I‘Le'TZ + I—e‘fl) (2.12) which now resembles Ohm’s Law as desired. Going one step further and grouping the forward traveling wave quantities and reverse traveling wave quantities together yields V+(Z) _ + Z0 — I (z) (2.13) V'(Z) _ _ — Zo — I (z) (2.14) Equations (2.8) and (2.9) show that there are four unknowns and only two equa- tions, but if the relationships of (2.13) and (2.14) are used, this reduces the number of unknowns down to two with the resulting equations V(z) = V+e‘7z + V‘s” (2.15) V+ V— : _7z — 72 I(z) 20 e Zo e (2.16) These equations then allow a solution to be found for any arbitrary position along the transmission line assuming that at least two boundary conditions are provided. Using Figure 2.2, by letting z = l and then solving for V+ and V‘ gives W = %(VL+ILZ,)ei‘ (2.17) 6 length=l > Iin —> IL Vs Q V(0) (20.1) _———————.-4 Pl If 1 z’=z-l z=0 Ill (5(— Figure 22. Finite Transmission Line 1 v- = §(VL — [Lane-7‘ (2.18) Knowing that I LZ L = VL and substituting into (2.17) and (2.18) gives the following 1 W = 51,,(Z,,+Z.,)e‘11 (2.19) V_ = -;-IL(ZL—Zo)€_vl (2.20) Since 2 = l is at the same location as 2’ = 0 along the transmission line, they have the same electrical properties. Taking the ratio of equations (2.20) and (2.19) gives a term known as the reflection coefficient and is shown mathematically as V— ZL - Z0 ”177:2”; (2.21) This quantity represents the electric field intensity that is reflected due to an impedance mismatch at z = Z. Note that if Z, = ZL, there is no reflection; a condition which is referred to as a perfect match. This quantity will also be used to represent current reflection as well. Now to find the voltage or current at any arbitrary point (z’ = z — l) on the transmission line and using (2.8) and (2.9) with (2.19) and (2.20) gives V(z’) = I?!“ (Z1, + Zo)e"’ + (ZL — Zak-7"] (2.22) 1(2’) = 21; [(ZL + Zo)eT"' + (ZL — Zo)e_"z'] (2.23) To find the impedance of a wave that is terminated by some ZL translated by a distance 2’, divide (2.22) by (2.23). Using the identities 67" + 6—72, = 2cosh(yz’) and 6”" — 6’7" = 2sinh('yz’) gives ZL cosh('yz’) + Z0 sinh(yz’) Z ’ = 0 (Z ) Z0 cosh(7z’) + Z L sinh(7z’) which can further simplify down to ZL + 20 tanh(7z’) 2(2 ) = Z0 Z0 + ZL tanh(7z’) (224) Since the transmission line is of length l, a better definition of (2.24) is Z,’ _ Z ZL + Zo tanh('yl) (2'25) _ 0Z0 + ZL tanh('yl) where Z, is the input impedance looking into the transmission line terminated by some arbitrary impedance, Z L. Equation (2.25) is known as the impedance transformation. Before moving on to the discussion of microstrip transmission lines, it will be assumed that the transmission lines are lossless. When referring to Figure 2.1, it is possible to assume that the attenuation constant a = 0 in the special case that G = R = 0. This is not an impossible assumption since the lengths of the conductors on microstrip are relatively short causing R z 0, and that the conductivity of the dielectric is quite low making G % 0. Using this assumption allows ’7 to be rewritten as 7 =15 = \/(jWL)(ij) = jun/L—C This allows us to define fl = (in/LC. Also note that equation (2.25) is now changed. This makes tanh(fil) = j tan(fil) giving the final working equation of (2.25) ._ Z ZL + jzotanwz) 1 — 0Z0 +jZL tan(18l) (2.26) Equation (2.26) is the basis by which most of the networks for the transistor amplifiers will be designed. 2.2 Microstrip Some of the transistor amplifiers for this thesis were built with microstrip transmis— sion lines. The main reason for this is that the lumped element concept of discrete components is no longer valid since the phase change through the element is not negligible at higher frequencies. These discrete components also have an associated quality factor (Q) to them where they may no longer act optimally. For example, a surface mount resistor will have a capacitance associated with it due the the metallic pad on each end of the resistor. These disadvantages of discrete components can be overcome since equation (2.26) allows one to design a component which has the desired impedance at a certain point with the use of transmission lines. To use the equation (2.26), the first assumption made was that the mode of prop- agation was TEM. This however is not valid in the strictest sense for the microstrip. The reason this is the case is because microstrip has half of the conductor exposed to freespace and the other side is in contact with the dielectric. Figure (2.3) shows the geometry where W is the width of the transmission line, h is the distance between the ground plane and the transmission line, and 6,. is the relative permittivity of the dielectric. Since there is a dielectric with a permittivity 6,. between the two layers 8r Figure 2.3. Microstrip Geometry of copper, then the majority of the fields emitted from the top conductor will tend to concentrate inside the material. However, Pozar [6] states that the exact field distribution is a hybrid TE—TM wave, but since the dielectric layer is electrically thin (h < /\), then the field distribution inside the dielectric is almost identical to the fields outside creating a quasi-TEM mode. The propagation velocity in free-space is defined as where c is the speed of light, no is the permeability of free-space, so is the permittivity of free-space. If the propagation is in a material other than free-space with some (6,, pr), then the velocity is scaled by the following relationship C V/J'r€r Since the microstrip being used is non-magnetic, then 11,. = 1. This changes equation up: (2.27) 10 (2.27) to (2.28) In freespace c = /\ f , where f is the frequency of the wave, but as was shown in equation (2.28) the velocity of the wave is scaled by the dielectric constant for that material,and thus the wavelength /\ is dependant on the material properties since the frequency does not change and is shown by v, = = ,\ f (2.29) To use equation (2.26) for microstrip, it is desirable to find an approximate value for the effective dielectric constant which exists for the microstrip. An approximation for the effective dielectric constant is given [6] below _6,.+1 6,—1 1 e. _ — + 2 2 ./1+12h/W where 1 < 68 < 6,. if 6,- > 1 assuming that the microstrip structure is immersed in (2.30) free-space. Equation (2.30) allows the computation of the wavelength of the wave that travels on the microstrip allowing us to use (2.26) for designing microstrip lines with the desired impedance. The only thing missing that is needed for full implementation of (2.26) is the characteristic impedance of the transmission line. Approximate closed form equations for the characteristic impedance are given by 60 8h W W = -— — —— < Z0 @111 (W +4h) for h _1 (2.31) 1207r W o = f — > Z ./ee[W/h + 1.393 + 0.667ln(W/h + 1.444)] or h " 1 11 where W is the width of the trace and h is the height of the substrate. There will be times where it will be necessary to design a transmission line for a desired impedance. If that is the case then use the following set of equations 88A W W _ m for 7 S 2 7,— "— 2 e, — 1 0.61 W _ _ __ _ _ . _ __ > rt B 1 ln(2B 1) + 26,. {ln(B 1) + 39 6r for h __ 2 (2.32) where Z0 6r+1 er—l 0.11 A = — . 6O 2 J“.s.+1(023+ a.) 377w 2Z.../E: In general, the larger the dielectric constant means that the traces can be thinner versus boards with smaller dielectric values. The transmission line thickness becomes important when deciding which transistor to use since the transistor pin spacing may be narrower than the transmission line width being used and this makes mounting the device quite difficult. 2.3 Two Port Networks 2.3.1 S—Parameters The transistors that are used for the amplifiers being designed will be treated as two port networks. This has the advantage of allowing the designer to not worry too much about the actual physical phenomena such as junction capacitances and lead inductance that occurs inside the transistor. Instead, all of the physical phenomena are accounted for by the measurement of its two port parameters. The two port pa- l2 rameters that are of primary concern are the scattering parameters, or S-parameters, which allows one to measure the wave-like behavior of the device. 8.1 ___) 32 Port 1 2 P9” Port 2 z... devrce Z02 bl <—— __. b2 Figure 2.4. Two Port Network Figure (2.4) is a block diagram of a two port device. On port 1, a1 represents the incoming wave to the device and ()1 represents the wave leaving the device. Similarly on port 2, a2 represents the incident wave into the device and b2 represents the wave leaving the device. In general, there will be some transmission through the network so both b1 and b2 will have some of its energy come from (12 and a1, respectively. There will also be some reflection at either port 1 and port 2, which also comprise a portion of b1 and b2, due to the waves impinging on these respective ports. To express the above mathematically b1 311 512 01 = (2.33) b2 521 S22 02 where ()1 Reflection coefficient at port 1 with $11 = — = (2.34) 0’1 a2=0 a matched load on port 2 l3 Transmission coefficient output to b 512 — CT: = port 1 due to an input on port 2 (2-35) a1=0 with a matched load at portl Transmission coefficient output to b 521 - 2131 = port 2 due to an input on port 1 (2-36) 02—0 with a matched load at port2 ()2 Reflection coefficient at port 2 with 322 — a— = (2.37) 2 a1=0 a matched load on port 1 The entries of the scattering matrix are typically complex numbers and are frequency dependant. This means that a phase plane must be established for a reference point at each port. If the phase plane is elsewhere along the transmission line, then the given S—parameter must be multiplied by em, where l is the distance moved from the given reference plane. Using S-parameters to model the transistors as wave-like devices first requires one to choose the configuration for which the transistor will be operated. The most fundamental configurations for a BJT amplifier are the common-emitter, common- collector, and common-base. Manufacturer data sheets typically give the values of the S—parameters when oriented as a common-emitter amplifier. Other properties which are given are the collector-emitter voltage and collector current. These are the bias conditions and they have a direct effect on the S-parameters as well as the noise figure of the transistor. Below is the model that will be used for measuring the transistor’s 2—port prop— erties configured as a common-emitter. Notice the two port model does not have the external bias circuitry included. This does not invalidate the model since by using ei- ther an RF choke or other means, it is possible to make externally connected circuitry 14 appear as if it were disconnected at higher frequencies. 0,—— a1——" *— a2 Port 1 Port 2 b1 ——’ b2 0 O Figure 2.5. BJT Two Port Model 2.3.2 Power Waves Since we are interested in the wave-like nature of the transistor, it is also reasonable to discuss the amount of power that is either being transmitted or reflected by the device. Ideally, the characterization will be related to the already known S—parameters of the device. Some notation must be defined first before proceeding. It should be noted that the following derivations come from [3]. Referring back to equations (2.8) and (2.9), V(z) and I (z) will be normalized by J70 and the assumption of a lossless transmission line (i.e. '7 = j B) will be used creates the following definitions a(z) = VJékqu b(2) = V_(Z)ejfiz The terms 22(2) and 2(2) are the voltage and current respectively, whereas a(2) and b(2) are the forward and reverse traveling waves as functions of position. These definitions are consistent with equations (2.13) and (2.14). Using these equations we can rewrite (2.8) and (2.9) as the following 11(2) = (2(2) + b(2) (2.38) 2(2) = (2(2) — b(2) (2.39) which again will allow equations (2.17) and (2.18) to be rewritten as a = g 2(2) +11 = Z—lfi W) + 2.12)] (2.40) 1 . l b(2) = 51222) —z1 = 2./z‘ [V(z) — 2.112)} (2.41) 21 mg “‘31.. fl + + 2 port + 20 o 20 E1 V(0)1 b (231 dewce b(2). W». 22 Port 1' Port 1 Port 2 Poft 2' ll: 0 "51:1 22:12 22: 0 Figure 2.6. Two Port Model with Load Figure 2.6 shows a source connected to a two port network and a load. The source provides the network with power. It is desirable to find out how much power is being delivered into the system as well as how much power is received at whatever load is 16 attached to the network, which in this case is Z2. The average power of an incident .wave is found in the following way P(Z) = R8[V+(Z)(I+(Z))’l = $119. [V+(z)(L;(:’l:] 1|V+(2)l2 2 Z, 1 2 = §la(3)| (2-4?) The reflected wave’s power can be derived in a similar manner as, the incident wave’s power; specifically P12) = $1112)? (243) From Figure 2.6, a Kirchhoff Voltage Law expression at 21 = 0 gives V(0)1 = E1 — ZolI(0)1 (2.44) if Z01 = Z1. Substituting this expression into (2.40) gives E1 0 = 2.45 a1( ) 2 Z01 ( ) or 2 _ IE1|2 |a1(0)| — 42... (2.46) Substituting (2.46) into (2.42) yields 1 E 2 131(0) = §|a1(0)|2 = |8Z10|1 = PAVS (2-47) The result of (2.47) represents the power available from the source (P AV 5) when the 17 source impedance equals the transmission line impedance (i.e. Z01 = Z1, or a matched source). The term P Avg is important and will appear later when discussing network power gains in Section (2.5). It is also worth noting that the power input from the source reaches 21 = 11 without any loss since there is no power loss in the transmission line. Suppose that the impedance is not matched at 21 = 0 (i.e. Z01 aé Z1). In this case there is a reflection at 21 = 0 as given by equation (2.21). This results in P1(0) not equaling P Avg. It is thus desirable to find what fraction of power does reach 21 = I]. Start again with finding the input power to the system using equations (2.40) and (2.44) this power is given by 1 5'01 (0M2: 8Z0. (ll/1(0 )|2+2.111(0)V1‘(0)+ZoiV1(0)II0( )+Zo21|11(0 )l2 ) (2-48) Similarly using equations (2.41) and (2.44) 1 2 '2'lb1(0)|= 8201(le(0 )l —Z..I.(0)V.*(0)—2.11/1(0)I;(0)+zg,|1,(o )1) (2.49) Taking the difference between the above equations gives 2|01(0)I2_%|b1(0)l2 = '1'(11(OV1) (0)+If(0)V1(0 )) = §Re[11(0)V1’(0)l (2-50) which represents the power delivered to the two port network at 21 = 0 which is the same as the power delivered to 21 = l1. The left had side of (2.50) will be denoted by P1(0) = P1(l1) = PIN. The term PIN is another term that will appear often later in the work, and is defined as the power input to the network. Therefore (2.50) can be 18 rewritten with a substitution from (2.47) as 1 2 §|b1(0)| = PAVS '- P1(0) (2.51) which is equivalent to 1 5119101)? = PAVS - P101) (2.52) Using the definition of the S-parameters at 21 = 11 shows |b1(ll)l2 : PAVS - P101) 5 2: I “l |(11(l1)|2 PAVS which can be rearranged to P101) = PAvs(1 — I511I2) The above equation relates Sn in power terms to show how much power is reflected from the port due to an input at port one. Now a derivation for how much power is transmitted through the two port network will be found by relating it to 5'21. First using the definition of 521, it is found that $21 = 5202) _ «7512-02) a1(l1) 02(12)=0 _ VZOIIr(ll) I;(12)=0 V 2021202) x/Z—ollflll) (2.53) 12+(12)=o For the rest of the derivation, assume that there is no transmission line between the the voltage source and the 2 port network of Figure 2.6 and that the location they meet is at 21 = ll as well as letting Z2 = Z02 at 22 = 12. This allows the rewriting of (2.40) as 0,101) = 1 201 2201 11+(ll) = [V1(l1)+ Z0111(l1)] (2.54) 19 Another KVL is written at 21 2 ll as “(11) 2 E1 — Zolllal) (2.55) Substituting (2.55) into (2.54) gives E1 + _ 1, (ll) — 2201 (2.56) At port 2 of Figure 2.6, the current is found to be V l 4202) = 2; 2) (2.57) 02 Substituting (2.56) and (2.57) into (2.53) yields _2\/Zolv2(12) 821-— «Z; E1 (2.58) Finding the power equivalent term of (2.58) gives %|‘/2(l2)|2/ZOZ s 2: ' 21' IE1I2/8Z01 (2.59) Recognizing that the denominator is what was defined earlier as P Avg and that the numerator represents the power that is delivered to the load, a new term is defined called the transducer power gain and is denoted as CT. If Z1 = Z2 = Z01 = Z02, then it follows from (2.58) that V2 821 = (EL) 2 which leads to G — (s (2 — V2 2 T _ 21 — E1/2 20 Similar derivations of equations (2.59) and (2.47) starting at port 2 can be used to find equations for 512 and 522. 2.4 Matching Networks In most cases, it is desirable to deliver power to a load in the most efficient manner. The concepts presented thus far have shown that power can be reflected at the inter- face between a transmission line and source impedance, or at the interface between the transmission line and the two port network. It possible to match the transmis- sion line to the either the source impedance or the two port network, but typically the transmission line will be matched to the source impedance since that is usually a system wide impedance. This means that there will be a mismatch between the transmission line and the 2 port network interface. The mismatch can be overcome by the design of matching networks which will transform the impedance of the 2 port network to appear as a matched load which maximizes power transfer. This is accom- plished by creating transmission line elements which act as circuit elements by means of equation (2.26) when assuming a lossless transmission line. The primary method that equation (2.26) will be implemented is with microstrip matching networks. For microstrip geometries, it is practical to use shunt elements which are either open or shorted to the ground plane. This then defines what the load impedance is in (2.26). Exploring the open case (Z L = 00) shows _ . 1+ J'(Zo/ZL) tanwl) Z," — 2113110020 (Zo/ZL) +jtan(fil) jZo —tan(fil) = —jZo cot(/31) (2-60) Figure 2.7 shows a plot of the above equation. Note that that values repeat over 21 Reactance of an Open Line ‘J'OOKBD 0 0.2 0.4 0.6 0.8 1 0 SIS 1 Figure 2.7. Reactance of an Open Transmission Line a period of n/\/ 2 where n is any integer and that the values are both positive and negative over the interval. Examining the case of the short circuit(ZL = 0) shows . ZL + jZo tanwl) Zin : l o . 211,120 Z Z, + 3ZL tan(fil) jZO tan(,Bl) (2.61) with a graph of the resulting equation in Figure 2.8. Just as in the case of the open line, the reactance is periodic every n/\ / 2 but is shifted to the left by /\ / 4. This implies that when designing a matching network that either the shorted line or open line can give the same desired reactance but one tradeoff then is the transmission line may be longer. The other major tradeoff lies in the fact that it is easier to realize a short as compared to a true open. Another transmission line that is of note is of length A/4. This changes the 22 Reactance of a Shorted Line jtan(B|) 0 0.2 0.4 0.6 0.8 1 0 S I S 1 Figure 2.8. Reactance of a Shorted Transmission Line argument of tangent to the following Al» (at: was where tan(7r/2) is undefined. Through some manipulation, equation (2.26) reduces down to = _0_ (2.62) Equation (2.62) has a special name called a quarter-wave transformer, and is usually used only if Z0 and Z L are real valued. If Z L and Z, are real valued, then Z," will also be real valued, thereby transforming from one resistance to another. All the designer 23 must do is find the appropriate Z, to transform between the two desired impedances. Since microstrip is being used, then the designer uses equations (2.32) to find the appropriate width to height ratio. The last case of note is a transmission line of length A / 8. The value of tan(7r / 4) or cot(7r/4) simply equal 1, which reduce equations (2.61) to Z," = jZo and equa- tion (2.60) to Zn = —jZo. Again the designer just needs to design for the desired impedance of the transmission line to create the purely reactive element. The length does not need to be restricted to l = A/ 8. Values of l = (2n — 1))\/ 8 where n is any integer are also acceptable. The only thing that will change will be the sign of Z," depending on which quadrant ,8l ends up in. Matching networks will be designed using various forms of the above equations as either series elements or parallel elements. For series elements, it makes sense to use the given impedance equations since impedances add in series. In practice, there will typically be some element that will be in parallel since these element themselves are purely reactive when used as opens or shorts on microstrip, thereby changing the reactive component of of a desired impedance. The problem is that the total impedance of elements in parallel have the form Z1 Z2 Z] + Zz Ztotal =3 (2.63) which when dealing with complex numbers is quite cumbersome mathematically. To make the computation of elements in parallel easier, first change the impedance of the element to an admittance which is done by the relation y = i Z Using the relationship of impedance to admittance and equation (2.63), it can be 24 shown that admittances add when in parallel. 2 Z.,.2_ +M+ 21 1_1 ._ __ 131W 2 Z — Y1+Y2 Yum: Finally, most all of the matching network design will be done on a Smith chart. A Smith chart shown in Figure 2.9 is a tool which allows for graphical solutions of Figure 2.9. Smith Chart equation (2.26). The circles which are completely contained in the chart represent 25 the real part of the impedance, whereas the circles which are partially contained are the reactances with those circles in the upper half of the plane being positive valued (e.g. inductance) and those in the lower half being negative (e.g. capacitance). The outer circle represents a reflection coefficient I‘ = 1 while I‘ = 0 when at the origin. Hence, a short would be located on the centerline at the extreme right while a open lies on the centerline of the extreme left. Note that from equation (2.21), I‘ can be complex valued and therefore also has an angle associated with it when in polar form. The numbers that are drawn on the outside of the circle represent these angles. To use the Smith chart, the impedance of a load or source must be normalized by the characteristic impedance of the transmission line. The impedance is then found on the Smith chart and graphed. A line is drawn from the center of the circle through the impedance. The linear distance from the center of the circle and the angle that the ray passes through represent the reflection coefficient of that load when normalized to the given impedance. If it is desired to see what the input impedance would be if a wave traveled of length l, then another circle is drawn centered about the origin in a clockwise manner until the length I has been traveled. The length l is normalized by the actual wavelength in the media of propagation. The value where the circle stops being drawn is the normalized input impedance as seen by the source. Multiplying this number by the characteristic impedance gives the actual resistance value. Also, the reflection coefficient magnitude did not change; however, the polar angel did. This method may sound complicated at first, but when compared to the complex math which is necessary for equation (2.26), matching network design is usually quicker and easier when using a Smith Chart. 26 2.5 Signal Flow Graphs The S—parameters described in section 2.3.1 can be implemented by means of a signal flow chart. By using this method, it is possible to define additional terms which are associated with RF transistor amplifiers. This is by no means the only way to derive the following information (see [3] for two derivation methods), but it allows for insight without being overly concerned with the details. The signal flow model for a two port device is shown in Figure 2.10 The nodes 81 A 331 22 % Sn [522 b1 512 8.2 Figure 2.10. Two port signal flow graph model represent signals and the branches represent systems [5]. Some general rules that will apply to signal flow graphs are listed below [3] 1. Each variable is designated as a node. 2. The S-parameters and reflection coefficients are represented by branches. 3. A branch enters dependent variable nodes and emanates from independent vari— able nodes. The independent variable nodes are the incident waves and the reflected waves are dependent variable nodes. 4. A node is equal to the sum of the branches entering it. 27 5. Travel from node to node is only permitted in the direction as indicated by the arrow, and when that does occur, the signal is multiplied by the value adjacent to that arrow. For example, b2 = 01521 + 02522 which is identified as part of the definition of S parameters. Moving between nodes in Figure 2.10 is quite simple. There will be other systems which are more complicated and require more complex methods for analysis. One way to do this is through Mason’s Rule [5] which provides a formulaic way of analyzing these systems. Mason’s Rule gives the transfer function of a system when starting from an independent node and traveling to another node and is shown as T A __ Ending Node _ ; k k (2 64) ” Starting Node _ A ' where k = the number of forward paths T), = the kth forward-path gain A = 1 — 2 loop gains + E non-touching-loop gains taken two at a time —2 non-touching-loop gains taken two at a time + . . . A)c = A — 2 loop gain terms in A that touch the kth forward path This equation can become quite complex for large systems, but since there are rela- tively few forward paths in the two port model being used, the equation (2.64) does not become unmanageable. A representation of Figure 2.6 as a signal flow graphs must be made to allow for 28 use of Mason’s rule. To modify port one, an equivalent circuit must first be developed which is shown in Figure 2.11. Performing a KVL on the circuit shows Figure 2.11. Port 1 equivalent circuit and signal flow graph E, = I Z, + Vg Recalling that a V = V+ + V‘ and I = 1+ — I ‘ for waves gives 9 9 Z. _ _ E.=Z(v+-v>+(vg++vg) Solving for V; yields V9+ V; Z, — Z0 Es\/Zo = 2.65 «‘2. mz,+z,+z,+z, ( l which can be rewritten as (11 = bll‘s + b8 (2.66) where V+ a1 = g x/ZT V— ()1 = g 29 b _ EMZ ’ _ Z.+Z. z—z Pa = 8 O Zs+Zo Equation (2.66) can be represented in signal flow graph terms and is shown on the right side of Figure 2.11. The output signal flow graph must also be derived. The model for the output is shown in Figure 2.12. Similar to the derivation for the input signal flow graph, a is l: S+ It] Figure 2.12. Port 2 equivalent circuit and signal flow graph KVL is performed around the circuit giving the following equation VL = —ILZL when written in terms of traveling waves gives Solving for VL+ and normalizing by V70 v; _ V; ZL—Zo (2 67) \/—Z:-\/Z—OZL+ZO . 30 This can be rewritten in terms of wave quantities as a2 = 1321“,, (2.68) where V3 «70 V; x/Z ZL " Z0 ZL + 20 D to I 8" II A composite model can now be defined from the two port network in Figure 2.10 and the networks developed in Figures 2.11 and 2.12 and is shown in Figure 2.13. b1 512 a2 Figure 2.13. Two port signal flow graph An important quantity for amplifiers is the input reflection coeflicient, F m, due to an arbitrary termination at the output as shown in Figure 2.14 The mathematical definition of the input reflection coefficient is F m = b1/ (11. This is in the form that allows for use of Mason’s rule since a1 is now an independent variable. The first step for Mason’s rule is to find all of the forward paths from a; to b1. There are two, one 31 FIN SI 1 S22 If. < v < b] 5]: a2 Figure 2.14. Model for FIN computation of which is T1 = Sgll’ L512 and the other is T2 = Sn. Loop gains must also be found. There is only one loop gain, which is SngL. Next, A must be found which is simply 1 — SggFL. Finally, A,c must be found for each Tk, so A1 = 1 and A2 = 1 — ngFL. Substituting into equation (2.64) gives 511(1— 522R) + SIZS2IPL I‘ __ IN 1 - 5'2er 1 - S22P L _ 512S2IFL PIN —- $11 + 1 - :52er (2.69) A similar derivation can be obtained at the output to find the output reflection coefficient which is defined as Four = bz/az where the input has an arbitrary source impedance, b, = 0, and a2 is an independent node. By applying Mason’s rule again, the following equation results 312521Ps F = S —— OUT 22 + 1 _ SIIPS (2.70) The power delivered to the load is just the power of the incident wave minus the power reflected from the load, or 1 I 1 PL = §Ib2|2 — §|a2|2 = Elbzlzu — [FL|2) (2-71) 32 If the circuits from Figures 2.11 and 2.12 were not connected to a two port network, then the signal flow graph in Figure 2.15 would be created. Figure 2.15. Model for P Avg computation Recall that the definition for P Avg requires that a matched load be attached to the network. The P Avg is equal to the power leaving the source minus the power that is returned to the source giving, PAVS = Elall - §[bl[ (2.72) If the load attached is a matched load (i.e. I‘L = I‘g), then a1 = b, + I‘Sl’gal and bl = I‘gal, which gives be = ————-- 2. a1 1 _ IFS|2 ( 73) bsl‘g = —— 2. 4 Substituting equations (2.73) and (2.74) into (2.72) yields 1 Elbslz (2.75) AVS = 1_ [PSI2 33 Recalling that the transducer power gain (GT) is the ratio of the power delivered to the load (P L) to the power available from the source (P AV 3), the following equation is now created : PL = [[32]2 PAVS Ibs|2 GT (1‘ [FL]2)(1_ IFSI2) (2-76) The ratio of bg/bs can be solved with Mason’s rule and after some simplification is given by b2 S21 __ = 2.77 b3 (1 — SllPS)(1— 5'2er) — SizszirLrs ( ) Substituting equation (2.77) into equation (2.76) gives a. : |S21|’(1-|I‘L|’)(1 — II‘slz) [(1— SIIPle - S22FL) — 51:25'21FL1‘SI2 which simplifies to 1"II‘SI2 2 1- [1‘le G = —— S 2.78 T (1—rmrsll 2" |1—322PL|2 ( ) The operating power gain (GP) is defined as the ratio of the power delivered to the load, P L, to the power input into the network, Pm. Describing P, N in terms of signal flow graphs is shown here. 1 1 PIN = §IGII2 " §lbll2 PIN has a similar definition as P Avg, but the distinction lies in the fact there is no restriction placed on the load impedance, therefore the definition is modified to 1 1 1 Pm = §lail2 - 5W2 = 5(1— |P1N|2) where I’m is a function of the S parameters as well as the load impedance. 34 Now G p can be written as G _ PL _ [b2[2(1-|FL[2) P _ — - 2 2 PIN [all (1‘ [PIN] ) Dividing the numerator and denominator by b, gives b2 2 2 P ,— (1— 1m > GP = F—L— = as (2.79) “V 7,1 <1 — Irmm then finding the ratios of bg/bs and a1 /bs by Mason’s rule gives the final form of G p which is _ 1 G P |1 — 5221“,]? [521]2 (2.80) One last power term which needs to be defined is the power available from the network which is the power delivered to a conjugately matched load and is written as 1 l PAVN = PLlrL=rgUT = [5W2]2 - §|a2]2] = r‘Lzl‘bu'r [$22120 — mm] = glam — Iran?) (281) FL=FOUT This allows one more gain term to be defined, which is called the available gain and is shown as P b 2 G. = A” = '—2'—,<1—Ir0m12><1—Irsl2) (2.82) PAVS [b3] Using Mason’s rule again on the ratio bg/bs, substituting into equation (2.82) gives 1 1— lf‘sl2 G _ A 1— [POUT12 — [1- .32ng]2 [S2ll2 (2.83) 35 2.6 Noise Noise is a phenomenon which is both naturally generated as well as man made. In either case it is undesirable when developing systems which require a high sensitivity to low powered signals. Noise is typically classified into two broad categories [11]. One category refers to the types of noise generated by devices inside of a receiver such as resistors, electron tubes, and semiconductors. The other category refers to those noise sources which are external to the receiver and examples of these would be lighting discharge and cosmic radiation. Obviously the designer has no control of the latter of these types of noises, but can control those of the former. 2.6.1 Noise Sources One source for noise is thermal noise which is defined as the noise generated by the random motion of electrons in a conductive medium. Nyquist was one of the first people to have studied thermal noise. His theorem on noise states that the root- mean-square (RMS) noise voltage appearing across a resistor of value R ohms at temperature T in kelvin across a bandwidth B in hertz is given as aims = 4kTRB (2.84) where k is Boltzmann’s constant. Another type of noise is called shot noise. Shot noise is caused by the quantized and random nature of current flow [4]. When a DC current is flowing in a device, there is some average current flowing in it, Io, but does not indicate any variation or frequency of this variation that is indicated from the average current. Schottky’s theorem relates this average current to the noise generated as shown below 36 where e is the charge of an electron in coulombs and B is the bandwidth in hertz of the circuit. Other types of sources of noise are generation-recombination, temperature fluc- tuation, and flicker noise. Generation-recombination is caused by electron hole pairs being recombined in a semiconductor and is typically classified as a shot noise. Tem- perature fluctuation noise is caused by the temperature interaction of the device with its environment. Flicker noise is a type of noise that is characterized by its Spectral density that increases with decreasing frequency [11]. 2.6.2 Noise in Systems Figure 2.16 shows two amplifiers which are cascaded and have available gains of GA, and G A2. The resistor is acting as a noise source and has a signal input power PM U2 P i : 11,1‘m8 = k N 4R ToB where To is a temperature of 290°K (for room temperature). Each amplifier has its own contribution to the noise of the system and is denoted as Pnl and Pu2 for amplifiers one and two respectively. The noise output from the system is simply labeled as PNO. Amplifier 1 Amplifier 2 . + o G“ Rd: (3:1. R1 G52 1:1: ZL Pnl P112 Figure 2.16. System noise figure model 37 One characteristic of an amplifier is its noise figure which defined as the ratio of the signal-to-noise ratio (SNR) power at the output of the amplifier to the signal- to—noise ratio power at the input of the amplifier [10], or expressed mathematically as __ PSi/PNi F— PSO/PNO am) where P5, is the input signal power and P30 is the output signal power. Equation (2.86) can be rewritten by using the fact that GA = Pgo/PS, as PNo F = 2.87 PNiGA ( ) Referring to Figure 2.16, it is easily seen that the output noise power is PNO = GA2(GA1PN1 + Pn1)+ Png (2.88) Dividing both sides by G A20 AIPN, gives PNO P711 P112 F=-——=1+-—+—— 2.89 GAZGAIPNi GAIPNi GA2GA1PNi ( ) or alternatively F — 1 F=E+ 2 am) Gm where Pnl F = 1 1 + PNiGAl P112 F = 1 2 + PNiGAZ F1 and F2 are called the individual noise figures of the first and second amplifiers respectively. 38 Closer inspection of equation (2.90) shows that the overall system noise figure is reduced by the gain of the first stage. The problem is that the higher the gain, the higher the noise figure for that stage typically. Thus, there is a tradeoff in the first stage amplifier; does one increase the gain of the first stage to reduce the noise contri- bution from the second stage or does one design for reducing the noise added by the first stage amplifier by lowering the gain at the cost of having a greater contribution from the second stage? The answer to this lies in a term called the noise measure (M) and is found to be 1 (2.91) 1__ GA If equation (2.91) is computed for each stage, the amplifier with the lower M should be the first stage amplifier. This will ensure that the system noise figure be at its lowest. 39 CHAPTER 3 Amplifier Design 3.1 Stability A stable amplifier by definition is one which does not oscillate. A two port network is unconditionally stable if the reflection coefficients at both ports are less than one. When referring to Figure 3.1, [PIN] and [Four] are these port reflection coefficients. A value of greater than one represents that the port being measured has a negative Figure 3.1. Reflection coefficient diagram of a two port model. 40 resistance, which is shown by solving equation (2.21) for Z L. 1 + I‘ Z = Z,— L 1 — I‘ If Z L is real valued and F > 1, then the denominator is negative which in turn implies Re[ZL] is negative as well. Figure 3.2 shows the transistor amplifier with both input and output matching networks attached. Recall that FIN (equation 2.69) is a function of the S-parameters Io... 2. 28 Z... Z’ Input Output E1 Matching ’ 9 Matching Z2 New“ 1 r l r Network | l f l l Pa 1; Fm 1801‘ 1f. 1“b Figure 3.2. Transistor amplifier with input and output matching networks. of the transistor as well as FL and that Four (equation 2.70) is a function of the S-parameters of the transistor as well as F3. The designer will have some nominal frequency when designing the amplifiers, so the S-parameters for the transistor will not vary at that frequency. The only values that can change for a given frequency are PS and FL. The arbitrary selection of these could cause an instability, thus it is desirable to know which values of F3 and I}, will prevent this from happening. Since most of the design process will be done on the Smith chart, it is desirable to be able to show what regions where these passive terminations could cause an instability. 41 The derivation of the stability circles is given in [3], but the general procedure is to let [FIN] = [Pom] = 1 and find for which values those correspond to for F1, and F3 in equations (2.69) and (2.70) respectively. The FL stability circle is given by _ 512521 "L ‘ lav—mm ‘3'” CL ‘ lav—mm (3") where TL is the radius of the circle, CL is the location of the center of the circle is on the Smith chart, and A8 = 511522 - 51252] Similarly for F5 _ 5.23.. ’5 ‘ ISnIZ-lAslz (3'3) CS ‘ lam—M (3'4) where 73 is the radius of the circle, CS is the location of the center of the circle, and A, has the same definition as above. The drawing of these circles on the Smith chart will likely create an overlap with the Smith chart. The region of overlap is the area in which the amplifier is unstable as long as Sm, < 1, where Sm, is either Sn or $22. The region of stability is anywhere else on the Smith chart. If the stability circles do not overlap on any region of the standard Smith chart, then the transistor is then classified unconditionally stable at that frequency since no selection of a passive FL or F3 network will cause an instability. The necessary and sufficient means of showing unconditional stability is given in 42 Appendix B of [3] but here is summarized as K > 1 and IA.I < 1 where = 1- |511|2 — [3:22]2 + |A3|2 K 2[512321]2 (3.5) If neither of these two conditions are met, then the transistor is potentially unstable and the stability circles must be plotted to find which regions are considered stable. 3.2 Standing Wave Ratio One important aspect of any amplifier design is the standing wave ratio (SWR) on that transmission line. The definition of SWR is the ratio of the maximum voltage (or current) to the minimum voltage (or current) on a transmission line. For VSWR. this is shown as leaxl _ 1+ IFI SWR = -— [Vminl 1 - IF] (3.6) Recall that F in equation (2.21) is a function of the characteristic impedance as well as the load impedance. If F = 0 then it is easily seen that equation (3.6) is equal to one. If Z L aé 20 then the reflection coefficient is non-zero. Any non-zero value for I‘ causes (3.6) to become a value greater than one. Horn this, it is intuitive that an SWR value near one is desirable as it implies that the impedances are matched. In transistor amplifiers, a SWR can not only be due to an impedance mismatch, but is also due to the actual matching networks which are connected to the input and outputs of the transistor, as will be shown below. 43 Before explaining how the input and output networks affect SWR, a small dis- cussion must be made about gain and power relationships. This will lead to the derivation of how SWR is affected by these networks. A summary of the gain terms of importance defined in section 2.5 is given by P power delivered to the load PMS power available from the source _ P _ power delivered to the load GP _ P7,; — power input to the network _ P power available from the network GA _ PAVS power available from the source GT: If the ratio of CT and GP is taken, the P L terms will cancel and the following expres- sion is found a: = Pm GP PAVS If this ratio is equated to some constant called the mismatch factor, then the following equations are defined PIN = PAVSMs (3-7) GT -_- cpM, (3.8) where M,3 is called the source mismatch factor and can be written as 1 — IPSI2)(1— [FIN|2) I1 _. FSFINI2 M, = ( (3.9) Similarly, an output mismatch term can be found by taking the ratio of CT and GA with the final resulting equations PL = PAVNML (3-10) CT = GAML (3.11) 44 where M L is called the load mismatch factor and can be written as (1 - IFL|2)(1- IFOUTI2) M = 3.12 L [1" 1"ou'rI‘le ( ) Referring to Figure 3.2, the term Fa is a reflection coefficient as seen by the source for the entire transistor network. It follows from here that the input SWR will be defined as (3.13) The input power into the system from the source is P IN = P Avs(1 — |F3|2). Using the above equation and equation (3.7) gives the following result M, = 1 — |1‘,|2 01' (m = (/1— M, (3.14) Substituting the definition of M3 into (3.14) gives _ 2 _ 2 _ * 111.1: )1} lFsl)(1 Irm|)_lrm 1‘. (3,5) ]1_PSFIN[2 _ l—FINFS Examination of equation (3.15) shows that SWR,n is a function of PIN and F3, where I‘m itself is a function of the S-parameters of the transistor as well as the output matching network, FL. Equation (3.15) also shows that if I‘m = g, then [Pa] = 0 which will cause SWR,n to equal one. The output SWR is defined as 1+ [Pb] SWROUt : 1_ [Pb] (3.16) 45 where H, is the reflection coefficient at the output of the transistor network as seen by the load. Using the concept of the load mismatch factor then [Pb] can be written as 1‘1. = 1— ML (3.17) Substituting (3.12) into (3.17) gives POUT — PE 1 — POUTPL 111.1: \/, _ <1 — 111.190 — [Pourl2l ___ (3,8) I1 — POUTPLIZ This shows that [R] is a function of Four and I}, where Pour is a function of the transistor S-parameters as well as the input matching network PS. If I‘L = Pbur: then [R] = 0 thereby causing SWR“, to equal one. 3.3 Bilateral Conjugate Match By definition, a bilateral conjugate match occurs if I‘S = IN and I‘L = FOUT Recalling equations (2.69) and (2.70) and using the conditions for a bilateral match give SIZSZIFL r* = s ___— .1 S “+1—-522rL (3 9) S12S21Fs 11* = ___ .2 1. 522+1_ 5111.3 (3 0) 46 The simultaneous solutions of (3.19) and (3.20) give the following results 131 :l: B? — 4(0112 PM, = 201 (3.21) PM, = 32* 28:;— 4IC’P (3.22) 31 = 1+l511|2-|522|2-|As|2 (3-23) 32 = 1+|522|2—|511|2-|As|2 (3-24) 01 = 5.1—6.8;, (3.25) 02 = 822—833;, (3.26) where I‘M, and F11“, represent the bilateral conjugate matched values. The next question to ask is what sign is used in equations (3.21) and (3.22). The proofs for which sign to use are in Appendix E of [3]. The results say that if [Bl/201] > 1 and 81 > 0 for equation (3.21), then the solution with the minus sign is appropriate to produce |FM3| < 1. If [Bl/201] > 1 and BI < 0, then the plus sign is used to produce ll‘Msl < 1. Similar requirements are used for equation (3.22) on which sign to choose. A bilateral conjugate match can occur only if the the transistor is unconditionally stable for that given frequency. This is the case since only in an unconditionally stable transistor will all of the Smith chart be available for the selection of I‘M, and I‘ML. Under a bilateral conjugate match condition, then the transducer power gain, equation (2.78), then can be simplified to G max = S 2 3.27 T 1— IrM.|2' 21' 11— 5221‘»!le ( ) which after substituting equations (3.21) and (3.22) reduces to _ [$21] ,/ 2 GTmax "" W(K — K _ 1) (328) 12 47 As a side note, under bilateral conjugate match conditions CT = G p = G A, which also implies GTmax = Gpmax = GAmax. There will always be cases where the transistor is not unconditionally stable, but it is desirable to know what the maximum gain could be and still be stable. Under this scenario then a different type of measure is used to determine what the maximum Stable gain is. The maximum gain is Slmply found by G 3.29 3.3.1 Design Procedure The design procedure for unconditionally stable transistor is quite straight forward. 1. Compute PMS and I‘ML from equations (3.21) and (3.22) respectively. 2. Design an appropriate matching network to the values found for I‘M, and I‘ML. The properties associated with a bilateral conjugate matched amplifier are SWR“, = 1, SWRout =1, and that the maximum gain possible is being used. If these are the design criteria then this is the ideal, but it will be shown later that an amplifier in this configuration will not always have the best noise performance. Also, a bilat- eral conjugate match will not always be possible, so other design methods must be developed to achieve the desired operating performance. 3.4 Operating Power Gain When the bilateral conjugate match is not necessary or if the transistor is potentially unstable for the desired operating frequency, then a design utilizing operating power offers a viable alternative. Gonzalez says that since the operating power gain is inde- 48 pendent of the source impedance, then this is the recommended method for practical amplifier design [3]. Starting with equation (2.80) and substituting equation (2.69) for FIN gives (1- which is rewritten in compact form |521|2(1 — WW) 2 M > '1 _ S22FL|2 GP: 1 - 5221—1 GP = |S21l29P where 1- |PL|2 9,, I1 — 522FLI2 - '511 — AsFle 1 — II‘LI2 = 3.30 1- |~S‘11|2+|1‘L|2(|522|2 - IA.|2> — meme.) ( ’ Notice that 9,, is a function of FL and the transistor S-parameters. Since the S-parameters are fixed for a given frequency, the only true variable is I‘L; thus, it necessary to find which values of PL will give the desired value for gp. A mapping of these values of FL will be graphed on a Smith chart to aid in the design. A derivation of these equations is in Appendix G of [3] and are merely presented here. The radius of the circle drawn will be denoted as no and the location of the circle center is given as Cp. Mathematically ll‘L — Cpl = rp (3.31) where C = 911C; p 1+ £ho(|522|2 — lAsl2) (3.32) 49 and \/1— 2K|521512Igp +|S21512|29122 — 1 + 9p(lS22l2 — IASlZ) T19 (3.33) 3.4.1 Design Procedure There are two possible cases that must be considered when designing by this method and those are if the transistor is unconditionally stable or not. Unconditionally Stable 1. Choose a G' p < 0pm,, and find gp. 2. Find the center and the radius for the given operating power gain by equations (3.32) and (3.33) respectively and plot the circle onto the PL Smith chart. 3. Select the desired I‘L somewhere along the plotted circle. 4. Compute I‘m from equation (2.69). 5. Maximum power transfer will occur if FfN = PS so this is the value that should be chosen for PS. 6. Since both PS and I}, have been found, design the matching network to these values. Conditionally Stable 1. Choose a GP < GMSG and find gp. 2. Find the center and the radius for the given operating power gain by equations (3.32) and (3.33) respectively and plot the circle onto the PL Smith chart. 3. Select the desired I‘L somewhere along the plotted circle that is inside the Smith chart and away from the instability circle. 50 4. Compute I‘m from equation (2.69). 5. Since the transistor is only conditionally stable, the choice of PfN = F3 may not be available due to the fact that the region of instability may be covering that value of PS. Instead choose a value of F3 far enough away from the stability circle but still somewhat near I‘fN. This will help keep SWR,“ as small as possible. 6. Once a value for PS has been chosen, then design the input and output matching networks for the values found for PS and FL. Suppose that FL is chosen such that I}, aé F M L for the design specification of some G p < Gpmax. This will create an SWR“, > 1. This shows that there is a trade-off in one parameter for another, where in this case the gain is desired to be reduced but has the overall effect of changing SWRout. These decisions will be the theme throughout any transistor amplifier design. Also, the choice of an operating power gain does not imply that is the total gain of the amplifier. Instead it will be the maximum possible gain the amplifier could have. This is also true for the available power gain scenario to be discussed in the next section. The true gain of the amplifier is the transducer power gain, GT, and corresponds to the measured 5'21 on a network analyzer. 3.5 Available Power Gain Available power gain design procedures are similar to that of the operating power gain. The difference lies in the fact that available power gain can be found to be independent of the load impedance attached. 51 Starting with equation (2.83) and substituting equation (2.70) for Four gives 5 21— P 2 GA 2 l 21' ( l 3| ) : lS21|2ga (334) 2 (1_ M )l1_5,1r8|2 1—511Ps _ GA _ l—Il‘sl2 9“ 182.12 1— |522|2 + IPsl2(lSul2 - lAslz) - 2Re where The term 90 is a function of only 1‘3 and the transistor S-parameters. Similar to the operating power design, the only true variable for the available power gain is I‘s since the S-parameters are fixed for a given frequency. Circles will be drawn onto a Smith chart to find all values of PS which will solve for the desired go. The radius of the circle and center of the circle will be defined as 7“,, and Ca respectively and are found to be 1-2K a S S 2 2 Ta 2 \/ |521512|§ +| 2: ml 9.. (3.35) l1+ga(lSll| — lAsl )I C, gacl (3.36) _ |1+ 9.2(ISuI2 - IA3|2)| 3.5.1 Design Procedure There are two possible cases again that one must consider and those are if the transis- tor is unconditionally stable or not. Both procedures are similar, however the choices for PS and FL are limited in the conditionally stable case. Unconditionally Stable 1. Choose a desired GA < CAM; then find 90. 2. Compute Ta and Ca from equations (3.35) and (3.36) respectively and plot the circle onto the PS Smith chart. 52 3. Select a value for PS along the constant gain circle. 4. Compute Four from equation (2.70). 5. Choose Pour = I], since this maximizes the power transfer as well as makes SWR-out = 1. 6. Design the matching network from values found for I}, and PS. Conditionally Stable 1. Choose a desired G A < GMSG then find go. 2. Compute Ta and Ca from equations (3.35) and (3.36) respectively and plot the circle onto the F3 Smith chart. 3. Select a value for PS along the constant gain circle which is in the stable region and is not too close to the unstable region circle. 4. Compute Four from equation (2.70). 5. Choose a I}, in the stable region near Fbu'r but not too close to the stability circle. This will help to minimize SWRout. 6. Design the matching network from the values found for I}, and PS. 3.6 SWR Circles As was seen in the potentially unstable cases for the designs of both the operating and available power gains, a conjugate match could not be obtained in most cases. Instead the designer had to chose between amplifier gain versus SWR. Suppose that there was a specification for a fixed SWR at either the input or output of the amplifier, then it would be nice to know for which values of FL or F3 would give that SWR to meet the 53 design requirements. Since all designs are done on the Smith chart, it is desired to find an equation which will draw constant SWR circles onto their respective planes; SWR,n circles will be plotted on F5 and SWR“, circles will be plotted on I}, The equations used to draw the constant SWR,n circles on the PS plane are PIN(1 - lFalz) CV,- = 1 _ IFaP1N|2 (3.37) _ I1“..|(1 —|I‘1N|2) TV.- — 1 _ IPaFIle (3.38) where CV,- is the circle center location, rv, is the radius of the circle, and SWR,n — 1 IP.I — ___—SWR... H (3.39) The circles that are drawn represent the all of the values for a chosen I‘s which will give a constant SWR,n at the desired level. Similarly for the output, the equations are PBUTU - IFbl2) C = 3.40 v., 1 - IFbI‘ourl2 ( ) I‘ - I‘ 2 TVO l b|(1 l OUTI ) (3'41) 1 — leFOUTIZ where CV0 is the location of the constant SWRout circle center, Tvo is the radius of this circle, and SWRout "' 1 SWRout + 1 lrbl = (3.42) The circles that are drawn represent those values for a chosen I}, which will give a constant SWRout at a desired value. 54 3.6.1 Design Procedure Designing for a desired SWR value can be quite complicated. There many different values that one can chose for either F5 or I‘L, all which will have an effect throughout the design. The procedure is more or less a guideline since there is no set way to do this. Suppose that SWR,n is the restricted parameter in the design and SWR“, is less important. The general procedure then would be as follows: 1. Choose a value for 0;: such that G p < G pm“ if the transistor is unconditionally stable or G p < G MSG if the transistor is conditionally stable. 2. Find the center and the radius for the given available power gain by equations (3.32) and (3.33). 3. Choose a value for I‘L along the G’ p circle that is in the stable region. 4. Compute FIN from equation (2.69). 5. The ideal choice for F3 is the case where F5 = I‘fN. That choice may not be available since the transistor may be conditionally stable. If SWR,“ has a design limit, use that value in equation (3.39) to solve for II‘al 6. Use equations (3.37) and (3.38) to compute the constant SWR,” circle. Choose a value for F3 that is in the stable region not too close the stability circle. 7. Compute Pour from equation (2.70) using the value selected for F3. 8. Compute SWRout by first finding IFbI from equation (3.18) then use equation (3.16). As can be seen, the procedure is quite involved. Even worse, initial choice for FL and the final answer of Four may cause an unacceptable result for the output 55 SWR. In this case then one would have to start almost completely over to find values for I}, and Four which would provide an acceptable result for SWRout. However, there will still be a limit to how well SWR“, can be. One way to achieve a better SWR“, is to loosen the requirements on the input SWR. This will only work so well, but it illustrates again this concept of give and take on operating parameters for the amplifier. A similar procedure is developed in the case where the output SWR needs to be a certain value. 1. Choose a value for G A such that G A < G Am” if the transistor is unconditionally stable or G A < G MSG if the transistor is conditionally stable. 2. Find the center and the radius for the given available power gain by equations (3.36) and (3.35). 3. Choose a value for F3 along the G A circle. 4. Compute Four from equation (2.70). 5. The ideal choice for FL is the case where I‘L = PbU'r- That choice may not be available since the transistor may be conditionally stable. If SWRout has a design limit, use that value in equation (3.42) to solve for II‘bI 6. Use equations (3.40) and (3.41) to compute the constant SWRout circle. Choose a value for I‘L that is in the stable region not too close the stability circle. 7. Compute I‘m from equation (2.69) using the value selected for FL. 8. Compute SWR,n by first finding II‘al from equation (3.15) then use equation (3.16). 56 3.7 Noise Figure Circles One final design consideration given for transistor amplifiers is the noise figure. In some applications, such as telecommunications, it is desirable to have a low noise receiver so that a minimal amount of noise is added to the signal for processing of the information. In this regard, a designer may deem the noise performance more important than those discussed above which again adds another layer of complexity to the design of the amplifier. The noise figure of a two port amplifier is found to be Tn F = Fmin + g— lye - yoptl (3'43) 8 The derivation of this equation is found in Appendix L of [3]. The goal is to ma- nipulate equation (3.43) in a way such that it can be plotted onto the Smith chart such that a graphical approach can be maintained in the design. The first step is to express ya and ymin as reflection coefficients defined as _ 1—rS ys _ l-l-Ps _ 1—1‘opt y0pt — 1+Popt Substituting these equations into (3.43) gives 47'an3 — Poptlz F = Fmin + (1" lPSl2)l1+ I‘optlz (3.44) The terms Fmin, 7‘", and F01), are all provided on the data sheets for a given RF transistor. Note that sometimes Fm,“ is called Nfo by some manufacturers. Allowing 57 F = E, where F,- is the desired noise figure and using Fl ‘- Fmin N,- = Tu + I‘.,,,,|2 (3.45) in equation (3.44) gives IFS - Poptlz —— = N,- 3.46 1 _ IFSIZ ( ) where N,- is referred to as the noise figure parameter. Equation (3.46) can be manip- ulated to rs — 11:?“ 2 = N? +3913:th (3.47) which is easily identified as a circle centered at CF.- = 13"]; (3.48) with radius m = 1+1N.- W + N,(1 — (romp) (3.49) Also from the left hand side of equation (3.47), the noise figure circles are plotted on the F3 plane. To use equations (3.48) and (3.49), equation (3.45) is first used to find a value for Ni. Equation (3.45) requires the desired design noise figure F,- must be chosen such that it is greater than Fmin. 3.7 .1 Design Procedure If noise is the most important aspect of a design and must be at a minimum, then the choice for F3 is quite easy. It is given on the data sheet. The procedure for available gain circles is then followed. The draw back to this choice for F3 is that the input SWR may be beyond the desired specification. If the restrictions on the noise figure are relaxed, then one can tune the other performance characteristics. 58 There is no true procedure that can be broken down into discrete steps for this design. Instead, adapting the idea that the noise figure circles are more of a guide will be beneficial. The only part that can be done procedurally is as follows 1. Choose a value for a target noise figure (E). 2. Compute N,- from equation (3.45). 3. Compute the circle center and radius from equations (3.48) and (3.49) respec- tively. 4. Plot the circle on the F3 plane. The next steps (such as gain and SWR) are up to the designer as to which aspects are most important. Use any of the above procedures as a guide on what to do next. The only addendum to the above procedure is that the choices for PS should be near the desired noise figure circle if all other choices for F3 are otherwise equally as good. 59 CHAPTER 4 Software Tools with Updated Design Procedures Last chapter dealt with design procedures which were to be done by hand on Smith charts. As was touched on before, this technique can be, and is, quite tedious. Even after going through one of the design procedures mentioned, the results may be un- satisfactory for the design requirements which leads to going through the procedure again however many times until an acceptable design is found. This sort of repetitive nature of the above design process lends itself perfectly to the use of a computer application to aid in the design. 4.1 Using the Design Program Matlab was chosen for the computing environment due to it’s presence on university campuses. In addition to having the main program files, there are some thirty other files necessary for various function calls and scripts. Ensure that the folder location for all of the files has been added to the path, or change the active directory to this folder location. Once the path has been set, type “AmpDesignerm” in the command window. The GUI then opens as well as two other figures which have more detailed 60 ROM“ 00m (‘1‘ . it "so.” " «15 22mm m1 ! «mm 69 «me cm was . 418? um 4m Gum-S mm “L mt. Mb Mad "the I 6‘ QQWO‘ it! *. again "In“ 1.- Gmsme-OL Gan-Lhoms sumac C “.1 Figure 4.1. Screenshot of the Microwave Amplifier Design Program mm mm? J lol— N‘0 (a) fi..____| L 1,7 womb'rémm L 1— . f . a»; 1; . ., ()5. a °l ‘3 32L E§ lgEE I 93 E} E}? E 33‘ £3 E a .‘ :‘JcJ . A wwmmna -_‘2__J . Smith charts for PS and I}. Figure 4.1 is a screenshot of the program that is used for the design of microwave transistor amplifiers. The upper left hand corner is where the user inputs the S parameters for the desired frequency. Underneath the S-parameters group box is the place to enter the the noise parameter data. Once the information has been entered, it is possible to save the data so that it does not need to be retyped. Simply click on “File —» Save Transistor Parameters.” Under the same menu is the “Load 'IYansistor Parameters” used to fill in the saved S parameters and noise parameters into the appropriate boxes. As a minimum, the S parameter data is required for any amplifier design. The noise parameters are optional and will not affect the operation of the program if they are blank; the user will simply not be able to plot constant noise figure circlas. Once the information has been entered into appropriate boxes, then the user should click on the “Compute Stability Values” box. This will do two things; it plots the stability circles onto the F3 and FL planes, and it causes two boxes to appear. One of these boxes is called “Results” and the other is called “Circle Computations”. Inside the “Results” box, one of two things will happen: the values for I‘M, and I‘ML will appear with the associated transducer gain (GT) for the unconditionally stable transistor, otherwise the maximum stable gain (MSG) is given for the amplifier for the conditionally stable transistor. In the “Circle Computations box”, a text box appears on the left with a pull-down menu on the right. To plot a 14 dB operating gain circle on the FL plane, simply enter 14 into the text box and select the proper option on the pull down menu to the right. Pressing the “Plot” button will then plot the circle on the on appropriate plane. Two options that are in the window which are not discussed are the “Ga on Gamma L” and “Gp on Gamma S” options. As the name implies, these are for plotting the gain circles on the plane other than what they are normally plotted on. Consult [3] on designs using these circles. 62 There is a color code to the circles that are plotted on F3 and FL. Maroon circles are plotted for G A on F3 and G p on I‘L. Green circles are plotted for G A on FL and G p I‘s. Yellow circles represent constant SWR circles. Finally, noise circles are graphed in red. Underneath the F3 plane, there are two buttons: “Gamma S to Gamma L” and “Gamma L to Gamma S”. These are used to activate the continual updating feature of the cursor’s location on either the F3 or I‘L plane. Use of this feature will be discussed more in detail later. At the bottom right is where the user will input a desired input or output SWR value and selects which type to plot via the radio buttons. It is important to note, that a gain is required for the plotting of these functions. The way that this feature operates is that it reads the value from the gain box at the bottom left of the GUI inside the “Circle Computations” box prior to computing the SWR circle. When these constant SWR circles are plotted, the user will see ten red stars appear on both F3 and FL. These points represent the ideal solutions for a given constant SWR. For example, if a constant SWR circle is plotted on PI, for a specific G p, then on the FL plane, these red stars appear at various points along the constant gain circle. The ten points on along the constant gain circle have a one-to—one correspondence to to those values that appear on the F3 plane and represent the minimal values for SWR,n for a constant SWR at the output. There are two buttons under each Smith chart. The “Clear Gamma X” button is for clearing that Smith chart if it becomes to cluttered in both the figure and main GUI. The button called “Enlarge Gamma X” is there in case the figure that represents that figure is closed, then this button provides a means of recreating that figure in the background. 63 4.2 Design using the GUI As was discussed in Chapter 3, there are two ways to design an amplifier: start with either 0,; or with G p and then incorporate the SWR limitation if needed. Below is a procedure starting with a desired G p. 1. Enter the values for the transistor S parameters in the appropriate box. If available, enter the noise figure data as well. It is recommended that these values be saved. 2. Press the “Compute Stability Values”. 3. If the transistor is unconditionally stable and that is what is desired, then simply read the values for I‘M, and I‘ML; your design is done. If a gain other than the MAG is desired or for noise considerations, then continue on with the procedure. 4. Choose a value for G p in dB less than the gain shown in the “Results” box and enter it into the “Circle Computations” text box. 5. On the pull-down menu select “Gp on Gamma L” and click on “Plot”. This graphs the constant operating power gain circle onto the FL plane. Repeat this step as many times as necessary for different gain values. (a) If noise figure data has also been entered, then enter noise figure values greater than those that have been entered into the box labeled “Nfo (dB)”. 6. Since the procedure being considered is using 0;: as a starting point and is plotted on FL, then click on the button labeled “Gamma L to Gamma S”. 7. The user should notice that the value for “Gamma L” is now changing in the middle of the GUI with the location of the cursor. Choose some point along 64 10. the desired constant C p circle by right clicking on the PL Smith chart. Right clicking on I}, will fix the value for FL, and now shifts control to the F3 plane. Also, the user should see that the values for F3, Four, I‘ IN, SWRin, SWRout, and noise are now all changing as the cursor changes its location. . To plot a constant SWR circle, ensure that value for the gain circle that was clicked on in FL is in the gain value box of the lower left hand corner. Ensure the radio button for “Input” is selected in the “VSWR Circles” box and select a value. This step can be repeated any number of times by selecting a different I‘L. Simply right click on a new value for PI, and click on “Plot” again. Choose a value for F3 based on the circles that have been plotted by pressing the space bar. If noise is a consideration, choose the value which has a red star near the desired constant noise figure circle. Pressing the space bar will fix all of the values that are updated on the GUI as well as tell the designer what the values are for GT, GA, and CT. The two Smith charts in the background have been updating all actions that have been occurring on the main GUI. At this point, the designer may wish to print off these Smith charts to complete the design of the amplifier. That is all for the procedure, but there are few things on which to comment. First, notice that the value for G p is the same as was used in the design. This would simply be just a self check for the user to ensure that points chosen during the design procedure are indeed the value which was desired. Also note that if a point for I}, is chosen on one of the red stars that appear during the plotting of a constant SWR circle, the new constant SWR,n circle touches only one of these points. If the user were to move to this choice for I}, to an adjacent red star in the clockwise direction and plotted a new constant SWR,n circle, then the new 65 SWR,In circle would also be adjacent to the previous choice in a clockwise direction as well. Finally, when constant SWR circles are graphed and have centers that are in the origin, then that represents a match at either the input or the output (i.e. R; = I‘fN or Pour = Ff). Specifically this can be shown to be true if the following equation constant input SWR equation is examined = IPA1 — IPINI2ll 1 — lPaFIN|2 lFS _ IN(1 _ lPalz) (41) 1 - |I‘,,,I‘1N|2 where I} is defined as it is in equation 3.15 and is rewritten here for convenience. PIN - Pg 1“,: _— ll—PINPS (4.2) Since a calculation for constant SWR,n circles is being considered, a value for H, has likely been chosen and PIN has been calculated and is fixed. When the user is moving the cursor, the variable that is changing in equation 4.1 is I‘s. As can be seen in equation 4.2, Pa = 0 if I‘g = P IN. When I}, = 0, the term on the right hand side of equation, or the radius, 4.1 goes to zero. Also, the second term on the left hand side of equation 4.1 equals I‘fN since I‘a = 0 and the denominator equals one. A similar proof can be given for the constant output SWR circle equation. The design procedure for constant GA circles is essentially the same as above. The only difference would be to click on the “Gamma S to Gamma L” button. The advantage of starting with available gain circles is that it allows the designer to choose Fs immediately, thereby setting the noise figure at the desired value. 66 4.3 Circuit Design Once the designer has the two design values for F3 and FL, then it is up to the designer as how to implement the design; will the design be done on microstrip or will the design be done using lumped elements. Each design technique will be discussed here. 4.3.1 Microstrip Implementation If the designer is implementing a microstrip based design, then the Smith charts which have been plotting in the background can be used. These Smith charts have degree measurements around the perimeter as well as a linear scale at the bottom to accommodate the use of a compass. When using the Smith chart to match to either I‘S of FL, take note on the defi- nition of these terms (Figure 3.2); they are the reflection coefficients looking into the matching network and terminate at the system characteristic impedance. This means that the first rotation will be in the “Wavelengths towards load” direction from this impedance/ admittance. Depending on what type of network being used, the goal is to move all of the components added toward the center of the Smith chart. The values necessary for the matching network should be extracted such as the lengths in fraction of wavelengths as well as what type of transmission lines used. Next, find the effective wavelength of the for the design frequency on the board to be used. This allows the designer to turn the normalized lengths into actual lengths. If using impedances other than those at the system impedance, such as for quarter wave transformers, use equation 2.32 to calculate the necessary transmission line width. Ansoft Designer This next step is optional, but is recommended as a sort of verification of the design. For this thesis, a program called Ansoft Designer has been used for this step. 67 When the program opens, by default a new project opens. Click on the icon which looks like a transistor at the top. This opens a dialog box which asks what type of microstrip is being used. If the type is not there that is being used, then choose any type that is listed. It can be overridden later. A blank schematic sheet now appears as well as more icons at the top of the page. The next thing to do is add a two port network to the schematic. Click on ‘Draw—>N-Port...’. A dialog box appears. On the first tabbed sheet, there are three radio buttons under ‘Data Source’. Select ‘Enter data in spreadsheet’. Select the tab labeled ‘Network Data’. Select the proper units for the frequency. On the first row, first column of the spreadsheet enter the frequency that the operation will be performed. Tab to the next square and enter Sn in that block formatted as the magnitude-space-angle. Do this for the other S parameters noting that 5'12 is in the first row, last column and 5'21 is in the second row, middle column. Select the tab ‘Noise Data’ if there is noise data to enter. Press ‘OK’ and place the network on the schematic. On the left hand side of the program, there are a set of three tabs labeled, project, components, and search. Click on ‘Components’. A list of different types of elements then become available including microstrip elements and lumped elements. Select the folder labeled microstrip. There are three options here that will be of use to the designer: shorted stubs, Open stubs, and transmission lines. Add whatever elements are necessary to the schematic. Select the type out of these three menus that are denoted as near ground and electrical length. Double click on any one of the transmission lines just added. This will bring up another dialog box. Click on the box on the line labeled ‘SUB’. This is where the microstrip specific information can be added. This will pop up another dialog box. Click on ‘New’. Enter all of the pertinent information for the board being used. Click ‘Ok’ twice. Finally enter the information necessary for all of the microstrip lines such 68 as electrical length and width. Next, RF sources need to be added. Select ‘Draw—->Interface Port’ and add two of these. Double click on each of these ports and select the radio button which turns the port into a microwave port. After connecting all of the components, it is time to simulate the circuit. Under the menu ‘Circuit’, select ‘Add Analysis Setup...’. Click on ‘Next’. Click on the ‘Add’ button. Select the radio button labeled ‘Single Value’ and enter the frequency at which to simulate. Press the button labeled ‘Add>>’. Click ‘Ok’ then ‘Finish’. To simulate the circuit, go to ‘Circuit—>Analyze’. A box at the lower middle will tell if the analysis has been successful. To view a report, go to ‘Circuit—+Create Report...’ and simply add what variables are of concern. There are options such as GT, 321, and SWR. Simply add what is desired to look at. If these values are close to what is expected, then the design is as it should be and is ready for the next step. Sonnet To model the matching networks on microstrip, the program Sonnet was used to tune the network to the desired impedance values. This was done by drawing the geometry to the approximate values given by using the Smith charts. When using Sonnet, it is important make sure that the proper dielectric is being used and that the cell sizes are reasonable for the given frequency. Also, make sure that there is sufficient space all around the board to minimize interactions with the edges as well as for leaving room for changing the transmission line lengths as will be discussed later. Place two ports onto where the transmission line will be attached and where the transistor will be attached. Double click on the port that will be attached to the transistor. Make the port an autoground since the port is fed from the ground plane to the trace. This allows the user to modify the port impedance. To figure out 69 the values to be entered for the impedance, simply enter Re[I‘S] times the character- istic impedance in the ‘Resistance’ block and enter -Im[I‘s] times the characteristic impedance into the reactance block. The simulations should show how well the initial design compares to the actual layout. Sonnet also comes with an optimization feature. To use this feature, there must be elements on the design called ‘parameters’ for Sonnet to vary. To add a parameter, go to ‘Tools—>Add Parameter’. From there the user has the choice of either anchored or symmetric. The anchored option sets one point which will not move from that point on the board and uses this as a reference when changing the other dimensions. The symmetric case changes the lengths equally in opposite directions about it’s midpoint. Once the parameter components have been placed, it is required to setup the program to optimize. Go to ‘Tools-—>Setup...’. Under the box labeled “Analysis Control”, select the option called Optimization. This will cause two other boxes underneath to appear. The upper box is called ‘Parameters’. This is where the user will set the constraints on the parameters that have been added to the drawing. Select the ‘Edit’ feature. Another dialog box appears and allows the user to select which length will be varied as well as what values to limit the possible lengths. Once the constraints have been entered, click on ‘OK’. The second box which appears is the place where the user enters the design goals. Next, the user should click on ‘Add...’. Here the user can enter a frequency range over which to optimize the design as well as what the design goal should be. It is suggested that only one frequency be entered and that Sn be set to less than -30dB. If a designed stub happens to be a shorted stub, then it is possible to create a short by adding a via to the board in Sonnet. When using the optimization routine, ensure that all corners of the via have been selected while adding a parameter. This will move the via and maintain it’s position at the edge of the stub. Once networks have been developed, then merge all of the components onto one 70 board to be made. There are practical aspects to be considered before completing the design. First, the vias that were used to simulate shorts for the shorted stubs need to be removed. If a DC bias is applied to the shorted stub, then there will be a short circuit to ground. The way to get around this problem is to make the shorted stubs open but then attach a bypass capacitor from the stub edge to a grounded pad near the edge of the stub. This will preserve the DC bias, but will act as a short at the higher operating frequency of the amplifier. 4.3.2 Lumped Element Design Microstrip designs start being practical when the design frequency is above lGHz, be- cause the free-space wavelength is about 30cm. This is still large, but the wavelength can be significantly reduced by choosing microstrip board with higher dielectric val- ues, but still may be large. Thus, for frequencies less than about 1GHz, it makes sense to use lumped elements. After obtaining the design values for F3 and FL, then it is better, if not a necessity, to use an admittance-impedance Smith chart (or sometimes called ZY Smith chart.) A ZY Smith chart has a normal impedance Smith chart on as well as a mirror image superimposed on top of the impedance Smith chart. To explain the reason for using this type 08 Smith chart, it is better to examine what can be done on the standard Smith chart. The circles which have origins along the central axis represent constant Re[Z]. To add a series reactive element then it is only required that the designer move along the perimeter on one of these circles. To add a shunt reactive element on the standard Smith chart is not as easy. There are no circles on which to traverse. By adding the admittance equivalent of the Smith chart, then the designs have been reduced to traveling along circles for shunt elements. The key to the design with lumped element is to start at the design value for F3 or FL and move towards the center to the Smith chart. Clockwise motion along a 71 constant Re[Z] circle represents adding a series inductor, whereas counterclockwise rotation represents adding a series capacitor. Likewise on a constant Re[Y] circle, clockwise rotation represents adding a shunt capacitor and counterclockwise rotation represents adding a shunt inductor. If starting at the wrong point, then the wrong element will be inserted. Once the values for the inductors and capacitors are found, then it is possible to test this design in Ansoft as well. Instead of using microstrip elements there is a folder labeled “lumped” which then allows the user to add these types of elements. 72 CHAPTER 5 Designs and Analysis A design tool or procedure is only as good as the the finished product that is produced as well as its ease of use. To verify the design tool works, a few designs were made with different transistors and different parameters. The foundation for any of the designs that are to be built in this manner are the S parameters. If these values are incorrect, then the rest of the design will be wrong; thus, it is important to have accurate S parameter measurement. The S parameters for the Agilent transistor AT-41486 were extracted from the datasheet [9]. This might seem contrary as to the previous statement about accurate S parameter measurement, but also notice that only one design was made using this information. On the other hand, the S-parameters for the MPSH10 and MPSH17 transistors were actually measured for the designs made, and as will be seen, made the measured values very close to the design goals. 5.1 S-Parameter Measurement Accurate measurement of the transistor S-parameters will improve the accuracy of the design of the amplifier. Figures 5.1 and 5.2 are the bias circuits used in measuring these transistor’s S-parameters. This circuit is designed to give a 5V collector-emitter 73 voltage with a collector current of 10mA. The ports labeled “NA” on either end of the circuit are where the network analyzer was attached. Capacitor C1 is used as a bypass capacitor to effectively short the emitter to ground, and capacitors C2 and C3 are used as DC blocks. Both circuits had identical current gains of approximately 100, so the DC bias circuits end up being the same. v1 R3 gm, R1 <: <: _'I_ 3,215» #470 -.- 03 NA cg {F—fi—C -‘ 680 r NA 6801”" MPSH10 p R2 l R4 4 C, 5.616“ 470:» #680101, J.— -0 Figure 5.1. DC Bias Circuit Used in S—Parameter Measurement for the MPSH10 v1 R3 élsv R1 3 ‘ 3.2};1: 1'470 7'; NA 02 ———Caf—<:1 D—lH—K Q1 680 F NA 6301’” MPSH17 p R2 ‘: R4 ‘: CI 5.616: 470» $680131, Figure 5.2. DC Bias Circuit Used in S-Parameter Measurement for the MPSH17 74 Neither of these designs have RF chokes to isolate the transistor from the bias circuitry. This means that the bias circuitry was included in the measurement of the networks S-parameters. This approach seemed to work well for when the matching networks were placed on the network analyzer side of the blocking capacitors and treating the entire amplifier with bias circuitry as a two port network. If the desire is to find the actual transistor S parameters, then it would be necessary to include the RF chokes. The circuit was built by using the “dead bug” or ground plane technique as dis- cussed in [7]. This technique eliminates most stray capacitance which may appear if the circuit were to be built in a prototyping board or perforated board. A short coaxial cable was then cut and stripped down to expose the center conductor such that a connection could be made to the circuit. The exposed length of the center con- ductor was minimized so that the cable could maintain it’s characteristic impedance. The length of the transmission line was short to ensure that the attenuation in the transmission line was negligible. To ensure that a proper phase measurement was obtained, the center conductor of the coaxial cable was shorted to the outer braided shielding while connected to the network analyzer. Since the shorted transmission line is known to have a reflection of 14180°, the user can then change the electrical delay of the network analyzer to this value at the desired frequency. When the cable is open circuited, it should have a reflection coefficient near 140° and should have angle measures near these points. It is important that both cables be near identical. This means that the lengths of the cable and the amount that has been stripped should be about the same. This should yield similar values for the electrical delay of each cable. If the shorted and opened transmission lines have electrical delay values, then the cables must be adjusted until they agree. Once a value for electrical delay has been found for Sn and 5'22, then ensure that the delays for $21 and 812 are adjusted to these same values. Figures 5.3 75 through 5.6 are the measured S-parameters of the circuit shown in 5.1, and Figures 5.7 through 5.10 are the MPSH17 S-parameters measured using the circuit in Figure 5.2. Magnitude (dB) Phase S11 magnitude and phase of MPSH10 1 0 I T I I 0 -10 _20 1 1 1 0 100 200 300 400 500 Frequency (MHz) 0 1 Y TI T -20 - . -40 r- a -60 ~ 4 -80 . .- _100 1 i L 1 100 200 300 400 500 Frequency (MHz) Figure 5.3. Sn of MPSH10 76 Magnimde (dB) Phase Phase S12 magnitude and phase of MPSH10 o I T I I _100 1 1 1 1 0 100 200 300 400 500 Frequency (MHz) 150 . . . . _100 1 1 1 1 0 100 200 300 400 500 Frequency (MHz) Figure 5.4. Sn of MPSH10 $21 magnitude and phase of MPSH10 20 . r r . . . . a 3 O “D 52‘ C U) (B 2 o l l l l 4 1 1 50 100 150 200 250 300 350 400 Frequency (MHz) 200 I I I I 100 - - O F . 400R . _200 1 1 1 4 0 100 200 300 400 500 Frequency (MHz) Figure 5.5. 321 of MPSH10 77 $22 magnitude and phase of MPSH10 5 I I I I a '3 o - _ 0 'O .5 2 _10 1 1 1 1 0 100 200 300 400 500 Frequency (MHz) 0 I I I I -50 - . 3 2 a. -100 ~ 4 _1 50 1 1 1 1 0 100 200 300 400 500 Frequency (MHz) Figure 5.6. $22 of MPSH10 S11 magnitude and phase of MPSH17 10 I I I I W 8 E o - O 13 .3 E g -10 ~ - 2 _20 1 1 1 1 1 50 100 150 200 250 300 Frequency (MHz) 0 I I 1 I I _50 .. .4 33 2 a. -100 .. _150 1 1 1 1 1 O 50 100 150 200 250 300 Frequency (MHz) Figure 5.7. 5'11 of MPSH17 78 S12 magnitude and phase of MPSH17 6 E O ‘O .3 C U) m 2 _80 1 1 1 1 1 0 50 100 150 200 250 300 Frequency (MHz) 200 I I I fi I 100 ‘ 3 N\,_\\ 2 o .- -. e. -100 - E _200 1 1 1 1 1 0 50 100 150 200 250 300 Frequency (MHz) Figure 5.8. $12 of MPSH17 S21 magnitude and phase of MPSH17 20 . . . . . 8 3 0 13 .3 C O) N 2 0 l L l l L 50 100 150 200 250 300 Frequency (MHz) 200 I I I I I 100 ~ ~ 0. “100 N . _200 1 1 1 1 1 0 50 100 150 200 250 300 Frequency (MHz) Figure 5.9. 821 of MPSH17 79 Phase Magnitude (dB) .5 -100 -150 0 $22 magnitude and phase of MPSH17 50 100 150 200 250 300 Frequency (MHz) 50 100 150 200 250 300 Frequency (MHz) Figure 5.10. 522 of MPSH17 80 5.2 Amplifier Designs Table 5.1 has extracted S-parameter values for the MPSH10 and MPSH17 transistors, whereas the values for the AT-41486 were from the datasheet [9]. Table 5.2 represents the target design values given the transistor S parameters and the values for F3 and FL. The “AmpDesigner” program was used to compute all of the design values. I Transistor ] AT-41486 (2GHz) MPSH10 (100MHz) MPSH17 (100MHz) Sn 0.624 152 0.4734 -77.6 0.5154 -71.0 512 0.0584 43 0.0154 38.0 0.0274 42.1 Sm 3.614 56 5.554 91.23 6.3354 86.26 522 0.424 -39 0.6504 -32.42 0.6004 -44.2 Table 5.1. Transistor S Parameters used in Designs [ Transistor AT-41486 MPSH10 MPSH10 MPSH17 I Center Frequency 2GHz 100MHz 100MHz 100MHz GT (dB) 14.43 18.2 14.8 19.2 I‘S 0.4704 -148.2 0.4444 88.3 0.4904 55.6 0.5204-71.0 FL 0.5574 41.1 0.6384 36.4 0.5104 -37.5 0.6004556 SWRm 3.07 1 1.5 1 SWRout 1.59 1 5.59 1 Table 5.2. Design Values 5.2.1 AT-41486 Design Figure 5.11 shows the DC bias circuitry with the RF amplifier attached. This is known as an active biasing circuit since there is another transistor used in the bias circuit. The data sheet states that the bias conditions on the AT-41486 for the S 81 parameters listed in Table 5.1 required that the collector current be 10mA and a collector-emitter voltage of 8V. This circuit will allow the user to adjust both of these values by adjusting the two potentiometers in the circuit. R1 R4 3.3k 330k :=__Vl R2 8 T: 15V 3.3k 0-500 .1 C1 0‘ 1.10mi 2N3906 -- - VQZ 120 C2 ".5 *IUUn Figure 5.11. Schematic of AT-41486 Amplifier Bias Circuit This design was done at 2GHz so a microstrip implementation was utilized for the amplifier. Figure 5.12 shows the microstrip layout. The microstrip board is Taconic TLC-32 with a thickness 20 mils. On the left edge is the input to the amplifier. The gap that is seen immediately to the right is for a DC blocking chip capacitor. The length of microstrip before the open stub is simply a 509 transmission line. In the center of the board is a gap for the transistor to be placed. The two pieces of microstrip above and below this gap are pads for the transistor to be soldered to and are grounded. On the far right edge is where the output port was attached with a gap for a DC blocking capacitor to be placed again. The stub on the right was to be shorted for this design. To implement a short at the higher frequencies but maintain 82 //./, . ,I/ .I 11 / A '- 7/; «111' / [Viv/y v’ 717 j 14(1,’/1 4' Figure 5.12. Layout of AT-41486 Amplifier on Microstrip the DC bias level, two grounded microstrip pads were placed on the ends of the stubs where capacitors could be placed to act as a short. Finally, the devices which look like a bow tie are actually broadbanded stubs [1, 8]. These are used in conjunction with high impedance quarter-wave transformers. These elements together create a microstrip version of an inductor, which at high frequencies will block RF energy from getting onto DC supply lines. The results for the amplifier of Figure 5.12 are shown in Figures 5.13 through 5.15. When comparing the results of these figures to the target values shown in Table 5.2, it is easily seen that the values are off by a substantial margin. This is likely due 83 Magnitude (dB) Figure 5.13 Frequency (GHz) . S“ and SWR,n of Compensated AT-41486 Amplifier 84 10 Magnitude (dB) -5 0.5 3.5 Frequency (GHz) 200 I I I I l I I 100 g o a. -100 _200 l I l 1 l L l 0 0.5 1 1.5 2 2.5 3 3.5 Frequency (GHz) Figure 5.14. 321 of Compensated AT-41486 Amplifier 85 to the S—parameters used for the design being incorrect. Under a closer examination, this model of transistor themselves seemed to have issues that would make them unreliable to achieve a reproducible design. First, the datasheet for this transistor had a range for the current gain, 6 or h fe, which varied between 30 and 270 with the average value being about 150. This broad range of possible current gains would definitely have an affect on the $21 of the transistor making the Sn labeled on the datasheet as an approximation at best. An attempt was made to measure the 6 of each transistor by connecting them to a curve tracer. Doing this led to an another interesting finding. In the ideal case, the curve tracer will give a plot of collector current vs. the collector-emitter voltage for fixed values for the base current. When connecting the transistor to the curve tracer, the distinct lines formed for different base currents were not always present. In a few cases, these lines began to oscillate as the collector-emitter voltage increased. Other transistors had these constant base current line converge to a point that almost resembled a diode curve. The amplifier that is shown in Figure 5.12 had a transistor which did not exhibit any of these anomalies that were discussed above, but the design is still way off. The best possible explanation for this is that the S—parameters were not actually measured for that transistor. Since ,8 had such a large variation between each transistor, there is no conceivable way that those S parameters were correct. Even if the S-parameters were correct, the transistor data sheet did not explain where the phase plane for the measurement of the S—parameters was located. At lower frequencies, one would expect that the actual location of the phase plane would be less of a factor in the design, but at higher frequencies, even 1mm could be a substantial enough change in phase that the matching network could be off margin. 86 Magnitude (dB) 0 5 1 1 5 2 2.5 3 3 5 4 Frequency (GHz) 5 r 4 _ ..... . m i 3 3 _ ...... . w 2 2 ._ ..... 1 l l l l l I I 0.5 1 1.5 2 2.5 3 3.5 4 Frequency (GHz) Figure 5.15. 522 and SWRout of Compensated AT-41486 Amplifier 5.2.2 MPSH10 Design The S-parameters for this amplifier were measured as described above. The design for both the MPSH10 and MPSH17 were chosen to be at 100MHz so that the measured results would in no way be erroneous due to parasitics of the components used in the design. Also, these designs required the use of hand-wound air core inductors. The equation used in the fabrication of these inductors is found in [7] and is written here for convenience n : \/L(18: + 401) (5.1) 87 where n = Number of turns L = Inductance in microhenrys d = Coil diameter in inches l = Coil length in inches with the assumption that the length of the coil is much greater than the diameter. The coils that were used in these matching networks were wound to have 0.125” diameter and were about 0.25” in length. Biconjugate Match Figure 5.16 shows the matching network that was used for a biconjugate match to the circuit shown in figure 5.1. The capacitor values shown in Figure 5.16 were those actually used in the measurements and are slightly different than those that were computed to be necessary for the matching network. The difference between these capacitor values was at most lpF for this design. Inp‘“ MPSHIO j | C. e t I l 40pF "cm 17pF outPllt 3411“ 112.3nH Figure 5.16. Biconjugate Match Network for MPSH10 at 100MHz 88 S11 Magnitude (dB) 50 100 150 200 250 300 350 400 Frequency (MHz) .......................... 50 1 00 1 50 200 250 300 350 400 Frequency (MHz) Figure 5.17. Sn of Biconjugate Matched MPSH10 Amplifier The results for this amplifier are shown in Figures 5.17 through 5.19. Comparing these results to Table 5.2 shows that the predicted does well versus the measured. The actual measured gain is 16.85 dB compared to a predicted value of 18.2 dB. Also, SWR,n is negligibly close to one, but SWRout measured is at 1.325 which most likely accounts for the 1.15 dB difference in the gain. 89 20 I I I I I I I 8 E o 'O .3 . ; c . . a, , . a . 4 . 2 . : ; o 1 1 1 1 i i 1 50 100 150 200 250 300 350 400 Frequency (MHz) 200 I 7 I I I I I 100 - - 3 2 0 ~ 0. -100 k . _200 1 1 1 1 1 1 1 O 50 100 150 200 250 300 350 400 Frequency (MHz) Figure 5.18. 321 of Biconjugate Matched MPSH10 Amplifier Magnitude (dB) 822 I A l l l 150 200 250 350 Frequency (MHz) I I I I I 50 100 150 200 250 Frequency (MHz) Figure 5.19. 522 of Biconjugate Matched MPSH10 Amplifier 90 Mismatched Design Figure 5.20 is the matching network that has been attached to the circuit in Figure 5.1. This design has been made to have parameters other than a biconjugate match to show that the design parameters can be achieved. As was the case for the biconjugate match, the capacitor values for the design were rounded to the closest standard value. 107nH Input [3 ii MPSH10 l ' ' ' | S 30pF Cll’CLllt Output 84nH 22pF :: Figure 5.20. Mismatched Network for MPSH10 at 100MHz The results for the other MPSH10 transistor are shown in Figures 5.21 through 5.23. In comparison to the values predicted in Table 5.2, the measured data is quite close. The target gain for the amplifier was 14.8 dB compared to a measured of 13.4 dB. Also, SWR,-,1 had a target value of 1.5 compared to a measured value of 1.241. Finally, SWRout was designed to be 5.59 and the measured value is 5.4. 91 Magnitude (dB) Phase S11 50 I I I I I I 7 0 .. ~50 - _ _100 4 1 1 1 1 1 1 O 50 100 150 200 250 300 350 400 Frequency (MHz) 5 ,' .' 5 _. . _ m 4 1.. ......................... 3 U) 3 _ .................. 2 .. .......................................... 1 1 1 1 1 1 ' 1 50 100 150 200 250 300 350 400 Frequency (MHz) Figure 5.21. Sn of Mismatched MPSH10 Amplifier 821 20 f ' r ' 7 1. r g i a 10 _. ' . .- ‘E . , g’ : . : z 5 ... . . . . . ........ I .1 50 100 150 200 250 300 350 400 Frequency (MHz) 200 I I I I I I I \fl—I 100 - - 0 ~ . -100 _. - __200 1 1 1 1 1 1 1 0 50 100 150 200 250 300 350 400 Frequency (MHz) Figure 5.22. 521 of Mismatched MPSH10 Amplifier 92 Magnitude (dB) 822 5 I I I r I I I O. -5... .1 -10... .1 _15 1 1 1 1 1 1 1 0 50 100 150 200 250 300 350 400 Frequency(MHz) 5 ............................. _, a: ; 34 M. .................. .. ‘0 ; 3... .......................................... - 2 ............... . 1 ' 1 1 1 1 1 ‘1 50 100 150 200 250 300 350 400 Frequency(MHz) Figure 5.23. 322 of Mismatched MPSH10 Amplifier 93 5.2.3 MPSH17 Design Figure 5.24 is the matching network used for the circuit shown in Figure 5.2. As was the case in all the other designs, the capacitor values were rounded to the nearest standard values but the difference in the capacitor values was less than one. Input I i MPSH17 | 1 C. .t I I 37.7pF 1‘ °‘” 22pF outP“t 61nH 85nH Figure 5.24. Biconjugate Matched Network for MPSH17 at 100MHz Figures 5.25 through 5.27 show the measured results of this amplifier. As can be seen, the reflection coefficient minimums (Sn and 5'22) do not occur at 100MHz as desired. Attempts to tune the circuit by adjusting the spacing in the inductors’ windings were ineffective. The capacitor values were very close to standard values so this was likely not the source of the error. Even though these minimums do not occur at 100MHz, the values measured at 100MHz are still acceptable. The measured gain was at 18.6 dB when compared to 19.2 dB for the predicted. The SWR,-n was measured to be 1.46 whereas SWRout was measured to be 1.325. 94 Magnitude (dB) 50 100 150 200 250 300 Frequency (MHz) 1 1 1 1 1 50 100 150 200 250 300 Frequency (MHz) Figure 5.25. 811 of Biconjugate Matched MPSH17 Amplifier Phase Magnitude (dB) 50 1 00 1 50 200 250 300 Frequency (MHz) 200 I I I I I 100 - - 0 .. -100 * 1 _200 1 1 J 1 1 O 50 100 150 200 250 300 Frequency (MHz) Figure 5.26. 321 of Biconjugate Matched MPSH17 Amplifier 95 $22 Magnitude (dB) I 8 -20 _30 1 1 1 1 1 50 100 150 200 250 300 Frequency (MHz) 6 r 5 ....... 1: 4 r 3 (I) 3 ....... 2 ... . . . . . 1 1 1 1 1 1 50 100 150 200 250 300 Frequency (MHz) Figure 5.27. 822 of Biconjugate Matched MPSH17 Amplifier 5.2.4 Summary Table 5.3 shows a summary of the values attained from the above measurements. for the most part, the values agree well with the predicted values found in Table 5.2. For all of the amplifiers, other than the AT41486, placing adjustable capacitors will allow the ability to better tune the circuit to the desired values. Surprisingly, the inductors made from equation 5.1 were quite accurate and could be slightly adjusted by changing the spacing between the coils for tuning purposes. Noting that the amplifier based on the AT—41486 had measured data that was far away from any of the predicted data shows the importance of accurate S-parameter measurements. All of the other amplifiers had their own S-parameter measurement 96 Transistor AT-41486 MPSH10 MPSH10 MPSH17 Mismatch Biconj ugate Mismatch Biconj ugate Center Frequency 2GHz 100MHz 100MHz 100MHz GT (dB) 6.76 16.85 13.4 18.6 SWR,n 1.49 1.07 1.24 1.46 SWRout 3.21 1.325 5.4 1.325 Ta data used in the designing process. 97 ble 5.3. Measured Values ‘ummary CHAPTER 6 Conclusion As can be seen from the amplifiers in Chapter five, the design tool, “AmpDesigner” will give accurate results for those amplifiers which have accurate S—parameter mea- surements. This program aids in the design process by giving the user all of the pertinent amplifier information that may be of concern in the design process. Once the design values for F5 and FL have been obtained from the program, then the user just needs to concentrate on the physical layout of the amplifier. However, this program does have some limitations. It will not give the frequency dependant characteristics, such as bandwidth, of the amplifier with the matching net- works connected. To implement this type of analysis, a few thing would be needed. First, the entire spectrum of S-parameters for the transistor without matching net- works would be required. This is likely not a problem if the S—parameters are measured by the designer, but if the data is extracted from a data sheet, then this may be a problem since the the values listed tend to be sparse. Second, the specific network that is connected needs to have its frequency dependant characteristics modeled. This is so the values for F3 and FL can be modeled over the frequency range of interest. Once this is accomplished, then the amplifier can be characterized over frequency and showing its true predicted performance. Despite these drawbacks, “AmpDesigner” will give the user the ability to reliably 98 achieve the desired performance at the frequency of interest. 99 BIBLIOGRAPHY 100 BIBLIOGRAPHY [1] HA. Atwater. The design of the radial stub: A useful microstrip circuit element. Microwave Journal, November 1985. [2] David K. Cheng. Field and Wave Electromagnetics. Addison-Wesley, second edition, 1989. [3] Guillermo Gonzalez. Microwave Transistor Amplifiers. Prentice Hall, second edition, 1997. [4] J .P. Humbert. Microwave measurements. In Bradford L. Smith and Michel- Henri Carpentier, editors, The Microwave Engineering Handbook, volume 2. Van Nostrand Reinhold, 1993. [5] Norman S. Nise. Control Systems Engineering. John Wiley & Sons, Inc., third edition, 2000. [6] David Pozar. Microwave Engineering. John Wiley & Sons, Inc., third edition, 2005. [7] Dana G. Reed, editor. ARRL Handbook. ARRL—The national association for amateur radio, eighty-first edition, 2004. [8] BA. Syrett. A broad-band element for microstrip bias or tuning circuits. IEEE Transactions on Microwave Theory and Techniques, MTT-28(8):925-927, Au- gust 1980. [9] Agilent Technologies. Up to 6 ghz low-noise silicon bipolar transistor, at—41486. Technical report, Aglient, 1999. [10] Agilent Technologies. Fundamentals of rf and microwave noise figure measure- ments, application note 57-1. Technical report, Aglient, March 2004. [11] Rodger Ziemer and William 'IIanter. Principles of Communications. John Wiley & Sons, Inc., fifth edition, 2002. 101 IIIIIII‘IIIIIIIIIIII[III]