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1 1115533! LIBRARY
7. Michigan State
20:» University

This is to certify that the
dissertation entitled

CVD POLYCRYSTALLINE DIAMOND (POLY-C) THIN FILM
TECHNOLOGY FOR MEMS PACKAGING

presented by

Xiangwei Zhu

has been accepted towards fulﬁllment
of the requirements for the

Ph.D. degree in Electrical Emineerigq

 

 

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Date

 

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2/05 p:IClRC/DateDue.indd-p.1

 

CVD POLYCRYSTALLINE DIAMOND (POLY-C) THIN FILM
TECHNOLOGY FOR MEMS PACKAGING

BY

Xiangwei Zhu

A DISSERTATION
Submitted to
Michigan State University
in partial fulﬁllment of the requirements
for the degree of
DOCTOR OF PHILOSOPHY

Department of Electrical and Computer Engineering

2006

ABSTRACT
CVD POLYCRYSTALLINE DIAMOND (POLY-C) THIN FILM TECHNOLOGY

FOR MEMS PACKAGING
By

Xiangwei Zhu

Poly-crystalline diamond (poly-C), with unique mechanical, thermal,
chemical and electrical properties, is an excellent material for
MicroElectroMechanicalSystems (MEMS) and its packaging applications. The
research reported in this dissertation focuses on the investigation of applications
of CVD poly-C technology in the area of MEMS packaging.

MEMS design is quite application-speciﬁc. Therefore, it is important to
couple the packaging design closely with MEMS design. Tremendous research
efforts have been exerted on the studies of various packaging technologies,
which can be classiﬁed as wafer bonding process, encapsulation process and 3-
D multi-chip—module assembly. In addition to improve conventional MEMS
packaging technologies, there is also a growing interest to explore the
applications of new material technologies on MEMS packaging. Recently, poly-C
has emerged as a novel material for MEMS applications on both micro device

and packaging.

In this research work, fundamental researches on poly-C thin ﬁlm
techniques, such as seeding, CVD deposition and doping, have been performed
for the purpose of characterization and improvement. Then, several enabling
techniques have been developed, including poly-C microstructure fabrication,
ultra-fast diamond growth model, poly-C panel with built-in interconnects and
diamond-diamond CVD bonding. Based on all these techniques, a poly-C thin
ﬁlm encapsulation packaging process which can be intenerated with MEMS
device fabrication process has been developed.

This poly-C thin ﬁlm packaging technology has been used to encapsulate
poly-C cantilever resonator, to evaluate the efﬁcacy of poly-C encapsulation.
Poly-C cantilever beam resonators were tested using piezoelectric actuation and
laser detection method before and after poly-C packaging process. Resonance
frequencies measured before and after are in the range of 240-320 KHz, which is
consistent with theoretical calculations. The application of diamond for thin ﬁlm

package is being reported for the ﬁrst time.

ACKNOWLEDGEMENTS

The author wishes to thank his advisor, Dr. Dean M. Aslam, for his
encouragement, guidance and support throughout this research. Additional
thanks are extended to Dr. Donnie K. Reinhard, Dr. Tim Hogan, Dr. Ahmed M.
Naguib and Dr. Khalil Najaﬁ for their valuable discussions and academic advices.

The author would like to thank all the members of Dr. Aslam’s research
group, Ungsik Kim, Yuxing Tang, Yang Lu and Nelson Sepulveda, for their
assistance and helpful discussions. The author is also thankful to Dr. Brian Stark
and Warren Welch of University of Michigan for cooperations.

Last but not least, the author would like to thank his family in China and his
wife, Liling Jiang, for their patience, understanding and sacriﬁce during the
course of this study.

This work was supported primarily by the Engineering Research Centers
Program of the National Science Foundation under Award Number EEC-

9986866.

TABLE OF CONTENTS

LIST OF TABLES ................................................................................. viii
LIST OF FIGURES .............................................................................. ix
1. RESEARCH MOTIVATION AND GOALS
1.1 Introduction............................ ................................................. 1
1.2 Objective of This Work ............................................................... 3
1.3 Dissertation Organization .......................................................... 5

2. BACKGROUND

2.1
2.2
2.3

2.4
2.5

2.6

Introduction ............................................................................ 7
MEMS Packaging Overview ...................................................... 7
MEMS Packaging Approaches ................................................ 13
2.3.1 Wafer-bonding packaging process ................................. 14
2.3.2 Integrated encapsulation process .................................. 20
2.3.3 3-D multi-chip packaging approaches ............................... 25
Diamond Properties ............................................................. 29
CVD Diamond Deposition Techniques ....................................... 33
2.5.1 CVD poly-C growth mechanism ..................................... 33
2.5.2 CVD poly-C deposition methods ................................. 35
Poly-C MEMS Technology And Its Packaging Applications ............ 37

3. FUNDAMENTAL RESEARCH ON CVD POLY-C TECHNOLOGY

3.1
3.2

3.3

Introduction ........................................................................... 42
Fabrication and Characterization Systems ................................... 42
3.2.1 MPCVD diamond deposition system ............................. 43
3.2.2 Characterization systems......................................46
Basic Poly-C Technology ....................................................... 48
3.3.1 Diamond seeding technology ......................................... 48
3.3.1.1 Preparation of diamond seeds solution .............. 49
3.3.1.2 Diamond seeding set-ups .............................. 50
3.3.1.3 Characterization of seeding techniques .............. 52
3.3.2 MPCVD poly-C deposition ........................................... 57
3.3.2.1 Characterization of typical deposition parameters.58
3.3.2.2 Study of MPCVD deposition rate ........................ 59

3.3.2.3 Study of MPCVD grown poly-C film quality ......... 60
3.3.2.4 Study of low temperature poly-C deposition.........63
3.3.3 Diamond doping technology ........................................... 64
3.3.3.1 Resistivity measurement of doped poly-C thin film.65
3.3.3.2 Resistivity variation with doping and temperature...67
3.3.4 Patterning of poly-C ................................................. 69

4. POLY—C ENABLING TECHNOLOGIES FOR MEMS PACKAGING

4.1
4.2

4.3

4.4

Introduction ........................................................................... 73
Fabrication Techniques for Poly-C MEMS Structure ...................... 73
4.2.1 Poly-C plasma ECR dry-etching technique ...................... 74
4.2.2 Selective poly-C growth technique ........................... 76
4.2.2 High aspect ratio poly-C microstructure fabrication technique..77
Thick Poly-C Film Fabrication for MEMS Applications .................. 79
4.3.1 Ultra-fast poly-C growth model ........................................ 80
4.3.2 Double-side poly-C growth on DRIE etched Si mold............81
4.3.3 Filing of silicon mold ...................................................... 84
4.3.4 Fabrication of poly-C panel with built-in interconnects ......... 85
Diamond-diamond Bonding Technology ................................. 91

5. POLY-C THIN FILM ENCAPSULATION PACKAGING

5.1
5.2

5.3

5.4

Introduction ......................................................................... 92
Poly-C Thin Film Packaging Process Design ............................ 93
5.2.1 Packaging material selection ........................................ 94
5.2.2 Packaging process design ........................................... 97
Fabrication of Poly-C Package .............................................. 98
5.3.1 Poly-C thin film fabrication for packaging ...................... 98
5.3.2 Poly-C thin film package ............................................. 100
5.3.2 Fabrication of embedded feedthroughs ........................... 102
Evaluation of Poly-C Encapsulation Packaging Technology ........... 104
5.4.1 Corrosion-resistant test of poly-C package ....................... 104

5.4.2 Poly-C encapsulation package for cantilever resonator....108
5.4.2.1 Piezoelectric actuation and laser detection for

resonator measurement ................................... 108
5.4.2.2 Process integration and test chip fabrication ........... 110
5.4.2.3 Thin film package evaluation ............................. 113

6. CONCLUSIONS AND FUTURE RESEARCH

6.1

Summary and Conclusions .................................................... 116

vi

6.2 Future Research Topics ......................................................... 117

APPENDIX A ................................................................................. 119
APPENDIX B ................................................................................. 120
APPENDIX C ................................................................................. 121
BIBLIOGRAPHY ................................................................................ 124

vii

2.1:

2.2:

2.3:

2.4:

2.5:

2.6:

3.1:

3.2:

3.3:

3.4:

3.5:

4.1:

4.2:

5.1:

5.2:

LIST OF TABLES

Comparisons of packaging issues between MEMS/Microsystems and

Microelectronics...............................................................8
Typical Materials used in MEMS ..................................................... 13
Eutectic alloys for wafer bonding ................................................. 19
Common properties of diamond ...................................................... 32
Comparison of different poly-C deposition methods ........................... 36
Comparison of different diamond dry etching techniques ..................... 39
Diamond seeding solution preparation ........................................... 49
Substrate pretreatment conditions and diamond growth time ............. 54
Comparison of different seeding methods ....................................... 57
Typical poly-C deposition parameters of MPCVD ............................... 59
Correction factors of some ﬁnite thickness and diameters ...................... 67
ECR plasma etching parameters ..................................................... 75
Fabrication time of ultra-fast growth model ...................................... 82
Properties of common thin ﬁlm materials .......................................... 96

Poly-C resonator parameters relevant to evaluating of poly-C package...115

viii

1.1:

2.1:

2.2:

2.3:

2.4:

2.5:

2.6:

2.7:

2.8:

2.9:

2.10:

2.11:

2.12:

2.13:

2.14:

LIST OF FIGURES

Overview of CVD poly-C thin ﬁlm technology for MEMS packaging ......... 4
Schematic ﬂow-chart for MEMS device and package design ................. 10

(a) Set-up of anodic silicon-glass bonding; (b) formation of anodic silicon -

glass bonding .......................................................................... 16
Silicon fusion bonding set-up ......................................................... 18
Eutectic bonding set up ................................................................ 20
Typical fabrication steps of integrated encapsulation ........................... 21

(a) An SEM microphoto of a vacuum-encapsulated lateral microresonator,
(b) Shell and freestanding comb structure cross section as seen in an

SEM .................................................................................... 22
An integrated encapsulation process for a micro vacuum diode ............. 23
SEM of a thin-film nickel package for Pirani gauge .............................. 24
A generic schematic diagram of an MCM architecture ......................... 26
(a) a schematic diagram of system integration; (b) an integrated WIMS
cube .......................................................................................... 28
Unit cell of diamond lattice ............................................................ 30
Band structure including exchange and correlation effects .................... 30
Schematic diagram of CVD diamond process ................................... 34
Diamond replicas of etched Si molds .............................................. 38

2.15: (a) SEM of etched diamond pressure sensor membrane cavity; (b) DMEMS

2.16:

3.1:

3.2:

3.3:

3.4:

3.5:

3.6:

3.7:

3.8:

3.9:

3.10:

3.11:

3.12:

3.13:

3.14:

Pressure sensor chip ............................................................ 40

Fabrication process ﬂow cross-sections and associated SEM’s at different
stages of the process. (a) After diamond disk deﬁnition. (b) After polysilicon

stem reﬁlling and electrode deﬁnition .............................................. 40
Schematic diagram of MPCVD system ............................................. 44
DPR / DW spin—on seeding setup .................................................... 51
Electrophoresis setup ................................................................. 51
Diamond Seeding Density vs. Spinning speeds ................................. 52

Typical diamond seeding results: (a) DPR seeding density of 4 x 108 cm’z;
(b) ow seeding density of 5.6 x 109 cm'2 ......................................... 53

SEM of the nucleation density for a) ultrasonication and electrophoresis
(sample 1); b) ultrasonication alone (sample 2); and c) electrophoresis
alone (sample 3) .......................................................................... 54

AFM of the nucleation density for (a) ultrasonication and electrophoresis
(sample 1); (b) ultrasonication alone (sample 2); and (c) electrophoresis

alone (sample 3) with image of clumping (inset) ................................. 55
Deposition rate variations with temperature ...................................... 61
Deposition rate variations with gas concentrations ............................. 61
Raman spectra of poly-C ﬁlms grown at different temperatures.............62

Two poly-C ﬁlms grown at low temperature: (a) 475 ° C and (b) 550 ° C. . .63

Four point probe measurement setup ............................................... 65
Doped poly-C ﬁlm resistivity versus TMB/CH4 ratio .............................. 68
Temperature dependence of poly-C ﬁlm resisitivity ............................ 69

3.15:

3.16:

3.17:

4.1:

4.2:

4.3:

4.4:

4.5:

4.6:

4.7:

4.8:

4.9:

4.10:

4.11:

Lift-off patterning process .............................................................. 70
Schematic diagram of DPR patterning process ............................. 71
SChematic diagram of dry-etch patterning process ............................. 72

SEM picture of a poly-C crab-leg accelerometer patterned using dry-etching
technique; inset is a close view of etched edge .................................. 75

Selective poly-C growth process ................... I .................................. 76

SEM pictures of selectively grown poly-C microstructures: (a) channel
pattern, and (b) well pattern .......................................................... 77

Fabrication process; (a) - (c) Si mold fabrication using DRIE, (d) diamond
seeding, (e) poly-C deposition, (f) freestanding poly-C ........................ 78

Diamond seeding results; (a) uniform seeding, (b) nucleation density of
1.5x1010 cm'z, (c) & (d) seeding inside hannels ................................... 79

Freestanding poly-C microstructures: (a) 2 gm channels, (b) 4 gm
channels, (c) 10 pm channels, (d) 20 pm wells .................................. 79

Ultra-fast growth model; (a) first poly-C deposition, (b) second poly-C
deposition ................................................................................... 80

20—35 pm thick diamond ﬁlms fabricated by ultra-fast method using; (a) 2
pm channels, (b) 6 pm channels, (c) 10 pm channels, (d) 10 ,um wells
array ................................................................................... 83

Comparison of experimental and theoretical values of ( 1+ Aspect Ratio)..83
Filling properties in channels with different aspect ratio: (a) a channel with
aspect ratio 2, totally ﬁlled; (b) a channel with aspect ratio 3, totally ﬁlled; (c)
a channel with aspect ratio 4, void formed; (d) a channel with aspect ratio 5,

void formed ................................................................................ 85

Fabrication process of built-in interconnects ..................................... 86

4.12:

4.13:

4.14:

4.15:

4.16:

4.17:

5.1:

5.2:

5.3:

5.4:

5.5:

5.6:

5.7:

5.8:

SEM image of poly-C panel with built-in interconnects: (a) poly-C panel
before dry etching; (b) poly-C panel after dry etching; (c) top view of poly-C

panel; (d) side view of poly-C panel ................................................ 87
Surface micromachining process of built-in interconnects ...................... 88
Surface micromachined poly-C ﬁlm with doped poly-C pattern ............. 89

Poly-C resistivities for 1pm thick ﬁlms deposited at 700 °C. The inset shows
resistivity data from an earlier study (annealing temperature is 600 °C)....90

Bonding process concept of poly-C ﬁlms; (a) before and (b) after poly-C
bonding ...................................................................................... 92

SEM images of two bonded poly-C ﬁlms using boding concept shown in
Figure 4.16 ................................................................................. 92

Basic concept of poly-C thin ﬁlm Package: (a) complete package, and (b)

cross section view of package ......................................................... 95
Poly-C thin- ﬁlm package fabrication process .................................... 97
(a) Poly-C ﬁlm surface; (b) Raman spectrum of poly-C ﬁlm .................. 99

Fabricated poly-C thin ﬁlm package; insets are close view of (a) package
border, (b) anchor and access port, (c) close view of package anchor, and
close view of access port: (d) before sealing, (e) after sealing..............101

A broken poly-C thin ﬁlm package. .......................................................... 102

The fabrication of embedded feedthroughs: (a) doped poly-C and (b) poly-
sullcon103

Fabrication process of corrosion-resistance test chip ......................... 105
(a) Cross-section view of PECVD oxide layer; (b) Top view of a test

chip .................................................................................... 106

xii

5.9:

5.10:

5.11:

5.12:

5.13:

5.14:

5.15:

(a) Sample chip before soak test; (b) Sample chip after 3 weeks soak; (0)

sample chip after 6 weeks soak ..................................................... 107
Schematic diagram of the piezoelectric actuation and laser detection
setup ................................................................................. 109
Integrated poly-C thin film encapsulation process for cantilever
resonators ........................................................................... 111
Fabricated poly-C cantilever resonators ........................................... 112
Fabricated poly-C thin ﬁlm package; (a) release package before final
sealing, (b) completely sealed package ........................................... 112
Encapsulated poly-C cantilever resonator ................................... 113

Measured frequency spectrums of (a) pre- and (b) post-packaging
samples ................................................................................. 115

xiii

Chapter 1

Research Motivation and Goals

1.1 Introduction

MEMS packaging is a major challenge to Microsystems industries.
Although MEMS fabrication uses process and tools borrowed from
microelectronic industries with modiﬁcation, MEMS design is quite different from
its microelectronic counterpart. MEMS design is so application-speciﬁc that every
speciﬁc device function plays an important role in package design consideration.
For example, resonant device such as RF ﬁlter might require vacuum packaging
while accelerometers might work better at atmospheric pressure. This makes the
development of packaging standards for MEMS almost impossible. Therefore,
packaging and package design must be closely coupled with system and device
design. The packaging process must be integrated into entire

MEMS/Microsystems’s fabrication process.

MEMS packages are expected to provide MEMS devices and on-chip
circuits with functions such as mechanical support, protection from environment,
electrical interconnection and thermal management. Closely tied with the IC
silicon-processing technology, which is widely used currently, MEMS packaging
can take advantage of these mature chip-scale packaging techniques, including

ﬂip-chip and ball-grid-array techniques [1 -3]. However, due to its diversity, MEMS

packaging is still complicated. Recently, the developments in MEMS area have
led to growing interests in MEMS packaging at wafer level, to reduce the
packaging and testing cost. Various approaches in this area can be
characterized into two categories: integrated encapsulation process and wafer
bonding process [4]. Integrated process adds extra steps, such as ﬁlm
deposition, patterning and etching into MEMS fabrication process, to build micro
encapsulation to protect MEMS structures. Typical examples are an epitaxial
silicon cap to seal microstructures [5] and a silicon nitride shell to seal
mechanical resonator for wireless communication applications [6].

Wafer bonding process use different bonding methods like fusion bonding,
anodic bonding, eutectic bonding and solder bonding to encapsulate
microstructures by using a second substrate of silicon, glass or other
materials[7]. Recently, a unique approach of MEMS packaging by localized
heating and bonding was proposed[8] to explore a universal process of MEMS
packaging at wafer level. The integration of MEMS devices into a system also
requires multichip packaging and 3D packaging technologies. While the multi-
chip module (MCM) technology has progressed rapidly in the past decade
[9][10], a compact multi-substrates package with a zero-insertion-force (ZIF)
micro connector is being developed for WIMS applications [11].

In addition to develop and improve conventional MEMS packaging
technologies, there is also a tremendous need for exploring the applications of
new material technologies on MEMS packaging, especially for harsh

environments. Due to its extreme hardness, chemical and mechanical stability,

large band gap and highest thermal conductivity, chemical vapor deposited
(CVD) polycrystalline diamond (poly-C) has emerged as a novel material for
MEMS applications, on both micro device and packaging. For MEMS device
application, the fabrication of freestanding diamond micro-structures using Si
molds [12][13], lC-compatible poly-C technique [14] and diamond-on-silicon
micro acceleration sensors [15] and polycrystalline diamond resonator [16] have
been reported. In packaging area, diamond draws more and more attention
because of its excellent thermal, mechanical and electrical properties. The
highest thermal conductivity of diamond leads to wide applications on package
thermal management as heat sink [17]. A fabrication technology of all-diamond
packaging panel with built-in interconnects (boron-doped poly-C) was reported
[18] to explore the electrical property of poly-C and potential applications.
Diamond has the highest Young’s modulus and its coefﬁcient of thermal
expansion (CTE) is very close to that of Si. This makes poly-C a candidate

material for MEMS thin ﬁlm package.

1.2 Objective of This Work

This dissertation focuses on the study of CVD poly-C thin ﬁlm technology
for MEMS packaging. The prime motivation of this work is to explore the
applications of poly-C thin ﬁlm technology on MEMS packaging. Figure 1.1
illustrates an overview of the present study. This long-term research project has
two parallel research directions: poly-C packaging panel fabrication and

integrated poly-C thin ﬁlm encapsulation process. This study starts from the

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fundamental research of characterization and improvement of basic poly-C
techniques, such as diamond seeding methods, microwave plasma CVD poly-C
growth and doping technology. Then several enabling technologies have been
developed for both research directions. However, this dissertation will have an
emphasis on the poly-C thin ﬁlm encapsulation packaging process, including
process design, test package fabrication and evaluation. This work involves
following speciﬁc goals:

. Low temperature poly-C deposition and characterization;

. Develop and improve different seeding methods for different substrate

surfaces;
. Free-standing poly-C micro structures fabrication;
. Ultra-fast diamond growth model;
. Resistivity study of in-situ doped poly-C ﬁlm;
. Develop a package panel with built-in electrical interconnection;
. Diamond-diamond CVD bonding technology;

. Integrated post-MEMS poly-C thin ﬁlm package design, fabrication and

characterization.

1.3 Dissertation Organization

Chapter 2 presents an overview of the current MEMS packaging

technologies, diamond properties and Its applications in MEMS. In chapter 3,

fundamental poly-C technologies used in this study are outlined. The detail
description of the ﬁlm deposition system, MPCVD, is given. Seeding, deposition,
doping, patteming and characterization of diamond ﬁlm are investigated. Chapter
4 focuses on the fabrication technology for packaging panel applications,
including the ultra-fast growth model, packaging panel with built-in interconnects
and initial diamond-diamond bonding investigation. Chapter 5 presents the
details of the design, fabrication and evaluation of poly-C thin ﬁlm encapsulation
packaging process. To evaluate the efﬁcacy of poly-C encapsulation, poly-C
cantilever beam resonators were tested using piezoelectric actuation and laser
detection method before and after poly-C packaging process. Chapter 6 presents

conclusions of this study and considers possible future directions.

Chapter 2

Background

2.1 Introduction

This chapter presents an overview of the current MEMS packaging
technologies. After reviewing general MEMS packaging issues, various MEMS
packaging approaches are summarized. Diamond properties are brieﬂy
discussed. Chemical Vapor Deposition (CVD) polycrystalline diamond (poly-C)
growth mechanism is discussed and difference CVD deposition techniques are
compared. Finally, some of the current applications of poly-C on MEMS are

reviewed.

2.2 MEMS Packaging Overview

MEMS packaging is a major challenge to Microsystems industries.
Although MEMS fabrication uses process and tools borrowed from
microelectronic industries with modiﬁcation, MEMS design is quite different from
its microelectronic counterpart. In microelectronics, chip design and fabrication
process is highly industrialized and standardized, leading to possible
development of packaging standards. As long as the package can protect the
chip from outside inﬂuences and provide electrical interconnection and heat ﬂow

path for power dissipation, a single package type can be used for different kinds

of chips. The detailed electronic function of chip is not important. In contrast,

MEMS design is so application-speciﬁc that every speciﬁc device function plays

an important role in package design consideration.

For example, resonant

device such as RF ﬁlter might require vacuum packaging while accelerometers

might work better at close to atmospheric pressure. This makes the development

of packaging standards for MEMS almost impossible. Table 2.1 shows the

Table 2.1 Comparisons of packaging issues between MEMS/Microsystems and

Microelectronics

 

Packaging issues

MEMS/Microsystems

Microelectronics

 

Enclosed devices
features

3-D complex structures,
Moving mechanical
structures

2-D ﬂat structures,
Stationary solid structures

 

Micro-machining
technology

Bulk and surface micro-
machining

Primary surface micro-
machining

 

Device Functions

Combination of mechanical,
chemical, biochemical,
optical and electrical

Simply electrical function

 

 

 

 

 

 

functions
Mechanic-electronic Yes No
Integration
Packaging materials Involves more kinds of Involves fewer materials
materials
Electrical feed- Fewer number Large number
through and leads
Packaging Distinct fabrication Fabrication techniques
techniques techniques for different are proven and well-
applications documented
Packaging industrial No Yes. Well-developed

standards

 

 

technology

 

 

comparison of packaging issues for MEMS and microelectronics. Therefore,
packaging and package design must be closely coupled with system and device
design. The packaging process must be integrated into entire
MEMS/Microsystems's fabrication process. Furthermore, the application-oriented
packaging design tends to increase the cost of the package relative to the
device. The packaging cost of MEMS/Microsystems may vary from a moderate
20% for a simple plastic encapsulated pressure sensors to a high 95% for a
special pressure sensor that are expected to sustain at extremely high pressure

with steep temperature rise [19].

Despite the great diversity of MEMS packaging, a common-sense guideline
of packaging design has been presented, to provide a way of consideration on
this subject [20]. Figure 2.1 summarizes the steps of this design ﬂow. Because
the MEMS device function directly affects how it is packaged, device and
package should be designed at the same time. Then the entire system needs to
be partitioned, to determine how much of electronics is built as part of the MEMS
device. The system might be a fully integrated chip that contains both MEMS
structures and electronics; or the system might be partitioned into two chips, one
pure MEMS chip and one circuitry chip, and they are wire bonded together. After
system is partitioned, people need to deﬁne system interface, to assess possible
materials for device and package fabrication. The next step is to establish formal
design speciﬁcations, such as overall design concept, material selection,
fabrication process and system integration. The ﬁnal step is the detailed device

design, consisting of a fabrication process and masks artwork. During the design

procedure, early results either guide the way to improvement of the design, or
may force a major modiﬁcation in device or package concept. Therefore, each

step in this design ﬂow will be visited iteratively until the design converges.

 

Device AND Package Design

 

 

 

 

 

 

System Partitioning ]

 

 

 

 

Deﬁne Interfaces ]

 

 

V

[ Design Speciﬁcations ]

 

v
Detailed Design J

 

 

 

 

Figure 2.1 Schematic ﬂow-chart for MEMS device and package design.

MEMS packages are expected to provide MEMS devices and on—chip
circuits with functions such as mechanical support, protection from environment,
electrical interconnection and thermal management. First of all, due to the very
nature of MEMS being mechanical, it is easy to understand the importance of the
mechanical support and protection of the device from thermal and mechanical
shock, vibration, high acceleration, and other physical damage during storage

and operation. The mechanical stress endured depends on the mission or

10

application. If the materials are unmatched or if the silicon is subject to tensile
stress, thermal shock or thermal cycling may cause die cracking. The coefﬁcient
of thermal expansion (CTE) of the package materials should be equal to or
slightly greater than the CTE of silicon for reliability. Secondly, in addition to the
simple protection from physical damages, MEMS packages tend to be hermetic
to protect encapsulated device from any harsh environmental inﬂuences.
Therefore, package materials should be good barriers to liquids and gases, and
have good corrosion-resistance. MEMS packages also provide interface between
microstructures and other system components. The higher of system integration
level, the more concerns of number of electrical interconnects and material they
are made of. Meanwhile, highly integration system brings another issue into
design consideration: thermal management of power dissipation.

Closely tied with the IC silicon-processing technology, which is widely used
currently, MEMS packaging can take advantage of these mature chip-scale
packaging techniques, including ﬂip-chip and ball-grid-array techniques [1-3].
However, due to its diversity, MEMS packaging is still complicated. Recently, the
developments in MEMS area have led to growing interests in MEMS packaging
at wafer level, to reduce the packaging and testing cost. Various approaches in
this area can be characterized into two main categories: integrated encapsulation
process and wafer bonding process [4]. Integrated process adds extra steps,
such as ﬁlm deposition, patterning and etching into MEMS fabrication process, to
build micro encapsulation to protect MEMS structures [21][22]. Typical examples

are an epitaxial silicon cap to seal microstructures [5] and a silicon nitride shell to

11

seal mechanical resonator for wireless communication applications [6]. Wafer
bonding process use different bonding methods like fusion bonding, anodic
bonding, eutectic bonding and solder bonding to encapsulate microstructures by
using a second substrate of silicon, glass or other materials [7][23-28].
Unfortunately, while the integrated processes suffer from the drawbacks of
process-dependency, the wafer bonding process suffers from the requirement of
high temperature and ﬂat surface of bonding. Therefore, it is really difﬁcult to
establish a universal process of MEMS packaging at wafer level. However, there
is a tremendous need for a versatile MEMS packaging process at the wafer-level
after devices are completed. There are great efforts have been conducted in this
direction and an unique approach of MEMS packaging by localized heating and
bonding was proposed [8].

In addition to develop and improve conventional MEMS packaging
technologies, there is also a tremendous need for exploring the applications of
new material technologies on MEMS packaging, especially for harsh
environments. Typical materials used for MEMS and its packaging are listed in
Table 2.2. In practice, there are a wide variety of materials that are involved in
MEMS and packaging, it is not possible to track all new materials developed for
MEMS and packaging recently. However, due to its extreme hardness, chemical
and mechanical stability, large band gap and highest thermal conductivity,
chemical vapor deposited (CVD) polycrystalline diamond (poly-C) has emerged

as a novel material for MEMS applications, on both micro device and packaging.

12

Table 2.2 Typical Materials used in MEMS

 

Semiconductors Silicon, poly-Si, GaAs

 

Insulators Silicon Nitride (Si3N4), Silicon
Oxide (SiOz), Alumina (AI203)

 

Metals Aluminum, Gold, Titanium,
Copper, Chromium, Nickel, etc.

 

Polymers Polyimide, Parylene, Plastic

 

 

 

 

Others Ceramic, poly-diamond

 

2.3 MEMS Packaging Approaches

Although MEMS packaging is very application-speciﬁc and no universal
packaging process has been established yet, various MEMS packaging
approaches at wafer level can be characterized into two main categories: wafer
boding process and integrated encapsulation process. No matter which kind of
process is used to package freestanding MEMS structure, the packaging process
should be considered from the beginning of the system development and it
should be integrated into device fabrication process. The integration of MEMS
device and related circuit chips into a system also requires multi-chip packaging
and 3D packaging technologies. In following sections, these three kinds of

approaches, with speciﬁc examples, will be discussed.

2.3.1 Wafer-bonding packaging process

13

Wafer bonding process uses different bonding methods like anodic
bonding, fusion bonding, and eutectic bonding to encapsulate microstructures by
using a second substrate of silicon, glass or other materials. This is a technology
that has found widespread use in IC as well as MEMS fabrication. Applications
include packaging, fabrication of 3-D structure and multi-Iayer device. As for
packaging, this process is about to bond the surfaces of wafers, to serves as a
hermetic seal of micro-device. This process can bring the MEMS packaging to
wafer-level. There are two principal requirements for achieving good surface
bonding: (1) intimate surface contact, and (2) bonding temperature. While
“intimate surface contact” requires ﬂat and clean contact surface, and certain
contact pressure to ensure the quality of bonding, “bonding temperature”

provides the required energy for the bonding.

Following sections present the typical wafer bonding techniques and

related applications.

2.3.1.1 Anodic bonding

Anodic bonding technique is also called electrostatic bonding, since it
applies high electrostatic DC voltage to generate large electrostatic force, pulling
two wafers together. This bonding technique is widely used in MEMS packaging
due to the relatively simple set-up and low cost. Another advantage of this
bonding technique is that the bonding temperature is in the range of 200 to 450
°C. which provide better process temperature compatibility and results in low

residual stress after the bonding.

14

Typical applications of anodic bonding include silicon-glass, silicon-silicon
and glass-glass bonding. Among these applications, silicon-glass bonding is the
most common one. Typically, Pyrex 7740 glass is used in this bonding process
because it is rich in Sodium and has close CTE to silicon. Figure 2.2 (a) shows
the set-up for silicon—glass anodic bonding. A DC voltage in the range of 200 —
1000 V is applied and wafers are heated to a temperature about 400 °C. The
bonding of silicon and glass is accomplished by the formation of a thin layer of
Si02 interface, as shown in Figure 2.2 (b). The presence of electrical ﬁeld attracts
sodium ions (Na‘) in the glass towards the cathode, leaving a Na+ depletion area
with oxygen ions (02'). These oxygen ions react with contacting silicon to form a
Si02 interface layer (equation 1), serving as the bond between silicon wafer and
glass wafer. To accomplish successful anodic bonding, both silicon and glass
wafers usually are double-sided polished and wafer surfaces are cleaned to be

particulates-free.
Si + 202' : Sio2 + 4e' (2.1)

Anodic bonding can also be used to bond two silicon wafers or two glass
wafers together. However, the process is not as straightforward as silicon-glass
bonding. Since the migration of sodium ions (Na*) and oxygen ions (02‘) are the
principal factors for anodic bonding, certain treatment should be applied on the
bonding surface of the wafers. While a thin layer of glass that is in rich of sodium
and oxygen ions is used as the intermediate layer for silicon-silicon bonding, a

thin layer of Si02 will serve as the intermediate layer for glass-glass bonding.

15

Cathode

     
    

   

 

  
       

  

 

 

 

Glass
‘ ,3. o, + N.
DC . ; 3' +02 *t ”a”
200 — 450 °C

|
SiO2 layer

(a) (b)
Figure 2.2 (a) Set-up of anodic silicon-glass bonding; (b) formation of anodic
silicon -glass bonding.
One advantage of bonding two identical wafers together is that there will be

fewer problems related to mismatch of GTE.

This bonding technique has been widely used in fabrication of 3-D or
multiplayer micro-device, such as capacitive pressure sensors. One typical
application is the Dissolved Wafer Process (DWP), which was developed at
University of Michigan by Dr. Kensall Wise and his group. Another major
application of this technique is to fabricate hermetic silicon-glass package for
MEMS. A great number of researches have been done on this topic. Typical
reported examples include a hermetic anodically bonded silicon-glass package
for implantable micro-device which is fabricated at U. of Michigan [29][30], and
silicon-glass vacuum package for a capacitive pressure sensor [31] and an

accelerometer [32].

2.3.1.2 Fusion bonding

Fusion bonding is another common wafer bonding techniques used in
MEMS packaging. Typical application of this technique is silicon-silicon bonding.
Different from the anodic bonding, silicon fusion bonding relies on chemical force
other than electric force for the bonding. To archive bonding, the boding surface
of the wafer must be treated with a hydration process, to introduce oxygen-
hydrogen (O-H) bonds to the interface. This process can be done by soaking
silicon wafers in HN03 or H202-H2804 solvent. It is also important that the
bonding surface should be extremely ﬂat and particulates-free. After surface
treatment, two wafers are brought into contact and some pressure is applied to
make them stick initially. Then a high-temperature annealing step is performed at
about 1000 °C to create strong Si-O-Si bond as a dehydration process. This
bonding process is illustrated in Figure 2.3. The chemical reaction for this

process is given below:
(Si — OH) + (OH — Si) --> H20 + Si-O-Si (2.2)

Silicon fusion bonding is a simple technique and can produce very strong
bonding. This technique is therefore used for the fabrication of high-pressure
silicon sensor with low cost packaging [33] and high-pressure bipropellant rocket
engine [34]. However, it has some strict requirements on the ﬂatness and
cleanness of the wafer surface. And, high annealing temperature sometimes is
not compatible with fabrication process of microsystem that contains electronic
devices. To overcome this disadvantage, a new packaging process that
combines silicon fusion process and localized heating technique has been

successfully demonstrated [35]. Micro-heaters, which are made of poly-silicon,

17

Pressure

Hot pressure plate

* iii: Silicb‘h =
* Silicon ..

Hot plate

 

 

Figure 2.3 Silicon fusion bonding set-up

are patterned in conﬁned bonding region, to provide localized high temperature
heating for fusion bonding. Without regular global heating, the substrate

temperature remains low.

2.3.1.3 Eutectic bonding

Eutectic bonding involves the diffusion of atoms of eutectic alloys into the
atomic structures of the wafers to be bonded together, thus forms solid bonding
of these wafers. To accomplish this bonding, one must ﬁrst select a candidate
material that will form a eutectic alloy with the materials to be bonded. Table 2.3
provides a list of eutectic alloys with their eutectic temperatures. The most
commonly used material to form a eutectic bonding with silicon is gold (Au) or

alloys that composes gold.

Table 2.3 Eutectic alloys for wafer bonding

 

 

 

 

 

 

 

Alloy Wt % ratio Eutectic temperature
(°C)
Au / Si 97.1 / 2.9 363
Al / Si 887/ 11.3 577
Au / Ge 88 I 12 356
Au / Sn 80 / 20 280
Ag / Sn 95 / 5 221
Pb / Sn 62 I 38 183

 

 

 

 

 

Setup for eutectic bonding is simple, as shown in Figure 2.4. Two silicon
wafers, one of them was deposited eutectic material, can be brought together
and heated to the temperature above eutectic point. The atoms of the eutectic
material start to diffuse rapidly in to contacting substrate. Sufﬁcient migration of
these atoms into bonding substrate surface will result in the formation of eutectic
alloy. The newly created eutectic alloy at the interface serves as a solid bond as
well as hermetic sealing for MEMS applications. This bonding technique is
performed at relative low temperature, so it has better temperature compatibility.
Another advantage of this technique is its better tolerance of surface ﬂatness,

allowing the bonding of non-uniform surfaces.

Due to its relatively low process temperature and better tolerance of

surface ﬂatness, eutectic bonding has been used in MEMS packaging. For

19

example, Au-Si eutectic bonding has been used to fabricate hermetic packages
for various micro-sensor, including chemical sensors [36][37]. Also, localized
eutectic bonding technique has been also studied [35], as part of effort to explore

versatile wafer-level packaging process.

Pressure

IIIIII

 

Hot plate
Silicon”

 

 

Eutectic ﬁlmzAu ,_ - .

 

" A Silicon

 

Hot plate

Figure 2.4 Eutectic bonding set up

2.3.2 Integrated encapsulation process

This process integrates the MEMS encapsulation steps with device
fabrication process. It is a post-MEMS fabrication process. Wafer Level
Encapsulation (WLE) technologies as a post-processing step in a manufacturing
ﬂow is a low cost technique for increasing yield and is more widely used today in
the MEMS industry. In certain applications, WLE is sufﬁcient as ﬁnal packaging
of the device prior to use. This process mainly involves surface micro-machining

technologies, such as sacriﬁcial layer deposition and etching, and thin ﬁlm

20

deposition and patterning. Typical steps of encapsulation process are illustrated
in Figure 2.5. After MEMS device is fabricated, instead of removing the sacriﬁcial
layer for device, another thicker layer of same sacriﬁcial material is deposited
and patterned. Then the package cap layer is deposited and patterned to form
the thin-ﬁlm package shell with ﬂuidic access ports for release etching. After
removal of sacriﬁcial layer to release both device and package, the access ports

will be sealed with another thin-ﬁlm deposition.

Micro device

    

 

 

 

 

rnmmm1"mwx "I!
-é’. ~ ' ' ,t ,. ‘ ' . ' 1 ‘3' ' WAREE
r -
E. S] .

package shell _
access pelts F—emuhn—ms! . ‘

rt" r— l: 1‘" I—

Figure 2.5 Typical fabrication steps of integrated encapsulation

 

ﬂ additional sacriﬁcial pattern

 

ﬂ additional sealing deposition

  

 

 

 

[

 

 

Based on this process, there have been many thin-ﬁlm encapsulation
packages, fabricated with different packaging materials. Many different thin-ﬁlm
deposition methods, such as low pressure CVD (LPCVD), physical vapor

deposition (PVD) and electroplating, have been involved based on microsystem

21

fabrication speciﬁcations. Lin et al. demonstrated a low-stress nitride thin-ﬁlm
package for micro comb-drive resonator [6], using the process very similar to that
illustrated in Figure 2.5. Phosphorus silicate glass (PSG) was selected as
sacriﬁcial material, which was removed by 49% hydroﬂuoric acid (HF) later. To
accomplish the vacuum package for resonator application, LPCVD was used to
deposit nitride ﬁlm to form package shell and seal the etchant access ports. The
resulting package vacuum was about 200 mtorr. A fabricated package is shown

in Figure 2.6.

ontact Pad

‘ itride Shell

 

Figure 2.6 (a) An SEM microphoto of a vacuum-encapsulated lateral
microresonator; (b) Shell and freestanding comb structure cross section as
seen in an SEM [6].

Another integrated sealing process by evaporation of aluminum (Al) has
also been reported by Bartek et al [38]. After a micro-diode structure was
fabricated, the nitride package was deposited and patterned with ﬂuidic access

ports for release etching. After polysilicon anode was manufactured and

22

sacriﬁcial material was removed, PVD AI evaporation was performed at pressure

of 2 x 1045 torr to seal the access ports, as shown in Figure 2.7.

(a) . polysilicon
release Vla / silicon nitride

 

 

 

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IIIAL ............ Al. IIIA-AAIAA-J ......

 

silicon

 

 

 

Figure 2.7 An integrated encapsulation
process for a micro vacuum diode [38].

Metal electroplating was also used to fabricate thin-ﬁlm vacuum packaging
by Stark et al [39]. As shown in Figure 2.8, the package is fabricated in a low

temperature (<250 °C) 3-mask process by electroplating a 40-um thick nickel ﬁlm

over an 8-pm sacriﬁcial photoresist that is removed prior to package sealing. This

23

process was used to package an integrated Pirani gauge, which measured a

sealing pressure of ~1.5 torr.

ACCV Cipot Magn Def WI) I——‘————'i 500 [lift
l0 0 ICV 3,1“. 68x SI. ll 9 Ni Package 5 IO .3002

 

Figure 2.8 SEM of a thin-ﬁlm nickel package for Pirani gauge [39].
The typical advantage of this packaging process is that packaged MEMS
devices could be ready for conventional IC fabrication process such as dicing,

pick-and-place etc. However, this process is highly application-speciﬁc, which

limits its versatility.

2.3.3 3-D multi-chip packaging approaches

24

The integration of MEMS device and related circuit chips into a system also
requires multi-chip packaging and 3D packaging technologies. The packaging
buzz word for the 90's is multi-chip modules (MCMs). A multi—chip module is an
electronic package structure consisting of two or more "bare” or unpackaged
integrated circuits interconnected on a common substrate. The driving force
behind the development of MCM technology is the continuing need to cost-
effectively interconnect multiple die without adding substantial overheads in
terms of volume, weight, or reliability over conventional single chip packages and
printed circuit board technology. Therefore, the fundamental aspect of MCM
technology is chip interconnection, which includes connecting I/O conductors on
a chip to an MCM substrate. The goals are higher performance resulting from
reduced signal delays between chips, improved signal quality between chips,
reduced overall size and reduced number of external components [40-42]. Figure
2.9 shows a generic schematic diagram of MCM architecture. Although the MCM
was initially developed for electronic packaging, this technology also can be used

for MEMS/Microsystems packaging at system integration level.

As the requirements for high performance systems continually increase,
even MCM technology can not cope. Hence investigations have been conducted
into more advanced technologies that would allow stringent requirements to be
fulﬁlled. As a result 3D packaging technology has evolved as a natural
progression from the 2D packaging technology (MCMs). The driving forces

behind the development of three-dimensional packaging technology are similar to

25

On-ehlp On-chip pad Flip chip
lnterconnectlon

  
    
 
  

Solder bump
Wire
interconnection Substrate pad
‘5'7'

Multilayer
substrate

   
 
 

.' .'
. u .
e .
- II
.» -. a
. .
u .u o
. o .-
. o .
n. . .-
o.v ‘ u
e or .. .
e .-
.- u .u.
. u l
u. u- .o -
.. 4. .-
Io .

e or c
.u i. o-
u e .u .
u 'v .

.

TAB Intereonnecﬂon
Bare chip

Terminals and plns
Cross-section View

First level connection

   
 

Second level connection

 

 

Common Circuit Substrate

 

Printed Wiring Board

 

 

 

Figure 2.9 A generic schematic diagram of an MCM architecture [43]

26

the MCM technology, although the requirements for the 3D technology are more
aggressive. These requirements include the need for signiﬁcant size and weight
reductions, higher performance, small delay, higher reliability and, potentially,
reduced power consumption. Several different multi-chip module technologies
have been studied, including chip scale packaging using solder, wire bonding,
ﬂex substrates, epoxy layers, ﬁlled vias, micro-relays, and ceramic clusters for

manufacturing dense packages [43-46].

Recently, a new approach for the assembly of microsystems consisting of
multiple substrates containing circuits, sensors, and actuators in a re-workable
and modular fashion [11][47]. The microsystem dice are placed inside a cube,
and therefore self-aligned and stacked on top of one another, and are separated
using non-conducting elastomer sheets. Signal transfer (electrical and ﬂuidic)
between these dice is achieved using ﬂexible Parylene cables that are formed on
the inside walls of the cube. Conductors and contact pads formed on the
Parylene cables are pressed onto matching contact pads on the individual
substrates thus forming a mechanical connect/disconnect system for both
electrical and ﬂuidic signals. Electrical connections between cables and individual
dice are achieved using pressure contacts, and are therefore not permanent.
This makes the WIMS cube for Microsystems re—workable. This provides
maximum ﬂexibility and modularity, both of which are critical for microsystems
and MEMS application. Figure 2.10 shows the schematic diagram of system

integration and an integrated WIMS cube.

27

  
   
 
 
 
  
 
 
 
  
 

._ Exposed Sensor
Modules

°- Fluidic Modules

, Sealed Sensors
Modules

Electronics &
Wireless IIO Chip

Power Modules

3"“ Battery

b. External Fluidic
b & Electrical

1. I .771 Contacts
Microsystems "a"

Package g

,g-n

    
   
 

(a)

Non-conductive
Elastomer

 

Figure 2.10 (a) a schematic diagram of system integration; (b) an integrated

WIMS cube.

28

2.4 Diamond Properties

Diamond has emerged as a novel material for MEMS applications, due to
its excellent properties. Diamond is comprised of covalently bonded carbon
atoms in a diamond cubic crystal structure, shown in Figure 2.11. The diamond
lattice can be thought of as two interpenetrating face-centered-cubic (FCC)
sublattices. The covalent bonding between carbon atoms in diamond is called
covalent spa-bonding. In 1931, Linus Pauling, the two times Nobel Prize winner,
used quantum mechanical calculations to show how one s orbital and three p
orbitals of carbon atom can mix, or hybridize, to form four equivalent atomic
orbitals (sp‘3 orbitals) with tetrahedral orientation. The sp3 bonding in diamond
structure distinguishes it from other carbonaceous structures with different
hybridization. The excellent properties of diamond can be attributed to carbon-

carbon sp3 bonding and resulting lattice structure.

As for mechanical consideration, diamond is the hardest material. Its
exceptional hardness and low frication lead to broad applications such as cutting,
drilling, grinding and polishing. The high Young’s module of diamond, up to 1220
Gpa, makes it an excellent material for MEMS applications, like resonators and
thin ﬁlm packaging. For thermal applications, diamonds have the lowest speciﬁc
heat and the highest thermal conductivity of 20 W/cm'K among any solid
materials. These attributes make diamonds the ideal candidate for heat sinks of
electronic chips. Diamond also has a low coefﬁcient of thermal expansion (CTE)
that is close to silicon at room temperature. Electrically, diamond is in the same

periodic group as silicon and demonstrates similar semiconducting properties

29

due to doping. Diamond is an exceptional insulator without doping due to its large

indirect band gap of 5.45 eV, as shown in Figure 2.12 [48]. However in the

 

Figure 2.11 Unit cell of diamond lattice.

3o - -
’I’ 2, Biamond i

 

 

 

 

 

 

Figure 2.12 Band structure including exchange and correlation effects [48].

30

   

presence of trace amounts of boron, the substance becomes a semiconductor.
Diamond's excellent thermal characteristics also make it an ideal semiconductor,
since it will be much more resistant to heat than silicon. Optically, diamonds are
special, giving it its distinctive place in jewellery. Its high refractive index (2.41)
provides it with a steep angle (24 degrees off normal) for total internal reﬂection.
The properties of diamond are summarized in Table 2.4 [49].

There are several types of diamonds for different applications, including
nature diamonds, synthetic industrial diamonds and CVD polycrystalline
diamonds. Natural diamonds are classiﬁed by the type of la, lb, Ila and Ilb, based
on the quantity of impurities (Nitrogen) found within them. Type la is the most
common type of natural diamond, containing up to 0.3% nitrogen. All other three
types are very few in nature. Synthetic industrial diamonds are produced by High
Pressure High Temperature (HPHT) Synthesis process. In HPHT synthesis,
graphite and a metallic catalyst are placed in a hydraulic press under high
temperatures and pressures. Over the period of a few hours the graphite
converts to diamond. The resulting diamonds are usually a few millimeters in size
and too ﬂawed for use as gemstones, but they are extremely useful as edges on
cutting tools and drill-bits and for being compressed to generate very high
pressures. Nearly all-synthetic industrial diamonds are type lb, containing up to 5
ppm nitrogen. Both nature diamond and synthetic diamond are single-crystalline.
Considering the high cost, HPHT synthetic condition and difﬁculty of processing,
these two types of diamonds are very limited in MEMS applications. Instead,

CVD poly-crystalline diamond (poly-C) can provides still remarkable quality for

31

MEMS application with relatively low fabrication cost. Typically, poly-C is
deposited at temperature in the range of 400 - 1200 °C and pressure of 20 — 100

torr, which are compatible with MEMS fabrication process.

Table 2.4 Common properties of diamond

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Property Value Units
Hardness 10,000 kg/mm2
Strength, tensile >1.2 GPa
Strength, compressive >1 10 GPa
Sound velocity 18,000 m/s
Density 3.52 g/cm3
Young's modulus 1.22 GPa
Poisson's ratio 0.2 Dimensionless
Thermal expansion coefﬁcient 0.0000011 /K
Thermal conductivity 20.0 W/cm-K
Thermal shock parameter 30,000,000 W/m
Debye temperature 2,200 K
Optical index of refraction (at 591 nm) 2.41 Dimensionless
Optical transmissggy (from nm to far 225 Dimensionless
Loss tangent at 40 Hz 0.0006 Dimensionless
Dielectric constant 5.7 Dimensionless
Dielectric strength 10,000,000 V/cm
Electron mobility 2,200 cmzN-s
Hole mobility 1,600 cmzN-s
Electron saturated velocity 27,000,000 cm/s
Hole saturated velociy 10,000,000 cm/s
. small and On [111]
Work function negative surface
Band gap 5.45 eV
Resistivity 1013 - 1016 Ohm-cm

 

 

 

 

32

2.5 CVD Poly-C Deposition Techniques

First evidence of diamond growth by CVD by Eversole in 1952-53 led to the
use of H2 and CH4 in the hot ﬁlament CVD (HFCVD) to grow diamond on
diamond substrates (homoepitaxial growth) by Angus in 1971. The inexpensive
CVD polycrystalline diamond (poly-C) was grown on non-diamond substrates by

Deryagin in 1976, Spitsyn in 1981, and by Matsumoto et al. in 1983.

2.5.1 CVD poly-C growth mechanism [50]

In diamond CVD processes, reaction gaseous species (CH4 + H2) are
activated into CH3 and hydrogen atom, and deposited onto substrate surface.
Currently, it is believed that, during the diamond CVD process, the CH3 is
responsible for deposition of C as diamond and non-diamond phases. The
atomic hydrogen, present in the growth environment, removes the non-diamond

phases leaving behind the diamond phase.

A CVD diamond deposition process is shown in Figure 2.13. Typically, a
mixture of 1-2% methane in hydrogen environment at pressure around 50 torr,
ﬂow into reactor and gaseous reactions are initiated by hot ﬁlament, plasma or
other methods. The sample substrate may be pre-seeded with diamond particles.
On its surface, adsorption, diffusion, reaction and desoroption of various species
occurs leading to the nucleation of diamond particles, removal of graphite (spz)
carbon, and ultimately the growth of a continuous diamond ﬁlm. The principle gas

phase reactions involve the rapid hydrogen transfer reaction and slower

33

Reactants

Fl
CH4+ l-I2

U

 
  
     
 

  
  

Activation
H2 _. 2H
CH4 + H—e CH3 + H2

0
O

  

Flow and Reaction

”1‘

 

Figure 2.13 Schematic diagram of CVD diamond process.

bimolecular hydrocarbon reactions. Since the major reaction species are H and
H2, and the total hydrocarbon concentration is around 1-2%, the hydrogen

transfer reaction is much faster than the bimolecular hydrocarbon reaction.

Roles of hydrogen atoms in the CVD process include: (1) Hydrogen atoms
terminate the 'dangling' carbon bonds on the growing diamond surface; and (2)

Atomic hydrogen etches more graphite than diamond.

Near the end of 19905, basic science of CVD diamond was well
understood, and today diverse plasma and thermal techniques have been
developed to produce poly-C ﬁlms in various thickness and diameters. Although
there are some reports of n-type poly-C and crystalline diamond growth, the well-

established techniques exist only for in-situ doping of p-type diamond.

2.5.2 CVD poly-C deposition methods

A number of diamond deposition methods are currently available for the
growth of diamond. Early approaches to forming diamond from the vapour phase
were characterized by the thermal CVD techniques, including Hot Filament CVD
[51][52] and Combustion Flame CVD [53][54]. These methods use heat energy to
break down hydrogen molecules to hydrogen atoms. Later, plasma related CVD
techniques were developed. Major methods include DC arc discharge plasma
CVD [55][56], radio frequency plasma CVD [57] and microwave plasma CVD [58-
61]. With induced power, reactant gases form plasma and hydrogen molecules
are atomized. Recently, a multiple pulsed laser process with ultra high deposition
rate is being developed [62][63]. A comparison of different kinds of CVD
techniques was shown in Table 2.5, in terms of parameters like deposition rates,

deposition area, cost, advantage and disadvantages.

As shown in Table 2.5, the deposition rate of CVD diamond shows a large
variation (0.1 — 3,600 micrometers) depending on the growth technique.
Considering the overall performance, cost and quality of deposited diamond ﬁlm,
microwave plasma CVD (MPCVD) method has been widely chosen to grow CVD

diamond.

35

 

 

 

 

 

 

 

 

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36

2.6 Poly-C MEMS Technology and Its Packaging

Applications

Poly-C MEMS technology has been intensively studied recently. The
exceptional properties of poly-C have attracted great interests in diamond-on-Si
MEMS technology, to improve MEMS fabrication cost efﬁciency. Thus, poly-C
MEMS technology may complement conventional Si-based MEMS technologies

with respect to cost and performance.

Poly-C MEMS technology involves both bulk micromachining and surface
micromachining techniques, to fabricate freestanding poly-C MEMS structures.
Bulk micromachining technique is used to fabricate poly-C MEMS structures with
high aspect ratio, such as deep channel. Since Si bulk micro-machining
techniques are well-developed, it usually uses micromachined silicon wafer as
mold for microstructures replication, instead of processing poly-C directly. A
microstructure technology has been developed to fabricate poly-C MEMS
structure, by taking advantage of well-developed Si etching techniques [64]. As
illustrated in Figure 2.14, silicon wafer was etched to form certain shape as a
mold. Poly-C then was deposited onto this mold. After silicon was dissolved, the

microstructures were replicated to poly-C ﬁlm.

Surface micromachining techniques deal with thin ﬁlm deposition and
patterning. Therefore, poly-C thin ﬁlm technique ﬁts conventional Si-based
surface micromachining process very well. To pattern poly-C MEMS structures,

both poly-C etching and selective growth of poly-C have been studied. Due to its

37

Geometry SEM-micrograph

 

 

 

 

 

 

 

 

 

 

. . 2'] LI [Tl

 

Figure 2.14 Diamond replicas of etched Si molds [64]

chemical inertness, it is not possible to pattern poly-C using wet etching
techniques. Different dry etching techniques, including reactive ion etching (RIE)
[65], ion beam milling [66], inductively coupled plasma (ICP) etching [67],
electron-cyclotron resonance (ECR) etching [68] and MPCVD plasma etching
[69] have been reported previously to pattern diamond (Table 2.6). As for
selective poly-C growth, an lC-compatible technique [14] has been developed to
fabricate poly-C MEMS structures using diamond-loaded photoresist (DPR)

technique.

38

Table 2.6 Comparison of different diamond dry etching techniques

 

 

 

 

Dry Etching Gas Flow Pressure Ion Etch Rate
Technique (sccm) (mtorr) Energy (nm lmin)
I Bias
RIE Oz (80 sccm) or 65 400 eV 35 - 40
H2 (80 scorn) 30 - 33
Xe” Ion-beam N02 0.2 2000 eV 200
ECR Oz (55 sccm) 0.4 - 150 V 20 — 170
MPCVD H2 (200 sccm) 3 x 10‘ - 150 V 9.7
Ar(10 sccm):H2 (150 -150V 16
sccm) + 150 V 12
02 (5 sccm) : H2 (105
sccm)
Inductively Ar (10 sccm) : 02 (30 5 228
Coupled sccm)
Plasma

 

With the development of the poly-C technology, many MEMS devices,
which are made out of diamond, have been fabricated. An all diamond pressure
sensor prototype utilizing doped-diamond as a piezoresistor on undoped-
diamond as ﬂexing diaphragm (Figure 2.15) has been reported [70]. Due to its
high Young’s modulus, poly-C has been utilized as the mechanical structure
materials in many MEMS resonator designs to increase the resonant frequency.
Recently, the ﬁrst CVD nanocrystalline diamond micromechanical disk resonator
(Figure 2.16) with material-mismatched stem has been demonstrated at a record

frequency of 1.51 GHz with an impressive Q of 11,555 [71].

39

 

Figure 2.15 (a) SEM of etched diamond pressure sensor membrane cavity; (b)
DMEMS Pressure sensor chip [44].

,_ Self-Aligned item Interconnect .
[PonSI] ‘K [Polysg ‘ b l

,- Siemoinnng - . g (r -
DI'w‘Etch Mas. 1"" I *-\.\\—

[OXIde] ' f .
Electrode . Electrode
‘. i [PolySi] [Pm-yen

CLIILII'In-‘I' J . /- V ‘ *2
Quietlurgs, Resonator DISK '
[Polyclmmonrl] ,

/’ . - -- - A
Verti Sidewall Resonator L‘lSk
, ca; ‘ [PolydlamOI':..;l]

 

Figure 2.16 Fabrication process ﬂow cross-sections and associated SEM’s at
different stages of the process. (a) After diamond disk deﬁnition. (b) After
polysilicon stem refilling and electrode deﬁnition [45].

Although varieties of poly-C MEMS application have been successfully
demonstrated, the typical application of diamond on MEMS packaging is still
limited to thermal management [17][72]. As mentioned before, MEMS packaging
is supposed to provide MEMS devices and on-chip circuits with functions such as

mechanical support, protection from environment, electrical interconnection as

40

well as thermal management. The exceptional properties of poly-C, other than
thermal property, should also make an impact on MEMS packaging. To explore
broader application of poly-C on MEMS packaging is the motivation of my Ph.D.

work.

41

 

Chapter 3

Fundamental Research on CVD Poly-C

Technology

3.1 introduction

As mentioned in Chapter 1, the ﬁrst step of this research is to perform an
intensive fundamental research on basic poly-C technologies, such as seeding
and nucleation, deposition, doping and patterning. This chapter summarizes the
characterization and optimization of these technologies. The results of this
fundamental research are used for enabling technology development and

package design and fabrication later.

3.2 Fabrication and Characterization Systems

In chapter 2, several conventional CVD diamond deposition methods are
discussed and compared. Considering the overall performance, cost and quality
of deposited diamond ﬁlm, microwave plasma CVD (MPCVD) method has been
widely chosen to grow CVD diamond. To characterize deposited poly-C ﬁlm,
Raman spectroscopy, scanning electron microscopy, and atomic force

microscopy have been used.

42

3.2.1 MPCVD diamond deposition system

In this study, poly-C ﬁlms were synthesized using MPCVD system (Model
MPDR 313EHP, Wavemat, Inc.) with 2.45 GHz microwave generator up to 6
kilowatts. The schematic diagram is shown in Figure 3-1.

The main components of the system consist of a microwave source unit,
cylindrical microwave cavity, deposition chamber, substrate holder, Gas
distribution and pressure control unit.

The microwave source unit includes a DC power supply (Model
GMP60KSM, SairemTM), a microwave power controller (Model PIL408, SairemTM)
and a magnetron (Model GMP60KSM, SairemTM). The DC power supply drives a
magnetron source producing microwaves with frequency 2.45 GHz. The power
supply is able to deliver power between 0.6 to 6 kW. The reﬂected power is
absorbed by the matched load. Hence, the magnetron head is protected against
any reﬂected power on the transmission line.

The cylindrical microwave cavity was made of aluminum. The diameter of

the cavity was ﬁxed at 17.78 cm and its height deﬁned by Ls in Figure 3.1 was

changeable to tune the microwave cavity. The height of cylindrical cavity was set
to ~21.59 cm, to operate in the electromagnetic mode designated TM013 for
2.45GHz microwave. This mode was found to provide optimum ﬁlm deposition
uniformity. The cylindrical quartz dome inside the microwave cavity had
dimensions of 5 inch diameter and 3.5 inch height. The microwave cavity was
essentially a termination to the microwave transmission waveguide. The

intensiﬁed microwave energy produced the plasma of the reaction gases inside

43

 

 

Waveguide I

 

 

 

 

 

 

 

 

 

 

Microwave
Generator

Probe L

\ DC Power I
Microwave Supply
cavity
/Slidin Short
4 g

 

 

I LBJ-p

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Cooling Water

A

/ Quartz Bell jar

 

 

 

 

 

 

 

 

Ls
Pyrometer
_ .. Base Plate
I, I Pressure
'\ Gauge
Substrate —
Holder
'r—'| Gas inlet |

 

 

Deposition chamber

 

Valve

 

Roughing Pump I

 

 

Figure 3.1 Schematic diagram of MPCVD system.

quartz dome. The resonant condition of the cavity is mainly determined by the
position of the cavity short and the microwave coupling probe. The short is the
electrical top of the cavity and determines the overall length of the cavity, which

in turn controlled the operating mode of the cavity. The position of the probe,

deﬁned by Lp in Figure 3.1, determines the electromagnetic ﬁelds near the cavity

wall and hence the coupling of the energy into the cavity. By tuning the positions
of the short and probe, the impedance of the plasma discharge/microwave cavity
is matched to that of the transmission waveguide, producing a resonant
condition. A well tuned cavity would show little or no reﬂected microwave power.

The deposition chamber was made of stainless steel with dimensions of
17 inch height and 18 inch diameter. The sample can be loaded and unloaded
through a 10 inch front door. The sample stage can be attached to the base plate
by sliding through two guiding rods.

Water was used to cool the cavity walls, sliding short, coupling probe, and
base plate. The jet pump (Model 9K862A, Dayton motors) was used to increase
the inlet pressure. The thermocouples (Type K, Omega Engineering, Inc.) were
used to monitor the temperature of the microwave cavity, base plate, quartz
dome, short, and probe.

Graphite or molybdenum was used as a substrate holder and
accommodates 4 inch substrate. The substrate holder had active cooling, so the
temperature of the substrate was decreasing with cooling. The substrate
temperature was observed by the infrared thermometer (Model 083707, Omega

Engineering, Inc.).

45

The gas distribution unit consisted of four mass ﬂow controllers (Type
11598, MKS lnstmments, Inc.) and a ﬂow readout unit (Model 247C, MKS
Instruments, Inc.) to control the ﬂow of the processing gases. Source gases were
mixed before reaching the inlet on the baseplate. Three capacitance manometers
(Type 622A, MKS Instruments, Inc.) were used to measure the pressure in the
chamber. The pressure controller (Type 651, MKS Instruments, Inc.) read the
pressure transducer and controls the throttle valve (Type 653, MKS Instruments,

Inc.) to achieve the desired deposition pressure. A base pressure of 10 mTorr

was achieved with the mechanical pump (Model SD-300, Varian Inc.). N2 was

used to vent the system after deposition.

3.2.2 Characterization systems

Throughout this research, the quality and properties of the poly-C ﬁlms
deposited by MPCVD were characterized by tool systems such as Raman
spectroscopy, scanning electron microscopy (SEM), and atomic force

microscopy (AFM).

. Raman spectroscopy
The Raman spectroscopy is widely used in the analysis of materials, and

the identiﬁcation of trace elements [73][74]. The wavenumber shift of 1332 in

Raman spectrum represents sp3 diamond peak. The Raman system (R-2001,

Ocean Optics, Inc.) consists of a diode laser, a focused probe, a CCD-array

spectrometer, an analog-to-digital converter, and operating software. The 532 nm

46

green laser with a power of 50 mW is used. The optical resolution is ~15 cm'1.

The focused probe consists of 90 um excitation ﬁber and 200 pm collection ﬁber.

The focal length of the probe is 5 mm.

. Scanning electron microscopy (SEM)

The SEM (JEOL 6400V, Japan Electron Optics Laboratories) consists of a

LaBe electron emitter (Noran EDS) in a vacuum chamber column and images by

collecting the secondary electrons emitted from samples due to the incident
electron beam [75]. It has a large depth of ﬁeld which can be up to four hundred
times greater than that of a light microscope. It is widely utilized to inspect the
surface morphology, crystal orientation, the grain sizes, nucleation density, and
ﬁlm thickness. The need for a conducting specimen somewhat limits its utility for
undoped ﬁlms. The environmental SEM (ESEM) is developed to overcome the
disadvantage. ESEM maintains the sample chamber in a near-atmospheric
environment more conductive to examination of wet samples and non-conducting
samples, and has a completely different environment, high vacuum, in the

remainder of the column.

0 Atomic force microscopy (AFM)

The AFM is another useful tool for studying the nucleation density, crystal
structure, and surface morphology of ﬁlms. A very ﬁne tip, mounted on a
cantilever, is scanned through the sample to obtain the surface proﬁle. The

advantages of AFM are high resolution and great sensitivity to deﬁne proﬁle

47

differences of vertical variations in the sample [76]. In addition, no vacuum is

needed for the operation of AFM, and it can be used on non-conducting surfaces.

3.3 Basic Poly-C Technologies

A typical CVD poly-C ﬁlm fabrication involves seeding, growth, doping and
patterning. The characterization and optimization of these technologies for this

research are investigated in detail.

3.3.1 Diamond seeding technology

Diamond particle seeding is an important pre-treatment step to generate
diamond nuclei before diamond growth begins. Diamond has been shown to
nucleate on a wide variety of materials. Due to the low nucleation density on non-
diamond materials, the substrates need to be treated to enhance the nucleation
density. The commonly used pre-treatment techniques are abrading [77][78],
ultrasonic nucleation [79-81], bias enhanced nucleation (BEN) [82-84], and
electrophoresis (EP) [85-87]. Currently, three different kinds of seeding methods,
diamond-powder-Ioaded photoresist (DPR) [14], diamond-powder-loaded water
(DW) [88] and electrophoresis [89], are being used in the MANTL Lab at

Michigan State University.

Diamond seeding density plays an important role in the later MPCVD poly-
C deposition process. In terms of the uniformity and smoothness of poly-C ﬁlms,

high seeding density usually yields better results. Different MEMS application

48

 

considerations, such as surface condition and substrate type, place different
process requirements on seeding method. The goal of this study is to improve
seeding density for each seeding method by optimizing the parameters of
seeding setup and operation. The characterization of different seeding methods

helps to make a right choice for application consideration.

3.3.1.1 Preparation of diamond seeds solution

The ﬁrst step is to prepare solutions containing diamond particles. Different
seeding methods mix diamond powder into different chemical carriers. Table 3.1

* shows the details of preparation of DPR, DW and EP solutions. Before mixing

Table 3.1 Diamond seeding solution preparation

 

 

 

 

 

Seeding methods DPR Electrophoresis DW
Diamond particle size (nm) 100 50 25
Carrier solution Photoresist/ Isopropanol De-ionized
PR thinner (IPA) water
Mixing ratio:
powder mass I chemical volume 800/ 80/ 30 7000 / 1400 5000 l 1000
(mg / ml)

 

 

 

 

49

 

diamond powder into chemicals, diamond powder should be heated for
dehydration process. During the mixing, magnetic stirring and ultrasonication
were used to break clustered diamond particles to achieve better diamond
powder suspension and higher diamond seed density in solutions. This step also

needs to be performed before every seeding process.

3.3.1.2 Diamond seeding set-ups

DPR and DW seeding methods employ regular photoresist spin on
technique, as shown in Figure 3.2. Sample wafers are put on a spinner (Model
WS-4OOB-6NPP/LITE, Laurell Tech. Corp.) and applied with DPR or DW
solution. Then, sample wafers will be spun at certain speeds (1000 rpm to 4000
rpm) for a certain period of time (303). The electrophoresis set-up is also very
simple, as shown in Figure 3.3. The sample will be suspended vertically in
diamond loaded Isopropanol solution. The separation between an iron cathode
and the sample anode is 1.5 cm. A +75 V bias (High Voltage DC Supply, Model
413C, John Fluke) was applied to the sample for 30 or 60 minutes. The diamond
particles will gain negative surface charges when they suspend in organic
solvents [86]. Therefore, the positive bias applied on the wafer has been shown
to attract negatively charged diamond particles. This seeding technique is

especially effective to seed diamond particles inside deep narrow Si channel.

50

 

Solution
dispenser

   
   
  
  
 

Diamond
seeding solution

Excess solution ﬂies
off during rotation

Sample wafer

¢ D Vacuum chuck

Figure 3.2 DPR/ DW spin-on seeding setup

Si ——’ {__Fe

mold Cathode

 

 

4

l
Isopropanol with 50 nm
diamond particles

 

Figure 3.3 Electrophoresis setup.

51

3.3.1.3 Characterization of seeding techniques

The diamond seeding density of DPR and DW methods depends on
spinning speeds. A study on density vs. spinning speeds has been performed.
DPR seeding was conducted on Si wafer, while DW seeding was performed on
silicon wafer with SiOz layer. For a ﬁxed duration of time (30 sec), seeding
densities by different spinning speeds (1000 rpm to 4000 rpm) are measured, to
determine best combination of spinning time and speed. Generally, with spin
speeds in the range of 1000-4000 rpm, DW seeding density on oxide surface is
higher than DPR seeding density, while both curves show the decrease of
density with the increase of speed (Figure 3.4). Typical seeding results have
been illustrated in SEM pictures (Figure3.5), which were taken after 30 minutes
MPCVD nucleation process. For DW seeding, although higher seeding density
was achieved at lower spinning speeds (1000 to 2000 rpm), the uniformity of

seeding was sacriﬁced due to the agglomeration of diamond particles.

 

 

 

 

 

 

1.E+11
Q +DPR +DW
I
0
h
V 1.E+09
3‘ N
'ﬁ 1.E+08
D
Q
1.E+07 * ‘ L g ' J
0 1000 2000 3000 4000 5000
Spinning speeds (rpm)

 

 

 

Figure 3.4 Diamond Seeding Density vs. Spinning speeds

52

 

3
J'
.,

)w~‘.".

 

 

I1:I0%Uc re

3. 5 Typical diamond seeding results. (a)2 DPR seeding density of 4 x
m’2 ,(b) DW seeding density of 5. 6 x 10 crn'2

53

For electrophoresis method, different bias time and ultrasonication
combinations are tested to determine best seeding approach. During
electrophoresis seeding, ultrasonication was used to improve the seeding
density. After ultrasonication and electrophoresis, the wafers were allowed to dry
in air. Control wafers, using either ultrasonication or electrophoresis separately,
were also fabricated to see the effects on nucleation density. The treatment
conditions and diamond growth time of each sample are described in Table 3.2.
The SEM pictures in Figure 3.6 show the diamond nucleation density after 20
minutes of MPCVD growth. The grain density is found to be 1.0 x 1010 cm'2 for
sample 1; 8.0 x 109 cm’2 for sample 2; and 2.5 x 109 cm'2 for sample 3, after
averaging over many spots. It should be noted that sample 2 and 3 had a very
uneven particle distribution, resulting in areas with high density and clumping, but
mainly areas with no nucleation. The surface topography of these samples were

stuied and examined using AFM, as shown in Figure 3.7.

Table 3.2 Substrate Pretreatment Conditions and Diamond Growth Time

 

Ultrasonication Time Bias Time MPCVD

 

Sample
[min] [min] Growth [hrs]
1 30 30 0.33
2 30 0 0.33
3 0 30 0.33

 

 

Figure 3.6 SEM of the nucleation density for a) ultrasonication and
electrophoresis (sample 1); b) ultrasonication alone (sample 2); and c)
electrophoresis alone (sample 3).

Each of these three seeding methods has its own advantages and
disadvantages. Each method also yields different seeding densities. A
comparison of these three methods is shown in Table 3.3. Although DPR gives
lower seeding density than other two methods, but it is simple and compatible
with most MEMS application. The application of DW and EP methods are limited
by their substrate requirements. But for speciﬁc cases, these methods can be

used for high seeding density.

55

NanoScope Contact AFN
Scan size 1.000
Setpoint

Scan rate

Number of samples

X 0.200 un/diu
2 250.001 nH/diu

Scan size
Setpoint

Scan rate

Number of samples

NanoScope Contact AFM
1

0.200 un/div
500.000 nn/div

NanoScope

Scan size
Setpoint

Scan rate

Number of samples

'haS

.. /

.2.222.+.22___.
02 0A 06 08 Um

. (C)
X 0.200 un/dlu
2 80.000 nn/diu
Figure 3.7 AFM of the nucleation density for (a) ultrasonication and
electrophoresis (sample 1); (b) ultrasonication alone (sample 2); and
(c) electrophoresis alone (sample 3) with image of clumping (inset)

 

56

Table 3.3 Comparison of different seeding methods

 

 

 

 

 

 

 

. EP bias / .
Seeding method DPR spIn . DW spIn
UltrasonIc
Set-up Regular spinner Electrical setup Regular spinner
Most Dielectric &
Substrate surface Conductive Hydrophilic Surface
metal
Uniformity and
Good Good Good
reproducibility
Seeding density 10" ~ 10 9 cm'2 ~ 10‘° cm'2 10" ~ 1o‘° cm'2
High seeding

Simple, easy to use, density, Simple, easy to use.
Advantages Fits for most MEMS Good at seeding High seeding density

process. high aspect ratio on hydrophilic surface

structures
Density is lower than
other two method,
Disadvantages Diamond particles in Limited application Limited application
PR are tend to
cluster

 

 

 

 

 

 

3.3.2 MPCVD poly-C deposition

MPCVD poly-C deposition is a very important step for poly-C thin ﬁlm
technique. The deposition parameters of MPCVD will determine the quality of

poly-C thin ﬁlm.

The driving force of this Ph.D. study is the excellent properties of diamond.

As for poly-C, the better ﬁlm quality, the closer ﬁlm characteristics are to that of

57

single crystalline diamond. It is very important to characterize MPCVD system
and optimize deposition parameters, to produce good quality ﬁlm for poly-C
MEMS packaging application. When applying poly-C technique to MEMS
fabrication, low temperature poly-C deposition will be critical for temperature

compatible consideration.

3.3.2.1 Characterization of typical deposition parameters

Throughout this Ph.D. study, a MPCVD (Model MPDR 313EHP, Wavemat,
inc.) system, with a cylindrical microwave cavity and a 5-inch quartz dome, was
used for diamond deposition. The 2.45 GHz, 5 kW SairemTM microwave power
supply and the large chamber size ensured the uniformity of plasma and the
poly-C deposition up to 4 inch size. The height of cylindrical cavity was set to
~21.59 cm, to operate in the electromagnetic mode designated TM013 for 2.45
GHz microwave. This mode was found to provide optimum ﬁlm deposition
uniformity. Fine tunning of the cavity height should be performed during
deposition to reduce reﬂected microwave power. The sample wafer was heated
by the plasma and its temperature was monitored by an OMEGA pyrometer.
Typical MPCVD deposition parameters are listed in Table 3.4. Tri-methyl-boron
(B(OCH3)3, TMB) gas diluted in Hydrogen (TMB/H2 = 0.098% in volume ratio)

was introduced during the deposition for in-situ boron doping.

58

Table 3.4 Typical poly-C deposition parameters of MPCVD

 

 

 

 

 

 

 

 

 

Deposition Temperature (° C) 450 ~ 800
Microwave Plasma Power (kW) 2.1

H2 100
Gas Flow Rate (sccm) CH4 1.5

TMB 3 — 6
Deposition Chamber Pressure (torr) 40 - 50

 

 

From Table 3.4, microwave power and deposition pressure attribute to the
deposition temperature on sample surface, which is responsible for poly-C
deposition rate. The deposition pressure also affects the size of the plasma.
Higher pressure will constrain plasma to smaller size, resulting in smaller
deposition area. Lowering pressure will help to expand plasma size for larger
deposition area application. In addition to temperature, poly-C deposition rate is
also affected by the methane concentration in gas mixture. These deposition
parameters are characterized to explore the inﬂuences on poly-C deposition rate

and poly-C ﬁlm quality.

3.3.2.2 Study of MPCVD deposition rate

Poly-C deposition rate varies with deposition temperature and gas
concentration. Figure 3.8 shows the calculated deposition rate varying with
deposition temperature. For this set of samples, gas concentration was set to

CH4/H2 = 1.5/100 sccm. Figure 3.9 shows the calculated deposition rate varying

59

with gas concentration. For this set of samples, deposition temperature was

controlled at 700 ° C (2 kW and 45 torr).

3.3.2.3 Study of MPCVD grown poly-C ﬁlm quality

Diamond is formed by an inﬁnite extension of sp3 carbon-carbon bonds.
However, since diamond is not a thermodynamically stable phase, much spz-
bonded carbon often accompanies the CVD diamond deposition. The sensitivity
of Raman spectroscopy to even very small amounts of sp2 carbon makes it the
technique of choice to study these ﬁlms. The sp3 bonding is indicated in Raman
spectra by the Raman shift at 1332 cm". For microcrystalline graphite (sp2
bonding), the ﬁrst-order and second-order peak are at 1580 cm‘1 and 1360 cm'1
respectively. But in CVD poly-C ﬁlm, sp2 bonded carbon are highly disordered
graphite or amorphous carbon, which attribute to the features in Raman spectra
between 1350 and 1600 cm'1 [90]. Figure 3.10 illustrates the Raman spectra on
the poly-C ﬁlms deposited under different temperatures with ﬁxed gas
concentration. With the increase of growth temperature, Raman spectra show an
increase of diamond peak intensity and an intensity decrease in the sp2 featured
region, showing the improvement of ﬁlm quality with higher deposition

temperature.

60

 

 

o o
0' 0'
' co' It:
coo-tom

P
M

0.15

P
H

0. 05

Deposition Rate (um/hour)
O
M
01

 

500 600 700 800

Deposition Temperature (° C)

900

 

Figure 3.8 Deposition rate variations with temperature.

 

 

0. 4
0. 35
0. 3
0. 25
0. 2
0. 15
0. 1
0. 05

Deposition Rate (um/hour)

I

I

1

I

 

l

1

l l l

2 3 4
Gas Concentration: CH4/H2 (if)

5

 

Figure 3.9 Deposition rate variations with gas concentrations.

61

 

 

Intensity (a. u.)

1000
800
600

1000
800

600

1000

800

600

1000

800

600

400

 

 

'

 

+ A

1000 1200 1400 1600 1800

Raman Shift (cm-1)

Figure 3.10 Raman spectra of poly-C ﬁlms
grown at different temperatures.

62

3.3.2.4 Study of low temperature poly-C deposition

Although low temperature poly-C ﬁlm deposition sacriﬁces the ﬁlm quality, it
is also required for the compatibility with other fabrication process. Low
temperature deposition was performed in the range of 450 — 550 ° C, which is the
surface temperature in the center area of wafer. It was found that it is almost 100
°C lower in temperature at the edge of the wafer. This feature limits the poly-C
growth in this area, resulting smaller effective deposition area. Figure 3.11 show
two poly-C ﬁlms deposited at 475 °C and 550 °C respectively. Film #1 was
grown at 475 °C for 12 hours to the thickness of 1 pm. The deposition rate is
around 0.083 pm/hr. Film #2 was grown at 550 °C for 20 hours to the thickness

of 2.2 um. The deposition rate is around 1.1 pm/hr.

(a) poly C film :21, 475 C, 12 hrs (b) poly-C ﬁlm I12, 550 (1201113

)

.. Cmss—section -
» New.

Top w‘ew Cross-section
View

_ ' _. v’ .- .
Top Ylew ‘

I,

 

Figure 3.11 Two poly-C ﬁlms grown at low temperature: (a) 475 °C and (b) 550

°C.

63

3.3.3 Diamond doping technology

For p-type doping, Boron has shown to be a mostly used acceptor in
diamond. Boron acceptor level is 0.37 eV above the valence band. Although
doping in diamond may be accomplished during deposition, diffusion, or ion
implantation, there are some difﬁculties with diffusion doping and ion
implantation. Diffusion doping of diamond is difﬁcult because of the low diffusivity
in diamond [91]. Boron diffusion depth of was only 50 nm. The boron diffusion
coefﬁcient in diamond is 100 times smaller than the one in Si [92]. Ion
implantation is also difﬁcult because of residual damage to the diamond [93]. if
the damage exceeds a critical threshold, then a subsequent anneal will produce
graphite. Comparing with these two doping techniques, Boron in-situ doping is
much easier to control and is reproducible [94][95].

However, obtaining n-type semiconducting diamond ﬁlms by CVD has
proved more challenging, mainly due to the fact that suitable donor atoms such
as P, O, and As are larger than carbon, making incorporation into the diamond
lattice unfavorable. Also it lowers crystal quality. Nitrogen is a most common
impurity (donor) in diamond, but the resulting donor levels are too deep ~1.7 eV

almost 4 eV to conduction band.

in this study, boron in-situ doping was studied. Trimethylboron [B(CH3)3,
TMB] diluted in hydrogen (0.098%) was used as boron doping source of diamond
ﬁlms, which was less toxic than BzHe. TMB is in the vapor state at room

temperature, and is easily diluted by argon, helium, hydrogen, nitrogen, and

silane gases.

3.3.3.1 Resistivity measurement of doped poly-C thin ﬁlm

A four-point probe (Model S-301, Signatone) is used to measure the
resistivity of boron doped poly-C thin ﬁlms, as shown in Figure 3.12. The probe
consists of four electrodes in line and separated by a distance 5 = 625 Pm
(electrode-to—electrode). Current is driven through the outer two electrodes while
voltage is sensed on the inner electrodes. The sheet resistivity is calculated
based on the current source and sensed voltage. It then can be converted into

thin ﬁlm bulk resistivity and sheet resistance.

Doped
Probe\$S IS C IS *W poly-Cl ﬁlm
<—>¢—> <—S——>

Figure 3.12 Four point probe measurement setup

 

 

For a ﬁlm inﬁnitely thin and of inﬁnite extent (t<<s, d>>s, as shown above),

using a sheet resistivity denoted by p5 , then

J,=current density=i=£L :>E =Ips (3.1)
270' p5 2712'

 

And,

65

 

V, = [13,.» = [”3 ln(r) (3.2)
27r

so the voltage drop V2 — V3 is given by

V = V2 — V3 = Iii;[111(SI+~‘2)‘11‘(~93)+ M52 +53)_1n(31)]

(3.3)

and with 31:32:33=s4=s, then

V = V2 -— V3 =. %[ln(4s2)— ln(sz)]= [Li—Ina) (3.4)

So, the sheet resistivity is

p, = ﬁg) = 4.53%) (3.5)

To account for the effects of ﬁnite thickness (t) and limited sample diameter

(d), correction factors (F, K) are used. Some of these are shown in Table 3.5.

p5 = K, III?) (3.6)

To obtain the bulk resistivity of a ﬁlm of thickness t, we multiply by the
thickness as
P = ps 't (37)

The sheet resistance Rs (ohms/square) is then given as

 

1 — St
==£=p =ps (3.8)
at t

The resistivity of diamond decreased as the average grain size of the

diamond ﬁlms decreased [96][97]. It was found that heavy doping was

66

deleterious in the early stage of diamond growth, but did not degrade growth on
an existing high quality diamond [98].

Table 3.5 Correction factors of some ﬁnite thickness and diameters

 

 

 

 

 

 

 

d/s K t/s F

3.0 2.266 0.4 0.9995
4.0 2.929 0.5 0.9975
5.0 3.363 0.625 0.9898
7.5 3.927 0.714 0.9798

10 4.172 0.833 0.9600

15 4.365 1.0 0.9214
20 4.436 1 .25 0.8490 I
40 4.508 1.66 0.7225
100 4.532 2.0 0.6336

3.3.3.2 Resistivity variation with doping level and temperature

A set of sample was prepared with a layer of undoped poly-C deposition
(10 hours), followed by another two-hour doping deposition with different
TMB/CH4 ratios and different temperatures. The resistivity of each sample was
measure using four-point probe.

Figure 3.13 shows the relationship between poly-C ﬁlm resisitivity and
different doping level, which is deﬁned as the ratio of TMB over methane. As for

this set of experiments, the in-situ doping took place at temperature of 650 °C.

The resistivity decreased as TMB / CH4 ratio increased and reached about 0.003
Q-cm at heavy doping level (TMB/CH4 > 0.6%). The resistivity changes by nearly

four orders of magnitude

67

 

 

100
’E
E 10
O
V l
3‘
:2 0.1
i};
'8' 0.01
0
0:: — I
0I 001 l l l l I
0 2 4 6 8 10
TMB / CH4 Ratio (1118-3)

 

 

 

 

Figure 3.13 Doped poly-C ﬁlm resistivity versus TMB/CH4 ratio.

Figure 3.14

illustrates the inﬂuence of deposition temperatures on thin ﬁlm

resistivity. For light, medium or heavy doping, poly-C ﬁlm resistivity decreased as

temperature increased. However, the resistivity change of light doping sample

relies on temperature much more than that of heavy doping.

 

’3 100
at?

E 10
8

f: 1
E 0.1
*5 0. 01
$0.001

 

 

"' +Light doping 2
TUB/CH4 = 1/1.5

+|iedim doping:
,_ I'D/0H4 = SILS

+Heevi1y doping:

x run/cm = 1011.5

300 400 500 600 700 800 900

Temeratu re (C)

 

 

 

 

 

 

Figure 3.14 Temperature dependence of poly-C ﬁlm resisitivity.

68

3.3.4 Patterning of poly-C

Various patterning techniques have been developed to fulﬁll the need of
desirable structures in microelectronics and microsensor applications. Patterning
of diamond is obtained through either selective deposition or selective etching.

The selective deposition is achieved either by pre-deposition seeding and
nucleation on the desired area, or by masking the undesirable area during the
diamond deposition. Ar sputtering in undesired regions was used to suppress

nucleation after the substrate was pretreated by ultrasonic method [99]. ZnO,

amorphorous silicon, SiOz, and Si3N4 were used as a sacriﬁcial layer for lift-off

process, as shown in Figure 3.15, to generate diamond patterns [100].

Diamond loaded photorrslst (DPR), as a non-destructive and IC
compatible patterning process, has been developed at Michigan State University.
DPR patterning takes advantage of standard photolithography technology since
DPR is photoresist mixed with diamond particles. The schematic diagram of DPR
patterning procedure is shown in Figure 3.16. DPR was spin-coated on Si wafer
at a spin speed of 3000 rpm for 30 sec, which gave 1pm thick layer, and
patterned by photolithography (Mask aligner, Model MJBB, Kari Suss). A 200 W
mercury short-arc lamp was used. Primary exposure wavelengths were 350 -
500 nm. The aligner performed exposures in a soft contact mode. The carrier
ﬂuid was evaporated at the initial stage leaving behind diamond particles which

acted as seeds for diamond growth.

69

 

Si

 

 

 

 

Sacrificial layer
Si

 

 

 

 

Photolithographv Patterning

 

 

 

 

 

Si

 

 

 

Diamond seeding

 

 

 

 

 

 

 

 

 

Diamond growth

 

 

 

 

Figure 3.15 Lift-off patterning process.

70

:‘l

 

Si

 

 

 

DPR

Si

 

 

Photoiithography Patterning

[m

MPCVD deposition: Evaporation of PR

r" ﬁn

MPCVD deposition: Diamond growth

 

 

 

 

Si

   

 

Figure 3.16 Schematic diagram of DPR patterning process.

Another way to pattern poly-C is to do selective etching. Due to
diamond’s chemical stability, it is impossible to use wet etching to pattern
diamond. Many diamond dry etching methods in various gas mixture and
different temperatures has been investigated. These methods include reactive
ion etching (RIE), ion-beam-assisted diamond etching, bias-assisted etching,
electron cyclotron resonance (ECR) plasma etching, and plasma enhanced
etching of chemical vapor deposition (CVD) diamond. In this Ph.D. study, an

ECR RIE system was used to pattern poly-C. During the etching process, a thin

71

 

layer of metal (Titanium or Aluminum) was used as patterning mask, as shown in

the process ﬂow (Figure 3.17).

 

Si

 

 

 

Deposited diamond ﬁlm

:wwwwwwwwwmwwwwmwwwwwwwwwwmwwwwwwwmwwwwwwwu
“WMV‘V‘Ws/‘V‘ wwwmwwwmwwwwwmmmwwwwwmwwwwwwwww NR

AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA

 

 

 

 

 

 

Metal deposition and patterning

nwwwwwwwwwwwwwmwmwwwwwwmwmwwwwwwmwmwwwwebs/MIN
nwwwwwwwwwmwwwmwwmwwwwwwwwwwwwmwwwwwmwwwmwe

-AAAAA-‘A-A‘---A-A-A-‘-A-A-A-AA‘A‘AAA‘A

 

 

 

 

 

 

 

 

 

wwmwwwwwwwwwmwwww
w wwwwwwmmwmwmw

 

 

 

 

Figure 3.17 Schematic diagram of dry-etch patterning process.

72

Chapter 4

Poly-C Enabling Technologies for MEMS

Packaging

4.1 Introduction

To explore the applications of poly-C in MEMS packaging, it is important to
study different fabrication processes used for manufacturing all kinds of poly-C
MEMS structures for different application purposes. Based on fundamental
research of basic poly-C technologies, several enabling technologies have been
developed. in this chapter, poly-C MEMS structure fabrication techniques, ultra-
fast growth model for packaging panel applications, packaging panel with built-in
interconnects and initial diamond-diamond bonding have been investigated. This
chapter describes the development of enabling technologies, which include poly-
C MEMS structure fabrication, thick poly-C panel fabrication and diamond-

diamond bonding.

4.2 Fabrication Techniques for Poly-C MEMS Structure

To fabricate poly-C structure with speciﬁc patterns, selective growth using
mask and poly-C dry etching technique were studied. For high aspect ratio

structures such as deep channels, deep reactive-ion-etched (DRIE) silicon mold

73

Ii

 

is studied for poly-C structure replica. Both bulk micromachining and surface
micromachining are involved.

MEMS structure fabrication is so application-dependent that versatile
fabrication processes and techniques are needed. Standard IC compatible DPR
technology [14] has been developed and well studied over the past decade. In
addition to this technology, other poly-C MEMS structure fabrication techniques

have been studied.

4.2.1 Poly-C plasma ECR dry-etching technique

MEMS surface micromachining process usually involves thin ﬁlm
deposition and etching. To integrate poly-C thin ﬁlm technology into surface
micromachining process, an etching technique is needed. Due to its chemical
inertness, it is not possible to pattern poly-C using wet etching techniques. After
comparing with other dry etching techniques and considering the facility we have,
an electron-cyclotron resonance (ECR) plasma RIE etching technique is
selected.

The ECR systems differ from other microwave systems in their capability
of coupling microwave power to the plasma at a very low pressure of around 1
mtorr resulting in surface damage-free processing, high anisotropic etch rate and
excellent uniformity. Table 4.1 summarizes the optimized etching parameters
used in this study. During dry etch process, an E-beam PVD (AXXIS) deposited
metal thin ﬁlm was used as pattern transfer mask layer. Either Aluminum or

Titanium with thickness of 100 nm can be used. Figure 4.1 illustrates a crab leg

74

 

accelerometer that was patterned using ECR plasma dry etching. The inset

picture shows the details of the edge of patterned structure.

Table 4.1 ECR plasma etching parameters

Gas Flow Rate (sccm)

pressure

 

Figure 4.1 SEM picture of a poly-C crab-leg accelerometer patterned using dry-
etching technique; inset is a close view of etched edge.

75

4.2.2 Selective poly-C growth technique

In addition to poly-C dry etching, selective poly-C growth also can be used
to pattern microstructures. A layer of Si02 is deposited and patterned on top of a
poly-C grown substrate, working as a pattern transfer mask during poly-C
deposition. This technique allows building microstructures on a poly-C base.

To test this fabrication technique, a commercially available CVD poly-C
substrate (1 cm x 1 cm, 300 pm thick, polished) was used. A 1 um thick Slog
layer was coated and patterned, leaving the open window for selective poly-C
growth. The fabrication process is shown in Figure 4.2. The SEM pictures

illustrate selectively grown poly-C, as shown in Figure 4.3.

nnnnnnnnnn
uuuuuuuuuu
nnnnnnnnnn

   

.......... 319;...
Poly-C substrate

 

 

 

 

Selectively grown poly-C

 

3:1;1;3:3:?;3:3:3:3:i 13:3:321:3:1:3:3:3:3:-I 11:3;1:3;3;3:3:3;3;3:3
Poly-C substrate

 

 

 

 

F_—I I—l
Poly-C substrate

 

 

 

 

Figure 4.2 Selective poly-C growth process.

76

 

Poly-C Substrate

 
      

Selectively grown poly-C

Poly-C Substrate

Figure 4.3 SEM pictures of selectively grown poly-C microstructures: (a) channel

pattern, and (b) well pattern.

4.2.3 High aspect ratio poly-C microstructure fabrication technique

Some MEMS applications required structure with high aspect ratio, such as
deep channels or wells. Due to the limited poly-C deposition rate and dry-etching
rate, it is not practical to fabricate high aspect ratio structures simply using
deposition and etching. Instead, these high aspect ratio structures can be
fabricated on Si wafer at ﬁrst using DRIE technology. Then poly-C is deposited to
ﬁll in those microstructures. After the silicon wafer is chemically dissolved, the
high aspect ratio structures are transferred to poly-C counterpart.

A test chip was designed and fabricated using the fabrication process
illustrated in Fig. 4.4. Different structures (wells and channels) are etched in Si
using DRIE. All structures on the chip are 20 pm deep and have feature sizes in
the range of 2 - 20 pm, resulting in different aspect ratios. Electrophoresis

seeding was selected for this study because it can provide better diamond

77

 

seeding inside the channel. The uniform and high-density seeding results are
shown in Figure 4.5. After poly-C deposition is done, the Si substrate was etched
away using HF: HN03: H20 (1 :1 :2). The fabricated freestanding poly-C structures

are shown in Fig. 4.6.

(I)

/PR VII/A m

(I!)

W

(C)

 

Figure 4.4 Fabrication process; (a) - (c) Si mold fabrication using
DRIE, (d) diamond seeding, (e) poly-C deposition, (f) freestanding
poly-C.

 

Figure 4.5 Diamond seeding results; (a) uniform seeding, (b)
nucleation density of 1.5x1010 cm‘z, (c) & (d) seeding inside channels.

78

E
(cl Idl

 

Figure 4.6 Freestanding poly-C microstructures; (a) 2 pm channels, (b) 4
pm channels, (c) 10 pm channels, (d) 20 pm wells.

4.3 Thick poly-C film fabrication for MEMS packaging

applications

The second enabling technology focuses on the fabrication of thick poly-C
ﬁlm for MEMS packaging applications. For applications involving thick poly-C
ﬁlm, the low MPCVD poly-C deposition rate will result in long fabrication time and
increased cost. Although deposition rate can be enhanced by raising the
deposition temperature, high temperature will bring other fabrication issues. In
this study, an ultra-fast growth model, which takes advantage of high aspect ratio

microstructure, has been explored to shorten poly—C thick ﬁlm fabrication time.

79

This model involves a double side poly-C growth process to fabricate a thick
poly-C ﬁlm. Furthermore, combining this growth model with boron in-situ doping
technique and poly-C dry etching technique, a poly-C panel with built-in

interconnects has been fabricated.

4.3.1 Ultra fast poly-C growth model

The aspect ratio of structures, which affects the total available growth
surface, plays an important role to reduce the poly-C ﬁlm fabrication time. As
shown in Figure 4.7, DRIE-etched channels (with spacing between the channels
equal to the width of the channels) lead to a relatively large poly-C growth area.
After the deposition of the ﬁrst layer of poly-C, silicon is chemically dissolved and
a second layer of poly-C is deposited on the backside of the ﬁrst layer. For a
speciﬁed thickness, the higher the aspect ratio of channel, the shorter the
fabrication time.

1 st diamond layer
/

 

3d
H

w Si moid‘

 

2nd diamond layer
\

 

 

/
1st diamond layer

 

Figure 4.7 Ultra-fast growth model; (a) ﬁrst poly-C
deposition, (b) second poly-C deposition.

80

The ultra-fast fabrication model is illustrated in Figure 4.7. Assuming that r,
W and H are the actual poly-C growth rate, channel width and height,
respectively, the time to ﬁll the channel is given by:

t, = (W/2)/ r= W/(2r) , (4.1)
where the actual deposition thickness is given by:

d=W/2=rt;. (4.2)
After double-side growth, the total fabrication time is:

ttotal = 20 = W/I'. (4.3)
The total thickness of freestanding poly-C is given by:

D = 2d+H = W+H. (4.4)

If the effective diamond growth rate, R, is deﬁned by R = D/ttotaI, equations (4.3)
and (4.4) give:

R =(W+H)/(W/r) = r(1+H/W) = r(1 + Aspect Ratio), (4.5)
or R / r = (1 + Aspect Ratio), (4.6)
where Aspect Ratio = W. Therefore, the diamond growth rate will be increased
by a factor of (1+ Aspect Ratio). In other words, the fabrication time will be
shortened by a factor of ( 1+ Aspect Ratio). Thus, the higher aspect ratio leads to

shorter fabrication time [18].

4.3.2 Double-side poly-C growth on DRIE etched Si mold

To test this model (eq. 4.6), a series of poly-C panel fabrication
experiments were performed on channels (20 um deep) with different aspect
ratios. Poly-C was deposited at 750 °C. The deposition rate is around 0.25

pm/hour.

81

By deﬁning t, as the growth time for a typical poly-C growth method (on a
ﬂat substrate), a comparison of t) and t, is shown in Table 4.2. The total thickness
of the panels, D, was measured from SEM pictures as shown in Figure 4.8, and t,
was measured for each experiment. The poly-C deposition rate of 0.25 pm/hour

was used to calculate t,. The t,/ t; ratio, according to equation (4.6), is given by:
t,/ t; = (1 + Aspect Ratio). (4.7)

As shown in Figure 4.9, the experimental values of (1 + Aspect Ratio), computed
using the measured t, / tf values, correlate well with the theoretical values

computed using aspect ratios (Table 4.2).

Table 4.2 Fabrication time of ultra-fast growth model

 

 

 

 

 

 

Si mold channel width Aspect d tf tr tr [tf
ratio (pm) (hours) (hours)

2 pm 10 21 8 84 10.5

4 pm 5 25 18 100 5.56

6 pm 3.33 28 28 112 4.31

8 pm 2.5 30 36 120 3.33

10 pm 2 33 48 132 2.75

 

 

 

 

 

 

 

 

82

 

:2“

l‘ilJJg

it
;‘\I

 

Figure 4.8 20—35 pm thick diamond ﬁlms fabricated by ultra-fast method
using; (a) 2 pm channels, (b) 6 pm channels, (c) 10 pm channels, (d) 10 pm
wells array.

.
8 — Theoretical

6

4 \‘

2

0 .

0 2 4 6 8 10 12
Channel IIlicttl'l (1m)

(1+ Aspect Ratio)

Figure 4.9 Comparison of experimental and theoretical values of (1 + Aspect

Ratio).

A unique contribution of this study is that the developed ultra-fast model
can shorten the thick panel fabrication time signiﬁcantly, providing a new concept

of improving poly-C deposition efﬁciency [18].

4.3.3 Filling of silicon mold

Area that requires an improvement in the current work is the partial ﬁlling of
Si molds for channels with high aspect ratios. Figure 4.8 reveals key-holes
(voids) formed in the high-aspect ratio channels due to the increasing edge effect
restricting the transportation of growth-related plasma species into the bottom
areas of the channels. This pre-mature ﬁlling of high aspect ratio channels,
though a problem for the fast growth process, can lead to poly-C channels for
micro-ﬂuidic applications [101]. To ﬁnd the highest aspect ratio of a channel
which yields best poly-C ﬁlling, a study was conducted to deposit poly-C inside
channels with aspect ratios in the range of 1 - 10. As shown in Figure 4.10 (a)
and (b), channels with aspect ratio < 3 can be totally ﬁlled but the channels with
higher aspect ratios lead to voids as see in Figure 4.10 (c) and (d). Therefore, to
fabricate a poly-C panel with complete ﬁlling, channels with aspect ratio less than

3 should be applied to avoid any reliability concerns.

84

 

 

Figure 4.10 Filling properties in channels with different aspect ratio: (a) a
channel with aspect ratio 2, totally ﬁlled; (b) a channel with aspect ratio 3, totally
ﬁlled; (c) a channel with aspect ratio 4, void formed; (d) a channel with aspect

ratio 5, void formed.

4.3.4 Fabrication of poly-C panel with built-in interconnects
Intensive studies of boron-doped poly-C reveal the resistivity as low as
0.003 Ohm-cm. It was also found that heavy doping was deleterious in the early

stage of diamond growth, but did not degrade growth on an existing high quality

85

pun—f—ﬂ

diamond [102]. This section summarizes the fabrication methods of deposition
and patterning boron-doped poly-C on top of an undoped poly-C layer, using
previously studied techniques such as ultra-fast model and poly-C dry etching.
An all-diamond packaging idea was revealed for the ﬁrst time [18], in which
undoped poly-C serves as mechanical supports while heavily doped poly-C
works as electrical interconnects. Two methods have been studied to fabricate
poly-C panel with built-in interconnects pattern. The ﬁrst one combines ultra-fast
model with poly-C dry etching technique. During double-side panel fabrication,
the second layer of poly-C is highly doped with boron. The fabrication process is
shown in Figure 4.11. The built-in interconnects isolated by undoped poly-C layer
can be fabricated after the surface of the doped poly-C layer is dry etched down

to the line labeled as “polishing interface’ indicated in Figure 4.11.

1st diamond layer (Undoped)

 

Simold

 

2nd diamond layer (Doped)

--I \§ \§-- Polishing

 

interface

 

 

 

 

 

//
1st diamond layer (Undoped)

 

 

Doped ECR Plasma
diamond Etching

’ ’ \

/ /

 

 

 

'lst diamond layer (Undoped)

Figure 4.11 Fabrication process of built-in interconnects.

86

 

Figure 4.12 shows the freestanding poly-C panel with built in interconnects.
A comparison of poly-C panel before and after ECR plasma etching is shown in
Figure 4.12 (a) - (b). The top surface of doped poly-C layer was etched down
until the doped poly-C channels are isolated by the undoped poly-C layer, as
shown in the Figure 4.12 (c) — (d). The resistivities of this poly-C panel,
measured on one of the samples, is 0.31 Ohm-cm for the interconnect layer and

2.34 x 10‘5 Ohm-cm for the undoped section of the panel.

Undoped ,. if} .‘f ' Undoped‘ ,
Diamond _ 4, $31" Diamond

Undo ped
Diamond '

 

Figure 4.12 SEM image of poly-C panel with built-in interconnects: (a) poly-C
panel before dry etching; (b) poly-C panel after dry etching; (c) top view of poly-C
panel; (d) side view of poly-C panel.

87

The second method is a simple surface micromachining process, as shown
in Figure 4.13. On top of the undoped poly-C panel, another doped poly-C layer

is deposited. Then it is patterned using dry etching technique.

va‘Jndoped poly-C
Doped poly-C

 

I Iny etch II
" '1 tiidoped poly—E " -
5 Si

i
.3
inf n; VF.» .11.: . 1, a: at). :2 '.‘_.' Md

Figure 4.13 Surface micromachining process of built-in interconnects.

Figure 4.14 shows a top view of surface micromachined poly-C ﬁlm with
boron doped poly-C pattern on top of undoped poly-C substrate, using fabrication

process illustrated in Figure 4.13.

88

Undoped poly-C .
substrate

Doped poly-C Pattern"

 

Figure 4.14 Surface micromachined poly-C ﬁlm with doped poly-C pattern.

The tri-methyI-boron (TMB) gas diluted in hydrogen (0.098%) is used as the
boron source for in-situ doping. An intensive study of boron-doped poly-C was
conducted to ﬁnd how resistivity of doped poly-C ﬁlm varies with different TMB
gas ratios, deposition temperatures and post-deposition anneals. Hydrogen-
terminated CVD diamond ﬁlm has a thin hydrogenated surface layer, which will
become conductive after exposes to the atmosphere [103]. This hydrogenated
conductive surface layer can be removed by annealing. A set of control samples

with a Him-thick poly-C layer was prepared at 700 °C with different doping

89

 

levels using the same deposition conditions for feedthrough layer. The poly-C

resistivities can reach as low as 0.003 O-cm at high doping level (T MB:CH4 =

0.5%) as shown in Figure 4.15. The inset also shows higher temperature

fabrication process yields lower resisitivities. This study was conducted jointly

with Y. Tang [18].

 

 

 

 

"' 10’
Y ' _._ o
\ *5 1°” . 233°:
7 Q 10‘ \ ,
\ 3. a —~— 800 c
‘7 i; 10 After armed
JFK \ 'ﬁ 10"
E310" RE“
I:10". .,.T+,.

 
   

 

 

ti 2 4 6 eﬁrb'l'z'I'Is'Ijs
TMBICH4Rali0 (X10. )

 

 

 

—A— in-situ deposited
—v— Alter Anneal(6000)

 

 

0 1 2 3 34
TMBICH4Ratio (x10 )

m...

Figure 4.15 Poly-C resistivities for 1pm thick ﬁlms deposited at 700 °C. The inset

shows resistivity data from an earlier study (annealing temperature is 600 °C).

90

 

 

4.4 Diamond-diamond Bonding Technology

To build an all-diamond WIMS package, it is important to develop a
diamond-diamond bonding technology. Although diamond brazing techniques
[104] were developed earlier, the bonding technology of two poly-C samples is
new. The poly-C ﬁlm bonding process concept is shown in Figure 4.16. The top
ﬁlm, with trench structures, was put on the substrate ﬁlm. The trenches on the
top ﬁlm allow reaction gas to ﬂow into inner areas. Although the CVD deposition
of poly-C inside the trenches bonded the two ﬁlms, some problems were also
identiﬁed in this study.

As shown in Figure 4.17, for areas at the edge and at the front of the
trenches, where sufﬁcient reaction gases are available, the CVD bonding
between two ﬁlms is very successful. However, due to the small size of trenches
(10 um x 20 pm), the ﬂow of poly-C growth related species into the deeper areas
of the trenches is limited. Thus, the CVD bonding mostly happened near the front
region of the trench, which is approximately 200 pm along the trench, as shown
in Figure 4.17 (a). Due to the lack of reaction gases, there is no bonding between
the two ﬁlms in the deeper areas, as shown in Figure 4.17 (c). To address this
problem, new experiments (which require the design of new masks for the
testchip) focus on providing an access-hole array, which will be conducted by

future students in the MEMS packaging area.

91

 

Reaction Gas W

(a)

 

(b)
Figure 4.16 Bonding process concept of poly-C ﬁlms; (a) before and (b) after

poly-C bonding.

 

Sum

00 pm
Figure 4.17 SEM images of two bonded poly-C ﬁlms using boding concept shown

in Figure 4.16.

 

Chapter 5

Poly-C Thin Film Encapsulation Packaging

5.1 Introduction

Although MEMS packaging can take advantage of mature packaging
techniques from semiconductor IC industry, MEMS packaging is still complicated
due to the diversity of applications. Recently, the developments in MEMS area
have led to growing interests in MEMS packaging at wafer level to reduce the
packaging and testing cost. Meanwhile, poly-C draws more and more attention in
packaging area because of its excellent thermal, mechanical, chemical and
electrical properties.

As mentioned in Chapter 1, this Ph.D. study has two parallel research
directions: poly-C packaging panel fabrication and integrated poly-C thin ﬁlm
encapsulation process. As shown in Figure 1.1. While several enabling poly-C
MEMS packaging technologies have been developed for both research
directions, this dissertation has an emphasis on the poly-C thin ﬁlm
encapsulation packaging process. This chapter summarizes the development of
poly-C thin ﬁlm encapsulation packaging, including material selection, process

design, test package fabrication and evaluation.

93

 

5.2 Poly-C Thin Film Packaging Process Design

Generally, MEMS packages are expected to provide micro-devices and on-
chip circuits with functions such as mechanical support, protection from
environment, electrical interconnection and thermal management. Due to its
extreme hardness, chemical and mechanical stability, large band gap, and
highest thermal conductivity, poly-C is emerging as a novel sensor material for
MEMS applications. The high Young’s modulus and chemical stability of poly-C
make it an excellent candidate material for thin ﬁlm package.

In previous chapter, it has been proven that poly-C thin ﬁlm technology can
be easily incorporated into surface micromachining process. Therefore, poly-C
thin ﬁlm technology can be integrated with MEMS fabrication process and
provide MEMS device and even on-chip circuits a package shell for mechanical
and chemical protection (as shown in Figure 5.1).

This section presents the design procedure of poly-C thin ﬁlm packaging
technology that applies developed enabling poly-C MEMS technologies to post-

MEMS encapsulation packaging process.

5.2.1 Packaging material consideration

The material of thin ﬁlm package should possess excellent properties. As
for mechanical consideration, the thin ﬁlm package must be designed to
withstand certain differential pressure. According to the model proposed by
Maier—Schneider [105], the pressure load-deﬂection relationship of thin ﬁlm

package is given by,

94

 

/_/
Micro democ-

_,_.—-'
Large fluidlc 150m

 

Figure 5.1 Basic concept of poly-C thin ﬁlm Package: (a)
complete package, and (b) cross section view of package.

to tE
p(h) = C1—2h+C2(v)—4h3 (5.1)
a a

where t is the package thickness, a is the half length of package, E is Young’s
modulus of package material, h is the deﬂection and 0' is the residual stress of
package ﬁlm. And C1 = 3.45, C2(v)=c2- f (v)/(1—v)=1.994(1—0.27lv)/(1—v),
where v is the Poisson’s ratio of package material. From equation (5.1), it is
clear that deﬂection of package under certain load has an inverse relationship
with Young's modulus. Therefore a material with high Young’s modulus must be
selected as packaging material.

Also, this material must have a coefﬁcient of thermal expansion (CTE)
similar to silicon to ensure the low stress after deposition. Table 5.1 shows the

relevant properties of several common thin-ﬁlm packaging materials. Silicon is

95

included for comparison. CVD diamond was selected as a packaging material

because of the highest Young’s modulus and low CTE that is close to silicon.

Table 5.1 Properties of common thin ﬁlm materials

 

 

 

Material Si CVD poly-C SiC Ni Gold
Young’s Modulus 162 800 -1040 476 210 79
(GPa)

CTE (109°C) 2.3 1.0 - 2.0 5 12.8 14.3

 

 

 

 

 

 

 

 

In additional to its excellent mechanical properties, poly-C also possesses
stable chemical properties. In certain circumstances, diamond can be etched
chemically. For example, diamond reacts with Oxygen at temperature above 600
oC [106][107]. And at high temperature, it also reacts with some molten metals
such as Fe, Ni, and Pt. In this case, the diffusion of carbon atoms into hot metals
is the key of reaction [108-110]. But generally, diamond is chemically inert
against most acids and alkalis at normal temperature. Therefore, the chemical
inertness allows poly-C package to be used for environmental or biomedical
applications to protect inside devices from harsh environments.

Considering that the sacriﬁcial layer must stand poly-C deposition
temperature, high quality PECVD oxide was selected as sacriﬁcial material. For
electrical feedthrough, poly-Si was considered because it is a high temperature

material. Meanwhile, boron doped poly-C was also studied as feedthrough

 

 

material. In this case, there is no mismatch problem of CTE between two layers

since they are made of same material.

5.2.2 Packaging Process Design

This poly-C thin ﬁlm fabrication process (Figure 5.2) is designed to ﬁt into
post-MEMS fabrication. After MEMS device is fabricated, feedthroughs were
deposited and patterned using boron doped poly-C. Then, a PECVD oxide layer
was deposited and patterned as a sacriﬁcial layer used to release the package.
This layer also serves as a protection layer for the feedthroughs and MEMS
devices during the subsequent undoped poly-C growth. After the test chip was
pretreated with diamond seeds, a uniform undoped poly-C ﬁlm was deposited.
The undoped poly-C package layer with large ﬂuidic access ports is patterned
using dry etching. The titanium layer serves as a pattern transfer mask. After
sacriﬁcial PECVD oxide is removed, the package is sealed by closing the access
ports through additional poly-C growth, which will only grow on existing poly-C

layers.

Doped poly-C
feed-tinting MEMS

      

sgN,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 5.2 Poly-C thin— ﬁlm package fabrication process.

97

 

5.3 Fabrication of Poly-C Package

5.3.1 Poly-C thin ﬁlm fabrication for packaging

A typical poly-C ﬁlm fabrication involves seeding, growth, doping and
patterning. Seeding is a pretreatment step to generate diamond nuclei before
diamond growth begins. Three currently used seeding methods, diamond-loaded
photoresist, diamond-loaded water and electrophoresis, have been studied and
summarized in Chapter 3. Each seeding method applies on different substrate
and yields different seeding density. Diamond seeding has no effect on MEMS
devices which are protected by the sacriﬁcial PECVD oxide. The seeding density
of diamond particles is high enough to produce a uniform and pinhole-free poly-C
thin ﬁlm to ensure the herrniticity of the package, as shown in Figure 5.3 (a).

A poly-C thin ﬁlm was grown using MPCVD system in a CH4:H2 (1.5 sccm :
100 sccm) gas mixture environment with 45 torr pressure at temperature in the
range of 700 — 750 °C. The Raman spectra in Figure 5.3 (b), displayed a sharp
diamond (sp3 carbon-carbon bonding) peak at 1332 cm", verifying a good
diamond quality.

As for boron doping of poly-C, poly-C layer was grown and in-situ doped
with tri-methyl-boron (T MB) diluted in hydrogen (0.098%). This doping technique
leads to resistivities in the range of 0.003 — 0.31 O-cm [111]. The resistivity of
doped poly-C ﬁlm varies with doping level (TMB concentration) and deposition
conditions. Although higher doping levels lead to lower resistivities, it sacriﬁces

poly-C ﬁlm quality.

98

 

 

 

350 A 1332 crn-1

300-
250-
200-
150-

Intensity

100‘
so-

 

 

I I 1 I I I T
(b) 1100 1200 1300 1400 1500 1000 1700
Raman Shift (cm-1)

Figure 5.3 (a) Poly-C film surface; (b) Raman spectrum of poly-C ﬁlm.

99

This thin ﬁlm package fabrication process involves three different steps of
poly-C growth but use the same growth parameters. First, the poly-C
feedthroughs were grown and in-situ doped with TMB diluted in hydrogen
(0.098%). The second poly-C deposition was performed without doping after 4-
pm thick PECVD oxide was deposited and patterned. This layer of poly-C was
patterned to form the ﬁrst-step package body with access ports. After sacriﬁcial
oxide was removed, ﬁnal growth of poly-C (5 ~ 6 pm thickness) was performed to
seal the package.

Due to its chemical inertness, it is not possible to pattern poly-C using wet
etching techniques. Several dry etching techniques have been used to effectively
pattern diamond. In this work, a microwave electron-cyclotron-resonance (ECR)
RIE system was used to dry-etch the poly-C ﬁlm. The ECR systems differ from
other microwave systems in their capability of coupling microwave power to the
plasma at a very low pressure of around 1 mtorr resulting in surface damage-free

processing, high anisotropic etch rate and excellent uniformity.

5.3.2 Poly-C Thin Film Package

Figure 5.4 shows the ﬁrst generation of fabricated poly-C thin ﬁlm package,
with size of 1 mm x 1.2 mm. Four large ﬂuidic access ports were opened on this
package, one at each comer. Insets (a) — (c) are close views of package details.
During the sacriﬁcial oxide etching, a diluted HF solution (HF:HZO = 1:3) was
used. A dropper was used repeatedly to blow small bubbles generated by

etching reactions off package chip. The entire package was released in about 6

100

 

hours. The package chip was then treated using critical point dry (CPD). The
poly-C thin ﬁlm experienced slight tensile stress after release, due to the CTE
difference between MPCVD poly-C (CTE: 2.0) and PECVD oxide (CTE: 1.6).
Films with zero-strains can be fabricated by adjusting the growth conditions
[112]. The study of sealing access ports is shown in Figure 5.4 (d) and (e).
During the sealing of access ports, poly-C will only grow on the areas consisting
of poly-C. The edge effect will make the poly-C grow at the edge of access ports,
and prevent reaction plasma from going inside package. Figure 5.5 shows a

broken package, indicating there is no poly-C deposition inside the package.

(a)

 

Figure 5.4 Fabricated poly-C thin ﬁlm package; insets are close view of (a)
package border, (b) anchor and access port, (c) close view of package anchor,

and close view of access port: (d) before sealing, (e) after sealing.

101

 

Poly-Si Broken
Feedthrough package

 

Figure 5.5 A broken poly-C thin ﬁlm package.

During the ﬁnal sealing of package, the poly-C growth pressure is around
45 torr. It is also the ﬁnal ambient pressure inside the package. For packages
requiring lower pressures or vacuum sealing, ECR CVD diamond growth,
reported at 10 mtorr [113], can be potentially used for the ﬁnal vacuum-sealing

step.

5.3.3 Fabrication of embedded feedthroughs

The electrical property of doped poly-C leads to the study of using doped
poly-C as the material for feedthroughs. In this fabrication process (Figure 5.2),
two advantages of using the same material (poly-C) for both feedthroughs and
package are obvious. First, there will be no temperature compatibility concerns.
Second, the feedthroughs will be embedded into the package after the package

cap is fabricated, to provide perfect sealing around feedthroughs. Figure 5.6 (a)

102

shows a fabricated poly-C feedthrough. In addition to doped poly-C, poly-silicon
was also studied as feedthrough material since it is compatible with the high
poly-C deposition temperature. The poly-C package layer has excellent adhesion

to poly-Si, providing good sealing around the feedthrough as well, as shown in

Figure 5.6 (b).

 

Figure 5.6 The fabrication of embedded feedthroughs: (a) doped poly-C and (b)

poly-silicon.

To test the resistivity of doped poly-C feedthrough, a set of control samples
with a 0.5-pm-thick poly-C layer was prepared at 700 °C with different doping
level, using the same deposition conditions for feedthrough layer. The poly-C
resistivities measured by four-point-probe method can reach as low as 0.003 0-
cm at high doping level (TMB:CH4 = 0.5%). The resistivity of highly doped poly-C
is comparable to that of poly-Si which is a common material for electrical

interconnects.

103

 

5.4 Evaluation of Poly-C Encapsulation Packaging

Technology

This poly-C encapsulation thin ﬁlm package was developed to provide
MEMS device and even on-chip circuits a package shell for protections from
outside environments. One advantage of this package is the chemical inertness
of poly-C. The corrosion-resistant of poly-C allows this packaging technology to
be used for harsh environmental applications. This encapsulation packaging
process was also designed to ﬁt into post-MEMS fabrication. The additional poly-
C growth for package sealing will require temperature compatibility of MEMS
device. In this section, a long-term corrosion-resistant test of poly-C was
performed. Also, this packaging technology was evaluated by encapsulating
poly-C cantilever beam resonators. Measurements have been taken on pre- and
post-packaging samples using piezoelectric actuation method to explore the

efﬁcacy of poly-C thin ﬁlm packaging process on sealed resonators.

5.4.1 Corrosion-resistant test of poly-C package

An experiment was designed to test the corrosion-resistant and hermiticity
of poly-C package in severe environment. The 2-mask fabrication process is
shown in Figure 5.7. Starting with bare silicon wafer, a layer of PECVD oxide with
thickness around 4 pm was deposited, as shown Figure 5.8 (a), using the same
deposition parameters as for thin ﬁlm packaging process. After the oxide layer

was patterned, a layer of poly-C was deposited and patterned using ECR plasma

104

 

dry etching. Using optimized seeding technology, pin-hope free poly-C ﬁlm was
produced. This test chip, as shown in Figure 5.8 (b), contains a poly-C package
with sacriﬁcial PECVD oxide material still enclosed. The oxide was used to test
the corrosion-resistance and hermiticity of the poly-C package. The fabricated
chip was soaked in diluted HF solution (HF2H20 = 1:3) for a long time (up to 6
weeks) at room temperature. If any acid solution diffused into package, the oxide
inside must be etched. The package was broke and details inside package was
examined under SEM to see if poly-C package shell can sustain severe acidic

environment and protect the material inside.

 

. PECVD oxide deposition
‘ Oxide ‘

[;_ A f Substrate J]

 

Oxide Pattern
”' Omde .

i'lﬁﬁms mn—wIi‘l'ﬁaIm-Hl ll

SUbstrate'

 
  
 

 

 

Poly-C depositron
OXide .w...

substrate J :

 
 

   

I
. 1.1-mp. ‘
. .

Poly-C dry etching

Nah—sh. an" I'll-“w

*5 OXIde 1:- o. ..

s...- -ﬂnumu~h"~r' nor-qrsa

substrate

 

 

 

Figure 5.7 Fabrication process of corrosion-resistance test chip

105

Package Test Chip
Poly-C Package

D

' ~ Package
Anchor

 

Si Substrate

Figure 5.8 (a) Cross-section view of PECVD oxide layer; (b) Top view of a test

chip.

The test chip was soaked in to diluted HF solution for up to 6 weeks.
Samples of test chip were prepared for SEM pictures on the cross section of
broken package. Figure 5.9 shows three SEM picture which were taken on test
chip at different time. Figure 5.9 (a) shows the sample chip before soak test.
Figure 5.9 (b) shows the sample chip after 3 weeks soak in HF solution. Figure
5.9 (c) shows the sample chip after 6 weeks soak in HF solution. From these
three SEM picture, it can be concluded that the poly-C package sustains after 6
weeks soak in HF acid and the PECVD oxide packaged inside shows no sign for
being etched. It was proved that this poly-C thin ﬁlm package has good ﬂuidic

hermiticity against acidic environment.

106

Si Subtrate

., ‘Y
Poly-C

1950‘?!) one];

Poly-C "

l

PECVD Oxide

Si Substrate

 

Figure 5.9 (a) Sample chip before soak test; (b) Sample chip after 3 weeks soak;

(c) sample chip after 6 weeks soak.

107

5.4.2 Poly-C encapsulation package for cantilever resonator

The additional poly-C growth for package sealing will require temperature
compatibility of MEMS device. One way to evaluate this packaging technology is
to package an actual MEMS device. Taking advantage of the poly-C resonator
study in our group [114], poly-C cantilever beam resonator structure was
selected to be packaged and tested. Testing of resonator was jointly done with
Nelson Sepulveda using Sandia National Lab’s facilities. Measurements have
been taken on pre- and post-packaging samples using piezoelectric actuation
and laser detection method to explore the efﬁcacy of poly-C thin ﬁlm packaging

process on sealed resonators.

5.4.2.1 Piezoelectric actuation and laser detection for resonator

measurement

The concept of piezoelectric actuation method is to physically attach the
sample that contains the resonator structure to a piezo transducer. This piezo
element is driven by the output of a spectrum analyzer. For the laser detection, a
laser beam is focused on the resonating structure. The laser is reﬂected off the
point of the resonator structure where the amplitude of motion is maximum (the
tip of the cantilever) and directed to a photodiode. The reﬂected signal is used to
determine the frequency of vibration. A schematic of the piezoelectric actuation

and detection set up is shoWn in Figure 5.10.

108

Photodetector
’ Refelcted beams

Incident laser beam

Vacuum chamber window

\
e

 

 

 

 

 

 

 

 

Spectrum ~. I
Analyzer //’
Out /
Piezoelectric To Vacuum
Actuator
Vacuum pump 9
chamber

 

 

 

Figure 5.10 Schematic diagram of the piezoelectric actuation and laser detection

setup.

Laser beam is converged before it goes through the vacuum chamber
window and focuses on the resonator structure of interest. The beam hits the
sample and the reﬂected light is sent to a split photodetector. The reﬂected light
is positioned on the photodetector to minimize the voltage difference between the
photodetector’s two halves. The output of the photodetector is then routed into
the spectrum analyzer that is simultaneously driving the piezo element that is
driving the resonator into vibration. When the beam is resonating, the output from
the photodetector is maximum and a resonant peak is observed in the spectrum
analyzer. This technique does not involve any current ﬂow through the resonator
and therefore the sample does not need to be conductive and no electrode is

needed.

109

5.4.2.2 Process integration and test chip fabrication

To encapsulate poly-C cantilever resonator using poly-C thin ﬁlm packaging
technology, a new set of fabrication process was designed to integrate thin ﬁlm
packaging process with resonator fabrication. Since resonator was going to be
tested using piezoelectric actuation and laser detection method, no electrodes
need to be fabricated. Therefore, the feedthrough fabrication step was skipped.
The integrated fabrication process (4-mask) is shown in Figure 5.11.

First, poly-C cantilever beam resonator is fabricated using ﬁrst two masks,
while a ~1 pm PECVD SiOz layer serves as sacriﬁcial material. Figure 5.12
shows the fabricated cantilever resonators. Then, another sacriﬁcial PECVD SiOz
layer with a thickness in the range of 4-5 pm is deposited and patterned to create
package anchor. A 4-pm-thick poly-C ﬁlm is grown and patterned to provide
ﬂuidic access ports for the releasing of the package. Then, the ﬂuidic access
ports are sealed with an additional poly-C growth. Figure 5.13 shows a fabricated
poly-C package. Inset (a) shows a package with four ﬂuidic access ports for
releasing the package, while inset (b) shows a package after ﬁnal sealing of
access ports. The poly-C thin ﬁlm experienced almost zero-strains by using the
optimized growth conditions. During the sealing of access ports, poly-C will only
grow on the areas consisting of poly-C, with typical sealing pressures of 40 torr
(the poly-C growth pressure). Figure 5.14 shows an encapsulated cantilever

resonator in an intentionally-broken package after packaging process completed.

110

 

Resonator Anchor PECVD Si02
1

ﬁt I Mask #1
Substrate SLIP:

Poly—C ﬁlm deposited

 

 

 

 

 

WEE-'3'

 

 

Substrate

Poly-C resonator patterned

¢E=== Mask #2

Substrate

 

 

 

 

 

 

 

Second PECVD SiO2
Substrate

 

 

 

 

 

Package anchors

/ \ " Mask#3

h“

Substrate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Poly-C package film

. [I .4 »

   
 
 

   
 

 

 

Sutrate

 

 

 

 

 

 

 

 

 

 

 

Poly-C package
patterned acceas port
Mask #4
Substrate

 

 

 

Release package

.3—

Substrate

 

 

 

 

Seal package

Substrate

 

 

 

Figure 5.11 lntegrated poly-C thin ﬁlm encapsulation process for cantilever

resonators.

111

 

Figure 5.12 Fabricated poly-C cantilever resonators.

.\ ’
J

(a) ﬁeléasad . " - i f . (b) Completely
before final - - " ’r' - sealed acka

 

Figure 5.13 Fabricated poly-C thin ﬁlm package; (a) release package before ﬁnal

sealing, (b) completely sealed package.

112

l
Package shell ‘

Encapsulated
cantilever resonator

l

Figure 5.14 Encapsulated poly-C cantilever resonator.

 

5.4.2.3 Thin ﬁlm package evaluation

The poly-C cantilever beams are fabricated and encapsulated to evaluate
this poly-C thin ﬁlm packaging process. The cantilever beams are designed as
100 pm long and 40 pm wide with thickness in the range of 1 ~ 1.2 pm. The

theoretically calculated resonator frequency is given by [115]:

f. =Kxi, 5 (5.2)
L p

where t and L are the thickness and length of cantilever beam respectively, E is
Young’s modulus, p is the density of poly-C and K is a constant that depends on
the cantilever vibration mode, which for the ﬁrst vibration mode of cantilever
equals 0.1615 [115]. All these parameters and calculated resonator frequency

are listed in Table 5.2.

113

Since the piezoelectric actuation method needs to shine a laser directly on
top of the beam, the package shell was broken for SEM and measurement. For
some samples, the package shell was broken during packaging process right
after package release but before the ﬁnal sealing of access ports. Figure 5.15
shows cantilever beams (a) before packaging and (b) after packaging, and
corresponding frequency spectrum measurement results. Measured resonator
frequency and quality factor are also highlighted in Table 5.2.

The measured resonator frequencies are only slightly shifted as compared
to the computed values. It may be due to the fact that the actual value of Young's
modulus of poly-C ﬁlm is lower than the value of 1000 GPa, which is used for
theoretical calculation. Measured Q value is in the range of 3500 ~ 4500. There
are many mechanisms that cause Q degradation in poly-C resonators [114].
These include point or linear defects within the material and grain sliding or
internal friction. Researchers have also found a dependence of Q on the surface
roughness of the resonator structure [116]. Therefore, the Q values obtained for
different poly-C resonators can vary from structure to structure depending on the
processing and characterization of the ﬁlms from which the structures were
made. The resonant frequency and quality factor of cantilever beams do not
show appreciable change between pre- and post-packaging measurements. This
indicates that the poly-C thin ﬁlm packaging process developed in this study does

not affect the yields of resonators packaged inside.

114

 

 

 

Table 5.2 Poly-C resonator parameters relevant to evaluating of poly-C package

 

 

Pre-packaging
— Data
—- Lorentzian Fit

r, = 249.5 KHz
o = 3,654

    
 
    
 

0.2-

Normalized Amplitude 2

0.0-

 

 

249'200 V 249600 ' 256000
Frequency (Hz)

Post-packaging

 

 

 

 

NS
3
'i
E f, = 316.7 KHz
8 Q = 4,256
%
E
0
2
0.0
316400 ' 316800 ' 317200
Frequency (Hz)

 

Figure 5.15 Measured frequency spectrums of (a) pre- and (b) post-packaging

samples.

115

Chapter 6

Conclusion and Future Research

6.1 Summary and Conclusions

1. Fundamental research on CVD poly-C technology

Fundamental poly-C technologies used in this study, such as seeding,
deposition, doping and patterning have been investigated. Experimental
parameters have been characterized and optimized. This research provides solid
foundation for enabling technology development and package design and

fabrication later.

2. Enabling technology development

Intensive study has been conducted to develop several enabling poly-C
MEMS technologies, such as freestanding poly-C MEMS structure fabrication,
ultra-fast growth model, packaging panel with built-in interconnects and initial
diamond-diamond bonding investigation. These enabling technologies ensure

applications of poly-C in MEMS packaging at system level.
3. Poly-C thin ﬁlm encapsulation packaging process

Design, fabrication and evaluation of poly-C thin ﬁlm encapsulation

packaging process have been studied. To evaluate the efﬁcacy of poly-C

116

encapsulation, poly-C cantilever beam resonators were tested using piezoelectric

actuation and laser detection method before and after poly-C packaging process.

This poly-C thin ﬁlm packaging process was reported for the ﬁrst time.

6.2 Future Research Topics

As a long term research project, this PhD study has great continuity for

future student who is willing to work on diamond MEMS packaging. Possible

research topics from this study include:

1.

ln-depth study on diamond-diamond CVD bonding technology.
With introduction of access holes, CVD bonding between two ﬁlms
can be greatly improved. This technology, along with thick poly-C
panel fabrication technology using ultra-fast growth model, may
lead to potential applications of building 3-D poly-C cubic package.
Further study on poly-C panel with built-in interconnects. This topic
reveals an all-diamond packaging concept. Future research may
focus on the applications of such concept/technology.

Improve poly-C encapsulation packaging process. For example,
instead of sealing the package under typical diamond growth
pressure, try to explore potential vacuum sealing method.

Based on the development of diamond-diamond bonding
technology, it is possible to fabricate a poly-C MEMS using wafer

bonding approaches.

117

 

 

APPENDICES

 

118

APPENDIX A

Procggre of DPR Preparaﬂm

1. Weigh 800 mg commercially available diamond powder

2. Heat the diamond powder in a clean beaker on hot plate for ~ 1hour.
3. Cool powder for ~ 10 minutes

add 30 ml thinner into beaker

Magnetic stirring for 10 minutes

Ultrasonication for 30 minutes

NP’P‘P

add 80 ml photoresist

Repeat step 5 and 6

so 9°

Ready to use

Note:

1. Step 2 is needed to eliminate moisture. Also fracture the diamond clusters if
any.

2. Steps for mix thinner with diamond powder (4 - 6) are optional.

3. Mixing ratio is adjustable

4. Do NOT use chemicals which are expired.

119

APPENDIX B

Procedgre of Diamond-loaded lsoorognol Alcohol (IPA) Preparation

. Weigh 7000 mg commercially available diamond powder

Heat the diamond powder in a clean beaker on hot plate for ~ 1hour.
Cool powder for ~ 10 minutes or longer

add 1400 ml IPA into beaker

Magnetic stirring for 10 minutes

Ultrasonication for 30 minutes

Ready to use.

Note:

1.

Step 2 is needed to eliminate moisture. Also fracture the diamond clusters if
any.
Mixing ratio is adjustable

Do NOT use chemicals which are expired.

120

 

8.

9.

APPENDIX C

The Operation Proced_ure of MPCVQ

(For diamond and CNT deposition)

. Check if main chamber is in vacuum or not. if it is, then:

a) Close the valve of vacuum pump

b) Vent system with Nitrogen gas

c) Turn off valve of venting gas

Load the sample on substrate holder, then lift substrate holder stage up to the
resonant cavity, drive two screws to ﬁx the stage.

ATTENTION: Do it with gloves if chamber is hot!!!

Close the main chamber door, open the vacuum valve.

Wait for system pressure drops to below 3 mtorr.

Turn on cooling water and gas, push the “off" red button in the panel of
WAVEMAT.

Turn on Microwave power (at bottom)

Turn on valves of H2 and CH4 gas cylinders.

On H2 channel, pre-set H2 gas ﬂow rate to 100 sccm.

Set pressure “A” (2.5 torr) in MKS, turn on H2 channel.

10.Wait for pressure to be stable at 2.5 torr, turn on Microwave

11.You must see plasma formed in the cavity. If not, adjust the resonant cavity

length.

12.Set desired deposition pressure (i.e. 40 torr). After pressure goes up to 10

121

torr, increase microwave power slowly to desired value/
Optional: increase H2 ﬂow rate to introduce gas faster.
13.When pressure approaches to set value, set H2 ﬂow rate back to 100 sccm.
14.When pressure reaches set value, check reﬂected power, adjust to reduce it
as low as possible.
15.0n CH4 channel, pre—set CH4 gas ﬂow rate to 1.5 sccm or value you want.
Turn on CH4 channel.
16. Deposition process starts.
Shut down procedure:
17.Tum off CH4 channel, wait for 5 minutes.
18. Decrease pressure to 2.5 torr, and microwave power to 0.6 kW slowly.
19.Tum off microwave power, turn off H2 channel.
20.Tum on vacuum valve.
21 .Cool system for more than half hour.
22. Close vacuum valve, vent system with N2.
23. Open chamber door and take out sample.
24. Close chamber door.
25. Close all gas cylinder valves.

26.Tum off microwave power.

122

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