4‘”?— Trans develc This s the Sp risetc induce exist;j Conside jUnczim ABSTRACT CURRENT SATURATION MECHANISM IN FIE LD-EFFE CT TRANSISTORS BY Sukhbir Singh It is proposed that current saturation in Field-Effect Transistors is due to the presence of Space—charge layers which develop inside the channel normal to the direction of current flow. This space charge is induced by the gate field. It is shown that the Spatial variation of the majority carriers in the channel gives rise to High-Low junctions inside the channel region and that these induced junctions are responsible for a large diffusion current to exist inside the channel. An idealized model of a junction, field-effect transistor is considered. The two gates are assumed to be two abrupt p-n junctions placed symmetrically with respect to the center of the channel. It is also assumed that the drain and source contacts are ohmic and that the source contact overlaps the gates. Only the case in which a drain voltage is specified is considered. [276 7.9 1' Fun? doubl SUKHBIR SINGH The device is analyzed in two Space variables with the majority carriers as the sole current carriers. It is shown that the drain current flow is restricted to a very narrow region around the center of the channel and that the channel width never reduces to zero--even for moderately large fields. Two electric double layers are found to be present in the channel; these double layers are responsible for the observed current saturation phenomenon. Channel current control is found to be analogous to the control of collector current by the collector field in a bipolar transistor. The existence of a diffusion mechanism in the channel and the absence of velocity saturation are two important conclusions. Furthermore, it is concluded that the presence of an electric double layer is a fundamental property of field -effect devices. CURRENT SATURATION MECHANISM IN FIE LD-EFFECT TRANSISTORS BY Sukhbir Singh A THESIS Submitted to Michigan State University in partial fulfillment of the requirements for the degree of DOC TOR OF PHILOSOPHY Department of Electrical Engineering and Systems Science 1970 if. 45; 7.2 VI ACKNOWLEDGEMENTS The author wishes to express his gratitude to Dr. David Fisher for providing excellent direction to the research reported in this thesis. The author is also thankful to Dr. H. E. Koenig for his interest in the author's doctoral studies in his capacity of chairman of the department. Sincere thanks are due to Dr. Dubes, Dr. Hedges, Dr. Bong Ho, and Dr. N. Hills for their guidance and willing participation in the author's guidance committee. I would also like to thank the National Science Foundation for providing funds for computational work on CDC 6500 computer. .4 TABLE OF CONTENTS Chapter 1 INTRODUCTION 1.1 Background 1.2 Basic FET Amplifier 1.3 FET Characteristics 1.4 Objectives and Significance of present work 2 EXISTING THEORIES OF CURRENT SATURATION NNNNN m-hLNND—I »a E CNQNLNCNUJLNLNUJM OGDVO‘U'l-hUJND-J 4 THE 4.1 4.2 4.3 Shockley's Model Shockley-Prim Modification Kennedy's Model Goldberg's Mbdel Gradual Channel Nonlinear Mobility PROPOSED CURRENT SATURATION MODEL FET Geometry Assumptions Mathematical Model Space Charge in the Channel Mechanism.of Drain Current Saturation Solution of Transport Equation NUmerical Method Solution of Poisson's Equation Iterative Scheme RESULTS The Results of the Present Analysis Advantages of Present Theory Disadvantages Over the Other Theories 5 SUMMARY AND CONCLUSIONS AP P END IX REFERENCES High-Low Junctions in Semiconductors Page 11 ll 12 15 '17 20 21 27 30 33 35 37 38 38 40 42 54 58 61 66 68 71 72 91 92 93 95 97 LIST OF SYMBOLS width of half channel length of channel permittivity of semiconductor mobile electron density intrinsic carrier density mobile hole density Spatial variables electron mobility hole mobility diffusion constant for electrons tlll'l'lmlun nmntuni l'ur lmlna electric field drain or channel current electric current density due to electrons electric current density due to holes Boltzman‘s constant Debye shielding distance or Debye length concentration of impuritie s LIST OF SYMBOLS (cont.) electronic charge charge density dimensionless electrostatic potential applied drain voltage channel width quasi-Fermi level for electrons quasi-Fermi level for holes ele ctrostatic potential Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. Fig. 10. 11. 12. 13. 14. 15. 16. 17. 18. LIST OF ILLUSTRATIONS Schematic diagram of an n-channel JFET FET Amplifier; A pictorial representation FET characteristics JFET model; space charge regions Gradual channel approximation Channel length modulation by space charge Small current amplification device Impurity profile in a SCAD Electrostatic potential variation in a p-n-p structure JFET model of present work Gate-channel-gate structure on a p-n-p device Potential and Fermi level diagrams of a p-n junction Effect of bias on transition region width Computed values of transition layer width Gate space charge in a symmetrical channel Lateral field and potential variation in channel Majority carrier density in a partially depleted channel Conductive channel analogous to a p-n-p bipolar transistor Page 13 16 18 23 28 31 31 34 39 39 46 49 52 52 56 56 Fig. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. LIST OF ILLUSTRATIONS (cont.) Coordinate system and device structure parameters used in solution of Poisson's equation Block diagram of iterative scheme Electrostatic potential in the channel Electrostatic potential in the channel Electron density in the channel Electron density in the channel Channel width Electron mobility in the channel Electrostatic potential in the channel Electron density in the channel Electrostatic potential in the channel Electron density in the channel Potential in the channel for various channel widths Electron density in the channel Drain current versus drain voltage Electron concentration in a high-low junction 1*) 67 70 76 77 78 79 80 81 82 83 84 85 86 87 90 i)() CHAPTER 1 INTRODUCTION 1.1 Background The Field-Effect Transistor (FET) is a unipolar device. The electric current which flows through the device is due to the majority carriers. Current control is obtained by changing the dimensions of the channel and/or by changing the carrier con- centration in the channel. There are basically two types of field-effect transistors: the Junction Field-Effect Transistors (JFET) and the Insulated Gate Field-Effect Transistors (IGFET). The latter is sometimes called the 'metal-oxide-semiconductor' (MOS) transistor. Their principle of operation (current controlled by an electric field) is very similar to the JFET; the primary difference being the manner in which the control element is made. In the junction FET, re- verse biased p-n junctions are used to change the dimensions of the conducting channel. In the surface FET, both the carrier concentration and dimensions of the channel are controlled by an 12 electric field at the surface. In this thesis, only the case of JFET'S is considered. Field-effect devices are attractive both as active and pas- sive components because of the readiness with which they can be integrated into large-scale monolithic circuitry. They are also easier to manufacture by evaporation techniques and can be made from less refined materials than can the bipolar transistors. The most notable advantages of field-effect transistors are their high input impedance and their 'self-biasing' feature. Absence of any charge storage mechanisms makes them especially useful for switching purpose 8 . 1. 2 Basic FET Amplifier A field-effect transistor is essentially a voltage controlled resistor. The 'resistor' consists of a region of n-type material sandwiched between two regions of p-type material. In Figure. 1.1(a) the electrical contacts S and D at the two ends of the 're- sistor' are called the Source and Drain respectively. The p-type regions, called the Gate (31 and Gate (32, are generally connected together. When the gates have a reverse or no bias with respect to the source terminal, the Space charge of p-n junctions lies partially in the n-type region. The dimensions of the conducting region, therefore, depend upon the bias on the gates. The length b of the conducting region between the two gates is called the l3 U WEN _, <+++++++++++ _. b I s {A I D o n-Type Channel 2a (a) V =(); \I : O u #1 .5 d g F Cd 3 +++++++jf++ ; m g\ NP 2 \_p-Type gate V V g _ d +1" ‘6 ”IF V Id 0» V' > O ; V S 0 I) — d S n VV n + + + + + + + + +++++f+ ++ ++ s\ \\P Gz figmeldL Schematic diagram of an n-channel junction FET under various bias conditions. The approximate shape of space charge regions in the channel is shown. (a) Zero bias on all electrodes; (b) Negative gate-source voltage and positive drain source voltage; (c) Saturation condition for negative gate voltage. y ij 1 " l‘ 4.1—1! 14 channel. The width, w, is smallest between the gates and there- foredetermines the resistance of the channel. In an undepleted channel, w : 2a, and the resistance is the lowest. When a voltage is applied between the source and the drain, current flows in the channel. Also the reverse bias on the gate- channel junctions gradually increases from S to D and Space charge expands into the channel as depicted in Figure 1. 1(b). The channel has the largest width near the source end, where the voltage drop is low, and has the smallest width near the drain end, where the voltage drop is the largest. The p-n junction can thus be used to control the dimensions and hence the resistance of the channel. As the reverse bias on the gates increases, a condition is reached where the space charge extends completely across the channel and the width of the channel reduces to zero [see Figure 1. l(c)]. The reverse bias needed to achieve this condition is called the Pinch- Off voltage Vp. The pinch-off can also be achieved, with zero gate voltage, by increasing the drain voltage till the channel width becomes zero. In typical devices the pinch-off voltage varies from one to ten volts and the resistance of the channel may vary from as little as 100 ohms with zero bias to as high as many Megohms near the pinch-off condition. The above explanation was in terms of an FET with an n-type channel; FET's are also fabricated with p-type channel 15 and n-type gates. These two FET's are complementary. To optimize the working of the device, it is so designed that the Space charge of p-n junctions expands primarily into the channel. This is done by choosing the channel to have a higher resistance than the gates. Under these conditions the Space charge lies entirely in the channel. Figure 1. 2 shows schematically an FET as an amplifica- tion device. Amplification action occurs because of the fact that the width of the space charge depends upon vgs--the signal voltage. A changing channel current causes a changing voltage drop across R --the load resistance. Amplification is obtained because the d change in v S--the output voltage, can be many times larger than d the change in v . gs In normal operation of an FET the gates are always re- verse biased. The reverse current of the gates, and hence the power drawn from the source is negligible. The input impedance is, therefore, very large. 1. 3 FET Characteristics The important characteristics of the FET are shown in Figure 1. 3. Figure 1. 3(a) is the drain or output characteristics. At low drain-source voltage, for fixed bias, the current increases in proportion to voltage. The portions of the curve where the slope is not zero correspond to the condition in which the channel 16 Figure 1.2. An FET Amplifier; A pictorial representation. H E I) I . +\ + +~+ + + Rg +++ +++ 1 C32 +-+-+ + + (31 Q + A++ n ++“\ P++ ++p vds +-+ +-+ + + + + v gs ~v .1- _:;HV S -F ds le - ' ll ‘ —v V' g 17 between the drain and source acts like a controlled resistor. This region is sometimes referred to as the triode region. In this region of operation, volt-ampere characteristics can be de- rived from the Gradual Channel Approximation Model [1]. At higher drain voltages the current begins to bend over indicating an increased resistance of the channel. When Vd becomes greater than Vp, the curve levels off and the current becomes essentially independent of the drain voltage. The portion of the curve where the slope is zero (V greater than Vp) correSponds to the condition d of pinch-off, and the current is said to be saturated. The tran- sistor in this region is a voltage-controlled, constant-current device. It is in this region that it is normally operated as an amplifier. A. sharp increase in current at higher voltages indi- cates the onset of avalanche breakdown. Figure 1. 3(b) illustrates a typical family of output characteristics and shows the kind of control exercised by the gate voltage on the drain current. Figure 1. 3(c) is the gate-drain transfer characteristic for the condition when the channel is pinched-off. The unique shape of these characteristics makes FET'S very suitable as 'remote control' devices . 1.4 Objectives of the Present Work In the above simplified model of the FET, the behavior of the device, in terms of its drain current, is the same as that 18 I I) d 111 Constant /current ‘ (Saturation region} Triode I Vgs = 0 j R egion Saturation —. region «.— Constant resistance (Triode region) 1 l l 0 1.0 2.0(VDS/VP) 0 0.5 1.0 2.0 3.0 (v /vp) (a) (b) Figure 1.3. The output family of characteristics. (a) Variation of drain current with drain voltage. (b) Drain current versus drain voltage with different values of gate bias. p gs Figure 1.3. (c) Drain voltage-gate bias transfer characteristics for Vds = VP' 19 predicted by the Gradual Channel Approximation theory [1]. According to this theory the channel width decreases in propor~ tion to the square root of the drain voltage. Thus for drain voltages equal to or greater than the pinch-off voltage, the channel is pinched off and has a zero width--at least over some portion of its length. In other words, the channel is incapable of sustaining a flow of current. Similarly, at a fixed drain voltage, the space charge regions of the gate junctions eXpand with increasing gate bias and eventually extend completely across the channel. A large negative bias is thus able to make the drain current zero. This predicted value of drain current is contrary to the observed effects in the actual devices, i. e., even for a pinched off channel a large current continues to flow and is independent of the drain voltage. The present work endeavors to explain: 1. The phenomenon responsible for the saturation of drain current. 2. The mechanism which tends to maintain the drain current at a near constant value with drain voltage. 3. The non-zero slope of the drain-current versus drain- voltage characteristics . CHAPTER 2 EXISTING THEORIES OF CURRENT SATURATION The analysis of the unipolar transistor was first accom- plished by Shockley in 1952 [l]. The keypoint in his analysis was the so-called 'Gradual Channel Approximation, ' whereby it was assumed that the rate of change of channel width was much smaller than the actual width of the channel. Space charge regions of the gates were assumed to be completely depleted of the majority carriers. Shockley further assumed that the transition from the depleted to the neutral channel was abrupt, and, accordingly, that electrical neutrality existed inside the channel. For drain voltages larger than the pinch-off voltage, the channel was assumed to be pinched off; any increase in drain voltage would be absorbed by the expanding gate-channel boundary. Under these conditions Shockley's model predicted the current to be confined to an I infinitely thin plane near the center of the channel and that the current was maintained at the saturation level as a result of the channel length modulation by the drain voltage. Numerous subsequent elaborations of Shockley's model have been in the direction of interpreting the saturation 20 f. 21 phenomenon while staying within the Gradual Channel Approxima- tion. The most significant extensions of Shockley's original theory are: (1) carrier mobility dependence on electrical field [3-7], (2) different geometries and impurity distributions, and (3) the effect of temperature. and charge injection [8-11]. Kennedy [11] used the special geometry of the SCAD (Small Current Amplification Device) to establish the presence of High-Low junctions [12] in the channel. This prevents the chan- nel from choking itself due to its own current. Kennedy has further shown [13], by an extensive numerical analysis of the device, that a high-low junction is also present in a uniformly d0ped channel provided the mobility of the carriers is taken to be depen- dent upon the electric field. By an approximate analytical solution of Poisson's equation, Goldman [14] predicted the presence of an inversion layer inside the channel. This inversion layer should give rise to increased minority carriers which are responsible for maintaining a large current even in the pinched off channel. 2.1 Shockley's Model In an idealized p-n-p structure, two abrupt and reverse biased p-n junctions are used to modulate the width of a uniformly dOped n-type channel. If p-type regions are dOped much more heavily than the n-type channel, the space charge regions can be assumed to lie entirely inside the n-type channel. The Space charge 22 within the channel can be adequately described by Poisson's equation: 2 a V a V ———Z + —-Z = - Q(x,y)/k, (1) 8x 3y -3 where Q(x, y) is the charge density (coulombs - cm ) in the chan- nel and k is the permittivity of the material. When the drain and source are at the same potential, Equation (1) reduces to one dimension, 7 = - -—— = -Q> Nd. 39 fl" M Figure 3.1. JFET model. v. 1 G../////e//////aa, Figure 3.2. Section at xx' of Figure 3.1. 3. 40 The potential in the absence of applied gate voltage at the metallurgical junctions (at y = 0 and y : 2a) is taken to be as zero. This also is taken as the boundary condition. The donor impurity atoms in the channel are completely ionized. Also, the Space charge region of the gate channel junctions is completely depleted of the majority carriers. The channel current is only due to the majority carriers. The recombination and generation in the gate transition region and the channel is ignored. The current flow in the channel is entirely due to the longitudi- nal component of the field, such that, Ex(x: Y) : Ex(X). The reverse current of the gate junctions is neglected. The boundary between the Space charge of the gate and the channel is taken as abrupt. Also, the charge density in the channel, at right angles to the current flow, is approximated to have. a constant value. which will give the same current as would be obtained by the. integration o." current density in the actual channel. The two cases of majority carrier mobility are considered: (1) mobility independent of the electric field, and (2) mobility related to the electric field as formulated in Section 2. 5. Mathematical Model The analysis of a field-effect transistor involves the know- ledge of the majority carrier distribution. This is obtained by solving Simultaneously Poisson's equation, the Continuity equation, and the Transport equation; subject to constraints imposed by 41 the geometrical configuration of the device and the external bias voltages. In this work, a simplified form of the current transport equation, combined with the Poisson's equation and the continuity equation for the majority carriers, is taken as the mathematical description of the device. Equation (1) is the Poisson's equation which relates the divergence of the electric field [E(x, y) = - grad V(x, y)] to the charge density arising out of the mobile charge carriers, p(x, y) and n(x, y) (holes and electrons, respectively) and immobile im- purity atoms N(x,y). Equations (2) and (3) are the Transport equa- tions and express the current density, in terms of electron and hole concentration, mobilities un and up and diffusion constants Dn and DP. Equations (4) and (5) are the Continuity equations and are in terms of the current densities due to electrons and holes; RH and R are recombination and generation currents. Equation (6) is the total current. div grad Maw) = - E [N(x. y) - n(x.y) + ptx.y)] (1) JPrcmm on mrmoqmomdbjo uO4m2i>r wvbom Olbmom meOZ on b biz cczojoz wow <>m_ocm m_>m omm . Zbamabrn 9.1502 0020» omzmi. 2a" _.m x 5.... oz; $3.56 omm Vp the length of 'pinched-off' channel (n- region) increases because of expanding Space charge towards the source contact. This effects the current in the following ways: 1. Increased resistance of the gradual channel tends to reduce the injected current. 2. Current increases due to the increased field across the 'pinched-off’ channel. 3. A virtual cathode at E and the Space-charge density in the 'pinched-off' region are precisely the conditions for a Space charge limited current (the current is proportional to E3/Z[2]. However, any increase in the field also increases the length of the n- region. The net effect is a slight increase in the drain current with drain voltage. The current saturation in the above model is thus a conse- quence of the Space charge in the channel. The mobility dependence on the field and space charge limited current effects only appear as second order effects. The gates control the current by reducing the dimensions of the gradual channel and thus decreasing the in- jected current available to the 'junction' AB. 3. 6 Solution of Transport Equation. If the transport equation (26) is combined with equation (27), we obtain 59 dw [Jn(x)] 0 din [q Un(x)n(x) grad 111(x) + an grad n(x)] . (28) Substituting for n(x) from the Boltzman's equation n(X) = r1i eXPuW - ct) . we get div [qUn(x)n(x) grad ¢(x)] = 0. The drain current at any section of the channel is constant and is obtained by the integration of Equation (29) over the width of the conductive channel. The drain current is .W(X) I = 23 Jn(x)dy o .W(X) : 2‘8 qUn(x)n(x) grad ¢(x) dy o .W(X) : Zq ni grad ¢(x) exp [-n¢(x)]\ Un(x) exp [atll(x)] rly Z q ”i grad (Mir) eXp [— ut()(x)] V(x) , (Ht) W(X) where F(x) = 5 Un(x) exp [a41(x)] dy (31) o Rewriting Equation (30) in terms of ¢(x) and integrating with respect to x yields, I exp [-a¢(x)] = 2:11.5‘ F(X) . + C , 1 where C is the integration constant. Taking the limits of inte- n gration as x and b and expressing cn in terms of the boundary 60 conditions at the point b we have I d est-aw] = nieXP[-%(b)] +2; (x F; i Substituting from the Boltzman's equation the values of ¢(x) and ¢(b) the electron density in terms of the applied drain voltage is given by b . I d n(x) = exp[a¢(x)] [n(b) exp [-a¢] Mahdi F03] (32) If the electron density is evaluated at the x : 0, then from Equation (32) we obtain an expression for the drain current as a function of the applied drain voltage and the boundary conditions for the elec- tron density: ZqN I : d 11(0) ‘ n(b) exp [’04) (b)] . (33) (1 Sb dx F(x) 0 The only approximation in the solution of the transport equation was in ignoring (section 3. 5) the lateral component of current in the transition regions between the gate and the channel. The set of two boundary conditions n(O) and n(b) at the external contacts 0 and b is in general given by the relationships involving the currents at the external contacts. Assuming the simplest form of the contacts of the ohmic type, the boundary conditions are: 61 and (32.1) n(b) ll :3 where nN is the electron equilibrium density at the external con- tacts of the n-type material. An equivalent definition requires charge neutrality at the contacts: i-mLE n(O) - p(O ) - Nd(0) : 0 and n(b) -p - N (b) = o. d Since the Fermi levels for the holes and electrons coincide at the l \1 2 contacts, the hole electron product is given by np = n, and hence i the boundary conditions can be written in terms of the doping concentrations as: N (O) 2 N (0) n(0)=nN=/ d2 +1 + d2 for N(O) :0 , where n(b) = nN. (32.2) 3. 7 Numerical Method In order to explain the first and second order effects re- sponsible for current saturation in the FET, knowledge of the detailed picture of the distribution of the carriers and voltage in the channel is necessary. However, because of the nonlinear nature of Poisson's equation [Equation (7)], an analytical solution is impossible and, therefore, recourse is taken to the numerical 62 methods of solution. Of the various numerical methods of solu- tion the choice is limited by the accuracy, a guarantee of con- vergence, the total time of computation and, most important of all, the mesh Size. A large number of mesh points indicates the difficulty in a method in actual computation in that it requires a large storage space and large computation time. The most straight-forward numerical method of solution is via the relaxation techniques. Through a judicious selection of the mesh size and the relaxation factor, the convergence of this scheme is more or less assured. However, 10 to 15 iterations are needed for a fourth place decimal accuracy. Another disadvantage of this technique is that it requires a storage space for 2(N x M) words per variable (where N and M is the number of node points in the x and y direction, reSpectively). For a reasonable amount of accuracy the mesh size Should be less than or at least comparable to the extrinsic Debye Length-- the characteristic length of decay of voltage in Equation (20). Also, an FET, in saturation, should be analyzed for drain voltages of the order of t to 10 times the pinch-off voltage. In the solution of the tranSport equation (Equation 32), the size of the numbers range between exp (4OVD) and exp (-40 Vd). Thus, if Vd = 5 Vp the largest number is exp (200 VP). So that these numbers can be handled efficiently in a large sized computer, the value of Vp should not 63 exceed 2 volts. From equation (13) the extrinsic Debye Length Lde and the pinch-off voltage Vba are related by the equation a/Lde = 2Vp/Vt25 8017p, where a is the half—channel width. Thus from the point of view of the size of numbers which can be safely handled in a computer we have a/Lde g 160. As was assumed in section 3.2, if the transition between complete depletion and neutrality is taken to be abrupt then Length of transition region < 0.1. HaIfPChannel width The length of the transition region has been determined in Equation (13) ‘ and therefore, SLde/a < 0.1 or a/Lde > 50. In short devices (devices in which the gradual channel approximation does not apply), let b/a = 2.0. If a = SOLde then: N = 101 and M = 101. Thus for a numerical solution via relaxation techniques, the storage space needed is of the order of 2(101 x 101) words per variable. In this work a truncated Fourier's series is used to construct the required function; since the function can be constructed in one step--the required number of storage spaces is therefore, only N'x:Nt= 101 x 101. Advantage is taken of the symmetry of the device structure and thus we need only N x M/Z storage spaces. The required 64 number of storage spaces can be further reduced if the device length is divided into sections. The required functions are then constructed in one section at a time. In fact the entire computer program was developed for IBM 1800 computer which has storage space of about 2500 real variable words. 3.8 Solution of Poisson's Equation For any drain voltage Va and gate voltage V8, the shape of con- ducting channel is a function of x (Figure 3.10). If V(x,y) is the potential in the rectangular region x = 0, x = b, y = 0, and y = 2a, the net charge density in the channel is defined by the equation 2 2 ‘ 37‘; + 337‘; = —Q(x,)')/k (34) ~ where Q(x,y) = -q(Na-n) -qNa; 0 s y S Y1(x) = -q(Nd-n); Yltx) s y 3 ms = -q(Na-n) -qNa; Y2(X) s y S Za, where Nd is s the donor density in the channel and n is the density of the mobile majority carriers. The boundary conditions on V(x,y) are V(x,0) = V(x,2a) = Vb(x), V(b,y) = V6, and V(0,y) = 0. Let L = 32 + 32 = L . SEZ' 3;2' aplaCian, Let F(x,y) satisfy LF=0 and F=Vb on boundary. Let V - F = G such that G is zero on the boundary. Therefore, LU LV - LF LV; because LF = 0. 65 Therefore, F(b,a) = 4vd 3:? 1 Sin Nn/z N = 1,3,5,.... N=1 N (38) = 4Vd fl = Vd; [y f 0 and y # 23]. T ° I The effect of this term on the channel current (b/a greater than 10) can be ignored. Hewever, for smaller channel length to width ratios, this effect is very significant. The solution of LG = 0 with G = 0 on the boundary can again be represented by a two-dimensional Fourier's series: G(x,y) = 33° °z° Sin M Sin wa/b , (39) M=l N=l ZEX" where AMN is the coefficient determined by the boundary conditions such that AMN = _64 YR 1 ,7; 51112er . 5111an W3 2 12 NTT T T b M+(Z.a:’1) b g n(x) Sin.Mn Sin.Mw W(x) , Sin Nnx -% (1 :— 1“? "5“” O = _64 V 1 2 ml w "N“ W b M2+(_2£N_)2 Tr b ) _1 81 n(x) Sin.Mn Sin.Mn W(x) Sin wa dx 5' i 2_'° 4—' a ° —IT_ 0 for all values of N and for all odd values of M. (40) g a t 66 Thus LF = 0 with F = Vb on the boundary and LG = Q(x,y) with V = 0 on the boundary is the solution of Equation (7). The solution of LF = 0 is a two-dimensional Fourier series F(x,y)= 35’ mm SinhN , N=1aNS 25"' '2E[ where a is determined by the boundary conditions. The potential N , F in the channel due to applied voltages is: F(x,y) = 4vd i? Sinh ch/za Sin NTry/Za —-- N=l Sifih N6572a ° (35) b + 2 i9 Sinh /b Sin ch/b I Vb(x) . Sin NiTx . dx 5 N=l 1 2a L ' o ’5 where V(x,Za) = V(x,0) = Vb(x) (36) V8 for 0 S x SgL. For gL 5 x 5 L; Vb(x) is given by the solution of one dimensional Poisson's equation 2 LLi” = 0 ‘ (17) 0x2 such that Vb(x = L) = Vd' The first term in Equation (35) is convergent for all odd values of N. Atx=a, l Sinh wa/Za Sin Nn/Z. l N Sinh wa/2a F(a,x) = 4Vd 'IT ll M8 The term Sinh wa/Za is much smaller than unity and is almost zero Sinh Nnb/Za (for b/Za greater than 10) for all values of x except x = b, where Sinh Nnx/Za 3155 N5572a x=b = 1° 67 g! 7i Vb(x) ///////€///// . “i S _ E‘3W_ _ _ _ G) 1: (V=0) —’ y//7/{W///////:IZ 0 III Illllll llllllllllllllllllllllIllllllllllflflllllfllflfll ,L. . \ J. —"l|’ \ mm Figure 3.10. Coordinate system and device structure parameters used in the solution of Poisson's equation. 68 Equation (39) is the voltage due to space charge effects of the gates and channel current. The factor N(x) represents the effect of charge in the channel both due to the applied field and the channel current. In the region of the partially depleted channel, this com- ponent decreases; consequently, it tends to reduce the total voltage in the channel. (The second term of Equation (40) equals the first term for W(x)=2a). Any applied voltage on the drain contact increases the drain current until the reverse bias reduces the channel width to a point where a further reduction tends to reduce the voltage at that point. For large channel length to width ratios (b/a>>10) the terms of Equation (40) decay very rapidly with increasing values of __ M. For computational purposes the Fourier's series has been truncated and terms up to and including M=N=21 are considered. The step size taken was 0.05 normalized to half channel width. 3.9 Iteration Scheme The six basic Equations (1) to (6) have been rearranged and approximated to set of three equations (7), (26) and (27). Equations (26) and (27) combined with the boundary conditions (32.2) define the electron concentration in Equation (32). The solution of Poisson's Equation (7), subject to the constraints of the applied voltage and geometrical boundaries, is given by Equations (35) to (37) and (40). In this new formulation of the problem, the electrostatic potential 'V(x,y), the electron density n(x) and the channel width W(x) are chosen as the independent quantities. These three quantities represent the unknowns of the reduced equations. 69 An iterative scheme is now used to cope with the various non— linearities of the problem. The complete iteration scheme is shown in Figure 3.11. The applied drain contact voltage Vd is specified. F(x,y)--the component of channel voltage due to Vd, is computed from Equation (35). A trial channel width Wj(x) and a trial electron distribution nj(x) are chosen. To start the first cycle of the main iteration loop, Gj+1(x,y)--the component of channel voltage, due to . ' I '-' '3‘- the gate bias and channel current, is computed from Equation (40), in terms of Wj(x) and nj(x). Total voltage in the channel Vj+1(x,y) is the sum of Gj+1(x,y) and F(x,y). Wj(x) and Vj+1(x,y) are used to compute, from Equation (32), the new value of electron density-- t nj+1(x). Poisson's equation with Vj+l(x,y) is now used to obtain the charge density and hence the modified channel width Wj+1(x). Solution of Poisson's Equation (34) with nj+1(x) and Wj+1(x) yields an improved potential distribution. Iteration is continued until a stable value of drain current [Equation (33)] is obtained. Different initial values of Wj+1(x) and nj+1(x)-~other than those shown in Figure 3.11, can be chosen to hasten the convergence of the iteration scheme. The computed electron density nj+1(x) is tested for any unrealistic values (n(x) orders of magnitude larger than the impurity density Nd). In such a case a secondary iteration 100p is used to scale down the voltage Gj+1(x,y). With this method complete freedom is available in the choice of impurity distribution, the carrier boundary conditions at the external contacts, and the dependence of mobility on the electric field and doping. If applied voltage Vd is specified, the method solves for total current and all the quantities of interest in the interior of ;.vice as a function of position. 70 Specify VD Y F(x) = f(V [Eq. 35] D) V,j+l : Fj+l + C;j+l Start Trial W(x)=2a,1‘21:0. o n(x)=l. o, SCALE:1. o 1) 1 j i A. I 05H = {(wj, nj) j+1 [Eq 40] .+ . n : f(VJ 1,WJ) =- [Eq. 32] wJ = f(VJ+1) I .+ . . . de l : f(VJ+1, WJ+1,nJ+1) [Eq. 33] SCALE : O. 9XSCAL 1! Figure 3.11. Block diagram of iterative scheme. Iii-F cm )_-'_ui-_\'B. '. an,“ CHAPTER 4 RESULTS Solutions obtained with the numerical procedure outlined in the previous chapter are presented for two special structures: (1) an n-channel FET with the gate length equal to a fraction of the channel length and (2) Shockley's model (gate and the channel of equal lengths; the gates overlap the source and the drain contacts). Distributions of electrostatic potential, mobile carrier density and the channel width are shown as functions of position throughout the interior of the device. The terminal property in the form of drain current versus tin-n2. drain voltage is illustrated. “Exact" and conventional approximate analytical results are compared and discrepencies are exposed. In the previous chapter a numerical method of solution of the two-dimensional, one-carrier, transport equation and Poisson's equation describing the behavior of the FET has been described in detail. Although the method of solution and numerical technique allow for an arbitrary doping profile, boundary conditions at the external contacts, and mobility dependencies, the results for a special type of idealized structure are presented as an example of the numerical technique. The analysis is restricted to "short” structures (b/a<<10) so that the effects of drain field are accentuated. The choice of abrupt dOping p ifiles has two motivations: (a) the achievement of an analysis for the numerically worst case (abrupt boundary conditions). (b) the comparison between "exact" and approximate analytical solutions are available only for idealized structures. Motivation (b) also justifies the selection of appropriate constant values for the carrier mobilities. 71 72 In addition to the above assumptions, external contacts of ohmic type are specified for the device under consideration. The physical parameters characterizing the structure are listed in Table 4.1. For efficient arithmetic relevant quantities are expressed in dimensionless form; the set of normalizing constants is chosen with the criterion of achieving the highest simplification in the relations of interest. The list of normalizing factors is given in Table 4.2. Calculations were performed on the CDC 6500 system. The output data was punched on cards and displayed in graphical form with the help of HYPLOT routine on the IBM 1800 system. The computation time for one value of drain voltage is of the order of 18 seconds. 4.1 The Results of the Present Analysis For various applied voltages the electron distribution, channel width, electrostatic potential and carrier mobilities are shown in Figures 4.1 to 4.6 for the structure I; the same set of quantities is shown in Figures 4.7 and 4.8 for the structure III and in Figures 4.9 to 4.10 for the structure 11. Figures 4.11 and 4.12 illustrate the variation of electrostatic potential and carrier densities, for Vd = VP, for channels of various initial widths. The drain current versus drain voltage characteristics is shown in Figure 4.13, for the three structures, for Vd > VP. For Vd < VP the drain current is calculated only for the structure I. For all the above cases there was no significant variation in the general shape and size of the channel width, for Vd > VP and therefore only one curve is shown (Figure 4.5). For all the above results the carrier mobility was assumed constant with the electrostatic field. 73 Material: Silicon (relative permittivity 12) Temperature: 300°K Intrinsic carrier density: 1.5 x 1010 cm'3 Doping: n-chaJmel, N(x)=Nd=1.0 x 1016 cm‘3 gates, N(x)=Né=Metallic Mobility: electrons, 1306.0 cmz/volt-sec. Parameter Structure I II III channel length: 80 Lde 80 Lde . 80 Lde channel width: 20 Lde 40 Lde 20 Ld0 Gate length: 80 Lde 80 L3; 60 Lde Pinch-off voltage: 1.293V*** 5.172V 1.293V Table 4.1. The physical parameters characterizing the FET structure, analyzed under steady-state conditions for various applied voltages. * Unit of length in Extrinsic Debye Lengths. ** Voltage distribution on the drain contact is sinusoidal in the y-direction. *** Unit of voltage in Volts. 74 umoaoucfl mo moflpfiucmsc one now monunsm noflummflfimsnoz mo umfiq .N.e pomH mofipfimcop i nouqooom was SHOH x o.H pz a: -2 .z .nocoe .xufiasmsfl we: pass emmmo.o s> ea Hm>sa aesoa-ams:e Hmwwcouoa sao> emmNo.o o> s> Anastase poo scamsooae oaoa x o.H m2 c xuwmcop amassed eu\sao> S.m~s as m ensue Unsouofim u omwufio> “Hos ewmwo.o > e> measaev sadness u HmfiecoHOQ sacs ewmmo.o e\axn_> Unsssmospusae 0 Eu m-oH x assne.o ezs\xs>i es s apes: assemeu-eass m >.x moumcfipaoou cowuwmoa mbn<>.qVp) this minima lies and stays near the drain contact; also, it has a higher minimum value than in the case of lower drain voltages. This is due to the contribution of the space charge of increasing drain current (Figure 4.4). The minimum value of carrier density in the channel is dependent upon the device struture and drain voltages (see Figures 4.3, 4.4, 4.8, 4.10 and 4.12). In the Figures 4.3, 4.8 and 4.10 the effect of drain voltage on the carrier density minimum should be noted; the minima moves towards the source contact with increasing drain contact field. This effect confirms Shockley's theory [1] of travelling pinch-Off point towards the source. The carrier density minima near the drain contact (Figure 4.4) gives rise to a high-low junction. The confirmation for the presence of a second high-low junction is made by the magnitude of diffusion current in the channel; or, in other words, the gradient of the carrier density in the channel. Towards the left of the carrier 76 . . . was... . I d o. a . p. (or... .. . . . . .0. . Huh. ' .cofiuflmoq mo cofluocsm m we Hoccmco one Cw Hmflucouoa ofiumumoauooam ”H esoposnum .H.e n\x oocmumflp ponwfimEhoz o.H m. . n. o. m. a. m. N. .M. w 11a n 1w n 1111i1:.i~. tilt) \I Q .t- > no u e> e> 3. u e> a> ms u e> a> no u e> a> me u e> N SQ’O/(X)A {etiuaiod 3119150113913 pazitewioN O ,_¢ 77 >H >m >v >0 o.H .cofluwmoq Mo cofiuocsm m we Hoccmco one cw HmfiucoHOQ ”Monumonpuofim ”H manuospum .N.e .wflm n\x mucoumwp nmnflflmeaoz no 3. 3. 4.0 ms 2 no as I a s1 n n 1 ‘i 8'2/(X)A [etiuaiod 3:19150113919 pezttewioN 78 .H oasuosnum ”cofiufimom mo :oflpocsm m mm Hoccwcu may no poucoo may cw xufimcop coauooam n\x oocwumfip pouflfimsaoz o; as as We out. 3 so no as T 11111q11qn1d1_n1 q \\1z .3. .mE H5 o.o 4 n N o.H PN/(x)u Aitsuap uoxioata pezttewioN .coflufimoa :oHuUQSw m we Housmao mo aoudoo ogu :fl xuwmcop conuoofim ”H manposapm .e.e .mflm n\x oocmpmwp poNflHmEnoz on. as ms is so we so 2 2 no as 14 A a q 1 ed. a a a q a a A n din). 79 0N PN/(x)u Airsuap uoxioeta pazttewi 80 a .. IIHE .coHuMmOQ mo :oHpoczw m we gone: Hoccsau ”H oasuosapm n\x oocmumflp pomfiamenoz .3. a: N V BZ/(XM H1PIM Isuueqo paztremioN o.~ 81 .coflufimoq mo :ofiuocsw m we xpfiflflnoe cospoofim .o.e .mfiu o\x museumfip poNflHmEHoz 5.0 o.o m.o v.0 m.o N.o H.o 9.0 .41 at .141 at us a _. 1w) .1 .q at a .1 a, N. s. e. seamN u a m. meson u s o.~ 5'9021/(x)n Aittrqom uoxioeta pszttewioN 82 >H [3:51 .‘u’ .cofiuwmoq mo :ofiuocsm m we Hoccmco one cw Hmwucouoa owumumopuommm woufifimenoz ”HHH manpospum .n.e .ufim p\x mandamus emusnsnhsz o.H m.o m.o 5.0 o.o m.o q.m m.o ~.o H.o sin a T. « dintd_tqt o.o 8'2/(X)n {etiueiod paztIemioN 83 vilrvr . . . I. «in .cOfluflmoa cofiuocsw m we Hoccmno co noucoo one ca Swanson conuooam ”HHH esoposaum .w.v .mHm , D\X mugpmww VONMHNEOZ on as as as es 3. so 3. NS no as nannnninWIwanTn. 1 a i LN. L L e. L o. i .iw. i 54 PN/(x)u Airsuap uollbela PGZIIBmJON 84 .coflufimoa mo :ofipocsw m we Hocemco we noucoo one cw HmflpcopOQ owumumoauoofim ”HH onsuosnum .m.e .mfim as. 858% Essaanoz no 2 NS no as $3.. > 1 ¢ > Nna.m u 241'5/(x)A [etiuaiod ot1915011oate pazttewioN 8S . II‘1? a1. ... E .nofipfimom mo coHuo::m m we noncono mo nopnoo one an xuwmcoe nonuuoum ”HH on:uo:hpm .oa.e .mwm n\x oonoumwp noanmEpoz on ad 1 (We 1 he who m6 ed m.“ NS H5 o.o Wtqqnq1111.nnn1<«l qa1_ L a i N. £26" > L l we PN/(x)u Airsusp uoxioata pazttemioN 86 .Hoccmnu 0:» :fl mopw Hmfiucouom exp :0 mnuvwz.am::m:u HmwprM acoummmflw mo uuowmm .HH.¢ .wflm fix 853me wmufimfiaoz 04 m5 2 2 05 m5 Yo 2 N5 2. o.o Tfi4.fi41!4uidfi1afi.fiu4-i-“1....‘6aW L m TL. 2 9 1 N. p 9 TL 9 L n l m 038nm L q. m 1. TL- L D d a w >82" >nw> L o. m ocqmmum m. L .rL M L m. m mfomum H 1 ”L .54 87 .Hmccmnu mcu :« coflusnfihumww achuumfio esp co mcpwwz Hoczwao Hmwuficfi ucohowwww mo puommm .NH.¢ .mflm n\x muqmpmflw woufiamshoz o.H m.o w.o n.o o.o m.o v.0 m.o N.o H.o o.o 11d . q 1‘ q 1%q4. « . q a . _ 1~ L 1N. 1v. L Lo. L La. L r: pn/(x)u Anxsuap nalnaete pazgtemon 88 density minima, it can be seen that any change in drain voltage or the position of pinch-off point does not alter the magnitude of diffusion current by any significant amount. This is precisely the property of a forward biased injecting junction. Near the source end of the channel, the current is predominently of the diffusion type. Hewever, at higher drain voltages the drain cur- rent is completely of drift type near the drain contact. Again the channel is never completely depleted of the mobile carriers. Figure 4.5 shows the channel shape with drain voltage. One observes that the channel width never reduces to zero; this is contrary to the gradual channel approximation theory. For low voltages the current control is through the channel width modula- tion. At higher drain voltages, the channel shape remains unchanged but the carrier density reduces. This is equivalent to channel length modulation. The shape and width of the channel drain end is almost independent of the drain voltage. This is different from the predictions of the gradual channel approximation theory whereby the channel width is always determined by the gate field. Figure 4.6 shows the carrier mobility with position (the zero value of mobility near the source contact is due to an error in the computer program; actual value can be obtained by extrapolating the curves). For the calculation of the results shown in Figures 4.1 to 4.12 the above effects are not taken into account. Therefore, the velocity saturation of carriers is not a factor in the saturation of drain current. ‘.. "‘Q- 89 Figure 4.13 shows the drain current variation with drain voltage. The method of analysis confirms the predictions of the gradual channel approximation theory below the pinch-off point. For Vd>vp non-zero conductance is self-evident; also, the conductance is larger than that predicted by the earlier models considered and is more near the values observed for the practical transistors. The near linear varia- tion of drain current, with drain voltage, is indicated by the denomi- nator of Equation (32), chapter 3. This factor is only influenced by the potential variation near the source; the contribution of the field near the drain contact being insignificant. {MWLGE zm- . . . a>\ U> nommfiocw Emup pouflmguoc o .m o .v o .m o .m. o A _ _ _ q _ owning game mumue> “confine Edna 2 .w. muswfim a a mfio> mom 4 u > .H enduoduum A; LT Olul “IO. 3 L Q1|l + (1| D o. Ila} a {[01 33> on A n > “H: ousuospum 0“ 0 9 a 33> ~26 u m o .o .N we 39.13de 1U811U3 UIEJp 91 4.2 Advantages of Present Theory The attempts at explaining the saturation current in FET's [1-12] centered around the classical model of the gradual channel approximation. This approximation, as explained earlier, is very satisfactory for Vd>10), is seldom met in practice. The major drawback in this approximation is in the fact that the space charge effects of the channel current and drain voltage are ignored. The "feedback" mechanism present due to this space charge controls the channel width (reduction of current reduces the voltage drop; hence, the bias on the gate junctions is lowered). In this analysis the current saturation is shown to be due to physical phenomena--space charge and applied accelerating fields rather than the geometry of the device. No voltage component in the channel is ignored. This is made possible by the solution of the two-dimensional Poisson's equation. The numerical method adopted here has the advantage of a large saving in the storage space required in the computer and hence the cxnmmatation cost; the storage space requirement is only one—fourth of that needed for the relaxation techniques. The method is par- ticularly suitable for small computers which are handicapped due to the memory space. gear-Ln“! . ..... ._-__n - w- 92 4.3 Disadvantages of Present Theory The present method consists of the analytical solution of the Poisson's equation for the applied voltages; this is convenient only for simple geometry. For more complicated geometry and boundary conditions the solution is very involved and a large number of addi- tional calculations is required for the construction of the voltage Pu function. . The solution of the transport equation, for the carrier density, in the form used here, requires the use of very large and very small j numbers. This problem is especially critical for Vd>2Vp. The Fourier's E series is not suitable for constructing the step-type drain voltage I boundary; an infinite number of terms is needed to do this near the gate end of the channel. Use of truncated Fourier's series results in the superimposed ripples on the voltage distribution. The channel width W(x) does not appear as a by-product of the solution but its judicious initial selection is essential for the faster progress of the iteration. Saving in the storage space is at the cost of increased compu— tation time. Also, the large number of mathematical functions needed is a drawback. However, by clever programming these functions need be called only once. 93 CHAPTER 5 SUMMARY AND CONCLUSIONS A research program was undertaken with the objective of dev- eloping a more accurate model to explain current saturation in field- effect transistors. In particular, we wished to uncover the principal phenomena responsible for current saturation in field—effect tran- sistors. Also, we wanted to develop a more exact model for the mechanism which tends to maintain the drain current at a mean constant value with drain voltage as well as the mechanism responsible for the non-zero slope of the drain-current versus drain-voltage charac- teristic. The field-effect transistor selected for analysis was schematically represented by two abrupt p-n junctions placed symmetrically with respect to the center of the channel. In order to simplify the mathe- matical formulation, the gate contacts were taken to overlap the source contact, and the gate and channel were assumed to be uniformly doped. Numerical solutions to Poisson's equation were obtained subject to certain restraints (See Sections 3.3-3.5) and the results were analyzed. The major conclusions drawn from the analysis are: l. The partial depletion of the channel (uniformly distributed impurity density) and the consequent spatial gradient of the majority current carriers is responsible for the current saturation. This is in striking contrast to the models of Kennedy [11] and Kim and Yang [16]. In their models the property of spatial distribution of the carriers was deliberately introduced by selecting special impurity density profiles in the channel. 94 Dependence of carrier mobility on the electrostatic field does not seem to play any significant part in the saturation of cur- rent. All the results presented in Section 4.1 have been obtained under the assumption that the carrier mobility is independent of the electric field. No accumulation of carriers has been observed in the channel and the electric field increases continuously from the source towards the drain. The channel cannot be regarded as neutral even for voltages less than the pinch-off value. With increasing drain voltage, the high-low junction near the drain electrode remains more or less fixed in position [Figures 4.3, 4.4 and 4.8]. The position of second high-low junction is a function of drain voltage and drain current. The slight increase in drain current, with increasing drain voltage, is due to the increase of diffusion gradient across this "junction" [Figures 4.4 and 4.8]. The movement of the carrier density minima with the increase of drain voltage, in the partially depleted region, towards the source is clearly noticed in these figures. Near the source contact the channel shape resembles the shape predicted by the gradual channel approximation theory. However, near the drain contact the channel width never reduces to zero and reaches a minimum value of the order of 2 Debye lengths. For narrow channels and voltages greater than the pinch-off value the channel shape is invarient with the drain voltage. 95 APPENDIX HIGH-LOW JUNCTIONS IN SEMICONDUCTORS High-low junctions arise due to a discontinuity in the impurity concentration in a semiconductor. Figure A1 shows a junction between a heavily doped material n+ and a lightly doped material n. The difference in concentration across the x=0 plane sets up a carrier [I concentration gradient. The electrons diffuse into the n~region causing an accumulation of electrons on the right side of the x=0 i plane. Equilibrium is established when the accumulated charges are balanced by the fixed positive charges of the impurity atoms. An accumulation layer adjacent to a positive space charge gives rise to an electric double layer. This layer impedes the flow of current through it and is thus equivalent to a junction. Such layers can arise in devices which have n+ type contacts. Contacts obtained by diffusing similar type impurity into a substrate are examples of this behavior. 96 t‘&:’~"u' ' - - Figure A. Electron concentration in a high-low junction. [1] [2] I3] [4] [5] [6] [7] [8] [9] [10] [11] [12] 97 REFERENCES Shockley W., "Unipolar Field-Effect Transistor", Proc. Inst. Radio Engrs., vol. 40, pp. 1365, 1952. Prim R.C. and Shockley W., "Joining Solutions at the Pinch- Off Point in the Field—Effect Transistor”, IRE Trans. Electronic Devices, vol. 4, pp. 1, 1953. wu S.Y. and Sah C.T., "Current Saturation and Drain Conductance of Junction-Gate Field—Effect Transistors”, Solid State Electronics, vol. 10, pp. 593, 1967. Grebne A.B. and Ghandhi S.K., "General Theory for the Pinched- Operation of the Junction-Gate Field-Effect Transistor", Solid State Electronics, vol. 12, pp. 573, 1969. Grosvaley J., Motsh C. and Tribes R., "Physical Phenomenon for Field-Effect Devices", Solid State Electronics, vol. 6, pp. 65, 1963. Ryabinkin Yu S., "Field-Effect Transistor Based on Field-Effect Theory", Radio Engineering and Electronics Physics", pp. 433, March 1968. Hauser J.R., "Characteristics of Junction Field-Effect Devices with Small Channel-to-Width Ratio", Solid State Electronics, vol. 10, pp. 577, 1967. Dacey G.C. and Ross I.M;, "The Field-Effect Transistor", Bell System Tech. Journal, vol. 34, pp. 1149, 1955. Dacey G.C. and Ross I.M., "Unipolar Field-Effect Transistor", Proc. Inst. Radio Engrs., vol. 41, pp. 970, 1963. Burger R.M. and Donovon R.P., "Fundamentals of Silicon Integrated Device Technology vol. II”, Prentice-Hall, New Jersey, 1968. . Kennedy D.P., ”Mathematical Investigation of Semiconductor Devices", Final Report (11), IBM, New York, April 1, 1967. Lade R.W. and Jordan.A.G., "On the Characteristics of High-Low Junctions Devices", Journal<1f.Electronics and Controls, vol. 13, pp. 23, 1963. [13] [14] [15] [16] 98 Kennedy D.P. and O'Brien R.R., "Computer Aided Two-Dimensional Analysis of the Junction Field-Effect Transistor", IBM J. Res. Develop., pp. 95, March 1970. Goldberg Colman, "Space Charge Regions in Semiconductors", Solid State Electronics, vol. 7, pp. 593, 1964. Mari A. De, "An.Accurate NUmerical Steady-State One-Dimensional Solution of the p-n Junctions”, Solid State Electronics, vol. 11, pp. 33, 1968. Choong-Ki Kim and Yang E.S., "An Analysis of Current Saturation Mechanism of Junction Field-Effect Transistors”, IEEE Trans. on Electron Device, vol. ED-17, pp. 120, 1970. flag lint.» bit-Ru. 24AM.“ h. .m . .. u‘, h