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'l" ' 3'1 1.,“ .} $35.... 4:15;.-. “busy—9L... 5I . IIII!,‘.,I'}, "“1" I} 1 I , m ‘ 74:22: . 53-1" :2: - “ggmtrr. _ _ w - ‘23:“--.‘_:‘~«-- .x‘ 9"“ 2111.21}"‘?‘ 345;. 11), THESIS-L L 1 B R A R Y Michigan $3” Univcmty ' This is to certify that the thesis entitled A DIGITAL ULTRASOUND SYSTEM FOR DATA COLLECTION IMAGING, AND TISSUE SIGNATURE ANALYSIS presented by Mark Robert Funk has been accepted towards fulfillment of the requirements for MS; degree in flag/4.0. / 5/0732”? D, /<1 mm Major professor Date 5'//6/78 0-7 639 A DIGITAL ULTRASOUND SYSTEM FOR DATA COLLECTION, IMAGING, AND TISSUE SIGNATURE ANALYSIS By Mark Robert Funk A THESIS Submitted to Michigan State University in partial fulfiiiment of the requirements for the degree of MASTER OF SCIENCE Department of Electricai Engineering 1978 ABSTRACT A DIGITAL ULTRASOUND SYSTEM FOR DATA COLLECTION, IMAGING, AND TISSUE SIGNATURE ANALYSIS By Mark Robert Funk This thesis describes the design and performance of hardware and software contained in a system used in digital ultrasonic tissue signature analysis and digital ultrasonic imaging. The basic hardware system consists of an ultrasonic pulser- receiver with piezoelectric transducer, an analog-digital converter with buffer memory, a peripheral controller, a block transfer controller for direct memory access, and a Varian 74 computer. Also a computer controlled step motor assembly is used in B mode scanning. Each of these system elements is controlled by two machine language system programs. Other software assigns gray levels to the data and displays the records as varying brightness levels on a Tektronix graphics termin— al, or finds the frequency spectrum of some portion of the signal by using a fast Fourier transform algorithm. Preliminary results of imaging and spectral analysis utilizing backscattered ultrasound are discussed for a few regions of the body and also for some non—biological materials. ACKNOWLEDGEMENTS I would first like to thank Dr. Donnie K. Reinhard whose support and initial confidence in me has given me the opportunity to gain invaluable experience. Secondly, I would like to acknowledge Phil Chimento as author of the memory map control program and program PLOTSZ; Bruce Johnston as author of program ULDIS; and thank Dave Gift, Bruce Johnston, and Phil Chimento for their patience in teaching me about computers. Dr. Gale Harris is also thanked for his guidance. I would also like to thank the Biomedical Research Support Group and the Radiology Department for my financial support and the support of the research. I would also like to acknowledge the work of my co-worker in this research, Usman Saeed. ii TABLE OF CONTENTS CHAPTER Page l. INTRODUCTION ............................................. l 2. SYSTEM HARDWARE .......................................... 4 Introduction .......................................... 4 The A/D Converter ..................................... 6 Digital Interface of the A/D Converter ................ lO Interfacing to the PMA BTC ............................ 13 Block Transfer Controller - Detailed Theory of Operation .......................................... 16 Basic System Operation and the Peripheral Controller.. 19 Ultrasonic Pulser—Receiver ............................ 27 Analysis of the Pulsar-Receiver Circuit ............... 30 B Mode Scanning ....................................... 37 Operation of the Step Motor Assembly .................. 4l 3. SYSTEM SOFTWARE .......................................... 43 Introduction .......................................... 43 System Control Programs ............................... 44 Memory Map Control Program ......................... 52 Time Delay Control Program for Use in B Mode Scanning ........................................ 58 A System Program to Read Disk 0 Records to Magnetic Tape ............................................... 6l Display Programs GRASCL and ULDIS ..................... 64 The Fast Fourier Transform Subroutine ................. 75 4. OPERATING THE ULTRASOUND SYSTEM .......................... 96 5. SYSTEM PERFORMANCE ....................................... l02 Introduction .......................................... l02 Metallic Plate ........................................ 103 String Phantom ........................................ lO6 Cardiac Data .......................................... l24 6. CONCLUSIONS AND AREAS FOR FURTHER RESEARCH ............... 139 REFERENCES ...................................................... l4l TABLE 2-1 3-1 3-2 3-3 3-4 3-5 3—6 3-7 3-8 3-9 3-10 LIST OF TABLES A/D Converter Interface Lines ............................. Program Program Program Program Program Program Program GRASCL--listing ................................... GRASCL--listing ................................... GRASCL-—listing ................................... GRASCL--listing ................................... GRASCL--listing ................................... ULDIS--listing .................................... ULDIS--listing .................................... Subroutine FTRANS--listing ................................ Subroutine FTRANS-—listing ................................ Subroutine FTRANS--listing ................................ Page 12 68 69 70 7l 72 73 74 84 85 86 LIST OF FIGURES FIGURE Page 2-l Ultrasound System Block Diagram ......................... 3 AD-l A/D Controller-~Front View .............................. 8 AD-2 A/D Controller--Rear View ............................... 9 2-2 Peripheral Controller ................................... 20 PR-l Pulser-Receiver Timer Circuit Diagram ................... 30 2-3 Pulser Receiver Circuit Diagram ......................... 3l PR-2 Trigger pulse E9 and charging of capacitor Cl, 5 volts/ div., .2 msec/div ....................................... 33 PR-3 El3 unattenuated transducer pulse, 50 volts/div., .l psec/div ............................................. 33 PR-4 Pulser-Receiver--Front View ............................. 35 PR-5 Pulser-Receiver--Rear View .............................. 36 2-4 Step Motor Control Logic ................................ 39 2-5 4 Phase Driver Card Circuit Diagram ..................... 40 3-6 Fast Fourier Transform Algorithm for N=8 ................ 80 3-7 Computer Flow Chart of Scrambling Algorithm ............. 81 3-8 Discrete Fourier transform of a 200 kHz square passed through a 1.8 MHz low pass filter ....................... 87 3-9 Discrete Fourier transform of a 400 kHz sin wave. Transform of 256 words .................................. 88 3-l0 Discrete Fourier transform of a 600 kHz sin wave ........ 89 3jll Discrete Fourier transform of a 400 kHz sin wave. Transform of 5l2 words .................................. 90 3-l2 Discrete Fourier transform of a l MHz sin wave .......... 9l FIGURE 3-13 3—14 3-15 3-16 5-1 5-2 5-4 5-5 5-6 5-8 5-9 5-10 5-11 5-12 5-13 5-14 5-15 5-l6 5-19 5-20 5-21 s-éz Discrete Fourier transform of a l.4 MHz sin wave ......... Discrete Fourier transform of a 1.8 MHz sin wave ......... Discrete Fourier transform of a 2 MHz sin wave ........... Discrete Fourier transform of a 3 MHz sin wave ........... Water bath with metallic plate reflector ................. Frequency spectrum of reflection from metallic plate ..... String String String String String String String String String String String Phantom ........................................... Phantom--B Phantom--B Phantom--B Phantom--B Phantom--B Phantom--B Phantom--B Phantom-~B Phantom—-M Phantom—-M mode mode mode mode mode mode mode mode mode mode display ........................... display ........................... display ........................... display ........................... display ........................... display ........................... display ........................... display ........................... display ........................... display ........................... Five Section Mapping Log and exponential mapping ......... Rectified String Data-~Log, linear, and exponential ...... Discrete Fourier transform of second string .............. Discrete Fourier transform of third string ............... Cardiac data--l MHz transducer ........................... Cardiac data-~lMHz transducer ............................ Cardiac data--lMHz transducer ............................ vi Page 92 93 94 95 '104 105 106 110 111 112 113 114 115 116 117 118 119 120 121 122 123 126 127 128 FIGURE Page 5-23 Cardiac data--lMHz transducer ........................... 129 5-24 Discrete Fourier Transform of heart segment ............. 130 5-25 Cardiac data--lMHz transducer, Linear mapping ........... l3l 5-26 Cardiac data--lMHz transducer, Log mapping .............. l32 5-27 Cardiac data--lMHz transducer, EXP mapping .............. l33 5-28 Cardiac data--3HMz transduver, Linear mapping ........... l34 5-29 Cardiac data--3MHz transducer, Log mapping .............. l35 5-30 Cardiac data--3MHz transducer, EXP mapping .............. l36 5-3l Cardiac data--3MHz transducer, Linear mapping ........... l37 5-32 Cardiac data--3MH2 transducer, Log mapping .............. l38 vii CHAPTER 1 INTRODUCTION The purpose of this thesis is to describe a hardware and software system for the gathering and utilization of digitized ultrasound data. The data is used in tissue signature analysis in an effort to determine the reflective characteristics of ultrasound in biological tissue. It is also used for ultrasound image generation. The core of the system is a Varian 74 computer (Figure l). Each of the elements of the system are peripherals of the computer in that they are controlled and/or syncronized by signals initiated by the com- puter. The system hardware consists of the Block Transfer Controller (BTC),1 the peripheral controller, the analog-digital converter2 with 2048 word memory, the pulser-receiver3 with ultrasonic transducer, the step motor controller with stepping motor assembly,4 and various signal shaping amplifiers. The collection, storage and manipulation of the data are con- trolled by the system software. There are currently two machine language control programs that are used in conjunction with the hard- ware, to input and store the data. One of these programs maps the data records into the maximum amount of memory possible prior to transfer to a mass storage device. The other is used to control the motion of the step motor assembly upon which the ultrasonic transducer is mounted, as well as input and store the data. After the collection of the data, it is output to the graphics terminal in a variety of ways. One set of programs outputs an entire 5 where each record appears data collection run to the graphics terminal, as a line with varying brightness. The brightness levels are dependent upon the amplitude of the reflected ultrasound. Another mode consists of displaying one record as it would appear on an oscilloscope and dis- playing the discrete frequency spectrum of some range within this record. _ mMHDmZOU <5 z wmozmz Dmo mz< I -____l Emummwn xooam Emumhm vasommuuam Hum ouamfim Illlll I. Ill 1 .IAI I..I l l auuafium use; _ _ _ mane _ oauwcwmz HHZD moH=mzoo Am3 coaumofimfifiaa< Hacwam a mm>Hmomm \mmmADm uwosvwcmufi CHAPTER 2 SYSTEM HARDWARE Introduction: This chapter describes in detail the operation of individual com- ponents of the hardware system, their use, and the signals passed between the elements of the system enabling the acquisition and transfer of the data. Storage of this data on a mass storage device will be described in Chapter 3. The components of the system that will be described are the Block Transfer Controller (BTC), the peripheral controller, the analog-digital converter, the pulser-receiver with ultrasonic transducer, and the step motor controller with step motor assembly, as shown in Figure 2—1. Each of these components are controlled by the computer through the BTC. The same signal that activates the BTC is used to enable the peripheral controller, arm the A/D converter, trigger the pulser- receiver, and to control the rotation of the step motor. Briefly, the function of each of these components is as follows: Block Transfer Controller: Acts to control the direct memory access of data. It is set up by software and data transfer takes place through a “handshaking” of signals between the BTC and the peripheral controller. Peripheral Controller: Acts to transfer data from the A/D con- verter to the BTC. It also transfers and translates signal between the A/D converter and BTC and passes signals to the other peripherals. Analog-Digital Converter: Takes an analog signal from the pulser— receiver and converts it to a discrete digital signal. The data is stored in a 2048 8-bit words memory prior to transfer. Pulser-Receiver: Pulses the ultrasonic transducer and receives and amplifies the resulting voltage signal produced by the reflected ultrasound. The rest of this chapter deals with the details of individual system components and their interaction. THE A/D CONVERTER Introduction: The analog to digital converter used is a Biomation Model 805 Waveform Recorder. As suggested by the name of the unit, its function is to convert a preselected portion of a time varying analog waveform to digital (binary) data. The digitized waveform is stored in a 2048 8-bit word memory. The A/D converter has the following features: 1) An analog signal reconstructed from the digital data may be viewed on an oscilloscope or CRT and may be magnified to show an expanded view of the signal. The same reconstructed analog signal may be used to produce a hard copy through the use of a Y-T recorder. The digital data stored in memory may be output directly to a computer for subsequent processing. Each word consists of eight binary bits, so the converter‘s resolution is l in 256. The conversion time is variable from .2 usec/word to lOO msec/ word in steps following the sequence 2, 5, lO. Conversion begins with some trigger signal. The trigger may be internal, some specified voltage level within the input signal, or external, some voltage pulse external to the input signal. Actual conversion may be delayed after the trigger by a trigger delay control. Delay times are in multiples of the conversion time. 6) The converter must be armed before triggering. Arming may take place automatically (Normal mode) or manually through a button on the front panel or a low digital pulse through the back panel connector (Single mode). Single mode is used when data is to be transferred to the computer. A full scale voltage control defines the voltage range that will be mapped linearly over the 256 discrete levels. Some baseline voltage (usually ground) may be adjusted to any dis- crete level by an offset control. za_> p:oem--20__ocpcoo Q\< ._-D< mesmem L 300 u: n c 1.; 1.6:; Citmzum COCOEQD 74m a... . «woos: .3wr> Lama--2m__0chou a\< .N-Q< mtzmwe -\»—..41-I.v0.'.9'vsw.v 0.3.1. 10 DIGITAL INTERFACE OF THE A/D CONVERTER The object of this section is to describe the means whereby data, stored in the 2048 word memory, is outputted. All signals described are to be found on the rear panel Amphenol connector. To output digital data, the converter must first be informed that the display mode must end and prepare to output the first word of memory. But first, any form of output can only begin after a recording period has ended. From the time of the trigger event to the time that the 2048 word memory has been filled, the recording period will last 2048 time intervals between sample events. During the time of the con- version, a signal called RECORD will be in the high TTL state of 5 volts. The end of the recording cycle may be sensed by a peripheral controller when the signal RECORD changes state from 5 volts to 0 volts. Now sup- pose that digital data is desired immediately after recording. An input signal OPT, which when grounded initiates the output of digital data, may be triggered off of the falling edge of RECORD. OPT, though, may be grounded at any time after the recording period has ended. This pro- vides the opportunity for viewing the recorded waveform (display mode) prior to outputting the stored digital data. With a grounded OPT, the first 8 bit word of data from memory, along with the corresponding memory location's ll bits, are placed on the output buffer. Further, the first signal FLG is raised to 5 volts within lO msec of OPT, indicating to the peripheral controller that the first word of data is prepared to be outputted. The peripheral 11 controller must sense this signal, accept the data, and request the next word from memory by grounding the input signal called WDC. WDC resets FLG. If OPT is still low, the converter will once again ready the data for output and raise FLG within a minimum of 2 usec. This process will continue until sufficient data has been transferred. Memory is not erased during this transfer so multiple transfers may take place with the same data or the same data may be displayed on an oscilloscope or plotter after digital transfer. The latter is due to the return of the display mode when OPT is no longer grounded. Data may be asynchronously taken from memory at a rate of 2 psec/ word to 500 psec/word without any waiting time for the data to recycle completely through memory. It may also be taken at rates l0.24 msec/ word or slower. The l0.24 msec is the time for the data to completely cycle through memory. Following is a summary of interface signals and data and their locations at the rear Amphenol connector. Table 2-1. Pin Number 50 output 7 input 45 output Signal Name 12 Description A/D Converter Interface Lines Signal is 5 volts whenever the unit is recordi ng. An input which, when grounded, stops the normal display and initiates the digital out- Converter must be in SINGLE put of mode. data. The FLG output indicates new data available at the output buffer when it makes a transi- tion from 0 volts to +5 volts. It is reset upon the next word command NDC. This input commands the successive digital words during output Arms the unit prior to triggering. Arming is obtained with a pulse from +5 volts to 0 volts. Digital Digital Digital Digital Digital Digital Digital Digital Memory Memory Memory Memory Memory Memory Memory Memory Memory Memory Memory data data data data data data data data output output output output output output output output output output output output output output output output output output output 20 L38 1 2 2 2 3 2 4 2 5 2 6 27 2 M58 LSB MSB 13 INTERFACING TO THE PMA BTC (Priority Memory Access Block Transfer Controller) Introduction: The function of the PMA BTC is to transfer large blocks of data at high transfer rates from a peripheral controller into or out of processor core memory. It also provides memory address control for each word of transferred data when data is organized into blocks of 16 bit words. Timing of each word into memory is dependent primarily upon the peripheral controller. Basic BTC Operation: The BTC operates between the peripheral controller and the PMA port to manage data transactions over the PMA bus and subsequently into core memory. To “activate" the BTC prior to each block transfer, the BTC is loaded with the initial and final memory address of the block transfer by program control. After activation, the peripheral controller must respond with a "connect" signal, which enables the peripheral controller to connect to the PMA port through the BTC. Transferance of data begins with the peripheral controller issuing a PMA Request, through the BTC, which is a request for the next memory cycle. When the memory has been captured from the CPU (Central Process- ing Unit), a PMA Acknowledge is returned to the BTC and peripheral con- troller. The memory then sits idle waiting for a PMA Go from the 14 peripheral controller. This signal is used to gate the data waiting to be written into memory. If data was waiting on the input lines at the time of PMA Request, the signal PMA Acknowledge may be used to drive PMA Go resulting in a minimum of delay. With each word inputted into memory, the BTC increments the register holding the initial memory address. When the initial address has been incremented to the value of the final address, the BTC will unconditionally disconnect from the peripheral controller. This pre- vents the peripheral controller from forcing the transfer beyond the program defined length. Another mode exists in which the data may be continuously in- putted without the need for separate memory requests for each word. This is the “hog“ mode. As long as the peripheral controller sustains its request it will receive consecutive memory cycles. This mode, though, has not been used due to the much slower rate of transfer pos- sible by the A/D Converter. In summary, the responsibilities of the peripheral and BTC con- trollers involved in the PMA Block Transfer are as follows: Peripheral Controller l. Determines the direction of transfer of data; either into or out of memory. Requests access to memory by requesting memory cycles. . Senses Acknowledgement of an available memory cycle. . Clock data into or out of memory via a PMA GO signal. 01-wa . Exchange data with the PMA data buffers in the BTC. 15 Block Transfer Controller 1. Controls and increments the l5 memory address lines into the PMA port. 2. Buffers one word of data during a PMA Read cycle to ease the timing requirements on the peripheral controller for clocking the data. 3. Buffers one word of data from the peripheral controller during a PMA Write to free the peripheral controller earlier in the PMA cycle. 4. Monitors the overall length of the block transfer and prevents the peripheral controller from forcing the transfer beyond its program defined length. WRITE ....... Data inputted to memory READ ........ Data outputted from memory 16 BLOCK TRANSFER CONTROLLER BTC Detailed Theory of Operation Before the BTC may be used in the transfer of blocks of data, it must first be initialized, have its initial and final address registers loaded, and be activated, all under software control. The initial and final registers represent the portion of memory that the block data will be transferred to. So, given an initial address in a free portion of memory and a block of data 2048 words long, the final address must be 2047 greater than the initial address. The reason for this will be explained below. Executing the “Active Enable” command sets the ACTIVE+ Flip/Flop.6 The inverted Q output of this Flip/Flop is the peripheral controller connect signal DCEX-. As a response to DCEX-, the peripheral controller must return a signal CDCX- and CREAD+. CDCX- indicates to the BTC that the peripheral controller is connected to and under the control of the BTC. CREAD+ is an input signal which allows data to be written into memory rather than read out of memory. The transfer of data into core memory is accomplished through the "handshaking” of signals CREQ-, CACK-, and CGO-. The signal CREQ- indicates to the BTC that the peripheral controller is requesting a PMA (Priority Memory Access) cycle. The PMA then "locks'l the Central Processing Unit out of core memory with the next memory cycle. The PMA has—the second highest computer system priority. The PMA requests are, however, ignored in the case of power failure. 17 Upon receiving an acknowledgment of memory access, the PMA passes the acknowledgment on to the BTC as PACK-, which is passed on to the peripheral controller as CACK- (Controller Acknowledge). The BTC uses PACK- to gate the core memory address of the data to be transferred unto the 20-bit address bus. The peripheral controller, upon receiving CACK-, clears its request CREQ- for a memory cycle. It then generates a signal CGO-, which is used to clock the data waiting on the peripheral controller unto the PMA data bus. Relative to the BTC, each new address of a core memory location is the initial address of the block transfer. At the trailing edge of the PMA acknowledge signal PACK-, that is, after the data has been clocked unto the PMA data bus, the initial address register is incremented by one to the next memory location. The initial and final addresses are constantly compared by the "End of Block" comparitor.6 When the initial is equal to the final address, EOB+ is raised to true. This indicates that one more transfer is to take place. Term EOB+ will allow the setting of the LAST+ Flip/Flop at the trailing edge of the next con- troller go signal CGO-. When the LAST+ Flip/Flop is set, the proper number of words have been transferred and LAST+ will reset the ACTIVE Flip/Flop. When the ACTIVE Flip/Flop is reset, DCEX- goes high and its inverse DESX- goes low and is used by the peripheral controller as a controller disconnect signal. The PMA can handle four BTC's and therefore four data channels, four acknowledge and four request signals. So the device address of the BTC to be used must be specified by software. Each BTC contains two 18 device addresses. The first BTC would have addresses 20 & 2l; the second 22 & 23; etc. The Mnemonic, Octal Code and Description of Software Commands of particular interest are listed below.7 The x is an even number and y = x + l. Mnemonic Octal Code Description EXC OO2y l0002y Initialize BTC 0BR 02x l0322x Load BTC initial address register 0BR 02y l0222y Load BTC final address register EXC 002x l0002x Activate BTC 19 BASIC SYSTEM OPERATION AND THE PERIPHERAL CONTROLLER Prior to this point, a discussion of the signals present within the Analog-Digital Converter (A/D) and the Block Transfer Controller (BTC) was presented. In both discussions, a peripheral controller was referred 1K) as residing between the converter and the BTC. This con- troller was expected to pass data, interpret signals and take some further action, and translate signals from/to the BTC, which is ground true, to/from the A/D converter for interpretation within these units. The controller was designed and built by the author and is shown in Figure 2-2. It is desirable to have all of the units comprising the ultrasound system controlled, or at least initialized (to be kept in syncroniza- tion), by the computer and an operator stationed at a computer terminal. The signal chosen for syncronization is DCEX-, the activate controller signal. A basic system consists of the BTC (and computer), the peripheral controller, the A/D converter (with 2048 word buffer memory), and the Pulser/Receiver with an ultrasonic transducer (Fig 2-1)- In this sys- tem, the change of state of DCEX- accomplishes two things. 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'2. :c .«a . 5 >20 I .I -1: ilz..:v...13 a5... .52. .a:t..v .ql‘. ...:.. fulfil . 41 £3- to a .1 all $303.13 3.9:..- i u a .D u... ”0.11 IRE-I .0. .6. . — a _ a — c a a — o — s a o a o — o. — = — a. a a. — 3 fl 0. H O. 32 biased, effectively Q1 from the circuit. So Cl begins charging through R1, R2, and R3. Since Cl does not discharge through R2, the width of the pulse appearing at E9 is not dependent upon R2 (the repetition rate control) (see Figure PR-2). But since Cl charges through R2, tc, and therefore the repetition rate, are dependent upon R2. The 8 volt pulse, seen at E9, is attenuated by l/3 by R7 and R8 and introduced as a switch on pulse at SCR Q4. In external mode, a digital 5 volt pulse drives the 50 ohm and is also attenuated by R7 and R8, turning on Q4. Turning Q4 on, effectively introduces a short to ground, causing the cathode of QB to approach ground. C4 momentarily holds the trigger of Q3 high, turning on Q3. Similarly, Q2 turns on, allowing a path to ground in order to discharge C10. The voltage at the anode of SCR Q2 causes the voltage at E13 to fall from +1.1 V to —300 V as seen in Figure PR-3, on the following page. E 13 rises toward ground as the capacitor(s) discharge. The width of the pulse is determined by capacitors C7-C9, i.e., the greater the capacitance, the greater the discharge time. This pulse, slightly attenuated, is the pulse seen by the ultra— sonic transducer. The purpose of diode CR4 and resistors R15-l6 and R19-20 are to isolate the pulser portion of the circuit from the trans- ducer after pulsing. The biasing voltage of E13 allows a greater dynamic range on positive going echos received by the transducer. 33 Figure PR—2. Trigger pulse E9 and charging of capacitor C1, 5 volts/div., .2 msec/div. Figure PR-3. El3 unattenuated transducer pulse, 50 volts/div., .1 psec/div. 34 The purpose of diodes CR5-8 is to protect the amplifier circuit from to large voltages either positive or negative. So some large signals may not be faithful representations of the echoed signals. This appears to be the reason for the specifications of the Model 5050PR calling for limiting output signals to less than :_l.O volts. .3ww> pcosmticw>wooomicwWF3m .eima mgzm_m 36 '55.- I 7. t.- .. a muiZ;... 37 B MODE SCANNING The B mode is characterized by a moving ultrasonic transducer. For this system, the transducer is moved in steps of constant increments after each data taking sequence. The lateral motion is produced by a stepping motor which rotates in steps of 5°/step. Translation to lateral motion is accomplished by connecting the step motor to a helix screw and nut. The threading of the screw produces motion equivalent to 1.0 inch/revolution or approxi- mately 1 mm per 3 steps. The step motor is a 4 phase variable reluctance step motor. That is, the motor is stepped by applying current through particular coils as given by the following table: ‘ STEP NO. BROWN RED ORANGE YELLOW 1 ON ON 2 ON ON 3 ON ON 4 ON ON This is accomplished by applying digital pulses to appropriate inputs of the 4 phase driver card MCS-l823/MCS-1825. The ON in the above table refers to the state of the Darlington pair output transis- tors. Referring to the circuit diagram of the 4 phase driver card, clockwise rotation of the stepping motor is produced by applying ground true pulses to inputs 5 and 6. Counterclockwise rotation is through 38 ground true pulses at inputs 3 and 4. The logic that interfaces between the peripheral controller and the 4 phase driver card is shown in circuit diagram 2—4 , and was designed by the author. The incremental distance moved between each data taking sequence is programmable by a set of 5 switches. Each switch in the true state represents approximately 1 mm. The falling edge of DCEX- is used to clock the T Flip/Flop in the upper left of the circuit diagram. Its purpose is to insure motion on every other DCEX. The Q'output of this Flip/Flop and the low state of DCEX- allows the clocking of 2 8-bit shift registers. Whatever is loaded into the shift registers by the distance controlling switches, is shifted out of the shift registers, enabling the an AND gate. As long as a high state is shifted out of the shift registers, the driving clock pulses the clockwise input to the driver card. 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IUD d: I 2.5 It :3: an: as a 3.0 tune a... gu o =- 5. 2: §# .9. 8 :- nn 8. t =- I an «:0 a: u.— swank” 8 5.8551 5.»? .Emcmmwo upsucwo ucmo sw>weo omega a 'T anon 8 66.. an... 8 ESEEEXIA an» I: i 8.5.. a I: «Nonl— 0:0 ova-Eu 8 A 8:. aux“ n 2 Iv Unu O E o 3.3 :m 2;: “"2: 6.8 4: B a. in eh — .PAWWI KG— .5: .98 4: 8 «a. nu.— uh “wuoé find : E2 >no 5n u: n8. no N ("a bug .m-~ eesaeu m WAINSE In.“ a. Q m2“. w w 4 VIC Se: v n Ia: Iné Nd > o uuuw V o I: Mné u: H .5. w I .66 ion. >3 5 2. ”an. .a 2 n NO #0 O. 41 OPERATION OF THE STEP MOTOR ASSEMBLY This section describes the basic operation of the step motor assembly. The circuitry is driven by two power supplies. One, at 5 volts for driving and pulsing and switching logic on the control board and driver card, and the other capable of driving 3 amps at on the order of l0 volts. The latter is necessary to drive the step motor at 625 Hz. The value of 625 Hz was chosen to allow for up to 15 step pulses within a period of 30 msec. The 30 msec represents the length of time that DCEX+ is true during a period of time delay and should also represent a new record being taken on the order of every 50 msec. The control board has been designed to include a manual mode. Holding the momentary switch in its forward position will drive the transducer mounting forward and the reverse position of the switch will drive the mounting backward. This mode is for positioning prior to a data taking run. In order to have the step motor system controlled by the computer, a signal DCEX+ must be connected from the peripheral controller to the step motor control circuitry. This signal is an inverted DCEX- and is used to clock the motion/motion'Flip/Flop and enable the switch programmed logic which is driving the step motor. Each distance programming switch represents l.096 mm when in its true state. The states held by these switches are loaded into the parallel-load shift register on the rising edge of DCEX+. Each switch 42 holds the equivalent of three clock pulses to the step motor. Prior to any data taking run, set the switches to the distance that the trans- ducer is to be moved per run. That is set one switch into its true state for each 1 mm of distance. As a note of caution, the motor driving power supply should only be on during the time that the transducer is to be moved whether it is moved in manual mode or during data runs. The driver card logic is such that two of the motor inputs are drawing current all of the time. This results in a heat dissipation problem and subsequent failure of the step motor. Future work needs to be done on the transducer mounting. The translation of rotational motion into lateral motion during a rotational pulse (5? in l.6 msec) results in unacceptable vibration of the trans- ducer during the time that it is receiving the ultrasonic reflected signal. The mounting now consists of a support with two bolts applying tension to minimize the vibration. But this applies stress to the helix screw and therefore more current is needed to drive the step motor. CHAPTER 3 SYSTEM SOFTWARE Introduction: This chapter describes a set of programs which aid in the input and storage of digitized ultrasound data or manipulate and display the data in an effort to determine the characteristics of the tissue being analyzed, or generate an image. Two of the programs described are in machine language. They are used to control the system and store the data. These programs do no data manipulation. The other programs are in FORTRAN. Programs GRASCL and ULDIS assign brightness levels to the digitized ultrasound data and display this data on the Tektronix graphics terminal. Routine Ftrans determines the frequency spectrum of some portion of a data record through the use of a fast fourier transform algorithm and is included in a program called Plots 2 written by Phil Chimento. 43 44 SYSTEM CONTROL PROGRAMS There are two machine language programs which initialize, syncron- ize and control the transfer of data. Both, through the system hardware, instruct the BTC as to how much data is to be transferred, where to put it in core memory, when to start the transfer, and instruct the BIC (Buffer Interlace Controller) as to how much data in core memory is to be written out on magnetic tape. The first of these programs, referred to as ”memory map",*is used when large amounts of data is to be taken in the shortest possible time. This program maps the data transferred through the BTC into up to l6O K words of memory, transferring this data to a mass storage device, in this case magnetic tape. Later versions of this program may transfer this data to a mass storage device out of one portion of memory while data is being transferred into another portion of memory from the A/D converter. This would effectively increase the memory size. If the mass storage device had a transfer rate greater than the input transfer rate («:20 msec/record), the effective memory would only be limited by the storage capacity of the mass storage device. The rotating disks have a maximum transfer rate of l56 K words/sec or 3l20 words/20 msec. So, it may be possible to transfer up to three l024 word records in the time it takes to gather and transfer one record into the BTC and core memory. The problems and possible solutions in this system will be discussed later. *Nritten by Phil Chimento. 45 The second program, referred to as "time delay control", will be used whenever the ultrasonic transducer is driven by the step motor assembly. In this instance, a time delay must be initiated every other time that the BTC is activated. This time delay is used to hold the Activate Enable signal, DCEX-, true for up to 30 msec. This is the period over which the step motor will move the transducer to the next position prior to taking the next record of data. The operation of the time delay program will be studied rather than the memory map program, as it is relatively straight forward and contains the essential information in understanding the controlling software. Our first attempts to write a system control program resulted in failure due to restrictions within VORTEX,8 the operating system of the Varian 74 computer. As an example of why, the statements OAR 24 and OBR 25, which would have loaded the BTC with its initial and final address registers, resulted in errors when written in assembly. These statements had to execute in a portion of memory restricted by VORTEX. Therefore it became necessary to write the program in machine language and enter the program in octal. So the listing of the program shows the absolute memory address and the octal code, with the mnemonic and comments included for interpretation. Throughout the program, a number of bookkeeping operations are taking place. One example is making certain that the correct number of records will be collected in a given run. As the operations occur, they will be for the most part ignored in this discussion. 46 l) The time delay program begins a memory location lOOO all 8( numbers in this discussion will be in octal). First, the program dis- ables all of the Priority Interrupt Modules. Doing this makes certain that no peripheral device, aside from the BTC, interrupts the normal operation of this data gathering system. 2) The BTC is initialized in address l0l3. This resets DCEX-, ' if true, and initializes the control logic of the BTC. 3) The key bit is loaded into the BTC indicating which level of core memory that data is to be transferred to. 4) OAR 24 and OBR 25 load the values in the A and B registers into the initial and final registers of the BTC. As each word is transferred from the A/D converter through the BTC, the initial address register is incremented by one until it is equal to the final address. When this occurs, the BTC goes "not active”, resetting DCEX. 5) Loading the initial and final address register allows the soft- ware to issue an EXC 24, an Active Enable, which activates the BTC and causes DCEX- to go true, initiating the transfer of data. If this in- struction has been executed an even number of times, as accounted for in memory location l003, execution jumps to the time delay routine. If not, the program loops until the correct number of words have been transferred. This resets DCEX causing the BTC to go not busy. Note: Once DCEX is issued, the number of words transferred and also the transfer rate is no longer under software control. So the program loops, sensing to see if the BTC is still busy transferring data. 47 6) At address lOSO, preparations are made to transfer this single record of l024 words onto magnetic tape. EXC2 llO selects the first, and for this system only, tape unit as the output device. 7) If the tape unit and BIC are sensed to be not busy, the BIC, just as the BTC, is initialized, loaded with the initial and final addresses of the data to be transferred, and activated. 8) The entire single record is written out on magnetic tape with no marks made to separate sequential records. Just as the BTC, the transfer of data by the BIC is independent of software once the transfer begins. 9) While data is being transferred out on tape, execution returns to memory location lOl3 which reinitializes the BTC. lO) The same steps are followed as in the preceding case, but now, after "Activate Enable", execution jumps to the time delay routine at address l156. This changing state of DCEX- sets the "inhibit Flip/Flop” on the peripheral controller, inhibiting data transfer. Therefore, the initial address register is not incremented toward the final address register and DCEX- is held true until the BTC is reinitialized. ll) The time delay routine first resets the free running counter and then loops, calling the value of the counter with each loop. The counter is incremented each .1 msec. The routine determines if the delay of 30 msec has passed by comparing the value of the counter with 4548, stored in location ll6l., If the time delay has passed, the time delay routine reinitializes the BTC, resetting DCEX. 48 12) Execution then returns to address 1102 and the BIC is inter- rogated to determine if the transfer of data onto the magnetic tape had been completed. 13) If the correct number of records have been transferred, as specified in address 1125, an End-of-File mark is written on the tape. 14) The tape is rewound and the program halts at address 1155, if the transfer of all the records was correct. If execution was incorrect, the program may halt at 1047, indicating an abnormal BTC stop, or at 1135, indicating a BIC error, or at 1136, indicating an error in the transfer of data onto tape. This program and the memory map program are stored on tape. They may be placed in memory prior to execution through the use of AID 11. Once in memory, the program is executed by typing 61000. at the CRT. Transfers of information onto or out from the rotating disks while under the control of the operating system VORTEX are accomplished by specifying the file name and logical unit number. VORTEX takes this information and translates it into platter number, track number and sector number and passes this information to the disk controller. The disk controller then moves the I/O head to the desired position and enables the data transfer. If the ultrasound operating system is to transfer its data onto a specific file, it must also determine the physical location of the start of the desired file. But the location of the file is a logical function of VORTEX, so the position of each disk file is unknown. 49 A possible future solution is to have a formatted but otherwise empty disk dedicated to acting as the output device rather than magnetic tape. In this way, the track and sector address may be speci- fied by the ultrasound operating system and the data could be trans- ferred to this high speed storage medium in a completely known manner. After sufficient data has been transferred and stored on disk (up to 2.3 Mwords), the process could be reversed. The data on disk could be output to core memory and from core memory onto tape, placing end-of—files where desired. VORTEX, or specifically the input-output utility program IOUTIL,1O could then be used to transfer this data to the known disk files for use by the FORTRAN display programs. The system may be tedious, but it bypasses the need to determine the manner in which VORTEX translates the information it has on the position of the disc files into track and sector numbers. As a first step in the realization of this possible alternate system, consider the machine language program which reads all of the records of disk 0 and transfers the information to magnetic tape. This program is similar to one which would be used to write data from memory to disk. The major difference would be to use EXC 117, select write mode and connect BIC, rather than EXC 17, select read mode and connect BIC. To aid in the understanding of the disk and disk controller, this discussion will step through and explain the important portions of the program. 50 1) As in the other system programs, the priority interrupt modules are disabled. I 2) The control logic of the disk controller is reset. Controller 17 is the controller for Unit O/Platter l. 3) The disk is recalibrated. That is, timing circuitry of the controller is syncronized with the rotating disk. 4) The control logic of disk BIC 51 is set up. The BIC operates essentially in the same manner as the magnetic tape BIC and the BTC. The BIC is initialized, the map key is loaded, and the initial and final memory addresses are loaded. 5) In this program, an entire cylinder will be output. There are 406 available cylinders per platter. Each platter consists of two tracks, one on top of the platter and one below. Each track consists of 24 sectors of 120 16-bit words each. So the total number of words to be transferred is 5760. 6) Now the read/write heads must be positioned over the correct cylinder. This is done by first putting the disk controller in seek mode (EXC 217) and then outputting a set up word consisting of unit number, platter number and cylinder number. 7) After the heads have been correctly positioned, the controller is placed in sector mode, after being told to search for sector 0. 8) The BIC is activated (EXC 50) and the disk controller is placed in read mode and connected to the BIC (EXC l7). 9) When sector 0 has rotated under the read/write heads, the transfer of data through the BIC into memory begins. 51 10) When the entire cylinder is read, the magnetic tape BIC is set up and the data, now stored in memory, is transferred to tape. 11) If the last (40610) cylinder has been read and transferred, an end-of-file mark is written on the tape. Otherwise, no mark is placed on the tape, distinguishing one cylinder from amother. Following is a listing of memory map, time delay control, and the alternative program described above. ADDRESS 1000 1001 1002 1003 1004 1005 1006 1007 1010 1011 1012 1013 1014 1015 1016 1017 1020 1021 1022 1023 1024 1025 1026 1027 .1030 1031 1032 1033 1034 1035 1036 1037 1040 1041 1042 1043 1044 1045 1046 1047 OCTAL CODE 002000 001122 002000 001170 002000 001270 101024 001013 005000 001000 001006 101025 001334 001334 001116 005111 006057 001115 006017 001116 006120 002000 006057 001116 006130 043777 001016 001004 006017 001121 104046 001016 001043 001000 001002 002000 001122 006010 000052 006057 MEMORY MAP CONTROL PROGRAM MNEMONIC JMPM JMPM JMPM SEN 024 NOP JMP 1006 SEN 025 LDAE IAR STAE LDAE ADDI STAE ERAI JANZ LDAE EXC2 046 JANZ JMP 1002 JMPM LDAI STAE COMMENTS Jump to the initialize routine Jump to the map load routine Jump to the BIC set up routine Sense BTC not busy Sense abnormal stop Load A with final register value Increment to form the new initial reg. Store in initial register position Load with final register value Increment final register value by 10008 Store new final register value Test to see if new map load is needed Loop for another BTC transfer Load A with termination flag Set map to inactive state Are we through inputting data 00 a map reload Jump to initialize routine Load A with BIC device address Store BIC device address ADDRESS 1050 1051 1052 1053 1054 1055 1056 1057 1060 1061 1062 1063 1064 1065 1066 1067 1070 1071 1072 1073 1074 1075 1076 1077 1100 1101 1102 1103 1104 1105 1106 1107 1110 1111 1112 1113 1114 1115 1116 1117 OCTAL CODE 001120 104110 002000 001170 002000 001270 100210 101210 001064 005000 001000 001057 101053 001335 006017 001116 005111 006057 001115 006017 001116 006120 001000 006057 001116 006130 043777 001016 001054 006017 001121 001016 001114 104046 001000 001052 000001 000000 000000 000000 MNEMONIC EXC2 110 JMPM JMPM EXC 210 EXC2 210 NOP JMP 1057 SEN 053 LDAE IAR STAE LDAE ADDI STAE ERAI JANZ LDAE JANZ EXC2 O46 JMP 1052 HLT 1 53 COMMENTS Select tape unit one Jump to memory map reload Jump to BIC setup Write one binary record on 1024 words Sense tape unit ready Loop until the tape stops Sense I/0 error Load final register value Increment final value to form new Store in initial register location Load final register value Increment be 10008 Store new final register value Test to see if a new map load is needed Loop to BIC setup Load termination flag Are we done? Map to inactive mode Loop to memory map reload Good halt 54 ADDRESS OCTAL CODE MNEMONIC COMMENTS 1120 000000 1121 000000 1122 000000 1123 104746 EXC2 746 Disable Memory protect 1124 100444 EXC 444 Disable Priority Interrupt Modules 1125 006010 LDAI Load A with first system page 1126 001000 1127 006057 STAE Store first system page 1130 001500 1131 005111 IAR Increment first page number 1132 006057 STAE Store second system page 1133 001501 1134 005001 TZA 1135 006057 STAE Store key 1136 001117 1137 006010 LDAI Load the number of pages to use 1140 000500 1141 006057 STAE Store the number of pages 1142 001261 1143 006010 LDAI Load beginning page 1144 001077 1145 006057 STAE Store beginning page 1146 001541 1147 006010 LDAI Load BTC device address 1150 000024 1151 006057 STAE 1120 Store BTC device address 1152 001120 1153 005001 TZA 1154 006057 STAE Zero out termination flag 1155 001121 1156 006057 STAE Zero out the page count 1157 001261 1160 103046 OME 46 1161 001265 1162 006037 LDXE 1163 001122 1164 006705 IJMP 1165 000000 1166 000000 1167 000000 ADDRESS 1170 1171 1172 1173 1174 1175 1176 1177 1200 1201 1202 1203 1204 1205 1206 1207 1210 1211 1212 1213 1214 1215 1216 1217 1220 1221 1222 1223 1224 1225 1226 1227 1230 1231 1232 1233 1234 1235 1236 1237 OCTAL CODE 000000 006010 002000 006057 001115 006120 000777 006057 001116 006037 001541 005144 006020 000002 006076 001500 005122 005144 005021 006130 000042 001016 001206 006010 000040 . 006127 001261 006057 001261 006130 000500 001016 001234 005211 006057 001121 104446 103046 001262 103046 MNEMONIC LDAI STAE ADDI STAE LDXE IXR LDBI STXE IBR IXR TBA ERAI JANZ LDAI ADDE STAE ERAI JANZ CPA STAE EXC2 BUF, B 040 446 OME 46 OME 46 55 COMMENTS Map reload routine Load A with BIC initial Address reset Store BIC initial address Add to form BIC final address Store BIC final address Load beginning page Increment for new start page Load B with first buffer address Indexed store in buffer Increment index Increment page Check for end of buffer Loop if not end of buffer Load A with the number of pages used in this load Add increment to the number of pages Store the new page count Check the number of available pages If not, do not set flag Set term flag Store term flag Reset DMA logic Output I/O write control Output buffer address ADDRESS 1240 1241 1242 1243 1244 1245 1246 1247 1250 1251 1252 1253 1254 1255 1256 1257 1260 1261 1262 1263 1264 1265 1266 1267 1270 1271 1272 1273 1274 1275 1276 1277 1300 1301 1302 1303 1304 1305 1306 1307 OCTAL CODE 001263 103046 001264 104346 101046 001244 101146 001336 104146 006037 001170 006705 000000 000000 000000 000000 000000 000000 110000 001500 140042 040040 000000 000000 000000 006017 001120 006110 100000 006057 001330 005111 006057 001320 006110 003000 006057 001324 006057 001326 MNEMONIC OME 46 EXC2 346 SEN 46 SEN 146 EXC2 146 LDXE IJMP IDAE ORAI STAE IAR STAE ORAI O STAE STAE 56 COMMENTS Output wohd transfer function Start DMA transfer Sense DMA busy Sense DMA error Load X with return address Return jump Page count I/O write control Buffer address Word transfer function Write key control Load BIC device address Form BIC initialize command Store BIC initialize command Form OME commands ADDRESS 1310 1311 1312 1313 1314 1315 1316 1317 1320 1321 1322 1323 1324 1325 1326 1327 1330 1331 1332 1333 OCTAL CODE 005311 006057 001321 006130 003300 005111 006057 001323 001115 001117 001116 006037 001270 006705 57 MNEMONIC DAR STAE ERAI IAR STAE EXC 02(X+l) OME 02X EXC 032(x+1) OME 02(X+l) OME 02(X+l) EXC 02X LDXE 1270 IJMP COMMENTS Load initial register command Form enable key load command Store enable key load command Initialize BIC Output initial register Enable key load Output key bits Output final register Activate BIC Load return address Return ADDRESS 1000 1001 1002 1003 1004 1005 1006 1007 1010 1011 1012 1013 1014 1015 1016 1017 1020 1021 1022 1023 1024 1025 1026 1027 1030 1031 1032 1033 1034 1035 1036 1037 1040 1041 1042 1043 1044 1045 1046 1047 58 TIME DELAY CONTROL PROGRAM FOR USE IN B MODE SCANNING OCTAL CODE 100444 005001 006050 000000 051133 051134 101024 001013 005000 001000 001006 100025 006020 000000 100325 103125 006010 001200 006020 003177 103124 103225 041003 021003 100024 006460 001156 101024 001040 005000 001000 001033 101025 001047 011133 005111 051133 001000 001050 000001 MNEMONIC EXC 444 ZERO A STAI STA STA SEN 24 NOP JMP 1006 EXC 025 LDBI 0 EXC 325 OBR 25 LDZI LDBI OAR 24 OBR 25 INR 1003 LDB 1003 EXC 24 BT 60 SEN 24 NOP 0MP 1033 SEN 25 LDA IAR STA JMP 1050 HLT 1 COMMENTS Disable all Priority Interrupt Modules Initializes the counting addresses Address of delay/not delay Initialize the record receive count Initialize the record stored count Sense BTC not busy Jump address Loop till BTC ready Jump address Initialize BTC Load B reg/map key Map key Enable loading of key register in BTC Load BTC key register Load A/initial buffer address Initial buffer address Load B/final buffer address Final buffer address Load BTC initial address register Load BTC final address register Increment address 1003 Load B with 1003 Active Enable DCEX Test bit 0 of 1003 and jump if zero Jump address of time delay routine Sense BTC not busy Jump address Loop until BTC not busy Loop address Sense BTC abnormal stop Bad halt jump address Load A/record received count Increment record count Restore record count Jump to store data on tape Jump address Bad halt, abnormal BTC stop ADDRESS 1050 1051 1052 1053 1054 1055 1056 1057 1060 1061 1062 1063 1064 1065 1066 1067 1070 1071 1072 1073 1074 1075 1076 1077 1100 1101 1102 1103 1104 1105 1106 1107 1110 1111 1112 1113 1114 1115 1116 1117 OCTAL CODE 104110 101210 001056 005000 001000 001051 101052 001063 005000 001000 001056 100053 006010 000000 100353 103153 006010 001200 006020 003177 103152 103253 100052 100210 001000 001013 101052 001107 005000 001000 001102 101210 001114 005000 001000 001107 101053 001135 101010 001136 MNEMONIC EXC2 110 SEN 210 NOP JMP 1051 SEN 52 NOP JMP 1056 EXC 53 LDAI EXC 353 OAR 153 LDAI LDBI OAR 52 OBR 53 EXC 52 EXC 210 JMP 1013 SEN 52 NOP JMP 1102 SEN 210 NOP JMP 1107 SEN 53 SEN 10 59 COMMENTS Select tape unit 1 Sense tape unit ready Jump address if ready Loop till unit ready Loop address Sense tape unit BIC not busy Jump address if not busy Loop till BIC not busy Loop address Initialize BIC Load A register/map key Map key Enable loading of map key Output key to BIC Load initial buffer address Address of first word Load final buffer address Address of final word Output initial address Output final address Activate BIC Write one binary record of1024 words Jump to RTC routine via initialize BTC Jump address Sense BIC not busy Jump address if not busy Loop till BIC not busy Loop address Sense tape unit ready Jump address if ready Loop till tape unit ready Loop address Sense BIC abnormal stop Jump address of Halt 3 Sense tape error Jump address of Halt 4 ADDRESS 1120 1121 1122 1123 1124 1125 1126 1127 1130 1131 1132 1133 1134 1135 1136 1137 1140 1141 1142 1143 1144 1145 1146 1147 1150 1151 1152 1153 1154 1155 1156 1157 1160 1161 1162 1163 1164 1165 1166 OCTAL CODE 031134 005144 071134 005041 006130 000144 001010 001137 001000 001006 000002 000000 000000 000003 000004 100410 101210 001145 005000 001000 001140 005000 005000 100710 101210 001155 005000 001000 001150 000005 100047 102547 006140 000454 001004 001157 100025 001000 001102 MNEMONIC LDX IXR STX TXA ERAI JAZ JMP HLT HLT HLT EXC SEN NOP JMP NOP NOP EXC SEN NOP JMP HLT EXC CIA SUBI JAN EXC JMP 1006 3 4 410 210 1140 710 210 1150 5 47 47 1157 25 1102 60 COMMENTS Load record count Increment count Restore count Transfer X to A Exclusiv 0R/Maximum record count Maximum record count of 100 0‘ If all records input, DONE jump Jump address Start over to input next record Jump address Address of record received count Address of record stored count Bad halt, BIC stop Bad halt, tape error Write End-of-File mark on tape Sense tape unit ready Jump address Loop till file mark completed Loop address Rewind tape Sense tape unit ready Jump address Loop till rewound Loop address Good halt Clear FRC Free running counter Input FRC to A register Subtract time delay immediate from A Time delay 30 milliseconds Jump if time not up Loop address Reinitialize the BTC Raise DCEX- Jump to see if tape ytansfer complete Jump address ADDRESS 1000 1001 1002 1003 1004 1005 1006 1007 1010 1011 1012 1013 1014 1015 1016 1017 1020 1021 1022 1023 1024 1025 1026 1027 1030 1031 1032 1033 1034 1035 1036 1037 1040 1041 1042 1043 1044 1045 1046 1047 A SYSTEM PROGRAM TO READ DISK 0 RECORDS TO MAGNETIC TAPE OCTAL CODE MNEMONIC 100444 EXC 444 100417 EXC 417 006010 LDAI 020000 100717 EXC 717 103117 OAR 005007 Zero 005041 TXA 006130 ERAI 632 maximum 001 10 JAZ 001124 100051 EXC 51 006010 LDAI 000000 100351 EXC 351 103151 OAR 151 006010 LDAI 001200 006020 LDBI 014377 103150 OAR 50 103251 OBR 51 005041 TXA 006130 ERAT 020000 100217 EXC 217 103117 OAR 101017 SEN 17 001041 005000 NOP 001000 JMP 1034 001034 011031 LDA 1031 100317 EXC 317 103117 OAR 100050 EXC 50 100017 EXC 17 101050 SEN 50 001053 COMMENTS Disable all PIM's Initialize Disk controller 17 Load A with set up word Set up word Unit 0 Platter l Recalibrate Output set up word Zero all registers Transfer X to A Exclusive-OR immediate Maximum track number 40610 Jump if A zero Write End-of—File address Initialize Disk BTC Load A/map key Enable loading of map key Output map key to BIC Load initial buffer address Address of first word Load final buffer address 12008 + (5760 -1)1o Output initial address to BTC Output final address to BIC Track address to A Exclusive-0R immediate Unit O/Platter 1 Set controller to seek mode Output track set up word Sense unit 0 seek complete Seek mode complete Loop, seek not complete Loop address Load sector 0 setup word Set controller to sector mode Output set up word Activate disk 0 BIC Select read mode & connect BIC Sense disk 0 BIC not busy Jump address if true ADDRESS 1050 1051 1052 1053 1054 1055 1056 1057 1060 1061 1062 1063 1064 1065 1066 1067 1070 1071 1072 1073 1074 1075 1076 1077 1100 1101 1102 1103 1104 1105 1106 1107 1110 1111 1112 1113 1114 1115 1116 1117 OCTAL CODE 005000 001000 001046 101051 001133 104110 101210 001063 005000 001000 001056 101052 001070 005000 001000 001063 100053 006010 000000 100353 103153 011022 021024 103152 103253 100052 100210 101052 001110 005000 001000 001103 101210 001115 005000 001000 001110 101053 001134 101010 MNEMONIC NOP JMP 1046 SEN 51 EXCZ 110 SEN 210 NOP JMP 1056 SEN 52 NOP JMP 1063 EXC 53 LDAI EXC 353 DAR 153 LDA 1022 LDB 1024 DAR 52 OBR 53 EXC 52 EXC 210 SEN 52 NOP JMP 1103 Sen 210 NOP JMP 1110 SEN 53 SEN 10 62 COMMENTS Loop if busy Loop address Sense abnormal device stop Bad halt 2 address Select tape drive 1 Sense tape unit ready Unit ready jump address Loop, unit not ready Loop address Sense tape BIC not busy BIC not busy Loop, BIC busy Loop address Initialize MT BIC Load A register/map key Enable loading of map key Output key bits to BIC Load A/initial buffer address Load B/final buffer address Output initial address Output final address Activate MT BIC Write one binary record Sense BIC not busy BIC not busy Loop, BIC busy Loop address Sense tape unit ready Tape unit ready Loop, tape unit ready Loop address Sense BIC abnormal stop Sense tape error ADDRESS 1120 1121 1122 1123 1124 1125 1126 1127 1130 1131 1132 1133 1134 1135 OCTAL CODE 001135 005144 001000 001007 100410 101210 001132 005000 001000 001125 000001 000002 000003 000004 MNEMONIC IXR JMP 1007 EXC 410 SEN 210 NOP JMP 1125 63 COMMENTS Increment track address Return to input from disk Jump address Write file mark Sense tape unit ready Tape unit ready Loop, tape unit not ready Loop address 0000 HALT Bad halt, BIC disk abnormal stop Bad halt, BIC tape abnormal stop Bad halt, TAPE error 64 DISPLAY PROGRAMS GRASCL AND ULDIS The FORTRAN program GRASCL assigns gray levels (brightness levels) to ultrasound numbers (digitized ultrasonic data) through the use of a mapping created by the operator through the computer terminal. This program, along with FORTRAN program ULDIS* (ULtrasound DISplay), are used to output up to 400 records of rectified data to the Tektronix Computer Display Terminal. Each record appears on the graphics terminal as one line with varying brightnesses of green. The brightness represents the magnitude of the rectified data. There are 55 possible brightness levels plus the zero intensity level. The A/D converter, which is used to input the digitized data into the computer, has 8 bit words and therefore assigns up to 256 levels to the analog input signal. GRASCL assigns the 256 ultrasound levels to the 55 gray levels through the use of the mapping defined by the operator. The mapping is created by defining windows within the ultrasound levels and the gray levels and linearly mapping the range of ultrasound numbers onto the range of gray levels. A window is defined by its center and width. Another feature of GRASCL is to account for possible signal absorption. This option creates an amplifier whose gain is a function of distance which the ultrasound data is passed through. This amplifier *Written by Bruce Johnston and revised by the author. 65 is defined by specifying a cut point word number and a slope in dB/cm. Any number of slopes may be defined over the 2048 word (15 cm) range. The only constraints are that this mapping must be continuous and that the amplified data be no greater than 256. The latter constraint is produced by the program. Program GRASCL executes as follows: 1) Prior to assigning gray levels, the disc file name and logical unit number, which is holding the data to be mapped, must be specified. The two input files currently in use are ULTRAl on logical unit number 25 and ULTRA2 on logical unit number 26. The output file holding the gray scaled data is GULTRA on 27. 2) To define the mapping, the program requests the number of windows in the mapping, the window centers and width for the ultrasound numbers, and requests the minimum and maximum gray levels. 3) After the mapping is defined, the program outputs the mapping to the terminal and line printer and asks if there are any revisions. If there are, the program asks how many and which window numbers are to be changed. 4) With no further revisions, a level for level mapping will be output to the line printer, if sense switch 2 is ngt_set. 5) The mapping is defined within the program by the function IG(USR(I)), where I is the relative word number, USR(I) is the corre- sponding ultrasound number and IG(USR(I)) represents the gray level corresponding to that ultrasound number. 66 6) But before the gray levels are written out on GULTRA, the data must be read off of data files ULTRAl or ULTRA2 and "unpacked". That is, the data was packed, two 8 bit words per 16 bit computer word, by the peripheral controller prior to entry into the computer. The odd words are in the lower 8 bits and the even in the upper 8 bits. That is done in lines 201-207 of the program listing. Functions MASK and ISHIFT mask out the upper 8 bits of the unpacked word USRP(I) and shift the upper 8 bits into the position of the lower 8 bits, respectively. 7) This unpacked data may be rectified by the computer, if desired. This is done in lines 215-231 of the listing. The program finds an average, subtracts it from every word, and takes the absolute value of the results. 8) The distance related amplifier mapping is defined in lines 78-89. The program requests the gain per cm and the cutoff word for this gain. With the gain at this point as an initial value, the pro- gram defines a line with slope given by the gain per cm from the cutoff value through the 2048th word. The program then requests a new cutoff word, finds the value of the function at this word, and draws a new line with new slope. This function is the array X(I) in line 88. X(I) is used to amplify the signal in lines 209-213. A plot of three records stored on GULTRA, by GRASCL, is shown in Figures 5-15, 16 and 17. Program ULDIS is used to output the gray level words to the graphics terminal. Its purpose is to read the data off of GULTRA, unpack it, find the maximum of every four words, assign ASCII encoded 67 intensities to these words, find the position on the screen to output this word, ASCII encode this address, and output the new intensity word and address to the graphics terminal. It has been decided, in order to increase the speed of the display on the graphics terminal, that every eighth point on the screen will be written. Since an ultrasound record consists of 2048 words, this corre- sponds to one out of every four ultrasound words. That is why program ULDIS finds the maximum of every four words when all 2048 words are to be displayed. A useful option of ULDIS is the magnification of the display. If the range of the words to be displayed is greater than 512 and less than or equal to 1024, the display will be magnified by two. In like manner, a range of greater than 256 and less than or equal to 512 produces a magnification of four. This is the maximum magnification possible in this direction as no points are being skipped. The program also allows for writing multiple lines on the graphics terminal for each data record. This produces an expansion of the dis- play along the slow time axis. 68 Table 3-1. Program GRASCL--list1ng. I INSSIGN.RI-SI a IFNflIN 3 DELETE.24..GRNSCL 4 IPFILE.IO..IO s INEH.15 G IFORT.F.H,H 7 TITLE GRRscL a DINENSIGN G(2§6).IG(ZSG).X(2048) 9 INTEGER 00(64) 1. INTEGER USRP(1024) II INTEGER Nuan.GRRv1 31 NIH-((HIN-1)/441)I1R 32 NAX-((HAX-1)/4+1)xIR 33 LON-30 g; IcLLw USOPENILUN,27,FCI.01 36 URITE(60, 2010) Esc. FS 3; 100 3E:D(LUN END-400)(DATA(I>,I-1.1024) 39 Do 150 I-I.Ioa4 40 J-J41 41 IDIT-DATA(I) 4a IDAT(J)-HASK(IDIT.NSK.O) 43 J-J+I 44 IDAT(J)-ISHIFT(IDIT.O.8) 45 150 CONTINUE 46 KK-O 47 INC-4/IR 48 Do 160 I-1.2048.INC 49 KK-KK+1 so DUNE-0 51 DO 170 J-1.INC 52 IFIIDATTI4J-1>.GT.DUN0TDUND-IDAT(I+J-11 53 170 CONTINUE 54 IDAT(KK)-DUNB SS 160 CONTINUE Table 3-7. 74 Program ULDIS--listing. 160 CONTINUE OOO LOOP TO DISPLAY EACH 3648 SET OF DATA D2 330 IDx-1.NFIL Do 200 K-HIN.NAx Ix-Ix+8 IF(L.E0.0)ISEHD-1 IF(IDAT(K).E0.0)GO To 200 IDATB-IDAT1K) CALL INTENtIDAT2.DRIT) CALL ADRTEK(IX.IY,ADR) IF(ISEND.EO.1)GO To 500 URITE166.2020)ESC.FS,BRIT.ADR(S) GO TO 290 URITE(SO.2020)ESC.FS,BRIT,(ADR(J),J-1.S) ISEND-O CONTINUE IY-IV48 CONTINUE GOTO 100 CONTINUE FORNAT(6A1) FORNAT(1H+,8A1) END ILNGEN,N TIDBIULDgso3.O I I END,84 I IENDJOB /FIHI 75 THE FAST FOURIER TRANSFORM SUBROUTINE In ultrasonic tissue signature studies, one very useful tool is a means of determining the frequency spectrum of some portion of a time-domain signal. This is accomplished by taking the Fourier Trans- form of this signal. In this study, the time domain signal is discrete, due to the digitization of the ultrasonic reflections. There exist a set of algorithms which are used to transform the discrete time-domain signal into a discrete frequency spectrum. These are the commonly called 11 Fast Fourier Transforms. The following table summarizes the properties of Fourier trans- form pairs: Time function Frequency function Non-periodic and continuous Non-periodic and continuous Periodic and continuous Non-periodic and discrete Non-periodic and discrete Periodic and continuous Periodic and discrete Periodic and discrete The fast Fourier transform is based on the last Of these properties. That is, the Fourier transform Of a digitized and time periodic signal is a discrete and periodic frequency function. The ultrasonic data, though, will not be periodic. Some portion of the data will be speci- fied as to be transformed and will be isolated from the rest of the signal. So, in itself, it will not be strictly periodic. But the Fourier transform will assume that it is periodic with some period to. 76 t0 is the conversion time of one word multiplied by the number of words in the portion of the record to be transformed. This period of the time domain signal specifies the incremental frequency in the frequency domain. This is the incremental frequency Finc = 1/to Further, the period of the discrete frequency spectrum is equal to the inverse of the conversion time of one word of data. SO for a conver- sion time of .2 usec/word by the A/D converter, the period of the dis- crete frequency spectrum is 5 MHz. One-half of this frequency is called the Nyquist rate and corresponds to: 1) The theoretically maximum frequency of a signal that may be reproduced by sampling at twice the Nyquist rate. 2) The "folding frequency"; the frequency at which the frequency spectrum is completely defined by all frequency components less than this frequency. That is, the spectrum is symmetri- cal about the folding frequency. Further, when sampling at 5 MHz, the Fourier transform need only be displayed for frequencies up to 2.5 MHz. A property of the Fourier transform which results from multiplying two time signals or two frequency waveforms together is "convolution". Suppose there is a discrete time function Y(t) which may be defined in the time domain by Y(t) = H(t)’ X(t) . The Fourier transform of this product is 77 where x(m) and h(m) are the Fourier transforms of X(t) and H(t) respec- tively. As an example, given a set of pulses H(t) and a sine wave X(t) multiplied together to produce a discontinuous sine wave. The Fourier transform of this product would result in a discrete sinc function (the Fourier transform of a periodic set of pulses) convolved with a delta function which is at the frequency of the sine wave. A plot of this result would show the sine function centered about the frequency of the sine wave. A form of this result is as shown in the following figures of terminated sine waves of various frequencies. Here the convolution results in a spread of the frequency spectrum about the frequency of the sine wave (Figures 3-8 through 3-16). A problem may result in attempting to find the Fourier transform of a signal with frequency higher than the Nyquist rate. Suppose a 3 MHZ sine wave is sampled at 5 MHz. The expected transform would be a delta function at 3 MHz (see Figure 3-16). This result, shown in Figure 3—16 due to slow sampling, is called aliasing. If the sampled waveform were to have frequency components below half the sampling rate in addi- tion to comparatively large components above half the sampling rate, the expected result of Fast Fourier Transform would be incorrect. That is, the component above the Nyquist rate would be shifted to fS-f, the frequency equal to the sampling rate minus the frequency component. To compensate for this phenomenon, a low-pass filter with a cut- off frequency of 1.8 MHz has been placed at the output of the 78 pulser-receiver. This greatly attenuates the frequency components greater than 1.8 MHz. It also has a secondary benefit. Since much of the noise of the system has been due to frequencies above this value, the signal to noise ratio has been increased. The fast Fourier transform routine may be used to transform any portion of the 2048 word record. A stipulation of all FFT algorithms, though, is that the number of words to be transformed must be an inte- ger power of two. The algorithm used to implement the fast Fourier transform is that of Figure 3:6. It was chosen because of its relatively simple geometry and implementation. But prior to the use of this algorithm, the data must first be 'scrambled'. This is accomplished as in the flow chart of Figure 3-7. In reference to Figure 3-6, there is an equation which relates the elements of one column to the elements of the preceding column. It is Y(I,m) = Y(I-i, m]) + Nr Y(t-l, m2) (1) The element Y(£,m) corresponds to the node at column 1 and row m. Other variables are: W = e'jzwN where N is the number of words to be transformed r is defined by the numbers within the circles of Figure 3-5 m1 & m2 correspond to the row elements which comprise Y(I,m) as defined by the algorithm in Figure 3-6. The fast Fourier transform routine executes as follows: 1) It first determines if the number of words to be transformed is an integer power of two. 79 2) Finds an average value by sunmfing up 200 words from a usually constant portion of the records and divides by 200. 3) Subtracts this average from every word in the record. This sets the base line to approximately zero, which effectively drops the zero frequency component of the Fourier transform. 4) Assigns the range of the words to be transformed to a complex variable. Complex arithmetic will be used throughout the rest of this routine. 5) Scrambles the input data as descrited by the flow chart of Figure 3-7. 6) Assigns values to the “r's'l for the current column (the numbers within the circles in Figure 3-6). 7) Defines W. 8) The remainder of the routine implements the algorithm as described in Figure 3-6 and equation (1). 9) Due to a recurrent floating point processor error (here that is a multiplication Of a too small number by a too large number) it was found necessary to implement the complex multi- plication by using double precision variables. 10) The Fourier transform is determines at the end of the code as FFT(I) =v/ Y(I) x Y*(I)\ where Y*(I) is the complex conjugate of Y(I). In the operation of the Fourier transform, a number of trade-offs must be made. As stated earlier, the incremental frequency between the elements of the transform is given by the inverse of Y(4,m) OUTPUT X(O) Y(1,m) INPUT X(O) ‘0- - - - - x(S) .( x(3) ‘L 1:0) > Fast Fourier Transform Algorithm for N=8 x(m) : Scrambled input, Function of time x(m) : Unscrambled output, Discrete frequency spectrum Y(!.m) = Ira-13:1) + WrY(l-1.m2) Figure 3-6. Fast Fourier Transform Algorithm for N=8. 81 y(1.I) M = I- Ij MS= o 12=M/2 INPUT I J=1tOL M>I\I/2 Ms=Ms+2(J‘1) M = M—IZ in = 12/2 1‘ *— MSI = MS + 1‘ Y(2,MSI) = Y(1,I) Figure 3-7. Computer flow chart of scrambling algorithm. 82 (number of words to be transformed) X (conversion time of the A/D converter) So for a given conversion time, the relative information contained in the Fourier transform (the number of spikes in the display) goes as the inverse of the number Of words to be transformed. Suppose we are interested in the Fourier transform of the signal resulting from some length of tissue. How many elements of the transform would correspond to this distance of tissue? Ultrasound travels through water at approximately 1500 m/sec = 1.5 x 102 cm/msec = .15 cm/usec. The sampling rate of the A/D converter for most purposes is 5 MHz, which is .2 usec/word. The converter has a 2048 word memory. So the total conversion time is .4096 msec. and the ultrasound is able to travel ~1.5 X 102 cm/msec - .4096 msec = 61.4 cm in the conversion time. But the sound pulse must travel out and back in order to be included as data within this period. SO the effective distance is half the 61.4 cm or 30.7 cm. This distance will be recorded and stored in 2048 words of memory. The distance corresponding to the time between two adjacent words is 30.7 cm/2048 words = 0.015 cm = .15 mm . Since the Fourier transform is taken on the number of words which are integer powers of two, the following table illustrates the possible distances that the transform may be taken over: Number of words 8 16 32 64 128 256 512 1024 Distance 1.2mm 2.4mm 4.8mm 9.6mm 1.92cm 3.84cm 7.68cm 15.36cm 83 The increment in frequency of the fast Fourier transform is _ 1 Finc I 0.2 usec ' number Of words = 5 MHz/number of words The transform on either side of the folding frequency f0 = 2.5 MHz is symmetrical. So elements at frequencies less than and equal to 2.5 MHz completely specify the transform. The number of elements of the transform within f0 is number of elements = 2.5 MHZ/Finc . So 2-(number of elements in the transform) = number of words to be transformed. SO dividing the number of words in the above table by two will also give the distance corresponding to the number of elements in the Fourier transform, i.e. Number of elements 4 8 16 32 64 128 256 512 Distance 1.2mm 2.4mm 4.8mm 9.6mm 1.92cm 3.84cm 7.68cm 15.36cm Therefore, the more information that is carried in the Fourier transform results in less certainty of what produced the reflected ultrasound data. A listing of a FFT algorithm follows. 84 Table 3-8. Subroutine FTRANS--listing. EDS! SURROUTIHE FTRANS w/UVFRN/ UAVE(aO48), FFT(1624). DIV CONNON IENDPTS/ POINTG INTEGER HAVE. POINT DIHENSION Y(2,1024) INTEGER R1 16241.51]! INTEm MPOU, RANGE. HI. LOU RN.P .F COUILE PRECISION AC1 ACE:8DI.IDE. C81. C82. ADI.AD2 CORDLEX V HU.CEXP CNPLX CONPLEi UR1 URZ CONPLE HE EFFECT IS TO ZERO THE 6 FREQUENCY CONPONENT C C C FINDS THE APPROXINATE AVERAGE DY SUNHINC UORDS 1881 THROUGH 2606 3 AND DIVIDINC DY 209 HI - POINT(2) LOU . POINT(1) N - HI - LOU RANGE - N D0 40 I - 1.12 :00 ; 21:1 IF(POU.GT.RANGE) STOP IF(POU.E0.RANGE) COTO 20 CONTINUE CONTINUE SUN-O DO 44 I-1801.8000 44 CONTINUE DO 43 I-11,RANGE U:FLOAT(UAVE(ITLOU))-AV C URITES OUT THE SIGNAL TO IE TRANSFORHED Y(1.I)'CNPLX(U,O) 43 CONTINUE C SCRANDLER g SEE DIGITAL SIGNAL PROCESSING 8V UILLIAH STANLEY PAGE 272 88 Do 61 J-1 1.1 IFtN.LT.12)CO T0 55 Ns-foagatltJ-I) 65 12-12/2 61 CONTINUE RSI-NS+1 Y(2.NSI)-Y(1,I) CONTINUE DO 62 I’1.N V11.I)-Y(Z,I) CONTINUE Table 3-9. SO CONTINUE K-K4P 51 CONTINUE C DETERNINES THE CONSTANT FN-FLOAT(N) caPN--2.13.14159/FN UE-CNPLX(O..CEPN) U-CEXP(UE) Ne'N/Z PAGE 265 FIGURE 9-9 DO 52 I-1.N2 INe-I+N/2 Ia-Ixa I21-12-1 URI-UIIRTIT UREsUIIRtINaI 00000 00 AND Y(1.12) URIN-REAL10R1) DEEP-REALTUREI URII-AIHAG‘URI) UREI-AINActuna) VR-REAL(Y(1.IZ)) VI-AINAGIY(1.I2)) GOO ACITURIRIYR ACE-URERTVR O 85 Subroutine FTRANS--listing. EDD! THE FOLLOUING INPLENENTS THE FAST FOURIER TRANSFORA AS DESCRIBED IN DIGITAL SIGNAL PROCESSING DY STANLEY REAL AND INAGINERY PARTS OF URI AND URE THE FOLLOUING 15 CARDS INPLENENT NULTIPLICATION OF CONPEX HUNDER ISOHPLEX NULTPLICATION (A * DI)!(C 0 DI) . (“c -.D’ ADODC) NECCESSARY TO AVOID A FLOATING POINT PROCESSOR ERROR EX 33 IF(ADS(VI).LT.O.1E-161VI°O. lDI-URIIIYI ODE-UREIIVI CIIvURIIIVP CDBoUREIIvR ADI-URIRIVI ADZ-UR2NIVI C TAKES THE HOST SIGNIFICANT PART OF A DOUDLE PRECISION HUNGER URIR-SNGL(AC1-DD1) URZR'SNGL(AC2-DD2) UR1I-SNGLICDI+AD1) URZI'SNGL(CDETAD2) URI CNPLXCUR1R.UR1I) 86 Table 3-10. Subroutine FTRANS--listing. URI-CNPLXIURIR.UR1I) URE-CNPLX1UR2R.UREI) Y(Z,I)-Y(1.IEI)¢UR1 Y(Z.IN2)°Y(1.131)¢URE CONTINUE IF(P.EG.1)GO TO 75 ’0 53 1'1 N VR'REAL(V(2 VI'RIHRG‘V‘ IE1N’S1VR). IF(AOS(VI). Y(2.I)-CAPL V(1.II'Y12, 53 CONTINUE GO TO 86 75 DO 54 I'IoN C DETERNINES THE FOURIER TRANSFORH FFTII) AND THE POUER SPECTRUN $P(I C FRO" THE COHPLEX PORN OF THE TRANSFORH Y(I,I)‘CONJG(V(2 1;; ) I 16)VR-O. 1)) ,I) T.6 IE- {.6 1E-16)YI°O. ) ) 2 L L ¥ YR,YI) Y(I I) Y(E I)8Y(1. FFT(I)-REAL(Y(1 1.1) FFT(I)-SORT(FFT (I) 54 CONTINUE RETURN END EDIT £37 I Fiji .LmuPFL mmma zop NI: w._ m cmsoggu ummmma mngam ~=x com a mo Egowmcmgu Lowgzou mpmgomwo 9.. _ .m-m mgamwm Wj T—TfT W1 4- ‘ _ , 4‘_q‘ .“ ¢¢¢¢¢¢¢ «‘.w—.‘T+ T¢1+m3 :wm Nzx cow a mo Egommzmgu megzou — _ _ mpwgomwo .mum «gnaw; 111111111111 1411114ddd‘dd.1¢‘.._d- fl____ __ HEEHHEU i 2‘ :5?» 1J l 89 1j1 I {fl .m>mz :Pm Nzx cow m Lo Egommcmgu gmwgzom mpmgumvo .QFIm wgsmwu O 411441111411‘11‘111‘d.-——‘ ‘fl——-.ddflddddddldfldddd1d111¢1 . fl . ...F.. fi- IJ a .l J l 1 J ‘ .I J '5 f 4 '2. 1 J zl- rv I. g 1 4 :23. r L .xza 38‘ g!!! 1 J l 90 .mugoz Npm mo Egommcmgp .m>m3 :Pm Nzx cow m we Egowmcmgu gmwgsou mpmgumwa m... o; u. .__-m mgzmvm 144 EH' 0 JJJ . on '1 fl 1 3 J .m>m3 cmm NI: — a mo Egommcmgp wagzom mumgomwa .mpum wgzmwm u.. 0.. _ _ .0 _ 91 LJ 4 . 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A. .- . ri— LI' sat.“ .. .1 . > _ .p.»r> . a 3"7‘ goosvmcwuu zumcowumum woosvmcmuu Nmz fl 120 « v. 2 5.1.2: . is 9: c. .o..=cm8.c3:n.z.28.e oz 82° 5.2.1hwc 40 60 80 100 120 140 160 180 200 220 240 20 Five Section Mapping Log and exponentiai mapping. Figure 5-14. 121 .meucmcoaxm can .mecwp .moouumumn mcwgum umwmmpomm .mpum mgzmwu ‘ d mafiaame ummcwq i mumv wcfiuum wmflmwuuwm 4 -1 Q T. wcaamme ofienuaumwoa LL meme magnum emamauumm Ir: 1 J mafiaame wmaucwcoaxw mumv wcauum cwfimauomm r—i r—T 122 r‘_1 l ’1 T T' I T— 1 1 Com .mcwgpm ucoumm mo Egommcmgu megaou mmeUmwo a.“ O.« .m_-m wezmwi :3 0 Dad ‘0 Ell!*fll '1 .0. oh nun talk lickmxilh J AJ J J l l, J, J J J 123 j 1 T Iii T .mcwgpm ugwgp eo Egoemcmgu megsom mumgumwo 0.” OJ .mp-m mesmwi B. v: «bu \ $38!! 7 an «a 0.0 2 ‘ g it) I; J l l J 124 Cardiac Data This discussion concerns the displays of cardiac data from four different runs. In all four, the same subject was used. The first two runs were made using a l MHz transducer and are shown in Figures 5-20 through 5-27. The second two runs, Figures 5-28 through 5-32, used the 3 MHz transducer. All of these displays show the characteristic motion of some portion of the heart oscillating. Figure 5-20 is the first run using the l MHz transducer. It represents the first 1024 words of each record or about 15 cm. Figure 5-21 uses the same linear mapping but displays all 2048 words. Notice the secon- dary and tertiary reflections displayed in this figure. These reflec- tions would have originated from distances greater than l5 cm from the transducer and therefore could not be primary reflections from the heart. Figures 5-22 and 5-23 are an example of the uses of the exponen- tial and logarithmic mappings. In Figure 5-22, the only portion of the waveforms which is clearly defined are the relative peaks. The display produced through the log mapping can be seen to carry more visual in- formation. Here the exponential mapping was not as useful as the log or linear mappings. But consider the case of two peaks, relatively near one another, with a marginally high signal between the two. The log mapping would likely produce a nearly equal dark region for this entire range. The exponential mapping would accentuate these peaks and lower the effect of the rest of the signal. The discrete frequency spectrum for the interesting portion of the waveform for the first record is shown in Figure 5-24. Note that the 125 spectrum is quite different than those for the string array in Figures 5-l8 and 5-l9. The run in figures 5-20 through 5-24 used a gain of 20 dB. Figures 5-25 through 5-27 use a similar position of the transducer but have 40 dB gain. This additional gain is the probable cause for the damped sin wave seen prior to l00 usec of every record. These figures also show another comparison between the linear, logarithmic, and exponential mappings. The next two runs (Figures 5-28 through 5-32) used the 3 MHz transducer. The primary difference between these displays and those of the 1 MHz transducer is that the 3 MHz transducer has produced periodic structure within the heart at 8 cm. These waveforms were rectified prior to being digitized. The rectifying electronics caused a non-linear shift in the voltage baseline with time. This effect was to some extent corrected by introducing a —0.2 dB/cm gain through the program GRASCL. 126 .quzumcwgp N22 FIImpmu omwugmo .om-m mesmwm mUMOB vmoa umuflm I ofiammE Hmwcflw Mooswmcmufl mm: H moms omeoueu 127 .Lwozvmzmgp N:z_--wpmc omwutmu .Pmnm weaned ..'..L_- - “a ' fry-P. _, n], i .g 2?. f- 'I’I l —h 4.12:: IE! 300mm you :3me mos: N mwuooou omH uwoswmcmfi mm: H £503 mvom . mcfioEmE Rowena Saw 0328 Exponential mapping 1024 words 150 records Cardiac data 1 MHz transducer 2 lines drawn per record Cardiac data-lMHz transducer. Figure 5-22. 129 .Lmuzumcmsu nzzpnuwumv O.— 8— 0: 8a 0.— .mm-m ee=m_e st. .15.». tr .4 .11. a .14 Booms Hod mEHH H 28.03 VNOH @cHammE mQH Mwoswmcmfi sz H mums chateau 130 .ucmsmmm usmm; to Ecommcmgh wagzom mumgomwo .emum mgzmwu o m.~ o.~ u.. Nmaa o.. a. a.» a; a.» can; :uwmuxxcp 0 vs av. mus gun on" i new on» no. .9» .9m cam cam on. mwm sum 9. ow cm a J r 1 i J T J i 1 1. 1 1. 1 I 131 near mapping 1.. 2 lines drawn per record :40 m 1024 words Li 1.. 1 MHz transducer Cardiac data inear mapping. Cardiac data——1MHz transducer, 1 Figure 5—25. 132 .mcwagms mop .Lmuzumcmgw ~12F11mamc omwugcu .omum wgzmwm M m . .37. .3 - swuezTF‘Slt- ,' . Uuoowu Mom 95% 8:: N mUMOB vNOH 09.255: mQH Hwoswmcmuu 5.5 H mumtnaewao 133 .mcwagme mxm .Lwozcmcmgu szpuumpwu omwcgmu a e Choowu you CBmMU mmcHH N m©u03 vNOH OCHQOE HmHucwcomxm .N~-m weemee Zak. HQOSUMCMHH NE: H came ochumo 134 .mcwagme sauce; .Lmoaumcmgp N22m11mpmu um_ugmu .wN1m weaned choowu 18m gout mwcHH N mono: VNOH E0\m© oméi "COHumoHMHHQEN mcHQQE: .8059 maemepoem umoscmcmeo Na: m moan chateau .mcwqawe moo .Lmuznmcngw NIZmulmumu umwugmo .mwam weaned wuouwu Mom :3me mwcHH N moses VNOH 23% 8.01 "cosmoflfloé 05mm? mQH BHmpomm Mwoswmcmhfl mm: m Soc 0365 .mcwaqms axm .Lwozcmccgp 8338a GHOOWH 8Q ESQHU mQCflH N wanes VNS EEc 8.? "8383395 mCHQQmE HmHucmcoaxm Mwoscmcmuu um: m mumc uchumU 137 .mzwgnms amaze; .Lmozcmcaep szm11wumc omwvgmo Umoowu Mom £396 8qu .0 awesome ewe mono: «Noe eoxmw o~.o1 "seeomoeueaae< mcHnEmE umwcfiH .HMIm eteuuoom Hwoswmcmb mm: m 3mm 03980 138 .mcwaams mo; .Lmoaumcmgu N12mnuwwmu umwugwu .Nmum weaned J a F _ .05 [Mar r e. x 1 r . 5.... Ugoowu 1.8m EMHU mmCHH N vaMHpowm mcuooop omH mono: emoe Housemates Nmz m eo\mu om.c1“:0eoeoeeeaae< mfiHQQmE oQH moan ometumu CHAPTER 6 CONCLUSIONS AND AREAS FOR FURTHER RESEARCH An initial system for the acquisition and storage of digitized ultrasound for the purpose of imaging and tissue signature analysis has been designed, constructed, and tested, as outlined in this thesis. At this writing, a representative sample of digitized waveforms have been stored on magnetic tape. They include waveforms due to ultra- sound reflections from such objects as a nylon string array (M and B mode), a metallic plate, sponge, jn_yjyg_human tissues including heart, liver and muscle and also pigs liver jg_vitro. Also included is a set of electronic waveforms; 200 KHz to 3 MHz sin waves, square waves, and ramps. These several waveforms are currently being used to further develop software and signal shaping hardware. Future research using this system will emphasize tissue signature analysis rather than imaging. The system will be used to investigate which characteristics of the waveforms carry the significant information pertaining to the tissue signature. The system, as it exists and described in the thesis, was designed for maximum operator involvement at each step of data collection and analysis. However, as techniques are developed in the future, standard means of data analysis and new software should be developed. 139 140 For example, computing a histogram of the standard deviation of the power spectrum from a series of scans is possible with the present system. It would require, however, a good deal of operator time. As the learning process progresses, future will involve tradeoffs between operator control and speed of the process. REFERENCES 5) 6) 7) 8) 9) 10) 11) 12) 13) REFERENCES “Engineering Description--PMA Block Transfer Controller (BTC)", Code Iden t No. 21101, Dwg. No. 98A0783, Varian Data Machines, Division of Sperry-Univac, 2722 Michelson Drive, Irvine, California 92664. "Biomation Model 805 Waveform Recorder Operating and Service Manual", 10411 Bubb Road, Cupertino, California 95014. "Instruction Manual Ultrasonic Pulser-Receiver", Model 5050 PR, Panametrics, Inc., 221 Crescent St., Waltham, Massachusetts 02154. Technical Data Bulletins, Warner Electric Brake & Clutch Company, Beloit, Wisconsin 53511; "Step Motor SM-O72-0060", 4 phase variable reluctance 5° step angle; "4 Phase Driver Card for Step Motors", MCS-1824, MCS-1825; "High Helix Screw and Anti-Backlash Nut“. “Tektronix Computer Display Terminal Users Manual 4014 and 40l4-l", Tektronix, Inc., P. O. Box 500, Beaverton, Oregon 97077. PMA Block Transfer Controller Assy Code Indent No. 21101, Dwg. No. 44D0629, Varian Data Machines. Varian 74 System Handbook c1975, BTC Instructions p. 6-8, Table 6—6. Varian 74 System Handbook, Section 20, "Vortex II". Varian System Handbook, Section 18 “AID II Debugging Program“. V70 Vortex Operating System Reference Manual, Section 10, "Input/ Output Utility Program". William D. Stanley, Digital Signal Processing, Reston Publishing Company, Inc., c1975, Chapter 9--”Basic Properties of Discrete and Fast Fourier Transforms"; Chapter lO--"Applications of the Discrete Fourier Transform". P. N. T. Wells, and John P. Woodcock, Compgters in Ultrasonic Diag- nostics, Medical Computing Series, Vol. 1, Research Studies Press, c1977. D. N. White, Editor. Recent Advances in Ultrasound in Biomedicine, Vol. 1, Ultrasound in Biomedicine Series, Vol. 3, Research Studies Press, c1977. 141 03056 7675 1 93 312 1||||1|1|1|1||11|11