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 Title
 Robust signal processing methods for miniature acoustic sensing, separation, and recognition
 Creator
 Fazel, Amin
 Date
 2012
 Collection
 Electronic Theses & Dissertations
 Description

One of several emerging areas where microscale integration promises significant breakthroughs is in the field of acoustic sensing. However, separation, localization, and recognition of acoustic sources using microscale microphone arrays poses a significant challenge due to fundamental limitations imposed by the physics of sound propagation. The smaller the distance between the recording elements, the more difficult it is to measure localization and separation cues and hence it is more...
Show moreOne of several emerging areas where microscale integration promises significant breakthroughs is in the field of acoustic sensing. However, separation, localization, and recognition of acoustic sources using microscale microphone arrays poses a significant challenge due to fundamental limitations imposed by the physics of sound propagation. The smaller the distance between the recording elements, the more difficult it is to measure localization and separation cues and hence it is more difficult to recognize the acoustic sources of interest. The objective of this research is to investigate signal processing and machine learning techniques that can be used for noiserobust acoustic target recognition using miniature microphone arrays.The first part of this research focuses on designing "smart" analogtodigital conversion (ADC) algorithms that can enhance acoustic cues in subwavelength microphone arrays. Many source separation algorithms fail to deliver robust performance when applied to signals recorded using highdensity sensor arrays where the distance between sensor elements is much less than the wavelength of the signals. This can be attributed to limited dynamic range (determined by analogtodigital conversion) of the sensor which is insufficientto overcome the artifacts due to large crosschannel redundancy, nonhomogeneous mixing and highdimensionality of the signal space. We propose a novel framework that overcomes these limitations by integrating statistical learning directly with the signal measurement (analogtodigital) process which enables high fidelity separation of linear instantaneous mixture. At the core of the proposed ADC approach is a minmax optimization of a regularized objective function that yields a sequence of quantized parameters which asymptotically tracks the statistics of the input signal. Experiments with synthetic and real recordings demonstrate consistent performance improvements when the proposed approach is used as the analogtodigital frontend to conventional source separation algorithms.The second part of this research focuses on investigating a novel speech feature extraction algorithm that can recognize auditory targets (keywords and speakers) using noisy recordings. The features known as Sparse Auditory Reproducing Kernel (SPARK) coefficients are extracted under the hypothesis that the noiserobust information in speech signal is embedded in a subspace spanned by sparse, regularized, overcomplete, nonlinear, and phaseshifted gammatone basis functions. The feature extraction algorithm involves computing kernel functions between the speech data and precomputed set of phasedshifted gammatone functions, followed by a simple pooling technique ("MAX" operation). In this work, we present experimental results for a hidden Markov model (HMM) based speech recognition system whose performance has been evaluated on a standard AURORA 2 dataset. The results demonstrate that the SPARK features deliver significant and consistent improvements in recognition accuracy over the standard ETSI STQ WI007 DSR benchmark features. We have also verified the noiserobustness of the SPARK features for the task of speaker verification. Experimental results based on the NIST SRE 2003 dataset show significant improvements when compared to a standard Melfrequency cepstral coefficients (MFCCs) based benchmark.
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 Title
 Theory, synthesis and implementation of currentmode CMOS piecewiselinear circuits using margin propagation
 Creator
 Gu, Ming
 Date
 2012
 Collection
 Electronic Theses & Dissertations
 Description

Achieving high energyefficiency is a key requirement for many emerging smart sensors and portable computing systems. While digital signal processing (DSP) has been the defacto technique for implementing ultralow power systems, analog signal processing (ASP) provides an attractive and alternate approach that can not only achieve high energy efficiency but also high computational density. Conventional ASP techniques are based on a topdown design approach, where proven mathematical...
Show moreAchieving high energyefficiency is a key requirement for many emerging smart sensors and portable computing systems. While digital signal processing (DSP) has been the defacto technique for implementing ultralow power systems, analog signal processing (ASP) provides an attractive and alternate approach that can not only achieve high energy efficiency but also high computational density. Conventional ASP techniques are based on a topdown design approach, where proven mathematical principles and related algorithms are mapped and emulated using computational primitives inherent in the device physics. An example being the translinear principle, which is the stateoftheart ASP technique, that uses the exponential currenttovoltage characteristics for designing ultralowpower analog processors. However, elegant formulations could result from a bottomup approach where device and bias independent computational primitives (e.g. current and charge conservation principles) are used for designing "approximate" analog signal processors. The hypothesis of this proposal is that many signal processing algorithms exhibit an inherent calibration ability due to which their performance remains unaffected by the use of "approximate" analog computing techniques. In this research, we investigate the theory, synthesis and implementation of high performance analog processors using a novel piecewiselinear (PWL) approximation algorithm called margin propagation (MP). MP principle utilizes only basic conservation laws of physical quantities (current, charge, mass, energy) for computing and therefore is scalable across devices (silicon, MEMS, microfluidics). However, there are additional advantages of MPbased processors when implemented using CMOS currentmode circuits, which includes: 1) the operation of the MP processor requires only addition, subtraction and threshold operations and hence is independent of transistor biasing (weak, moderate and strong inversion) and robust to variations in environmental conditions (e.g. temperature); and 2) improved dynamic range and faster convergence as compared to the translinear implementations. We verify our hypothesis using two analog signal processing applications: (a) design of highperformance analog lowdensity parity check (LDPC) decoders for applications in sensor networks; and (b) design of ultralowpower analog support vector machines (SVM) for smart sensors. Our results demonstrate that an algorithmic framework for designing margin propagation (MP) based LDPC decoders can be used to tradeoff its BER performance with its energy efficiency, making the design attractive for applications with adaptive energyBER constraints. We have verified this tradeoff using an analog currentmode implementation of an MPbased (32,8) LDPC decoder. Measured results from prototypes fabricated in a 0.5 μm CMOS process show that the BER performance of the MPbased decoder outperforms a benchmark stateoftheart minsum decoder at SNR levels greater than 3.5 dB and can achieve energy efficiencies greater than 100pJ/bit at a throughput of 12.8 Mbps. In the second part of this study, MP principle is used for designing an energyscalable support vector machine (SVM) whose power and speed requirements can be configured dynamically without any degradation in performance. We have verified the energyscaling property using a currentmode implementation of an SVM operating with 8 dimensional feature vectors and 18 support vectors. The prototype fabricated in a 0.5μm CMOS process has integrated an array of floating gate transistors that serve as storage for up to 2052 SVM parameters. The SVM prototype also integrates novel circuits that have been designed for interfacing with an external digital processor. This includes a novel currentinput currentoutput logarithmic amplifier circuit that can achieve a dynamic range of 120dB while consuming nanowatts of power. Another novel circuit includes a varactor based temperature compensated floatinggate memory that demonstrates a superior programming range than other temperature compensated floatinggate memories.
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