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Electronic Theses & Dissertations
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Theses
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VLSI systolic array for matrix triangulation in load flow analysis
Leung, Yu-Ying Jackson
Text (1983)
Part of
Electronic Theses & Dissertations
High performance CMOS switched-current circuits for low-voltage signal processing applications
Huang, Renyuan
Text (1998)
Part of
Electronic Theses & Dissertations
Applications of logical circuit expressions to CMOS VLSI design automation
Wu, Ching-Farn Eric
Text (1987)
Part of
Electronic Theses & Dissertations
Evaluation of a single VLSI chip algorithm for triangulating large band form matrices
Hsü, Wen-chʻang
Text (1982)
Part of
Electronic Theses & Dissertations
Verification of MOS circuits at the switch level
Liao, Jiann
Text (1990)
Part of
Electronic Theses & Dissertations
Acceleration of simulated annealing building block placement process
Vai, Man Kuan
Text (1987)
Part of
Electronic Theses & Dissertations
Design and test of current-mode signal processing circuits
Krishnan, Shoba
Text (1993)
Part of
Electronic Theses & Dissertations
Performance tradeoffs in the hierarchical design of regular VLSI structures
Leung, Yu-Ying Jackson
Text (1986)
Part of
Electronic Theses & Dissertations
A VLSI chip architecture for the B-spline surface evaluation
Maa, Chia-Yiu
Text (1987)
Part of
Electronic Theses & Dissertations
Mapping of pulse width modulation algorithms into architecture
Ray, Tuhin
Text (1989)
Part of
Electronic Theses & Dissertations
CMOS VLSI implementations of a new feedback neural network architecture
Wang, Yiwen
Text (1991)
Part of
Electronic Theses & Dissertations
A floating-point inner product step processor for use in a VLSI Systolic array
Tseng, Yeong-Jeng
Text (1983)
Part of
Electronic Theses & Dissertations
Testability design of the DKS chip
Singh, Tej Pal
Text (1988)
Part of
Electronic Theses & Dissertations
Stress tests of analog CMOS ICs for gate-oxide reliability enhancement
Khalil, Mohammad Athar
Text (2001)
Part of
Electronic Theses & Dissertations
A concurrent error detection and correction algorithm for fault-tolerant VLSI arithmetic array processors
Shokoohi-Kayvan, Kamran
Text (1985)
Part of
Electronic Theses & Dissertations
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