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CMOS VLSI implementations of a new feedback neural network architecture
Wang, Yiwen
Text (1991)
Part of
Electronic Theses & Dissertations
A VLSI chip architecture for the B-spline surface evaluation
Maa, Chia-Yiu
Text (1987)
Part of
Electronic Theses & Dissertations
Applications of logical circuit expressions to CMOS VLSI design automation
Wu, Ching-Farn Eric
Text (1987)
Part of
Electronic Theses & Dissertations
Performance tradeoffs in the hierarchical design of regular VLSI structures
Leung, Yu-Ying Jackson
Text (1986)
Part of
Electronic Theses & Dissertations
Testability design of the DKS chip
Singh, Tej Pal
Text (1988)
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Electronic Theses & Dissertations
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