The modeling and sythesis of asynchronous sequential logic circuits

In Collections: Electronic Theses & Dissertations

Copyright Status: In Copyright

Material Type: Theses

Authors: Kang, Jun-Woo

Date: 1993

Subjects: Logic circuits

Program of Study: Electrical Engineering

Degree Level: Doctoral

Language: English

Pages: xi, 116 pages

Permalink: https://doi.org/doi:10.25335/42q1-0b66