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Testability design of the DKS chip

Testability design of the DKS chip

Text (1988)

Part of Electronic Theses & Dissertations

A VLSI chip architecture for the B-spline surface evaluation

A VLSI chip architecture for the B-spline surface evaluation

Text (1987)

Part of Electronic Theses & Dissertations

Mapping of pulse width modulation algorithms into architecture

Mapping of pulse width modulation algorithms into architecture

Text (1989)

Part of Electronic Theses & Dissertations

A floating-point inner product step processor for use in a VLSI Systolic array

A floating-point inner product step processor for use in a VLSI Systolic array

Tseng, Yeong-Jeng

Text (1983)

Part of Electronic Theses & Dissertations

VLSI chip architecture for the computation of the Direct Kinematic Solution of a robotic manipulator

VLSI chip architecture for the computation of the Direct Kinematic Solution of a robotic manipulator

Leung, Steven Siutit

Text (1985)

Part of Electronic Theses & Dissertations

Performance-design tradeoff of hierarchical VLSI design entry points

Performance-design tradeoff of hierarchical VLSI design entry points

Text (1985)

Part of Electronic Theses & Dissertations

VLSI systolic array for matrix triangulation in load flow analysis

VLSI systolic array for matrix triangulation in load flow analysis

Leung, Yu-Ying Jackson

Text (1983)

Part of Electronic Theses & Dissertations